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24
25#include <asm/asm-offsets.h>
26
27
28
29
30
31
32#include <asm/psw.h>
33#include <asm/cache.h>
34#include <asm/assembly.h>
35#include <asm/pgtable.h>
36#include <asm/signal.h>
37#include <asm/unistd.h>
38#include <asm/thread_info.h>
39
40#include <linux/linkage.h>
41
42#ifdef CONFIG_64BIT
43 .level 2.0w
44#else
45 .level 2.0
46#endif
47
48 .import pa_dbit_lock,data
49
50
51
52
53 .macro space_to_prot spc prot
54 depd,z \spc,62,31,\prot
55 .endm
56#else
57 .macro space_to_prot spc prot
58 extrd,u \spc,(64 - (SPACEID_SHIFT)),32,\prot
59 .endm
60#endif
61
62
63 .macro virt_map
64
65 rsm PSW_SM_I, %r0
66 mtsp %r0, %sr4
67 mtsp %r0, %sr5
68 mtsp %r0, %sr6
69 tovirt_r1 %r29
70 load32 KERNEL_PSW, %r1
71
72 rsm PSW_SM_QUIET,%r0
73 mtctl %r0, %cr17
74 mtctl %r0, %cr17
75 mtctl %r1, %ipsw
76 load32 4f, %r1
77 mtctl %r1, %cr18
78 ldo 4(%r1), %r1
79 mtctl %r1, %cr18
80 rfir
81 nop
824:
83 .endm
84
85
86
87
88
89
90
91
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95
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109
110
111
112
113
114 .macro get_stack_use_cr30
115
116
117
118 copy %r30, %r17
119 mfctl %cr30, %r1
120 ldo THREAD_SZ_ALGN(%r1), %r30
121 mtsp %r0,%sr7
122 mtsp %r16,%sr3
123 tophys %r1,%r9
124 LDREG TI_TASK(%r9), %r1
125 tophys %r1,%r9
126 ldo TASK_REGS(%r9),%r9
127 STREG %r17,PT_GR30(%r9)
128 STREG %r29,PT_GR29(%r9)
129 STREG %r26,PT_GR26(%r9)
130 STREG %r16,PT_SR7(%r9)
131 copy %r9,%r29
132 .endm
133
134 .macro get_stack_use_r30
135
136
137
138 tophys %r30,%r9
139 copy %r30,%r1
140 ldo PT_SZ_ALGN(%r30),%r30
141 STREG %r1,PT_GR30(%r9)
142 STREG %r29,PT_GR29(%r9)
143 STREG %r26,PT_GR26(%r9)
144 STREG %r16,PT_SR7(%r9)
145 copy %r9,%r29
146 .endm
147
148 .macro rest_stack
149 LDREG PT_GR1(%r29), %r1
150 LDREG PT_GR30(%r29),%r30
151 LDREG PT_GR29(%r29),%r29
152 .endm
153
154
155
156 .macro def code
157 b intr_save
158 ldi \code, %r8
159 .align 32
160 .endm
161
162
163
164 .macro extint code
165 b intr_extint
166 mfsp %sr7,%r16
167 .align 32
168 .endm
169
170 .import os_hpmc, code
171
172
173 .macro hpmc code
174 nop
175 load32 PA(os_hpmc), %r3
176 bv,n 0(%r3)
177 nop
178 .word 0
179 .word PA(os_hpmc)
180 .word 0
181 .endm
182
183
184
185
186
187
188
189
190
191 va = r8
192 spc = r24
193
194#ifndef CONFIG_64BIT
195
196
197
198
199
200 .macro itlb_11 code
201
202 mfctl %pcsq, spc
203 b itlb_miss_11
204 mfctl %pcoq, va
205
206 .align 32
207 .endm
208#endif
209
210
211
212
213
214 .macro itlb_20 code
215 mfctl %pcsq, spc
216#ifdef CONFIG_64BIT
217 b itlb_miss_20w
218#else
219 b itlb_miss_20
220#endif
221 mfctl %pcoq, va
222
223 .align 32
224 .endm
225
226#ifndef CONFIG_64BIT
227
228
229
230
231 .macro naitlb_11 code
232
233 mfctl %isr,spc
234 b naitlb_miss_11
235 mfctl %ior,va
236
237 .align 32
238 .endm
239#endif
240
241
242
243
244
245 .macro naitlb_20 code
246
247 mfctl %isr,spc
248#ifdef CONFIG_64BIT
249 b naitlb_miss_20w
250#else
251 b naitlb_miss_20
252#endif
253 mfctl %ior,va
254
255 .align 32
256 .endm
257
258#ifndef CONFIG_64BIT
259
260
261
262
263 .macro dtlb_11 code
264
265 mfctl %isr, spc
266 b dtlb_miss_11
267 mfctl %ior, va
268
269 .align 32
270 .endm
271#endif
272
273
274
275
276
277 .macro dtlb_20 code
278
279 mfctl %isr, spc
280#ifdef CONFIG_64BIT
281 b dtlb_miss_20w
282#else
283 b dtlb_miss_20
284#endif
285 mfctl %ior, va
286
287 .align 32
288 .endm
289
290#ifndef CONFIG_64BIT
291
292
293 .macro nadtlb_11 code
294
295 mfctl %isr,spc
296 b nadtlb_miss_11
297 mfctl %ior,va
298
299 .align 32
300 .endm
301#endif
302
303
304
305 .macro nadtlb_20 code
306
307 mfctl %isr,spc
308#ifdef CONFIG_64BIT
309 b nadtlb_miss_20w
310#else
311 b nadtlb_miss_20
312#endif
313 mfctl %ior,va
314
315 .align 32
316 .endm
317
318#ifndef CONFIG_64BIT
319
320
321
322
323 .macro dbit_11 code
324
325 mfctl %isr,spc
326 b dbit_trap_11
327 mfctl %ior,va
328
329 .align 32
330 .endm
331#endif
332
333
334
335
336
337 .macro dbit_20 code
338
339 mfctl %isr,spc
340#ifdef CONFIG_64BIT
341 b dbit_trap_20w
342#else
343 b dbit_trap_20
344#endif
345 mfctl %ior,va
346
347 .align 32
348 .endm
349
350
351
352
353 .macro space_adjust spc,va,tmp
354#ifdef CONFIG_64BIT
355 extrd,u \spc,63,SPACEID_SHIFT,\tmp
356 depd %r0,63,SPACEID_SHIFT,\spc
357 depd \tmp,31,SPACEID_SHIFT,\va
358#endif
359 .endm
360
361 .import swapper_pg_dir,code
362
363
364
365
366 .macro get_pgd spc,reg
367 ldil L%PA(swapper_pg_dir),\reg
368 ldo R%PA(swapper_pg_dir)(\reg),\reg
369 or,COND(=) %r0,\spc,%r0
370 mfctl %cr25,\reg
371 .endm
372
373
374
375
376
377
378
379
380
381
382
383
384 .macro space_check spc,tmp,fault
385 mfsp %sr7,\tmp
386 or,COND(<>) %r0,\spc,%r0
387
388
389 copy \spc,\tmp
390 or,COND(=) %r0,\tmp,%r0
391 cmpb,COND(<>),n \tmp,\spc,\fault
392 .endm
393
394
395
396
397
398
399
400 .macro L2_ptep pmd,pte,index,va,fault
401
402 extru \va,31-ASM_PMD_SHIFT,ASM_BITS_PER_PMD,\index
403#else
404
405 extrd,u \va,63-ASM_PGDIR_SHIFT,ASM_BITS_PER_PGD,\index
406 #else
407
408 extru \va,31-ASM_PGDIR_SHIFT,32-ASM_PGDIR_SHIFT,\index
409 # else
410 extru \va,31-ASM_PGDIR_SHIFT,ASM_BITS_PER_PGD,\index
411 # endif
412# endif
413#endif
414 dep %r0,31,PAGE_SHIFT,\pmd
415 copy %r0,\pte
416 ldw,s \index(\pmd),\pmd
417 bb,>=,n \pmd,_PxD_PRESENT_BIT,\fault
418 dep %r0,31,PxD_FLAG_SHIFT,\pmd
419 copy \pmd,%r9
420 SHLREG %r9,PxD_VALUE_SHIFT,\pmd
421 extru \va,31-PAGE_SHIFT,ASM_BITS_PER_PTE,\index
422 dep %r0,31,PAGE_SHIFT,\pmd
423 shladd \index,BITS_PER_PTE_ENTRY,\pmd,\pmd
424 LDREG %r0(\pmd),\pte
425 bb,>=,n \pte,_PAGE_PRESENT_BIT,\fault
426 .endm
427
428
429
430
431
432
433
434
435
436
437
438 .macro L3_ptep pgd,pte,index,va,fault
439
440 extrd,u \va,63-ASM_PGDIR_SHIFT,ASM_BITS_PER_PGD,\index
441 copy %r0,\pte
442 extrd,u,*= \va,63-ASM_PGDIR_SHIFT,64-ASM_PGDIR_SHIFT,%r0
443 ldw,s \index(\pgd),\pgd
444 extrd,u,*= \va,63-ASM_PGDIR_SHIFT,64-ASM_PGDIR_SHIFT,%r0
445 bb,>=,n \pgd,_PxD_PRESENT_BIT,\fault
446 extrd,u,*= \va,63-ASM_PGDIR_SHIFT,64-ASM_PGDIR_SHIFT,%r0
447 shld \pgd,PxD_VALUE_SHIFT,\index
448 extrd,u,*= \va,63-ASM_PGDIR_SHIFT,64-ASM_PGDIR_SHIFT,%r0
449 copy \index,\pgd
450 extrd,u,*<> \va,63-ASM_PGDIR_SHIFT,64-ASM_PGDIR_SHIFT,%r0
451 ldo ASM_PGD_PMD_OFFSET(\pgd),\pgd
452#endif
453 L2_ptep \pgd,\pte,\index,\va,\fault
454 .endm
455
456
457 .macro dbit_lock spc,tmp,tmp1
458#ifdef CONFIG_SMP
459 cmpib,COND(=),n 0,\spc,2f
460 load32 PA(pa_dbit_lock),\tmp
4611: LDCW 0(\tmp),\tmp1
462 cmpib,COND(=) 0,\tmp1,1b
463 nop
4642:
465#endif
466 .endm
467
468
469 .macro dbit_unlock0 spc,tmp
470#ifdef CONFIG_SMP
471 or,COND(=) %r0,\spc,%r0
472 stw \spc,0(\tmp)
473#endif
474 .endm
475
476
477 .macro dbit_unlock1 spc,tmp
478#ifdef CONFIG_SMP
479 load32 PA(pa_dbit_lock),\tmp
480 dbit_unlock0 \spc,\tmp
481#endif
482 .endm
483
484
485
486 .macro update_ptep spc,ptep,pte,tmp,tmp1
487#ifdef CONFIG_SMP
488 or,COND(=) %r0,\spc,%r0
489 LDREG 0(\ptep),\pte
490#endif
491 ldi _PAGE_ACCESSED,\tmp1
492 or \tmp1,\pte,\tmp
493 and,COND(<>) \tmp1,\pte,%r0
494 STREG \tmp,0(\ptep)
495 .endm
496
497
498
499 .macro update_dirty spc,ptep,pte,tmp
500#ifdef CONFIG_SMP
501 or,COND(=) %r0,\spc,%r0
502 LDREG 0(\ptep),\pte
503#endif
504 ldi _PAGE_ACCESSED|_PAGE_DIRTY,\tmp
505 or \tmp,\pte,\pte
506 STREG \pte,0(\ptep)
507 .endm
508
509
510
511 #define PAGE_ADD_SHIFT (PAGE_SHIFT-12)
512
513
514 .macro convert_for_tlb_insert20 pte
515 extrd,u \pte,(63-ASM_PFN_PTE_SHIFT)+(63-58)+PAGE_ADD_SHIFT,\
516 64-PAGE_SHIFT-PAGE_ADD_SHIFT,\pte
517 depdi _PAGE_SIZE_ENCODING_DEFAULT,63,\
518 (63-58)+PAGE_ADD_SHIFT,\pte
519 .endm
520
521
522
523 .macro make_insert_tlb spc,pte,prot
524 space_to_prot \spc \prot
525
526
527
528
529
530
531
532
533
534
535
536
537 depd \pte,8,7,\prot
538
539
540
541
542 extrd,u,*= \pte,_PAGE_USER_BIT+32,1,%r0
543 depdi 7,11,3,\prot
544
545
546
547 extrd,u,*= \pte,_PAGE_GATEWAY_BIT+32,1,%r0
548 depd %r0,11,2,\prot
549
550
551
552
553
554
555
556 extrd,u,*= \pte,_PAGE_NO_CACHE_BIT+32,1,%r0
557 depdi 1,12,1,\prot
558
559
560 convert_for_tlb_insert20 \pte
561 .endm
562
563
564
565
566 .macro make_insert_tlb_11 spc,pte,prot
567 zdep \spc,30,15,\prot
568 dep \pte,8,7,\prot
569 extru,= \pte,_PAGE_NO_CACHE_BIT,1,%r0
570 depi 1,12,1,\prot
571 extru,= \pte,_PAGE_USER_BIT,1,%r0
572 depi 7,11,3,\prot
573 extru,= \pte,_PAGE_GATEWAY_BIT,1,%r0
574 depi 0,11,2,\prot
575
576
577
578 depi 0,31,ASM_PFN_PTE_SHIFT,\pte
579 SHRREG \pte,(ASM_PFN_PTE_SHIFT-(31-26)),\pte
580 .endm
581
582
583
584
585
586 .macro f_extend pte,tmp
587 extrd,s \pte,42,4,\tmp
588 addi,<> 1,\tmp,%r0
589 extrd,s \pte,63,25,\pte
590 .endm
591
592
593
594
595
596
597
598
599
600 .macro do_alias spc,tmp,tmp1,va,pte,prot,fault,patype
601 cmpib,COND(<>),n 0,\spc,\fault
602 ldil L%(TMPALIAS_MAP_START),\tmp
603
604
605
606 depdi 0,31,32,\tmp
607#endif
608 copy \va,\tmp1
609 depi 0,31,23,\tmp1
610 cmpb,COND(<>),n \tmp,\tmp1,\fault
611 mfctl %cr19,\tmp
612
613 extrw,u \tmp,5,6,\tmp
614
615
616
617
618
619
620
621 ldi (_PAGE_REFTRAP|_PAGE_READ|_PAGE_WRITE),\prot
622
623
624
625
626
627 cmpiclr,= 0x01,\tmp,%r0
628 ldi (_PAGE_DIRTY|_PAGE_READ|_PAGE_WRITE),\prot
629.ifc \patype,20
630 depd,z \prot,8,7,\prot
631.else
632.ifc \patype,11
633 depw,z \prot,8,7,\prot
634.else
635 .error "undefined PA type to do_alias"
636.endif
637.endif
638
639
640
641
642#ifdef CONFIG_64BIT
643 extrd,u,*= \va,41,1,%r0
644#else
645 extrw,u,= \va,9,1,%r0
646#endif
647 or,COND(tr) %r23,%r0,\pte
648 or %r26,%r0,\pte
649 .endm
650
651
652
653
654
655
656
657
658
659
660
661 .text
662
663 .align 4096
664
665ENTRY(fault_vector_20)
666
667 .ascii "cows can fly"
668 .byte 0
669 .align 32
670
671 hpmc 1
672 def 2
673 def 3
674 extint 4
675 def 5
676 itlb_20 6
677 def 7
678 def 8
679 def 9
680 def 10
681 def 11
682 def 12
683 def 13
684 def 14
685 dtlb_20 15
686 naitlb_20 16
687 nadtlb_20 17
688 def 18
689 def 19
690 dbit_20 20
691 def 21
692 def 22
693 def 23
694 def 24
695 def 25
696 def 26
697 def 27
698 def 28
699 def 29
700 def 30
701 def 31
702END(fault_vector_20)
703
704#ifndef CONFIG_64BIT
705
706 .align 2048
707
708ENTRY(fault_vector_11)
709
710 .ascii "cows can fly"
711 .byte 0
712 .align 32
713
714 hpmc 1
715 def 2
716 def 3
717 extint 4
718 def 5
719 itlb_11 6
720 def 7
721 def 8
722 def 9
723 def 10
724 def 11
725 def 12
726 def 13
727 def 14
728 dtlb_11 15
729 naitlb_11 16
730 nadtlb_11 17
731 def 18
732 def 19
733 dbit_11 20
734 def 21
735 def 22
736 def 23
737 def 24
738 def 25
739 def 26
740 def 27
741 def 28
742 def 29
743 def 30
744 def 31
745END(fault_vector_11)
746
747#endif
748
749 .align PAGE_SIZE
750ENTRY(end_fault_vector)
751
752 .import handle_interruption,code
753 .import do_cpu_irq_mask,code
754
755
756
757
758
759
760
761ENTRY(ret_from_kernel_thread)
762
763
764 BL schedule_tail, %r2
765 nop
766
767 LDREG TI_TASK-THREAD_SZ_ALGN-FRAME_SIZE(%r30), %r1
768 LDREG TASK_PT_GR25(%r1), %r26
769#ifdef CONFIG_64BIT
770 LDREG TASK_PT_GR27(%r1), %r27
771#endif
772 LDREG TASK_PT_GR26(%r1), %r1
773 ble 0(%sr7, %r1)
774 copy %r31, %r2
775 b finish_child_return
776 nop
777ENDPROC(ret_from_kernel_thread)
778
779
780
781
782
783
784
785ENTRY(_switch_to)
786 STREG %r2, -RP_OFFSET(%r30)
787
788 callee_save_float
789 callee_save
790
791 load32 _switch_to_ret, %r2
792
793 STREG %r2, TASK_PT_KPC(%r26)
794 LDREG TASK_PT_KPC(%r25), %r2
795
796 STREG %r30, TASK_PT_KSP(%r26)
797 LDREG TASK_PT_KSP(%r25), %r30
798 LDREG TASK_THREAD_INFO(%r25), %r25
799 bv %r0(%r2)
800 mtctl %r25,%cr30
801
802_switch_to_ret:
803 mtctl %r0, %cr0
804 callee_rest
805 callee_rest_float
806
807 LDREG -RP_OFFSET(%r30), %r2
808 bv %r0(%r2)
809 copy %r26, %r28
810ENDPROC(_switch_to)
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826 .align PAGE_SIZE
827
828ENTRY(syscall_exit_rfi)
829 mfctl %cr30,%r16
830 LDREG TI_TASK(%r16), %r16
831 ldo TASK_REGS(%r16),%r16
832
833
834
835 LDREG PT_IAOQ0(%r16),%r19
836 depi 3,31,2,%r19
837 STREG %r19,PT_IAOQ0(%r16)
838 LDREG PT_IAOQ1(%r16),%r19
839 depi 3,31,2,%r19
840 STREG %r19,PT_IAOQ1(%r16)
841 LDREG PT_PSW(%r16),%r19
842 load32 USER_PSW_MASK,%r1
843#ifdef CONFIG_64BIT
844 load32 USER_PSW_HI_MASK,%r20
845 depd %r20,31,32,%r1
846#endif
847 and %r19,%r1,%r19
848 load32 USER_PSW,%r1
849 or %r19,%r1,%r19
850 STREG %r19,PT_PSW(%r16)
851
852
853
854
855
856
857
858
859
860
861
862 STREG %r0,PT_SR2(%r16)
863 mfsp %sr3,%r19
864 STREG %r19,PT_SR0(%r16)
865 STREG %r19,PT_SR1(%r16)
866 STREG %r19,PT_SR3(%r16)
867 STREG %r19,PT_SR4(%r16)
868 STREG %r19,PT_SR5(%r16)
869 STREG %r19,PT_SR6(%r16)
870 STREG %r19,PT_SR7(%r16)
871
872intr_return:
873
874 mfctl %cr30,%r1
875 LDREG TI_FLAGS(%r1),%r19
876 bb,<,n %r19,31-TIF_NEED_RESCHED,intr_do_resched
877
878 .import do_notify_resume,code
879intr_check_sig:
880
881 mfctl %cr30,%r1
882 LDREG TI_FLAGS(%r1),%r19
883 ldi (_TIF_SIGPENDING|_TIF_NOTIFY_RESUME), %r20
884 and,COND(<>) %r19, %r20, %r0
885 b,n intr_restore
886
887
888
889
890
891
892
893
894 LDREG PT_IASQ0(%r16), %r20
895 cmpib,COND(=),n 0,%r20,intr_restore
896 LDREG PT_IASQ1(%r16), %r20
897 cmpib,COND(=),n 0,%r20,intr_restore
898
899
900
901
902 ssm PSW_SM_I, %r0
903
904 copy %r0, %r25
905#ifdef CONFIG_64BIT
906 ldo -16(%r30),%r29
907#endif
908
909 BL do_notify_resume,%r2
910 copy %r16, %r26
911
912 b,n intr_check_sig
913
914intr_restore:
915 copy %r16,%r29
916 ldo PT_FR31(%r29),%r1
917 rest_fp %r1
918 rest_general %r29
919
920
921 pcxt_ssm_bug
922 rsm PSW_SM_QUIET,%r0
923 tophys_r1 %r29
924
925
926
927
928 rest_specials %r29
929
930
931
932
933 rest_stack
934
935 rfi
936 nop
937
938#ifndef CONFIG_PREEMPT
939# define intr_do_preempt intr_restore
940#endif
941
942 .import schedule,code
943intr_do_resched:
944
945
946
947
948 LDREG PT_IASQ0(%r16), %r20
949 cmpib,COND(=) 0, %r20, intr_do_preempt
950 nop
951 LDREG PT_IASQ1(%r16), %r20
952 cmpib,COND(=) 0, %r20, intr_do_preempt
953 nop
954
955
956
957 ssm PSW_SM_I, %r0
958
959#ifdef CONFIG_64BIT
960 ldo -16(%r30),%r29
961#endif
962
963 ldil L%intr_check_sig, %r2
964#ifndef CONFIG_64BIT
965 b schedule
966#else
967 load32 schedule, %r20
968 bv %r0(%r20)
969#endif
970 ldo R%intr_check_sig(%r2), %r2
971
972
973
974
975
976
977#ifdef CONFIG_PREEMPT
978 .import preempt_schedule_irq,code
979intr_do_preempt:
980 rsm PSW_SM_I, %r0
981
982
983 mfctl %cr30, %r1
984 LDREG TI_PRE_COUNT(%r1), %r19
985 cmpib,COND(<>) 0, %r19, intr_restore
986 nop
987
988
989 LDREG PT_PSW(%r16), %r20
990 bb,<,n %r20, 31 - PSW_SM_I, intr_restore
991 nop
992
993 BL preempt_schedule_irq, %r2
994 nop
995
996 b,n intr_restore
997#endif
998
999
1000
1001
1002
1003intr_extint:
1004 cmpib,COND(=),n 0,%r16,1f
1005
1006 get_stack_use_cr30
1007 b,n 2f
1008
10091:
1010 get_stack_use_r30
10112:
1012 save_specials %r29
1013 virt_map
1014 save_general %r29
1015
1016 ldo PT_FR0(%r29), %r24
1017 save_fp %r24
1018
1019 loadgp
1020
1021 copy %r29, %r26
1022 copy %r29, %r16
1023
1024 ldil L%intr_return, %r2
1025
1026#ifdef CONFIG_64BIT
1027 ldo -16(%r30),%r29
1028#endif
1029
1030 b do_cpu_irq_mask
1031 ldo R%intr_return(%r2), %r2
1032ENDPROC(syscall_exit_rfi)
1033
1034
1035
1036
1037ENTRY(intr_save)
1038 mfsp %sr7,%r16
1039 cmpib,COND(=),n 0,%r16,1f
1040 get_stack_use_cr30
1041 b 2f
1042 copy %r8,%r26
1043
10441:
1045 get_stack_use_r30
1046 copy %r8,%r26
1047
10482:
1049 save_specials %r29
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061 cmpib,COND(=),n 6,%r26,skip_save_ior
1062
1063
1064 mfctl %cr20, %r16
1065 nop
1066 mfctl %cr21, %r17
1067
1068
1069#ifdef CONFIG_64BIT
1070
1071
1072
1073
1074
1075 extrd,u,*<> %r8,PSW_W_BIT,1,%r0
1076 depdi 0,1,2,%r17
1077
1078
1079
1080
1081
1082
1083
1084
1085 extrd,u %r16,63,SPACEID_SHIFT,%r1
1086 depd %r1,31,SPACEID_SHIFT,%r17
1087 depdi 0,63,SPACEID_SHIFT,%r16
1088#endif
1089 STREG %r16, PT_ISR(%r29)
1090 STREG %r17, PT_IOR(%r29)
1091
1092
1093skip_save_ior:
1094 virt_map
1095 save_general %r29
1096
1097 ldo PT_FR0(%r29), %r25
1098 save_fp %r25
1099
1100 loadgp
1101
1102 copy %r29, %r25
1103#ifdef CONFIG_64BIT
1104 ldo -16(%r30),%r29
1105#endif
1106
1107 ldil L%intr_check_sig, %r2
1108 copy %r25, %r16
1109
1110 b handle_interruption
1111 ldo R%intr_check_sig(%r2), %r2
1112ENDPROC(intr_save)
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134 t0 = r1
1135 va = r8
1136 t1 = r9
1137 pte = r16
1138 prot = r17
1139 spc = r24
1140 ptp = r25
1141
1142#ifdef CONFIG_64BIT
1143
1144dtlb_miss_20w:
1145 space_adjust spc,va,t0
1146 get_pgd spc,ptp
1147 space_check spc,t0,dtlb_fault
1148
1149 L3_ptep ptp,pte,t0,va,dtlb_check_alias_20w
1150
1151 dbit_lock spc,t0,t1
1152 update_ptep spc,ptp,pte,t0,t1
1153
1154 make_insert_tlb spc,pte,prot
1155
1156 idtlbt pte,prot
1157 dbit_unlock1 spc,t0
1158
1159 rfir
1160 nop
1161
1162dtlb_check_alias_20w:
1163 do_alias spc,t0,t1,va,pte,prot,dtlb_fault,20
1164
1165 idtlbt pte,prot
1166
1167 rfir
1168 nop
1169
1170nadtlb_miss_20w:
1171 space_adjust spc,va,t0
1172 get_pgd spc,ptp
1173 space_check spc,t0,nadtlb_fault
1174
1175 L3_ptep ptp,pte,t0,va,nadtlb_check_alias_20w
1176
1177 dbit_lock spc,t0,t1
1178 update_ptep spc,ptp,pte,t0,t1
1179
1180 make_insert_tlb spc,pte,prot
1181
1182 idtlbt pte,prot
1183 dbit_unlock1 spc,t0
1184
1185 rfir
1186 nop
1187
1188nadtlb_check_alias_20w:
1189 do_alias spc,t0,t1,va,pte,prot,nadtlb_emulate,20
1190
1191 idtlbt pte,prot
1192
1193 rfir
1194 nop
1195
1196#else
1197
1198dtlb_miss_11:
1199 get_pgd spc,ptp
1200
1201 space_check spc,t0,dtlb_fault
1202
1203 L2_ptep ptp,pte,t0,va,dtlb_check_alias_11
1204
1205 dbit_lock spc,t0,t1
1206 update_ptep spc,ptp,pte,t0,t1
1207
1208 make_insert_tlb_11 spc,pte,prot
1209
1210 mfsp %sr1,t0
1211 mtsp spc,%sr1
1212
1213 idtlba pte,(%sr1,va)
1214 idtlbp prot,(%sr1,va)
1215
1216 mtsp t0, %sr1
1217 dbit_unlock1 spc,t0
1218
1219 rfir
1220 nop
1221
1222dtlb_check_alias_11:
1223 do_alias spc,t0,t1,va,pte,prot,dtlb_fault,11
1224
1225 idtlba pte,(va)
1226 idtlbp prot,(va)
1227
1228 rfir
1229 nop
1230
1231nadtlb_miss_11:
1232 get_pgd spc,ptp
1233
1234 space_check spc,t0,nadtlb_fault
1235
1236 L2_ptep ptp,pte,t0,va,nadtlb_check_alias_11
1237
1238 dbit_lock spc,t0,t1
1239 update_ptep spc,ptp,pte,t0,t1
1240
1241 make_insert_tlb_11 spc,pte,prot
1242
1243
1244 mfsp %sr1,t0
1245 mtsp spc,%sr1
1246
1247 idtlba pte,(%sr1,va)
1248 idtlbp prot,(%sr1,va)
1249
1250 mtsp t0, %sr1
1251 dbit_unlock1 spc,t0
1252
1253 rfir
1254 nop
1255
1256nadtlb_check_alias_11:
1257 do_alias spc,t0,t1,va,pte,prot,nadtlb_emulate,11
1258
1259 idtlba pte,(va)
1260 idtlbp prot,(va)
1261
1262 rfir
1263 nop
1264
1265dtlb_miss_20:
1266 space_adjust spc,va,t0
1267 get_pgd spc,ptp
1268 space_check spc,t0,dtlb_fault
1269
1270 L2_ptep ptp,pte,t0,va,dtlb_check_alias_20
1271
1272 dbit_lock spc,t0,t1
1273 update_ptep spc,ptp,pte,t0,t1
1274
1275 make_insert_tlb spc,pte,prot
1276
1277 f_extend pte,t0
1278
1279 idtlbt pte,prot
1280 dbit_unlock1 spc,t0
1281
1282 rfir
1283 nop
1284
1285dtlb_check_alias_20:
1286 do_alias spc,t0,t1,va,pte,prot,dtlb_fault,20
1287
1288 idtlbt pte,prot
1289
1290 rfir
1291 nop
1292
1293nadtlb_miss_20:
1294 get_pgd spc,ptp
1295
1296 space_check spc,t0,nadtlb_fault
1297
1298 L2_ptep ptp,pte,t0,va,nadtlb_check_alias_20
1299
1300 dbit_lock spc,t0,t1
1301 update_ptep spc,ptp,pte,t0,t1
1302
1303 make_insert_tlb spc,pte,prot
1304
1305 f_extend pte,t0
1306
1307 idtlbt pte,prot
1308 dbit_unlock1 spc,t0
1309
1310 rfir
1311 nop
1312
1313nadtlb_check_alias_20:
1314 do_alias spc,t0,t1,va,pte,prot,nadtlb_emulate,20
1315
1316 idtlbt pte,prot
1317
1318 rfir
1319 nop
1320
1321#endif
1322
1323nadtlb_emulate:
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340 mfctl %cr19,%r9
1341
1342
1343
1344
1345
1346 ldi 0x280,%r16
1347 and %r9,%r16,%r17
1348 cmpb,<>,n %r16,%r17,nadtlb_probe_check
1349 bb,>=,n %r9,26,nadtlb_nullify
1350 BL get_register,%r25
1351 extrw,u %r9,15,5,%r8
1352 cmpib,COND(=),n -1,%r1,nadtlb_fault
1353 copy %r1,%r24
1354 BL get_register,%r25
1355 extrw,u %r9,10,5,%r8
1356 cmpib,COND(=),n -1,%r1,nadtlb_fault
1357 BL set_register,%r25
1358 add,l %r1,%r24,%r1
1359
1360nadtlb_nullify:
1361 mfctl %ipsw,%r8
1362 ldil L%PSW_N,%r9
1363 or %r8,%r9,%r8
1364 mtctl %r8,%ipsw
1365
1366 rfir
1367 nop
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382nadtlb_probe_check:
1383 ldi 0x80,%r16
1384 and %r9,%r16,%r17
1385 cmpb,<>,n %r16,%r17,nadtlb_fault
1386 BL get_register,%r25
1387 extrw,u %r9,31,5,%r8
1388 cmpib,COND(=),n -1,%r1,nadtlb_fault
1389 BL set_register,%r25
1390 copy %r0,%r1
1391 b nadtlb_nullify
1392 nop
1393
1394
1395#ifdef CONFIG_64BIT
1396itlb_miss_20w:
1397
1398
1399
1400
1401
1402
1403 space_adjust spc,va,t0
1404 get_pgd spc,ptp
1405 space_check spc,t0,itlb_fault
1406
1407 L3_ptep ptp,pte,t0,va,itlb_fault
1408
1409 dbit_lock spc,t0,t1
1410 update_ptep spc,ptp,pte,t0,t1
1411
1412 make_insert_tlb spc,pte,prot
1413
1414 iitlbt pte,prot
1415 dbit_unlock1 spc,t0
1416
1417 rfir
1418 nop
1419
1420naitlb_miss_20w:
1421
1422
1423
1424
1425
1426
1427 space_adjust spc,va,t0
1428 get_pgd spc,ptp
1429 space_check spc,t0,naitlb_fault
1430
1431 L3_ptep ptp,pte,t0,va,naitlb_check_alias_20w
1432
1433 dbit_lock spc,t0,t1
1434 update_ptep spc,ptp,pte,t0,t1
1435
1436 make_insert_tlb spc,pte,prot
1437
1438 iitlbt pte,prot
1439 dbit_unlock1 spc,t0
1440
1441 rfir
1442 nop
1443
1444naitlb_check_alias_20w:
1445 do_alias spc,t0,t1,va,pte,prot,naitlb_fault,20
1446
1447 iitlbt pte,prot
1448
1449 rfir
1450 nop
1451
1452#else
1453
1454itlb_miss_11:
1455 get_pgd spc,ptp
1456
1457 space_check spc,t0,itlb_fault
1458
1459 L2_ptep ptp,pte,t0,va,itlb_fault
1460
1461 dbit_lock spc,t0,t1
1462 update_ptep spc,ptp,pte,t0,t1
1463
1464 make_insert_tlb_11 spc,pte,prot
1465
1466 mfsp %sr1,t0
1467 mtsp spc,%sr1
1468
1469 iitlba pte,(%sr1,va)
1470 iitlbp prot,(%sr1,va)
1471
1472 mtsp t0, %sr1
1473 dbit_unlock1 spc,t0
1474
1475 rfir
1476 nop
1477
1478naitlb_miss_11:
1479 get_pgd spc,ptp
1480
1481 space_check spc,t0,naitlb_fault
1482
1483 L2_ptep ptp,pte,t0,va,naitlb_check_alias_11
1484
1485 dbit_lock spc,t0,t1
1486 update_ptep spc,ptp,pte,t0,t1
1487
1488 make_insert_tlb_11 spc,pte,prot
1489
1490 mfsp %sr1,t0
1491 mtsp spc,%sr1
1492
1493 iitlba pte,(%sr1,va)
1494 iitlbp prot,(%sr1,va)
1495
1496 mtsp t0, %sr1
1497 dbit_unlock1 spc,t0
1498
1499 rfir
1500 nop
1501
1502naitlb_check_alias_11:
1503 do_alias spc,t0,t1,va,pte,prot,itlb_fault,11
1504
1505 iitlba pte,(%sr0, va)
1506 iitlbp prot,(%sr0, va)
1507
1508 rfir
1509 nop
1510
1511
1512itlb_miss_20:
1513 get_pgd spc,ptp
1514
1515 space_check spc,t0,itlb_fault
1516
1517 L2_ptep ptp,pte,t0,va,itlb_fault
1518
1519 dbit_lock spc,t0,t1
1520 update_ptep spc,ptp,pte,t0,t1
1521
1522 make_insert_tlb spc,pte,prot
1523
1524 f_extend pte,t0
1525
1526 iitlbt pte,prot
1527 dbit_unlock1 spc,t0
1528
1529 rfir
1530 nop
1531
1532naitlb_miss_20:
1533 get_pgd spc,ptp
1534
1535 space_check spc,t0,naitlb_fault
1536
1537 L2_ptep ptp,pte,t0,va,naitlb_check_alias_20
1538
1539 dbit_lock spc,t0,t1
1540 update_ptep spc,ptp,pte,t0,t1
1541
1542 make_insert_tlb spc,pte,prot
1543
1544 f_extend pte,t0
1545
1546 iitlbt pte,prot
1547 dbit_unlock1 spc,t0
1548
1549 rfir
1550 nop
1551
1552naitlb_check_alias_20:
1553 do_alias spc,t0,t1,va,pte,prot,naitlb_fault,20
1554
1555 iitlbt pte,prot
1556
1557 rfir
1558 nop
1559
1560#endif
1561
1562#ifdef CONFIG_64BIT
1563
1564dbit_trap_20w:
1565 space_adjust spc,va,t0
1566 get_pgd spc,ptp
1567 space_check spc,t0,dbit_fault
1568
1569 L3_ptep ptp,pte,t0,va,dbit_fault
1570
1571 dbit_lock spc,t0,t1
1572 update_dirty spc,ptp,pte,t1
1573
1574 make_insert_tlb spc,pte,prot
1575
1576 idtlbt pte,prot
1577 dbit_unlock0 spc,t0
1578
1579 rfir
1580 nop
1581#else
1582
1583dbit_trap_11:
1584
1585 get_pgd spc,ptp
1586
1587 space_check spc,t0,dbit_fault
1588
1589 L2_ptep ptp,pte,t0,va,dbit_fault
1590
1591 dbit_lock spc,t0,t1
1592 update_dirty spc,ptp,pte,t1
1593
1594 make_insert_tlb_11 spc,pte,prot
1595
1596 mfsp %sr1,t1
1597 mtsp spc,%sr1
1598
1599 idtlba pte,(%sr1,va)
1600 idtlbp prot,(%sr1,va)
1601
1602 mtsp t1, %sr1
1603 dbit_unlock0 spc,t0
1604
1605 rfir
1606 nop
1607
1608dbit_trap_20:
1609 get_pgd spc,ptp
1610
1611 space_check spc,t0,dbit_fault
1612
1613 L2_ptep ptp,pte,t0,va,dbit_fault
1614
1615 dbit_lock spc,t0,t1
1616 update_dirty spc,ptp,pte,t1
1617
1618 make_insert_tlb spc,pte,prot
1619
1620 f_extend pte,t1
1621
1622 idtlbt pte,prot
1623 dbit_unlock0 spc,t0
1624
1625 rfir
1626 nop
1627#endif
1628
1629 .import handle_interruption,code
1630
1631kernel_bad_space:
1632 b intr_save
1633 ldi 31,%r8
1634
1635dbit_fault:
1636 b intr_save
1637 ldi 20,%r8
1638
1639itlb_fault:
1640 b intr_save
1641 ldi 6,%r8
1642
1643nadtlb_fault:
1644 b intr_save
1645 ldi 17,%r8
1646
1647naitlb_fault:
1648 b intr_save
1649 ldi 16,%r8
1650
1651dtlb_fault:
1652 b intr_save
1653 ldi 15,%r8
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677 .macro reg_save regs
1678 STREG %r3, PT_GR3(\regs)
1679 STREG %r4, PT_GR4(\regs)
1680 STREG %r5, PT_GR5(\regs)
1681 STREG %r6, PT_GR6(\regs)
1682 STREG %r7, PT_GR7(\regs)
1683 STREG %r8, PT_GR8(\regs)
1684 STREG %r9, PT_GR9(\regs)
1685 STREG %r10,PT_GR10(\regs)
1686 STREG %r11,PT_GR11(\regs)
1687 STREG %r12,PT_GR12(\regs)
1688 STREG %r13,PT_GR13(\regs)
1689 STREG %r14,PT_GR14(\regs)
1690 STREG %r15,PT_GR15(\regs)
1691 STREG %r16,PT_GR16(\regs)
1692 STREG %r17,PT_GR17(\regs)
1693 STREG %r18,PT_GR18(\regs)
1694 .endm
1695
1696 .macro reg_restore regs
1697 LDREG PT_GR3(\regs), %r3
1698 LDREG PT_GR4(\regs), %r4
1699 LDREG PT_GR5(\regs), %r5
1700 LDREG PT_GR6(\regs), %r6
1701 LDREG PT_GR7(\regs), %r7
1702 LDREG PT_GR8(\regs), %r8
1703 LDREG PT_GR9(\regs), %r9
1704 LDREG PT_GR10(\regs),%r10
1705 LDREG PT_GR11(\regs),%r11
1706 LDREG PT_GR12(\regs),%r12
1707 LDREG PT_GR13(\regs),%r13
1708 LDREG PT_GR14(\regs),%r14
1709 LDREG PT_GR15(\regs),%r15
1710 LDREG PT_GR16(\regs),%r16
1711 LDREG PT_GR17(\regs),%r17
1712 LDREG PT_GR18(\regs),%r18
1713 .endm
1714
1715 .macro fork_like name
1716ENTRY(sys_\name\()_wrapper)
1717 LDREG TI_TASK-THREAD_SZ_ALGN-FRAME_SIZE(%r30), %r1
1718 ldo TASK_REGS(%r1),%r1
1719 reg_save %r1
1720 mfctl %cr27, %r28
1721 ldil L%sys_\name, %r31
1722 be R%sys_\name(%sr4,%r31)
1723 STREG %r28, PT_CR27(%r1)
1724ENDPROC(sys_\name\()_wrapper)
1725 .endm
1726
1727fork_like clone
1728fork_like fork
1729fork_like vfork
1730
1731
1732ENTRY(child_return)
1733 BL schedule_tail, %r2
1734 nop
1735finish_child_return:
1736 LDREG TI_TASK-THREAD_SZ_ALGN-FRAME_SIZE(%r30), %r1
1737 ldo TASK_REGS(%r1),%r1
1738
1739 LDREG PT_CR27(%r1), %r3
1740 mtctl %r3, %cr27
1741 reg_restore %r1
1742 b syscall_exit
1743 copy %r0,%r28
1744ENDPROC(child_return)
1745
1746ENTRY(sys_rt_sigreturn_wrapper)
1747 LDREG TI_TASK-THREAD_SZ_ALGN-FRAME_SIZE(%r30),%r26
1748 ldo TASK_REGS(%r26),%r26
1749
1750 STREG %r2, -RP_OFFSET(%r30)
1751#ifdef CONFIG_64BIT
1752 ldo FRAME_SIZE(%r30), %r30
1753 BL sys_rt_sigreturn,%r2
1754 ldo -16(%r30),%r29
1755#else
1756 BL sys_rt_sigreturn,%r2
1757 ldo FRAME_SIZE(%r30), %r30
1758#endif
1759
1760 ldo -FRAME_SIZE(%r30), %r30
1761 LDREG -RP_OFFSET(%r30), %r2
1762
1763
1764 LDREG TI_TASK-THREAD_SZ_ALGN-FRAME_SIZE(%r30),%r1
1765 ldo TASK_REGS(%r1),%r1
1766 reg_restore %r1
1767
1768
1769
1770
1771
1772 bv %r0(%r2)
1773 LDREG PT_GR28(%r1),%r28
1774ENDPROC(sys_rt_sigreturn_wrapper)
1775
1776ENTRY(syscall_exit)
1777
1778
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788 mfctl %cr30, %r1
1789 LDREG TI_TASK(%r1),%r1
1790 STREG %r28,TASK_PT_GR28(%r1)
1791
1792#ifdef CONFIG_HPUX
1793
1794#define PER_HPUX 0x10
1795 ldw TASK_PERSONALITY(%r1),%r19
1796
1797
1798 ldo -PER_HPUX(%r19), %r19
1799 cmpib,COND(<>),n 0,%r19,1f
1800
1801
1802 STREG %r22,TASK_PT_GR22(%r1)
1803 STREG %r29,TASK_PT_GR29(%r1)
18041:
1805
1806#endif
1807
1808
1809
1810
1811 loadgp
1812
1813syscall_check_resched:
1814
1815
1816
1817 LDREG TI_FLAGS-THREAD_SZ_ALGN-FRAME_SIZE(%r30),%r19
1818 bb,<,n %r19, 31-TIF_NEED_RESCHED, syscall_do_resched
1819
1820 .import do_signal,code
1821syscall_check_sig:
1822 LDREG TI_FLAGS-THREAD_SZ_ALGN-FRAME_SIZE(%r30),%r19
1823 ldi (_TIF_SIGPENDING|_TIF_NOTIFY_RESUME), %r26
1824 and,COND(<>) %r19, %r26, %r0
1825 b,n syscall_restore
1826
1827syscall_do_signal:
1828
1829
1830
1831
1832
1833 LDREG TI_TASK-THREAD_SZ_ALGN-FRAME_SIZE(%r30),%r1
1834 ldo TASK_REGS(%r1), %r26
1835 reg_save %r26
1836
1837#ifdef CONFIG_64BIT
1838 ldo -16(%r30),%r29
1839#endif
1840
1841 BL do_notify_resume,%r2
1842 ldi 1, %r25
1843
1844 LDREG TI_TASK-THREAD_SZ_ALGN-FRAME_SIZE(%r30),%r1
1845 ldo TASK_REGS(%r1), %r20
1846 reg_restore %r20
1847
1848 b,n syscall_check_sig
1849
1850syscall_restore:
1851 LDREG TI_TASK-THREAD_SZ_ALGN-FRAME_SIZE(%r30),%r1
1852
1853
1854 ldw TASK_FLAGS(%r1),%r19
1855 ldi _TIF_SYSCALL_TRACE_MASK,%r2
1856 and,COND(=) %r19,%r2,%r0
1857 b,n syscall_restore_rfi
1858
1859 ldo TASK_PT_FR31(%r1),%r19
1860 rest_fp %r19
1861
1862 LDREG TASK_PT_SAR(%r1),%r19
1863 mtsar %r19
1864
1865 LDREG TASK_PT_GR2(%r1),%r2
1866 LDREG TASK_PT_GR19(%r1),%r19
1867 LDREG TASK_PT_GR20(%r1),%r20
1868 LDREG TASK_PT_GR21(%r1),%r21
1869 LDREG TASK_PT_GR22(%r1),%r22
1870 LDREG TASK_PT_GR23(%r1),%r23
1871 LDREG TASK_PT_GR24(%r1),%r24
1872 LDREG TASK_PT_GR25(%r1),%r25
1873 LDREG TASK_PT_GR26(%r1),%r26
1874 LDREG TASK_PT_GR27(%r1),%r27
1875 LDREG TASK_PT_GR28(%r1),%r28
1876 LDREG TASK_PT_GR29(%r1),%r29
1877 LDREG TASK_PT_GR31(%r1),%r31
1878
1879
1880 LDREG TASK_PT_GR30(%r1),%r1
1881 rsm PSW_SM_I, %r0
1882 copy %r1,%r30
1883 mfsp %sr3,%r1
1884 mtsp %r1,%sr7
1885 ssm PSW_SM_I, %r0
1886
1887
1888 mtsp %r0,%sr2
1889 mtsp %r1,%sr4
1890 mtsp %r1,%sr5
1891 mtsp %r1,%sr6
1892
1893 depi 3,31,2,%r31
1894
1895#ifdef CONFIG_64BIT
1896
1897
1898
1899
1900 extrd,u,*<> %r30,63,1,%r1
1901 rsm PSW_SM_W, %r0
1902
1903 xor %r30,%r1,%r30
1904#endif
1905 be,n 0(%sr3,%r31)
1906
1907
1908
1909
1910
1911
1912syscall_restore_rfi:
1913 ldo -1(%r0),%r2
1914 mtctl %r2,%cr0
1915 LDREG TASK_PT_PSW(%r1),%r2
1916 ldi 0x0b,%r20
1917 depi -1,13,1,%r20
1918
1919
1920
1921
1922
1923
1924 extru,= %r19,TIF_SINGLESTEP_PA_BIT,1,%r0
1925 depi -1,27,1,%r20
1926
1927
1928 extru,= %r19,TIF_BLOCKSTEP_PA_BIT,1,%r0
1929 depi -1,7,1,%r20
1930
1931 STREG %r20,TASK_PT_PSW(%r1)
1932
1933
1934
1935 mfsp %sr3,%r25
1936 STREG %r25,TASK_PT_SR3(%r1)
1937 STREG %r25,TASK_PT_SR4(%r1)
1938 STREG %r25,TASK_PT_SR5(%r1)
1939 STREG %r25,TASK_PT_SR6(%r1)
1940 STREG %r25,TASK_PT_SR7(%r1)
1941 STREG %r25,TASK_PT_IASQ0(%r1)
1942 STREG %r25,TASK_PT_IASQ1(%r1)
1943
1944
1945
1946
1947
1948
1949
1950
1951
1952
1953 bb,< %r2,30,pt_regs_ok
1954 ldo TASK_REGS(%r1),%r25
1955 reg_save %r25
1956
1957
1958 mfsp %sr0,%r2
1959 STREG %r2,TASK_PT_SR0(%r1)
1960
1961
1962 mfsp %sr1,%r2
1963 STREG %r2,TASK_PT_SR1(%r1)
1964
1965
1966 STREG %r0,TASK_PT_SR2(%r1)
1967
1968 LDREG TASK_PT_GR31(%r1),%r2
1969 depi 3,31,2,%r2
1970 STREG %r2,TASK_PT_IAOQ0(%r1)
1971 ldo 4(%r2),%r2
1972 STREG %r2,TASK_PT_IAOQ1(%r1)
1973 b intr_restore
1974 copy %r25,%r16
1975
1976pt_regs_ok:
1977 LDREG TASK_PT_IAOQ0(%r1),%r2
1978 depi 3,31,2,%r2
1979 STREG %r2,TASK_PT_IAOQ0(%r1)
1980 LDREG TASK_PT_IAOQ1(%r1),%r2
1981 depi 3,31,2,%r2
1982 STREG %r2,TASK_PT_IAOQ1(%r1)
1983 b intr_restore
1984 copy %r25,%r16
1985
1986 .import schedule,code
1987syscall_do_resched:
1988 BL schedule,%r2
1989#ifdef CONFIG_64BIT
1990 ldo -16(%r30),%r29
1991#else
1992 nop
1993#endif
1994 b syscall_check_resched
1995 nop
1996ENDPROC(syscall_exit)
1997
1998
1999#ifdef CONFIG_FUNCTION_TRACER
2000 .import ftrace_function_trampoline,code
2001ENTRY(_mcount)
2002 copy %r3, %arg2
2003 b ftrace_function_trampoline
2004 nop
2005ENDPROC(_mcount)
2006
2007ENTRY(return_to_handler)
2008 load32 return_trampoline, %rp
2009 copy %ret0, %arg0
2010 copy %ret1, %arg1
2011 b ftrace_return_to_handler
2012 nop
2013return_trampoline:
2014 copy %ret0, %rp
2015 copy %r23, %ret0
2016 copy %r24, %ret1
2017
2018.globl ftrace_stub
2019ftrace_stub:
2020 bv %r0(%rp)
2021 nop
2022ENDPROC(return_to_handler)
2023#endif
2024
2025#ifdef CONFIG_IRQSTACKS
2026
2027
2028ENTRY(call_on_stack)
2029 copy %sp, %r1
2030
2031
2032
2033
2034
2035# ifdef CONFIG_64BIT
2036
2037 ldo 256(%arg2), %sp
2038
2039 STREG %rp, -144(%sp)
2040
2041 LDREG 16(%arg1), %arg1
2042 bve,l (%arg1), %rp
2043 STREG %r1, -136(%sp)
2044 LDREG -144(%sp), %rp
2045 bve (%rp)
2046 LDREG -136(%sp), %sp
2047# else
2048
2049 ldo 128(%arg2), %sp
2050
2051 STREG %r1, -68(%sp)
2052 STREG %rp, -84(%sp)
2053
2054 bb,>=,n %arg1, 30, 1f
2055 depwi 0,31,2, %arg1
2056 LDREG 0(%arg1), %arg1
20571:
2058 be,l 0(%sr4,%arg1), %sr0, %r31
2059 copy %r31, %rp
2060 LDREG -84(%sp), %rp
2061 bv (%rp)
2062 LDREG -68(%sp), %sp
2063# endif
2064ENDPROC(call_on_stack)
2065#endif
2066
2067get_register:
2068
2069
2070
2071
2072
2073
2074
2075
2076
2077
2078 blr %r8,%r0
2079 nop
2080 bv %r0(%r25)
2081 copy %r0,%r1
2082 bv %r0(%r25)
2083 ldi -1,%r1
2084 bv %r0(%r25)
2085 copy %r2,%r1
2086 bv %r0(%r25)
2087 copy %r3,%r1
2088 bv %r0(%r25)
2089 copy %r4,%r1
2090 bv %r0(%r25)
2091 copy %r5,%r1
2092 bv %r0(%r25)
2093 copy %r6,%r1
2094 bv %r0(%r25)
2095 copy %r7,%r1
2096 bv %r0(%r25)
2097 ldi -1,%r1
2098 bv %r0(%r25)
2099 ldi -1,%r1
2100 bv %r0(%r25)
2101 copy %r10,%r1
2102 bv %r0(%r25)
2103 copy %r11,%r1
2104 bv %r0(%r25)
2105 copy %r12,%r1
2106 bv %r0(%r25)
2107 copy %r13,%r1
2108 bv %r0(%r25)
2109 copy %r14,%r1
2110 bv %r0(%r25)
2111 copy %r15,%r1
2112 bv %r0(%r25)
2113 ldi -1,%r1
2114 bv %r0(%r25)
2115 ldi -1,%r1
2116 bv %r0(%r25)
2117 copy %r18,%r1
2118 bv %r0(%r25)
2119 copy %r19,%r1
2120 bv %r0(%r25)
2121 copy %r20,%r1
2122 bv %r0(%r25)
2123 copy %r21,%r1
2124 bv %r0(%r25)
2125 copy %r22,%r1
2126 bv %r0(%r25)
2127 copy %r23,%r1
2128 bv %r0(%r25)
2129 ldi -1,%r1
2130 bv %r0(%r25)
2131 ldi -1,%r1
2132 bv %r0(%r25)
2133 copy %r26,%r1
2134 bv %r0(%r25)
2135 copy %r27,%r1
2136 bv %r0(%r25)
2137 copy %r28,%r1
2138 bv %r0(%r25)
2139 copy %r29,%r1
2140 bv %r0(%r25)
2141 copy %r30,%r1
2142 bv %r0(%r25)
2143 copy %r31,%r1
2144
2145
2146set_register:
2147
2148
2149
2150
2151
2152 blr %r8,%r0
2153 nop
2154 bv %r0(%r25)
2155 copy %r1,%r0
2156 bv %r0(%r25)
2157 copy %r1,%r1
2158 bv %r0(%r25)
2159 copy %r1,%r2
2160 bv %r0(%r25)
2161 copy %r1,%r3
2162 bv %r0(%r25)
2163 copy %r1,%r4
2164 bv %r0(%r25)
2165 copy %r1,%r5
2166 bv %r0(%r25)
2167 copy %r1,%r6
2168 bv %r0(%r25)
2169 copy %r1,%r7
2170 bv %r0(%r25)
2171 copy %r1,%r8
2172 bv %r0(%r25)
2173 copy %r1,%r9
2174 bv %r0(%r25)
2175 copy %r1,%r10
2176 bv %r0(%r25)
2177 copy %r1,%r11
2178 bv %r0(%r25)
2179 copy %r1,%r12
2180 bv %r0(%r25)
2181 copy %r1,%r13
2182 bv %r0(%r25)
2183 copy %r1,%r14
2184 bv %r0(%r25)
2185 copy %r1,%r15
2186 bv %r0(%r25)
2187 copy %r1,%r16
2188 bv %r0(%r25)
2189 copy %r1,%r17
2190 bv %r0(%r25)
2191 copy %r1,%r18
2192 bv %r0(%r25)
2193 copy %r1,%r19
2194 bv %r0(%r25)
2195 copy %r1,%r20
2196 bv %r0(%r25)
2197 copy %r1,%r21
2198 bv %r0(%r25)
2199 copy %r1,%r22
2200 bv %r0(%r25)
2201 copy %r1,%r23
2202 bv %r0(%r25)
2203 copy %r1,%r24
2204 bv %r0(%r25)
2205 copy %r1,%r25
2206 bv %r0(%r25)
2207 copy %r1,%r26
2208 bv %r0(%r25)
2209 copy %r1,%r27
2210 bv %r0(%r25)
2211 copy %r1,%r28
2212 bv %r0(%r25)
2213 copy %r1,%r29
2214 bv %r0(%r25)
2215 copy %r1,%r30
2216 bv %r0(%r25)
2217 copy %r1,%r31
2218
2219