1#ifndef _ASM_X86_PARAVIRT_H
2#define _ASM_X86_PARAVIRT_H
3
4
5
6#ifdef CONFIG_PARAVIRT
7#include <asm/pgtable_types.h>
8#include <asm/asm.h>
9
10#include <asm/paravirt_types.h>
11
12#ifndef __ASSEMBLY__
13#include <linux/bug.h>
14#include <linux/types.h>
15#include <linux/cpumask.h>
16#include <asm/frame.h>
17
18static inline int paravirt_enabled(void)
19{
20 return pv_info.paravirt_enabled;
21}
22
23static inline void load_sp0(struct tss_struct *tss,
24 struct thread_struct *thread)
25{
26 PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
27}
28
29
30static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
31 unsigned int *ecx, unsigned int *edx)
32{
33 PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
34}
35
36
37
38
39static inline unsigned long paravirt_get_debugreg(int reg)
40{
41 return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
42}
43#define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
44static inline void set_debugreg(unsigned long val, int reg)
45{
46 PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
47}
48
49static inline void clts(void)
50{
51 PVOP_VCALL0(pv_cpu_ops.clts);
52}
53
54static inline unsigned long read_cr0(void)
55{
56 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
57}
58
59static inline void write_cr0(unsigned long x)
60{
61 PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
62}
63
64static inline unsigned long read_cr2(void)
65{
66 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
67}
68
69static inline void write_cr2(unsigned long x)
70{
71 PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
72}
73
74static inline unsigned long read_cr3(void)
75{
76 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
77}
78
79static inline void write_cr3(unsigned long x)
80{
81 PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
82}
83
84static inline unsigned long read_cr4(void)
85{
86 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
87}
88static inline unsigned long read_cr4_safe(void)
89{
90 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
91}
92
93static inline void write_cr4(unsigned long x)
94{
95 PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
96}
97
98#ifdef CONFIG_X86_64
99static inline unsigned long read_cr8(void)
100{
101 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
102}
103
104static inline void write_cr8(unsigned long x)
105{
106 PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
107}
108#endif
109
110static inline void arch_safe_halt(void)
111{
112 PVOP_VCALL0(pv_irq_ops.safe_halt);
113}
114
115static inline void halt(void)
116{
117 PVOP_VCALL0(pv_irq_ops.halt);
118}
119
120static inline void wbinvd(void)
121{
122 PVOP_VCALL0(pv_cpu_ops.wbinvd);
123}
124
125#define get_kernel_rpl() (pv_info.kernel_rpl)
126
127static inline u64 paravirt_read_msr(unsigned msr, int *err)
128{
129 return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
130}
131
132static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
133{
134 return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
135}
136
137
138#define rdmsr(msr, val1, val2) \
139do { \
140 int _err; \
141 u64 _l = paravirt_read_msr(msr, &_err); \
142 val1 = (u32)_l; \
143 val2 = _l >> 32; \
144} while (0)
145
146#define wrmsr(msr, val1, val2) \
147do { \
148 paravirt_write_msr(msr, val1, val2); \
149} while (0)
150
151#define rdmsrl(msr, val) \
152do { \
153 int _err; \
154 val = paravirt_read_msr(msr, &_err); \
155} while (0)
156
157#define wrmsrl(msr, val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
158#define wrmsr_safe(msr, a, b) paravirt_write_msr(msr, a, b)
159
160
161#define rdmsr_safe(msr, a, b) \
162({ \
163 int _err; \
164 u64 _l = paravirt_read_msr(msr, &_err); \
165 (*a) = (u32)_l; \
166 (*b) = _l >> 32; \
167 _err; \
168})
169
170static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
171{
172 int err;
173
174 *p = paravirt_read_msr(msr, &err);
175 return err;
176}
177
178static inline unsigned long long paravirt_sched_clock(void)
179{
180 return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
181}
182
183struct static_key;
184extern struct static_key paravirt_steal_enabled;
185extern struct static_key paravirt_steal_rq_enabled;
186
187static inline u64 paravirt_steal_clock(int cpu)
188{
189 return PVOP_CALL1(u64, pv_time_ops.steal_clock, cpu);
190}
191
192static inline unsigned long long paravirt_read_pmc(int counter)
193{
194 return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
195}
196
197#define rdpmc(counter, low, high) \
198do { \
199 u64 _l = paravirt_read_pmc(counter); \
200 low = (u32)_l; \
201 high = _l >> 32; \
202} while (0)
203
204#define rdpmcl(counter, val) ((val) = paravirt_read_pmc(counter))
205
206static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
207{
208 PVOP_VCALL2(pv_cpu_ops.alloc_ldt, ldt, entries);
209}
210
211static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
212{
213 PVOP_VCALL2(pv_cpu_ops.free_ldt, ldt, entries);
214}
215
216static inline void load_TR_desc(void)
217{
218 PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
219}
220static inline void load_gdt(const struct desc_ptr *dtr)
221{
222 PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
223}
224static inline void load_idt(const struct desc_ptr *dtr)
225{
226 PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
227}
228static inline void set_ldt(const void *addr, unsigned entries)
229{
230 PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
231}
232static inline void store_idt(struct desc_ptr *dtr)
233{
234 PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
235}
236static inline unsigned long paravirt_store_tr(void)
237{
238 return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
239}
240#define store_tr(tr) ((tr) = paravirt_store_tr())
241static inline void load_TLS(struct thread_struct *t, unsigned cpu)
242{
243 PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
244}
245
246#ifdef CONFIG_X86_64
247static inline void load_gs_index(unsigned int gs)
248{
249 PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
250}
251#endif
252
253static inline void write_ldt_entry(struct desc_struct *dt, int entry,
254 const void *desc)
255{
256 PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
257}
258
259static inline void write_gdt_entry(struct desc_struct *dt, int entry,
260 void *desc, int type)
261{
262 PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
263}
264
265static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
266{
267 PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
268}
269static inline void set_iopl_mask(unsigned mask)
270{
271 PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
272}
273
274
275static inline void slow_down_io(void)
276{
277 pv_cpu_ops.io_delay();
278#ifdef REALLY_SLOW_IO
279 pv_cpu_ops.io_delay();
280 pv_cpu_ops.io_delay();
281 pv_cpu_ops.io_delay();
282#endif
283}
284
285#ifdef CONFIG_SMP
286static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
287 unsigned long start_esp)
288{
289 PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
290 phys_apicid, start_eip, start_esp);
291}
292#endif
293
294static inline void paravirt_activate_mm(struct mm_struct *prev,
295 struct mm_struct *next)
296{
297 PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
298}
299
300static inline void arch_dup_mmap(struct mm_struct *oldmm,
301 struct mm_struct *mm)
302{
303 PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
304}
305
306static inline void arch_exit_mmap(struct mm_struct *mm)
307{
308 PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
309}
310
311static inline void __flush_tlb(void)
312{
313 PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
314}
315static inline void __flush_tlb_global(void)
316{
317 PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
318}
319static inline void __flush_tlb_single(unsigned long addr)
320{
321 PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
322}
323
324static inline void flush_tlb_others(const struct cpumask *cpumask,
325 struct mm_struct *mm,
326 unsigned long start,
327 unsigned long end)
328{
329 PVOP_VCALL4(pv_mmu_ops.flush_tlb_others, cpumask, mm, start, end);
330}
331
332static inline int paravirt_pgd_alloc(struct mm_struct *mm)
333{
334 return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
335}
336
337static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
338{
339 PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
340}
341
342static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
343{
344 PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
345}
346static inline void paravirt_release_pte(unsigned long pfn)
347{
348 PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
349}
350
351static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
352{
353 PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
354}
355
356static inline void paravirt_release_pmd(unsigned long pfn)
357{
358 PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
359}
360
361static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
362{
363 PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
364}
365static inline void paravirt_release_pud(unsigned long pfn)
366{
367 PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
368}
369
370static inline void pte_update(struct mm_struct *mm, unsigned long addr,
371 pte_t *ptep)
372{
373 PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
374}
375
376static inline pte_t __pte(pteval_t val)
377{
378 pteval_t ret;
379
380 if (sizeof(pteval_t) > sizeof(long))
381 ret = PVOP_CALLEE2(pteval_t,
382 pv_mmu_ops.make_pte,
383 val, (u64)val >> 32);
384 else
385 ret = PVOP_CALLEE1(pteval_t,
386 pv_mmu_ops.make_pte,
387 val);
388
389 return (pte_t) { .pte = ret };
390}
391
392static inline pteval_t pte_val(pte_t pte)
393{
394 pteval_t ret;
395
396 if (sizeof(pteval_t) > sizeof(long))
397 ret = PVOP_CALLEE2(pteval_t, pv_mmu_ops.pte_val,
398 pte.pte, (u64)pte.pte >> 32);
399 else
400 ret = PVOP_CALLEE1(pteval_t, pv_mmu_ops.pte_val,
401 pte.pte);
402
403 return ret;
404}
405
406static inline pgd_t __pgd(pgdval_t val)
407{
408 pgdval_t ret;
409
410 if (sizeof(pgdval_t) > sizeof(long))
411 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.make_pgd,
412 val, (u64)val >> 32);
413 else
414 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.make_pgd,
415 val);
416
417 return (pgd_t) { ret };
418}
419
420static inline pgdval_t pgd_val(pgd_t pgd)
421{
422 pgdval_t ret;
423
424 if (sizeof(pgdval_t) > sizeof(long))
425 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.pgd_val,
426 pgd.pgd, (u64)pgd.pgd >> 32);
427 else
428 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.pgd_val,
429 pgd.pgd);
430
431 return ret;
432}
433
434#define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
435static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
436 pte_t *ptep)
437{
438 pteval_t ret;
439
440 ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
441 mm, addr, ptep);
442
443 return (pte_t) { .pte = ret };
444}
445
446static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
447 pte_t *ptep, pte_t pte)
448{
449 if (sizeof(pteval_t) > sizeof(long))
450
451 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
452 else
453 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
454 mm, addr, ptep, pte.pte);
455}
456
457static inline void set_pte(pte_t *ptep, pte_t pte)
458{
459 if (sizeof(pteval_t) > sizeof(long))
460 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
461 pte.pte, (u64)pte.pte >> 32);
462 else
463 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
464 pte.pte);
465}
466
467static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
468 pte_t *ptep, pte_t pte)
469{
470 if (sizeof(pteval_t) > sizeof(long))
471
472 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
473 else
474 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
475}
476
477static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
478 pmd_t *pmdp, pmd_t pmd)
479{
480 if (sizeof(pmdval_t) > sizeof(long))
481
482 pv_mmu_ops.set_pmd_at(mm, addr, pmdp, pmd);
483 else
484 PVOP_VCALL4(pv_mmu_ops.set_pmd_at, mm, addr, pmdp,
485 native_pmd_val(pmd));
486}
487
488static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
489{
490 pmdval_t val = native_pmd_val(pmd);
491
492 if (sizeof(pmdval_t) > sizeof(long))
493 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
494 else
495 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
496}
497
498#if PAGETABLE_LEVELS >= 3
499static inline pmd_t __pmd(pmdval_t val)
500{
501 pmdval_t ret;
502
503 if (sizeof(pmdval_t) > sizeof(long))
504 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.make_pmd,
505 val, (u64)val >> 32);
506 else
507 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.make_pmd,
508 val);
509
510 return (pmd_t) { ret };
511}
512
513static inline pmdval_t pmd_val(pmd_t pmd)
514{
515 pmdval_t ret;
516
517 if (sizeof(pmdval_t) > sizeof(long))
518 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.pmd_val,
519 pmd.pmd, (u64)pmd.pmd >> 32);
520 else
521 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.pmd_val,
522 pmd.pmd);
523
524 return ret;
525}
526
527static inline void set_pud(pud_t *pudp, pud_t pud)
528{
529 pudval_t val = native_pud_val(pud);
530
531 if (sizeof(pudval_t) > sizeof(long))
532 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
533 val, (u64)val >> 32);
534 else
535 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
536 val);
537}
538#if PAGETABLE_LEVELS == 4
539static inline pud_t __pud(pudval_t val)
540{
541 pudval_t ret;
542
543 if (sizeof(pudval_t) > sizeof(long))
544 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.make_pud,
545 val, (u64)val >> 32);
546 else
547 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.make_pud,
548 val);
549
550 return (pud_t) { ret };
551}
552
553static inline pudval_t pud_val(pud_t pud)
554{
555 pudval_t ret;
556
557 if (sizeof(pudval_t) > sizeof(long))
558 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.pud_val,
559 pud.pud, (u64)pud.pud >> 32);
560 else
561 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.pud_val,
562 pud.pud);
563
564 return ret;
565}
566
567static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
568{
569 pgdval_t val = native_pgd_val(pgd);
570
571 if (sizeof(pgdval_t) > sizeof(long))
572 PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
573 val, (u64)val >> 32);
574 else
575 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
576 val);
577}
578
579static inline void pgd_clear(pgd_t *pgdp)
580{
581 set_pgd(pgdp, __pgd(0));
582}
583
584static inline void pud_clear(pud_t *pudp)
585{
586 set_pud(pudp, __pud(0));
587}
588
589#endif
590
591#endif
592
593#ifdef CONFIG_X86_PAE
594
595
596static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
597{
598 PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
599 pte.pte, pte.pte >> 32);
600}
601
602static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
603 pte_t *ptep)
604{
605 PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
606}
607
608static inline void pmd_clear(pmd_t *pmdp)
609{
610 PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
611}
612#else
613static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
614{
615 set_pte(ptep, pte);
616}
617
618static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
619 pte_t *ptep)
620{
621 set_pte_at(mm, addr, ptep, __pte(0));
622}
623
624static inline void pmd_clear(pmd_t *pmdp)
625{
626 set_pmd(pmdp, __pmd(0));
627}
628#endif
629
630#define __HAVE_ARCH_START_CONTEXT_SWITCH
631static inline void arch_start_context_switch(struct task_struct *prev)
632{
633 PVOP_VCALL1(pv_cpu_ops.start_context_switch, prev);
634}
635
636static inline void arch_end_context_switch(struct task_struct *next)
637{
638 PVOP_VCALL1(pv_cpu_ops.end_context_switch, next);
639}
640
641#define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
642static inline void arch_enter_lazy_mmu_mode(void)
643{
644 PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
645}
646
647static inline void arch_leave_lazy_mmu_mode(void)
648{
649 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
650}
651
652static inline void arch_flush_lazy_mmu_mode(void)
653{
654 PVOP_VCALL0(pv_mmu_ops.lazy_mode.flush);
655}
656
657static inline void __set_fixmap(unsigned idx,
658 phys_addr_t phys, pgprot_t flags)
659{
660 pv_mmu_ops.set_fixmap(idx, phys, flags);
661}
662
663#if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
664
665#ifdef CONFIG_QUEUED_SPINLOCKS
666
667static __always_inline void pv_queued_spin_lock_slowpath(struct qspinlock *lock,
668 u32 val)
669{
670 PVOP_VCALL2(pv_lock_ops.queued_spin_lock_slowpath, lock, val);
671}
672
673static __always_inline void pv_queued_spin_unlock(struct qspinlock *lock)
674{
675 PVOP_VCALLEE1(pv_lock_ops.queued_spin_unlock, lock);
676}
677
678static __always_inline void pv_wait(u8 *ptr, u8 val)
679{
680 PVOP_VCALL2(pv_lock_ops.wait, ptr, val);
681}
682
683static __always_inline void pv_kick(int cpu)
684{
685 PVOP_VCALL1(pv_lock_ops.kick, cpu);
686}
687
688#else
689
690static __always_inline void __ticket_lock_spinning(struct arch_spinlock *lock,
691 __ticket_t ticket)
692{
693 PVOP_VCALLEE2(pv_lock_ops.lock_spinning, lock, ticket);
694}
695
696static __always_inline void __ticket_unlock_kick(struct arch_spinlock *lock,
697 __ticket_t ticket)
698{
699 PVOP_VCALL2(pv_lock_ops.unlock_kick, lock, ticket);
700}
701
702#endif
703
704#endif
705
706#ifdef CONFIG_X86_32
707#define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
708#define PV_RESTORE_REGS "popl %edx; popl %ecx;"
709
710
711#define PV_SAVE_ALL_CALLER_REGS "pushl %ecx;"
712#define PV_RESTORE_ALL_CALLER_REGS "popl %ecx;"
713
714#define PV_FLAGS_ARG "0"
715#define PV_EXTRA_CLOBBERS
716#define PV_VEXTRA_CLOBBERS
717#else
718
719#define PV_SAVE_ALL_CALLER_REGS \
720 "push %rcx;" \
721 "push %rdx;" \
722 "push %rsi;" \
723 "push %rdi;" \
724 "push %r8;" \
725 "push %r9;" \
726 "push %r10;" \
727 "push %r11;"
728#define PV_RESTORE_ALL_CALLER_REGS \
729 "pop %r11;" \
730 "pop %r10;" \
731 "pop %r9;" \
732 "pop %r8;" \
733 "pop %rdi;" \
734 "pop %rsi;" \
735 "pop %rdx;" \
736 "pop %rcx;"
737
738
739
740#define PV_SAVE_REGS "pushq %%rdi;"
741#define PV_RESTORE_REGS "popq %%rdi;"
742#define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
743#define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
744#define PV_FLAGS_ARG "D"
745#endif
746
747
748
749
750
751
752
753
754
755
756
757
758
759#define PV_THUNK_NAME(func) "__raw_callee_save_" #func
760#define PV_CALLEE_SAVE_REGS_THUNK(func) \
761 extern typeof(func) __raw_callee_save_##func; \
762 \
763 asm(".pushsection .text;" \
764 ".globl " PV_THUNK_NAME(func) ";" \
765 ".type " PV_THUNK_NAME(func) ", @function;" \
766 PV_THUNK_NAME(func) ":" \
767 FRAME_BEGIN \
768 PV_SAVE_ALL_CALLER_REGS \
769 "call " #func ";" \
770 PV_RESTORE_ALL_CALLER_REGS \
771 FRAME_END \
772 "ret;" \
773 ".popsection")
774
775
776#define PV_CALLEE_SAVE(func) \
777 ((struct paravirt_callee_save) { __raw_callee_save_##func })
778
779
780#define __PV_IS_CALLEE_SAVE(func) \
781 ((struct paravirt_callee_save) { func })
782
783static inline notrace unsigned long arch_local_save_flags(void)
784{
785 return PVOP_CALLEE0(unsigned long, pv_irq_ops.save_fl);
786}
787
788static inline notrace void arch_local_irq_restore(unsigned long f)
789{
790 PVOP_VCALLEE1(pv_irq_ops.restore_fl, f);
791}
792
793static inline notrace void arch_local_irq_disable(void)
794{
795 PVOP_VCALLEE0(pv_irq_ops.irq_disable);
796}
797
798static inline notrace void arch_local_irq_enable(void)
799{
800 PVOP_VCALLEE0(pv_irq_ops.irq_enable);
801}
802
803static inline notrace unsigned long arch_local_irq_save(void)
804{
805 unsigned long f;
806
807 f = arch_local_save_flags();
808 arch_local_irq_disable();
809 return f;
810}
811
812
813
814#undef PARAVIRT_CALL
815#undef __PVOP_CALL
816#undef __PVOP_VCALL
817#undef PVOP_VCALL0
818#undef PVOP_CALL0
819#undef PVOP_VCALL1
820#undef PVOP_CALL1
821#undef PVOP_VCALL2
822#undef PVOP_CALL2
823#undef PVOP_VCALL3
824#undef PVOP_CALL3
825#undef PVOP_VCALL4
826#undef PVOP_CALL4
827
828extern void default_banner(void);
829
830#else
831
832#define _PVSITE(ptype, clobbers, ops, word, algn) \
833771:; \
834 ops; \
835772:; \
836 .pushsection .parainstructions,"a"; \
837 .align algn; \
838 word 771b; \
839 .byte ptype; \
840 .byte 772b-771b; \
841 .short clobbers; \
842 .popsection
843
844
845#define COND_PUSH(set, mask, reg) \
846 .if ((~(set)) & mask); push %reg; .endif
847#define COND_POP(set, mask, reg) \
848 .if ((~(set)) & mask); pop %reg; .endif
849
850#ifdef CONFIG_X86_64
851
852#define PV_SAVE_REGS(set) \
853 COND_PUSH(set, CLBR_RAX, rax); \
854 COND_PUSH(set, CLBR_RCX, rcx); \
855 COND_PUSH(set, CLBR_RDX, rdx); \
856 COND_PUSH(set, CLBR_RSI, rsi); \
857 COND_PUSH(set, CLBR_RDI, rdi); \
858 COND_PUSH(set, CLBR_R8, r8); \
859 COND_PUSH(set, CLBR_R9, r9); \
860 COND_PUSH(set, CLBR_R10, r10); \
861 COND_PUSH(set, CLBR_R11, r11)
862#define PV_RESTORE_REGS(set) \
863 COND_POP(set, CLBR_R11, r11); \
864 COND_POP(set, CLBR_R10, r10); \
865 COND_POP(set, CLBR_R9, r9); \
866 COND_POP(set, CLBR_R8, r8); \
867 COND_POP(set, CLBR_RDI, rdi); \
868 COND_POP(set, CLBR_RSI, rsi); \
869 COND_POP(set, CLBR_RDX, rdx); \
870 COND_POP(set, CLBR_RCX, rcx); \
871 COND_POP(set, CLBR_RAX, rax)
872
873#define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
874#define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
875#define PARA_INDIRECT(addr) *addr(%rip)
876#else
877#define PV_SAVE_REGS(set) \
878 COND_PUSH(set, CLBR_EAX, eax); \
879 COND_PUSH(set, CLBR_EDI, edi); \
880 COND_PUSH(set, CLBR_ECX, ecx); \
881 COND_PUSH(set, CLBR_EDX, edx)
882#define PV_RESTORE_REGS(set) \
883 COND_POP(set, CLBR_EDX, edx); \
884 COND_POP(set, CLBR_ECX, ecx); \
885 COND_POP(set, CLBR_EDI, edi); \
886 COND_POP(set, CLBR_EAX, eax)
887
888#define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
889#define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
890#define PARA_INDIRECT(addr) *%cs:addr
891#endif
892
893#define INTERRUPT_RETURN \
894 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
895 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
896
897#define DISABLE_INTERRUPTS(clobbers) \
898 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
899 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
900 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \
901 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
902
903#define ENABLE_INTERRUPTS(clobbers) \
904 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
905 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
906 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \
907 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
908
909#define USERGS_SYSRET32 \
910 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32), \
911 CLBR_NONE, \
912 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32))
913
914#ifdef CONFIG_X86_32
915#define GET_CR0_INTO_EAX \
916 push %ecx; push %edx; \
917 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
918 pop %edx; pop %ecx
919
920#define ENABLE_INTERRUPTS_SYSEXIT \
921 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
922 CLBR_NONE, \
923 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
924
925
926#else
927
928
929
930
931
932
933#define SWAPGS_UNSAFE_STACK \
934 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
935 swapgs)
936
937
938
939
940
941
942
943#define SWAPGS \
944 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
945 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs) \
946 )
947
948#define GET_CR2_INTO_RAX \
949 call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2)
950
951#define PARAVIRT_ADJUST_EXCEPTION_FRAME \
952 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
953 CLBR_NONE, \
954 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
955
956#define USERGS_SYSRET64 \
957 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64), \
958 CLBR_NONE, \
959 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
960
961#define ENABLE_INTERRUPTS_SYSEXIT32 \
962 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
963 CLBR_NONE, \
964 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
965#endif
966
967#endif
968#else
969# define default_banner x86_init_noop
970#endif
971#endif
972
