LXR linux/drivers/gpu/drm/virtio/virtgpu

   1/*
   2 * Copyright (C) 2015 Red Hat, Inc.
   3 * All Rights Reserved.
   4 *
   5 * Permission is hereby granted, free of charge, to any person obtaining
   6 * a copy of this software and associated documentation files (the
   7 * "Software"), to deal in the Software without restriction, including
   8 * without limitation the rights to use, copy, modify, merge, publish,
   9 * distribute, sublicense, and/or sell copies of the Software, and to
  10 * permit persons to whom the Software is furnished to do so, subject to
  11 * the following conditions:
  12 *
  13 * The above copyright notice and this permission notice (including the
  14 * next paragraph) shall be included in all copies or substantial
  15 * portions of the Software.
  16 *
  17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24 */
  25
  26#ifndef VIRTIO_DRV_H
  27#define VIRTIO_DRV_H
  28
  29#include <linux/virtio.h>
  30#include <linux/virtio_ids.h>
  31#include <linux/virtio_config.h>
  32#include <linux/virtio_gpu.h>
  33
  34#include <drm/drmP.h>
  35#include <drm/drm_gem.h>
  36#include <drm/drm_atomic.h>
  37#include <drm/drm_crtc_helper.h>
  38#include <drm/drm_encoder.h>
  39#include <drm/ttm/ttm_bo_api.h>
  40#include <drm/ttm/ttm_bo_driver.h>
  41#include <drm/ttm/ttm_placement.h>
  42#include <drm/ttm/ttm_module.h>
  43
  44#define DRIVER_NAME "virtio_gpu"
  45#define DRIVER_DESC "virtio GPU"
  46#define DRIVER_DATE "0"
  47
  48#define DRIVER_MAJOR 0
  49#define DRIVER_MINOR 0
  50#define DRIVER_PATCHLEVEL 1
  51
  52/* virtgpu_drm_bus.c */
  53int drm_virtio_init(struct drm_driver *driver, struct virtio_device *vdev);
  54
  55struct virtio_gpu_object {
  56        struct drm_gem_object gem_base;
  57        uint32_t hw_res_handle;
  58
  59        struct sg_table *pages;
  60        void *vmap;
  61        bool dumb;
  62        struct ttm_place                placement_code;
  63        struct ttm_placement            placement;
  64        struct ttm_buffer_object        tbo;
  65        struct ttm_bo_kmap_obj          kmap;
  66};
  67#define gem_to_virtio_gpu_obj(gobj) \
  68        container_of((gobj), struct virtio_gpu_object, gem_base)
  69
  70struct virtio_gpu_vbuffer;
  71struct virtio_gpu_device;
  72
  73typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev,
  74                                   struct virtio_gpu_vbuffer *vbuf);
  75
  76struct virtio_gpu_fence_driver {
  77        atomic64_t       last_seq;
  78        uint64_t         sync_seq;
  79        uint64_t         context;
  80        struct list_head fences;
  81        spinlock_t       lock;
  82};
  83
  84struct virtio_gpu_fence {
  85        struct dma_fence f;
  86        struct virtio_gpu_fence_driver *drv;
  87        struct list_head node;
  88        uint64_t seq;
  89};
  90#define to_virtio_fence(x) \
  91        container_of(x, struct virtio_gpu_fence, f)
  92
  93struct virtio_gpu_vbuffer {
  94        char *buf;
  95        int size;
  96
  97        void *data_buf;
  98        uint32_t data_size;
  99
 100        char *resp_buf;
 101        int resp_size;
 102
 103        virtio_gpu_resp_cb resp_cb;
 104
 105        struct list_head list;
 106};
 107
 108struct virtio_gpu_output {
 109        int index;
 110        struct drm_crtc crtc;
 111        struct drm_connector conn;
 112        struct drm_encoder enc;
 113        struct virtio_gpu_display_one info;
 114        struct virtio_gpu_update_cursor cursor;
 115        int cur_x;
 116        int cur_y;
 117};
 118#define drm_crtc_to_virtio_gpu_output(x) \
 119        container_of(x, struct virtio_gpu_output, crtc)
 120#define drm_connector_to_virtio_gpu_output(x) \
 121        container_of(x, struct virtio_gpu_output, conn)
 122#define drm_encoder_to_virtio_gpu_output(x) \
 123        container_of(x, struct virtio_gpu_output, enc)
 124
 125struct virtio_gpu_framebuffer {
 126        struct drm_framebuffer base;
 127        struct drm_gem_object *obj;
 128        int x1, y1, x2, y2; /* dirty rect */
 129        spinlock_t dirty_lock;
 130        uint32_t hw_res_handle;
 131};
 132#define to_virtio_gpu_framebuffer(x) \
 133        container_of(x, struct virtio_gpu_framebuffer, base)
 134
 135struct virtio_gpu_mman {
 136        struct ttm_bo_global_ref        bo_global_ref;
 137        struct drm_global_reference     mem_global_ref;
 138        bool                            mem_global_referenced;
 139        struct ttm_bo_device            bdev;
 140};
 141
 142struct virtio_gpu_fbdev;
 143
 144struct virtio_gpu_queue {
 145        struct virtqueue *vq;
 146        spinlock_t qlock;
 147        wait_queue_head_t ack_queue;
 148        struct work_struct dequeue_work;
 149};
 150
 151struct virtio_gpu_drv_capset {
 152        uint32_t id;
 153        uint32_t max_version;
 154        uint32_t max_size;
 155};
 156
 157struct virtio_gpu_drv_cap_cache {
 158        struct list_head head;
 159        void *caps_cache;
 160        uint32_t id;
 161        uint32_t version;
 162        uint32_t size;
 163        atomic_t is_valid;
 164};
 165
 166struct virtio_gpu_device {
 167        struct device *dev;
 168        struct drm_device *ddev;
 169
 170        struct virtio_device *vdev;
 171
 172        struct virtio_gpu_mman mman;
 173
 174        /* pointer to fbdev info structure */
 175        struct virtio_gpu_fbdev *vgfbdev;
 176        struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS];
 177        uint32_t num_scanouts;
 178
 179        struct virtio_gpu_queue ctrlq;
 180        struct virtio_gpu_queue cursorq;
 181        struct kmem_cache *vbufs;
 182        bool vqs_ready;
 183
 184        struct idr      resource_idr;
 185        spinlock_t resource_idr_lock;
 186
 187        wait_queue_head_t resp_wq;
 188        /* current display info */
 189        spinlock_t display_info_lock;
 190        bool display_info_pending;
 191
 192        struct virtio_gpu_fence_driver fence_drv;
 193
 194        struct idr      ctx_id_idr;
 195        spinlock_t ctx_id_idr_lock;
 196
 197        bool has_virgl_3d;
 198
 199        struct work_struct config_changed_work;
 200
 201        struct virtio_gpu_drv_capset *capsets;
 202        uint32_t num_capsets;
 203        struct list_head cap_cache;
 204};
 205
 206struct virtio_gpu_fpriv {
 207        uint32_t ctx_id;
 208};
 209
 210/* virtio_ioctl.c */
 211#define DRM_VIRTIO_NUM_IOCTLS 10
 212extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS];
 213
 214/* virtio_kms.c */
 215int virtio_gpu_driver_load(struct drm_device *dev, unsigned long flags);
 216void virtio_gpu_driver_unload(struct drm_device *dev);
 217int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file);
 218void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file);
 219
 220/* virtio_gem.c */
 221void virtio_gpu_gem_free_object(struct drm_gem_object *gem_obj);
 222int virtio_gpu_gem_init(struct virtio_gpu_device *vgdev);
 223void virtio_gpu_gem_fini(struct virtio_gpu_device *vgdev);
 224int virtio_gpu_gem_create(struct drm_file *file,
 225                          struct drm_device *dev,
 226                          uint64_t size,
 227                          struct drm_gem_object **obj_p,
 228                          uint32_t *handle_p);
 229int virtio_gpu_gem_object_open(struct drm_gem_object *obj,
 230                               struct drm_file *file);
 231void virtio_gpu_gem_object_close(struct drm_gem_object *obj,
 232                                 struct drm_file *file);
 233struct virtio_gpu_object *virtio_gpu_alloc_object(struct drm_device *dev,
 234                                                  size_t size, bool kernel,
 235                                                  bool pinned);
 236int virtio_gpu_mode_dumb_create(struct drm_file *file_priv,
 237                                struct drm_device *dev,
 238                                struct drm_mode_create_dumb *args);
 239int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv,
 240                              struct drm_device *dev,
 241                              uint32_t handle, uint64_t *offset_p);
 242
 243/* virtio_fb */
 244#define VIRTIO_GPUFB_CONN_LIMIT 1
 245int virtio_gpu_fbdev_init(struct virtio_gpu_device *vgdev);
 246void virtio_gpu_fbdev_fini(struct virtio_gpu_device *vgdev);
 247int virtio_gpu_surface_dirty(struct virtio_gpu_framebuffer *qfb,
 248                             struct drm_clip_rect *clips,
 249                             unsigned int num_clips);
 250/* virtio vg */
 251int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev);
 252void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev);
 253void virtio_gpu_resource_id_get(struct virtio_gpu_device *vgdev,
 254                               uint32_t *resid);
 255void virtio_gpu_resource_id_put(struct virtio_gpu_device *vgdev, uint32_t id);
 256void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev,
 257                                    uint32_t resource_id,
 258                                    uint32_t format,
 259                                    uint32_t width,
 260                                    uint32_t height);
 261void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev,
 262                                   uint32_t resource_id);
 263void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,
 264                                        uint32_t resource_id, uint64_t offset,
 265                                        __le32 width, __le32 height,
 266                                        __le32 x, __le32 y,
 267                                        struct virtio_gpu_fence **fence);
 268void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev,
 269                                   uint32_t resource_id,
 270                                   uint32_t x, uint32_t y,
 271                                   uint32_t width, uint32_t height);
 272void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev,
 273                                uint32_t scanout_id, uint32_t resource_id,
 274                                uint32_t width, uint32_t height,
 275                                uint32_t x, uint32_t y);
 276int virtio_gpu_object_attach(struct virtio_gpu_device *vgdev,
 277                             struct virtio_gpu_object *obj,
 278                             uint32_t resource_id,
 279                             struct virtio_gpu_fence **fence);
 280int virtio_gpu_attach_status_page(struct virtio_gpu_device *vgdev);
 281int virtio_gpu_detach_status_page(struct virtio_gpu_device *vgdev);
 282void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev,
 283                            struct virtio_gpu_output *output);
 284int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev);
 285void virtio_gpu_cmd_resource_inval_backing(struct virtio_gpu_device *vgdev,
 286                                           uint32_t resource_id);
 287int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx);
 288int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev,
 289                              int idx, int version,
 290                              struct virtio_gpu_drv_cap_cache **cache_p);
 291void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id,
 292                                   uint32_t nlen, const char *name);
 293void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev,
 294                                    uint32_t id);
 295void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev,
 296                                            uint32_t ctx_id,
 297                                            uint32_t resource_id);
 298void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev,
 299                                            uint32_t ctx_id,
 300                                            uint32_t resource_id);
 301void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev,
 302                           void *data, uint32_t data_size,
 303                           uint32_t ctx_id, struct virtio_gpu_fence **fence);
 304void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev,
 305                                          uint32_t resource_id, uint32_t ctx_id,
 306                                          uint64_t offset, uint32_t level,
 307                                          struct virtio_gpu_box *box,
 308                                          struct virtio_gpu_fence **fence);
 309void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev,
 310                                        uint32_t resource_id, uint32_t ctx_id,
 311                                        uint64_t offset, uint32_t level,
 312                                        struct virtio_gpu_box *box,
 313                                        struct virtio_gpu_fence **fence);
 314void
 315virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev,
 316                                  struct virtio_gpu_resource_create_3d *rc_3d,
 317                                  struct virtio_gpu_fence **fence);
 318void virtio_gpu_ctrl_ack(struct virtqueue *vq);
 319void virtio_gpu_cursor_ack(struct virtqueue *vq);
 320void virtio_gpu_fence_ack(struct virtqueue *vq);
 321void virtio_gpu_dequeue_ctrl_func(struct work_struct *work);
 322void virtio_gpu_dequeue_cursor_func(struct work_struct *work);
 323void virtio_gpu_dequeue_fence_func(struct work_struct *work);
 324
 325/* virtio_gpu_display.c */
 326int virtio_gpu_framebuffer_init(struct drm_device *dev,
 327                                struct virtio_gpu_framebuffer *vgfb,
 328                                const struct drm_mode_fb_cmd2 *mode_cmd,
 329                                struct drm_gem_object *obj);
 330int virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev);
 331void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev);
 332
 333/* virtio_gpu_plane.c */
 334uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc);
 335struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,
 336                                        enum drm_plane_type type,
 337                                        int index);
 338
 339/* virtio_gpu_ttm.c */
 340int virtio_gpu_ttm_init(struct virtio_gpu_device *vgdev);
 341void virtio_gpu_ttm_fini(struct virtio_gpu_device *vgdev);
 342int virtio_gpu_mmap(struct file *filp, struct vm_area_struct *vma);
 343
 344/* virtio_gpu_fence.c */
 345int virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
 346                          struct virtio_gpu_ctrl_hdr *cmd_hdr,
 347                          struct virtio_gpu_fence **fence);
 348void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev,
 349                                    u64 last_seq);
 350
 351/* virtio_gpu_object */
 352int virtio_gpu_object_create(struct virtio_gpu_device *vgdev,
 353                             unsigned long size, bool kernel, bool pinned,
 354                             struct virtio_gpu_object **bo_ptr);
 355int virtio_gpu_object_kmap(struct virtio_gpu_object *bo, void **ptr);
 356int virtio_gpu_object_get_sg_table(struct virtio_gpu_device *qdev,
 357                                   struct virtio_gpu_object *bo);
 358void virtio_gpu_object_free_sg_table(struct virtio_gpu_object *bo);
 359int virtio_gpu_object_wait(struct virtio_gpu_object *bo, bool no_wait);
 360
 361/* virtgpu_prime.c */
 362int virtgpu_gem_prime_pin(struct drm_gem_object *obj);
 363void virtgpu_gem_prime_unpin(struct drm_gem_object *obj);
 364struct sg_table *virtgpu_gem_prime_get_sg_table(struct drm_gem_object *obj);
 365struct drm_gem_object *virtgpu_gem_prime_import_sg_table(
 366        struct drm_device *dev, struct dma_buf_attachment *attach,
 367        struct sg_table *sgt);
 368void *virtgpu_gem_prime_vmap(struct drm_gem_object *obj);
 369void virtgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
 370int virtgpu_gem_prime_mmap(struct drm_gem_object *obj,
 371                           struct vm_area_struct *vma);
 372
 373static inline struct virtio_gpu_object*
 374virtio_gpu_object_ref(struct virtio_gpu_object *bo)
 375{
 376        ttm_bo_reference(&bo->tbo);
 377        return bo;
 378}
 379
 380static inline void virtio_gpu_object_unref(struct virtio_gpu_object **bo)
 381{
 382        struct ttm_buffer_object *tbo;
 383
 384        if ((*bo) == NULL)
 385                return;
 386        tbo = &((*bo)->tbo);
 387        ttm_bo_unref(&tbo);
 388        if (tbo == NULL)
 389                *bo = NULL;
 390}
 391
 392static inline u64 virtio_gpu_object_mmap_offset(struct virtio_gpu_object *bo)
 393{
 394        return drm_vma_node_offset_addr(&bo->tbo.vma_node);
 395}
 396
 397static inline int virtio_gpu_object_reserve(struct virtio_gpu_object *bo,
 398                                         bool no_wait)
 399{
 400        int r;
 401
 402        r = ttm_bo_reserve(&bo->tbo, true, no_wait, NULL);
 403        if (unlikely(r != 0)) {
 404                if (r != -ERESTARTSYS) {
 405                        struct virtio_gpu_device *qdev =
 406                                bo->gem_base.dev->dev_private;
 407                        dev_err(qdev->dev, "%p reserve failed\n", bo);
 408                }
 409                return r;
 410        }
 411        return 0;
 412}
 413
 414static inline void virtio_gpu_object_unreserve(struct virtio_gpu_object *bo)
 415{
 416        ttm_bo_unreserve(&bo->tbo);
 417}
 418
 419/* virgl debufs */
 420int virtio_gpu_debugfs_init(struct drm_minor *minor);
 421
 422#endif
 423