LXR linux/drivers/media/usb/dvb-usb-v2/af9035.h

   1/*
   2 * Afatech AF9035 DVB USB driver
   3 *
   4 * Copyright (C) 2009 Antti Palosaari <crope@iki.fi>
   5 * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
   6 *
   7 *    This program is free software; you can redistribute it and/or modify
   8 *    it under the terms of the GNU General Public License as published by
   9 *    the Free Software Foundation; either version 2 of the License, or
  10 *    (at your option) any later version.
  11 *
  12 *    This program is distributed in the hope that it will be useful,
  13 *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 *    GNU General Public License for more details.
  16 *
  17 *    You should have received a copy of the GNU General Public License along
  18 *    with this program; if not, write to the Free Software Foundation, Inc.,
  19 *    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  20 */
  21
  22#ifndef AF9035_H
  23#define AF9035_H
  24
  25#include "dvb_usb.h"
  26#include "af9033.h"
  27#include "tua9001.h"
  28#include "fc0011.h"
  29#include "fc0012.h"
  30#include "mxl5007t.h"
  31#include "tda18218.h"
  32#include "fc2580.h"
  33#include "tuner_it913x.h"
  34
  35struct reg_val {
  36        u32 reg;
  37        u8  val;
  38};
  39
  40struct reg_val_mask {
  41        u32 reg;
  42        u8  val;
  43        u8  mask;
  44};
  45
  46struct usb_req {
  47        u8  cmd;
  48        u8  mbox;
  49        u8  wlen;
  50        u8  *wbuf;
  51        u8  rlen;
  52        u8  *rbuf;
  53};
  54
  55struct state {
  56#define BUF_LEN 64
  57        u8 buf[BUF_LEN];
  58        u8 seq; /* packet sequence number */
  59        u8 prechip_version;
  60        u8 chip_version;
  61        u16 chip_type;
  62        u8 dual_mode:1;
  63        u16 eeprom_addr;
  64        struct af9033_config af9033_config[2];
  65};
  66
  67static const u32 clock_lut_af9035[] = {
  68        20480000, /*      FPGA */
  69        16384000, /* 16.38 MHz */
  70        20480000, /* 20.48 MHz */
  71        36000000, /* 36.00 MHz */
  72        30000000, /* 30.00 MHz */
  73        26000000, /* 26.00 MHz */
  74        28000000, /* 28.00 MHz */
  75        32000000, /* 32.00 MHz */
  76        34000000, /* 34.00 MHz */
  77        24000000, /* 24.00 MHz */
  78        22000000, /* 22.00 MHz */
  79        12000000, /* 12.00 MHz */
  80};
  81
  82static const u32 clock_lut_it9135[] = {
  83        12000000, /* 12.00 MHz */
  84        20480000, /* 20.48 MHz */
  85        36000000, /* 36.00 MHz */
  86        30000000, /* 30.00 MHz */
  87        26000000, /* 26.00 MHz */
  88        28000000, /* 28.00 MHz */
  89        32000000, /* 32.00 MHz */
  90        34000000, /* 34.00 MHz */
  91        24000000, /* 24.00 MHz */
  92        22000000, /* 22.00 MHz */
  93};
  94
  95#define AF9035_FIRMWARE_AF9035 "dvb-usb-af9035-02.fw"
  96#define AF9035_FIRMWARE_IT9135_V1 "dvb-usb-it9135-01.fw"
  97#define AF9035_FIRMWARE_IT9135_V2 "dvb-usb-it9135-02.fw"
  98
  99/*
 100 * eeprom is memory mapped as read only. Writing that memory mapped address
 101 * will not corrupt eeprom.
 102 *
 103 * eeprom has value 0x00 single mode and 0x03 for dual mode as far as I have
 104 * seen to this day.
 105 */
 106
 107#define EEPROM_BASE_AF9035        0x42fd
 108#define EEPROM_BASE_IT9135        0x499c
 109#define EEPROM_SHIFT                0x10
 110
 111#define EEPROM_IR_MODE              0x10
 112#define EEPROM_DUAL_MODE            0x29
 113#define EEPROM_2ND_DEMOD_ADDR       0x2a
 114#define EEPROM_IR_TYPE              0x2c
 115#define EEPROM_1_IF_L               0x30
 116#define EEPROM_1_IF_H               0x31
 117#define EEPROM_1_TUNER_ID           0x34
 118#define EEPROM_2_IF_L               0x40
 119#define EEPROM_2_IF_H               0x41
 120#define EEPROM_2_TUNER_ID           0x44
 121
 122/* USB commands */
 123#define CMD_MEM_RD                  0x00
 124#define CMD_MEM_WR                  0x01
 125#define CMD_I2C_RD                  0x02
 126#define CMD_I2C_WR                  0x03
 127#define CMD_IR_GET                  0x18
 128#define CMD_FW_DL                   0x21
 129#define CMD_FW_QUERYINFO            0x22
 130#define CMD_FW_BOOT                 0x23
 131#define CMD_FW_DL_BEGIN             0x24
 132#define CMD_FW_DL_END               0x25
 133#define CMD_FW_SCATTER_WR           0x29
 134
 135#endif
 136