1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129#ifndef MPI_IOC_H
130#define MPI_IOC_H
131
132
133
134
135
136
137
138
139
140
141
142
143typedef struct _MSG_IOC_INIT
144{
145 U8 WhoInit;
146 U8 Reserved;
147 U8 ChainOffset;
148 U8 Function;
149 U8 Flags;
150 U8 MaxDevices;
151 U8 MaxBuses;
152 U8 MsgFlags;
153 U32 MsgContext;
154 U16 ReplyFrameSize;
155 U8 Reserved1[2];
156 U32 HostMfaHighAddr;
157 U32 SenseBufferHighAddr;
158 U32 ReplyFifoHostSignalingAddr;
159 SGE_SIMPLE_UNION HostPageBufferSGE;
160 U16 MsgVersion;
161 U16 HeaderVersion;
162} MSG_IOC_INIT, MPI_POINTER PTR_MSG_IOC_INIT,
163 IOCInit_t, MPI_POINTER pIOCInit_t;
164
165
166#define MPI_WHOINIT_NO_ONE (0x00)
167#define MPI_WHOINIT_SYSTEM_BIOS (0x01)
168#define MPI_WHOINIT_ROM_BIOS (0x02)
169#define MPI_WHOINIT_PCI_PEER (0x03)
170#define MPI_WHOINIT_HOST_DRIVER (0x04)
171#define MPI_WHOINIT_MANUFACTURER (0x05)
172
173
174#define MPI_IOCINIT_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04)
175#define MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
176#define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE (0x01)
177
178
179#define MPI_IOCINIT_MSGVERSION_MAJOR_MASK (0xFF00)
180#define MPI_IOCINIT_MSGVERSION_MAJOR_SHIFT (8)
181#define MPI_IOCINIT_MSGVERSION_MINOR_MASK (0x00FF)
182#define MPI_IOCINIT_MSGVERSION_MINOR_SHIFT (0)
183
184
185#define MPI_IOCINIT_HEADERVERSION_UNIT_MASK (0xFF00)
186#define MPI_IOCINIT_HEADERVERSION_UNIT_SHIFT (8)
187#define MPI_IOCINIT_HEADERVERSION_DEV_MASK (0x00FF)
188#define MPI_IOCINIT_HEADERVERSION_DEV_SHIFT (0)
189
190
191typedef struct _MSG_IOC_INIT_REPLY
192{
193 U8 WhoInit;
194 U8 Reserved;
195 U8 MsgLength;
196 U8 Function;
197 U8 Flags;
198 U8 MaxDevices;
199 U8 MaxBuses;
200 U8 MsgFlags;
201 U32 MsgContext;
202 U16 Reserved2;
203 U16 IOCStatus;
204 U32 IOCLogInfo;
205} MSG_IOC_INIT_REPLY, MPI_POINTER PTR_MSG_IOC_INIT_REPLY,
206 IOCInitReply_t, MPI_POINTER pIOCInitReply_t;
207
208
209
210
211
212
213
214typedef struct _MSG_IOC_FACTS
215{
216 U8 Reserved[2];
217 U8 ChainOffset;
218 U8 Function;
219 U8 Reserved1[3];
220 U8 MsgFlags;
221 U32 MsgContext;
222} MSG_IOC_FACTS, MPI_POINTER PTR_IOC_FACTS,
223 IOCFacts_t, MPI_POINTER pIOCFacts_t;
224
225typedef struct _MPI_FW_VERSION_STRUCT
226{
227 U8 Dev;
228 U8 Unit;
229 U8 Minor;
230 U8 Major;
231} MPI_FW_VERSION_STRUCT;
232
233typedef union _MPI_FW_VERSION
234{
235 MPI_FW_VERSION_STRUCT Struct;
236 U32 Word;
237} MPI_FW_VERSION;
238
239
240typedef struct _MSG_IOC_FACTS_REPLY
241{
242 U16 MsgVersion;
243 U8 MsgLength;
244 U8 Function;
245 U16 HeaderVersion;
246 U8 IOCNumber;
247 U8 MsgFlags;
248 U32 MsgContext;
249 U16 IOCExceptions;
250 U16 IOCStatus;
251 U32 IOCLogInfo;
252 U8 MaxChainDepth;
253 U8 WhoInit;
254 U8 BlockSize;
255 U8 Flags;
256 U16 ReplyQueueDepth;
257 U16 RequestFrameSize;
258 U16 Reserved_0101_FWVersion;
259 U16 ProductID;
260 U32 CurrentHostMfaHighAddr;
261 U16 GlobalCredits;
262 U8 NumberOfPorts;
263 U8 EventState;
264 U32 CurrentSenseBufferHighAddr;
265 U16 CurReplyFrameSize;
266 U8 MaxDevices;
267 U8 MaxBuses;
268 U32 FWImageSize;
269 U32 IOCCapabilities;
270 MPI_FW_VERSION FWVersion;
271 U16 HighPriorityQueueDepth;
272 U16 Reserved2;
273 SGE_SIMPLE_UNION HostPageBufferSGE;
274 U32 ReplyFifoHostSignalingAddr;
275} MSG_IOC_FACTS_REPLY, MPI_POINTER PTR_MSG_IOC_FACTS_REPLY,
276 IOCFactsReply_t, MPI_POINTER pIOCFactsReply_t;
277
278#define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00)
279#define MPI_IOCFACTS_MSGVERSION_MAJOR_SHIFT (8)
280#define MPI_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF)
281#define MPI_IOCFACTS_MSGVERSION_MINOR_SHIFT (0)
282
283#define MPI_IOCFACTS_HDRVERSION_UNIT_MASK (0xFF00)
284#define MPI_IOCFACTS_HDRVERSION_UNIT_SHIFT (8)
285#define MPI_IOCFACTS_HDRVERSION_DEV_MASK (0x00FF)
286#define MPI_IOCFACTS_HDRVERSION_DEV_SHIFT (0)
287
288#define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001)
289#define MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID (0x0002)
290#define MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0004)
291#define MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL (0x0008)
292#define MPI_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED (0x0010)
293
294#define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT (0x01)
295#define MPI_IOCFACTS_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
296#define MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04)
297
298#define MPI_IOCFACTS_EVENTSTATE_DISABLED (0x00)
299#define MPI_IOCFACTS_EVENTSTATE_ENABLED (0x01)
300
301#define MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q (0x00000001)
302#define MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL (0x00000002)
303#define MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING (0x00000004)
304#define MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER (0x00000008)
305#define MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER (0x00000010)
306#define MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER (0x00000020)
307#define MPI_IOCFACTS_CAPABILITY_EEDP (0x00000040)
308#define MPI_IOCFACTS_CAPABILITY_BIDIRECTIONAL (0x00000080)
309#define MPI_IOCFACTS_CAPABILITY_MULTICAST (0x00000100)
310#define MPI_IOCFACTS_CAPABILITY_SCSIIO32 (0x00000200)
311#define MPI_IOCFACTS_CAPABILITY_NO_SCSIIO16 (0x00000400)
312#define MPI_IOCFACTS_CAPABILITY_TLR (0x00000800)
313
314
315
316
317
318
319
320
321
322
323
324
325typedef struct _MSG_PORT_FACTS
326{
327 U8 Reserved[2];
328 U8 ChainOffset;
329 U8 Function;
330 U8 Reserved1[2];
331 U8 PortNumber;
332 U8 MsgFlags;
333 U32 MsgContext;
334} MSG_PORT_FACTS, MPI_POINTER PTR_MSG_PORT_FACTS,
335 PortFacts_t, MPI_POINTER pPortFacts_t;
336
337typedef struct _MSG_PORT_FACTS_REPLY
338{
339 U16 Reserved;
340 U8 MsgLength;
341 U8 Function;
342 U16 Reserved1;
343 U8 PortNumber;
344 U8 MsgFlags;
345 U32 MsgContext;
346 U16 Reserved2;
347 U16 IOCStatus;
348 U32 IOCLogInfo;
349 U8 Reserved3;
350 U8 PortType;
351 U16 MaxDevices;
352 U16 PortSCSIID;
353 U16 ProtocolFlags;
354 U16 MaxPostedCmdBuffers;
355 U16 MaxPersistentIDs;
356 U16 MaxLanBuckets;
357 U8 MaxInitiators;
358 U8 Reserved4;
359 U32 Reserved5;
360} MSG_PORT_FACTS_REPLY, MPI_POINTER PTR_MSG_PORT_FACTS_REPLY,
361 PortFactsReply_t, MPI_POINTER pPortFactsReply_t;
362
363
364
365
366#define MPI_PORTFACTS_PORTTYPE_INACTIVE (0x00)
367#define MPI_PORTFACTS_PORTTYPE_SCSI (0x01)
368#define MPI_PORTFACTS_PORTTYPE_FC (0x10)
369#define MPI_PORTFACTS_PORTTYPE_ISCSI (0x20)
370#define MPI_PORTFACTS_PORTTYPE_SAS (0x30)
371
372
373
374#define MPI_PORTFACTS_PROTOCOL_LOGBUSADDR (0x01)
375#define MPI_PORTFACTS_PROTOCOL_LAN (0x02)
376#define MPI_PORTFACTS_PROTOCOL_TARGET (0x04)
377#define MPI_PORTFACTS_PROTOCOL_INITIATOR (0x08)
378
379
380
381
382
383
384typedef struct _MSG_PORT_ENABLE
385{
386 U8 Reserved[2];
387 U8 ChainOffset;
388 U8 Function;
389 U8 Reserved1[2];
390 U8 PortNumber;
391 U8 MsgFlags;
392 U32 MsgContext;
393} MSG_PORT_ENABLE, MPI_POINTER PTR_MSG_PORT_ENABLE,
394 PortEnable_t, MPI_POINTER pPortEnable_t;
395
396typedef struct _MSG_PORT_ENABLE_REPLY
397{
398 U8 Reserved[2];
399 U8 MsgLength;
400 U8 Function;
401 U8 Reserved1[2];
402 U8 PortNumber;
403 U8 MsgFlags;
404 U32 MsgContext;
405 U16 Reserved2;
406 U16 IOCStatus;
407 U32 IOCLogInfo;
408} MSG_PORT_ENABLE_REPLY, MPI_POINTER PTR_MSG_PORT_ENABLE_REPLY,
409 PortEnableReply_t, MPI_POINTER pPortEnableReply_t;
410
411
412
413
414
415
416
417
418
419
420
421
422typedef struct _MSG_EVENT_NOTIFY
423{
424 U8 Switch;
425 U8 Reserved;
426 U8 ChainOffset;
427 U8 Function;
428 U8 Reserved1[3];
429 U8 MsgFlags;
430 U32 MsgContext;
431} MSG_EVENT_NOTIFY, MPI_POINTER PTR_MSG_EVENT_NOTIFY,
432 EventNotification_t, MPI_POINTER pEventNotification_t;
433
434
435
436typedef struct _MSG_EVENT_NOTIFY_REPLY
437{
438 U16 EventDataLength;
439 U8 MsgLength;
440 U8 Function;
441 U8 Reserved1[2];
442 U8 AckRequired;
443 U8 MsgFlags;
444 U32 MsgContext;
445 U8 Reserved2[2];
446 U16 IOCStatus;
447 U32 IOCLogInfo;
448 U32 Event;
449 U32 EventContext;
450 U32 Data[1];
451} MSG_EVENT_NOTIFY_REPLY, MPI_POINTER PTR_MSG_EVENT_NOTIFY_REPLY,
452 EventNotificationReply_t, MPI_POINTER pEventNotificationReply_t;
453
454
455
456typedef struct _MSG_EVENT_ACK
457{
458 U8 Reserved[2];
459 U8 ChainOffset;
460 U8 Function;
461 U8 Reserved1[3];
462 U8 MsgFlags;
463 U32 MsgContext;
464 U32 Event;
465 U32 EventContext;
466} MSG_EVENT_ACK, MPI_POINTER PTR_MSG_EVENT_ACK,
467 EventAck_t, MPI_POINTER pEventAck_t;
468
469typedef struct _MSG_EVENT_ACK_REPLY
470{
471 U8 Reserved[2];
472 U8 MsgLength;
473 U8 Function;
474 U8 Reserved1[3];
475 U8 MsgFlags;
476 U32 MsgContext;
477 U16 Reserved2;
478 U16 IOCStatus;
479 U32 IOCLogInfo;
480} MSG_EVENT_ACK_REPLY, MPI_POINTER PTR_MSG_EVENT_ACK_REPLY,
481 EventAckReply_t, MPI_POINTER pEventAckReply_t;
482
483
484
485#define MPI_EVENT_NOTIFICATION_SWITCH_OFF (0x00)
486#define MPI_EVENT_NOTIFICATION_SWITCH_ON (0x01)
487
488
489
490#define MPI_EVENT_NONE (0x00000000)
491#define MPI_EVENT_LOG_DATA (0x00000001)
492#define MPI_EVENT_STATE_CHANGE (0x00000002)
493#define MPI_EVENT_UNIT_ATTENTION (0x00000003)
494#define MPI_EVENT_IOC_BUS_RESET (0x00000004)
495#define MPI_EVENT_EXT_BUS_RESET (0x00000005)
496#define MPI_EVENT_RESCAN (0x00000006)
497#define MPI_EVENT_LINK_STATUS_CHANGE (0x00000007)
498#define MPI_EVENT_LOOP_STATE_CHANGE (0x00000008)
499#define MPI_EVENT_LOGOUT (0x00000009)
500#define MPI_EVENT_EVENT_CHANGE (0x0000000A)
501#define MPI_EVENT_INTEGRATED_RAID (0x0000000B)
502#define MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE (0x0000000C)
503#define MPI_EVENT_ON_BUS_TIMER_EXPIRED (0x0000000D)
504#define MPI_EVENT_QUEUE_FULL (0x0000000E)
505#define MPI_EVENT_SAS_DEVICE_STATUS_CHANGE (0x0000000F)
506#define MPI_EVENT_SAS_SES (0x00000010)
507#define MPI_EVENT_PERSISTENT_TABLE_FULL (0x00000011)
508#define MPI_EVENT_SAS_PHY_LINK_STATUS (0x00000012)
509#define MPI_EVENT_SAS_DISCOVERY_ERROR (0x00000013)
510#define MPI_EVENT_IR_RESYNC_UPDATE (0x00000014)
511#define MPI_EVENT_IR2 (0x00000015)
512#define MPI_EVENT_SAS_DISCOVERY (0x00000016)
513#define MPI_EVENT_SAS_BROADCAST_PRIMITIVE (0x00000017)
514#define MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE (0x00000018)
515#define MPI_EVENT_SAS_INIT_TABLE_OVERFLOW (0x00000019)
516#define MPI_EVENT_SAS_SMP_ERROR (0x0000001A)
517#define MPI_EVENT_SAS_EXPANDER_STATUS_CHANGE (0x0000001B)
518#define MPI_EVENT_LOG_ENTRY_ADDED (0x00000021)
519
520
521
522#define MPI_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00)
523#define MPI_EVENT_NOTIFICATION_ACK_REQUIRED (0x01)
524
525
526
527typedef struct _EVENT_DATA_EVENT_CHANGE
528{
529 U8 EventState;
530 U8 Reserved;
531 U16 Reserved1;
532} EVENT_DATA_EVENT_CHANGE, MPI_POINTER PTR_EVENT_DATA_EVENT_CHANGE,
533 EventDataEventChange_t, MPI_POINTER pEventDataEventChange_t;
534
535
536
537
538#define MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH (0x1C)
539typedef struct _EVENT_DATA_LOG_ENTRY
540{
541 U32 TimeStamp;
542 U32 Reserved1;
543 U16 LogSequence;
544 U16 LogEntryQualifier;
545 U8 LogData[MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH];
546} EVENT_DATA_LOG_ENTRY, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY,
547 MpiEventDataLogEntry_t, MPI_POINTER pMpiEventDataLogEntry_t;
548
549typedef struct _EVENT_DATA_LOG_ENTRY_ADDED
550{
551 U16 LogSequence;
552 U16 Reserved1;
553 U32 Reserved2;
554 EVENT_DATA_LOG_ENTRY LogEntry;
555} EVENT_DATA_LOG_ENTRY_ADDED, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY_ADDED,
556 MpiEventDataLogEntryAdded_t, MPI_POINTER pMpiEventDataLogEntryAdded_t;
557
558
559
560typedef struct _EVENT_DATA_SCSI
561{
562 U8 TargetID;
563 U8 BusPort;
564 U16 Reserved;
565} EVENT_DATA_SCSI, MPI_POINTER PTR_EVENT_DATA_SCSI,
566 EventDataScsi_t, MPI_POINTER pEventDataScsi_t;
567
568
569
570typedef struct _EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE
571{
572 U8 TargetID;
573 U8 Bus;
574 U8 ReasonCode;
575 U8 LUN;
576 U8 ASC;
577 U8 ASCQ;
578 U16 Reserved;
579} EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
580 MPI_POINTER PTR_EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
581 MpiEventDataScsiDeviceStatusChange_t,
582 MPI_POINTER pMpiEventDataScsiDeviceStatusChange_t;
583
584
585#define MPI_EVENT_SCSI_DEV_STAT_RC_ADDED (0x03)
586#define MPI_EVENT_SCSI_DEV_STAT_RC_NOT_RESPONDING (0x04)
587#define MPI_EVENT_SCSI_DEV_STAT_RC_SMART_DATA (0x05)
588
589
590
591typedef struct _EVENT_DATA_SAS_DEVICE_STATUS_CHANGE
592{
593 U8 TargetID;
594 U8 Bus;
595 U8 ReasonCode;
596 U8 Reserved;
597 U8 ASC;
598 U8 ASCQ;
599 U16 DevHandle;
600 U32 DeviceInfo;
601 U16 ParentDevHandle;
602 U8 PhyNum;
603 U8 Reserved1;
604 U64 SASAddress;
605 U8 LUN[8];
606 U16 TaskTag;
607 U16 Reserved2;
608} EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
609 MPI_POINTER PTR_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
610 MpiEventDataSasDeviceStatusChange_t,
611 MPI_POINTER pMpiEventDataSasDeviceStatusChange_t;
612
613
614#define MPI_EVENT_SAS_DEV_STAT_RC_ADDED (0x03)
615#define MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING (0x04)
616#define MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA (0x05)
617#define MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED (0x06)
618#define MPI_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED (0x07)
619#define MPI_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET (0x08)
620#define MPI_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL (0x09)
621#define MPI_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL (0x0A)
622#define MPI_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL (0x0B)
623#define MPI_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL (0x0C)
624#define MPI_EVENT_SAS_DEV_STAT_RC_ASYNC_NOTIFICATION (0x0D)
625#define MPI_EVENT_SAS_DEV_STAT_RC_CMPL_INTERNAL_DEV_RESET (0x0E)
626#define MPI_EVENT_SAS_DEV_STAT_RC_CMPL_TASK_ABORT_INTERNAL (0x0F)
627
628
629
630
631typedef struct _EVENT_DATA_QUEUE_FULL
632{
633 U8 TargetID;
634 U8 Bus;
635 U16 CurrentDepth;
636} EVENT_DATA_QUEUE_FULL, MPI_POINTER PTR_EVENT_DATA_QUEUE_FULL,
637 EventDataQueueFull_t, MPI_POINTER pEventDataQueueFull_t;
638
639
640
641typedef struct _EVENT_DATA_RAID
642{
643 U8 VolumeID;
644 U8 VolumeBus;
645 U8 ReasonCode;
646 U8 PhysDiskNum;
647 U8 ASC;
648 U8 ASCQ;
649 U16 Reserved;
650 U32 SettingsStatus;
651} EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID,
652 MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t;
653
654
655#define MPI_EVENT_RAID_RC_VOLUME_CREATED (0x00)
656#define MPI_EVENT_RAID_RC_VOLUME_DELETED (0x01)
657#define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED (0x02)
658#define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED (0x03)
659#define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED (0x04)
660#define MPI_EVENT_RAID_RC_PHYSDISK_CREATED (0x05)
661#define MPI_EVENT_RAID_RC_PHYSDISK_DELETED (0x06)
662#define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED (0x07)
663#define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED (0x08)
664#define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED (0x09)
665#define MPI_EVENT_RAID_RC_SMART_DATA (0x0A)
666#define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED (0x0B)
667
668
669
670
671typedef struct _MPI_EVENT_DATA_IR_RESYNC_UPDATE
672{
673 U8 VolumeID;
674 U8 VolumeBus;
675 U8 ResyncComplete;
676 U8 Reserved1;
677 U32 Reserved2;
678} MPI_EVENT_DATA_IR_RESYNC_UPDATE,
679 MPI_POINTER PTR_MPI_EVENT_DATA_IR_RESYNC_UPDATE,
680 MpiEventDataIrResyncUpdate_t, MPI_POINTER pMpiEventDataIrResyncUpdate_t;
681
682
683
684
685typedef struct _IR2_STATE_CHANGED
686{
687 U16 PreviousState;
688 U16 NewState;
689} IR2_STATE_CHANGED, MPI_POINTER PTR_IR2_STATE_CHANGED;
690
691typedef struct _IR2_PD_INFO
692{
693 U16 DeviceHandle;
694 U8 TruncEnclosureHandle;
695 U8 TruncatedSlot;
696} IR2_PD_INFO, MPI_POINTER PTR_IR2_PD_INFO;
697
698typedef union _MPI_IR2_RC_EVENT_DATA
699{
700 IR2_STATE_CHANGED StateChanged;
701 U32 Lba;
702 IR2_PD_INFO PdInfo;
703} MPI_IR2_RC_EVENT_DATA, MPI_POINTER PTR_MPI_IR2_RC_EVENT_DATA;
704
705typedef struct _MPI_EVENT_DATA_IR2
706{
707 U8 TargetID;
708 U8 Bus;
709 U8 ReasonCode;
710 U8 PhysDiskNum;
711 MPI_IR2_RC_EVENT_DATA IR2EventData;
712} MPI_EVENT_DATA_IR2, MPI_POINTER PTR_MPI_EVENT_DATA_IR2,
713 MpiEventDataIR2_t, MPI_POINTER pMpiEventDataIR2_t;
714
715
716#define MPI_EVENT_IR2_RC_LD_STATE_CHANGED (0x01)
717#define MPI_EVENT_IR2_RC_PD_STATE_CHANGED (0x02)
718#define MPI_EVENT_IR2_RC_BAD_BLOCK_TABLE_FULL (0x03)
719#define MPI_EVENT_IR2_RC_PD_INSERTED (0x04)
720#define MPI_EVENT_IR2_RC_PD_REMOVED (0x05)
721#define MPI_EVENT_IR2_RC_FOREIGN_CFG_DETECTED (0x06)
722#define MPI_EVENT_IR2_RC_REBUILD_MEDIUM_ERROR (0x07)
723#define MPI_EVENT_IR2_RC_DUAL_PORT_ADDED (0x08)
724#define MPI_EVENT_IR2_RC_DUAL_PORT_REMOVED (0x09)
725
726
727#define MPI_LD_STATE_OPTIMAL (0x00)
728#define MPI_LD_STATE_DEGRADED (0x01)
729#define MPI_LD_STATE_FAILED (0x02)
730#define MPI_LD_STATE_MISSING (0x03)
731#define MPI_LD_STATE_OFFLINE (0x04)
732
733
734#define MPI_PD_STATE_ONLINE (0x00)
735#define MPI_PD_STATE_MISSING (0x01)
736#define MPI_PD_STATE_NOT_COMPATIBLE (0x02)
737#define MPI_PD_STATE_FAILED (0x03)
738#define MPI_PD_STATE_INITIALIZING (0x04)
739#define MPI_PD_STATE_OFFLINE_AT_HOST_REQUEST (0x05)
740#define MPI_PD_STATE_FAILED_AT_HOST_REQUEST (0x06)
741#define MPI_PD_STATE_OFFLINE_FOR_ANOTHER_REASON (0xFF)
742
743
744
745typedef struct _EVENT_DATA_LINK_STATUS
746{
747 U8 State;
748 U8 Reserved;
749 U16 Reserved1;
750 U8 Reserved2;
751 U8 Port;
752 U16 Reserved3;
753} EVENT_DATA_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_LINK_STATUS,
754 EventDataLinkStatus_t, MPI_POINTER pEventDataLinkStatus_t;
755
756#define MPI_EVENT_LINK_STATUS_FAILURE (0x00000000)
757#define MPI_EVENT_LINK_STATUS_ACTIVE (0x00000001)
758
759
760
761typedef struct _EVENT_DATA_LOOP_STATE
762{
763 U8 Character4;
764 U8 Character3;
765 U8 Type;
766 U8 Reserved;
767 U8 Reserved1;
768 U8 Port;
769 U16 Reserved2;
770} EVENT_DATA_LOOP_STATE, MPI_POINTER PTR_EVENT_DATA_LOOP_STATE,
771 EventDataLoopState_t, MPI_POINTER pEventDataLoopState_t;
772
773#define MPI_EVENT_LOOP_STATE_CHANGE_LIP (0x0001)
774#define MPI_EVENT_LOOP_STATE_CHANGE_LPE (0x0002)
775#define MPI_EVENT_LOOP_STATE_CHANGE_LPB (0x0003)
776
777
778
779typedef struct _EVENT_DATA_LOGOUT
780{
781 U32 NPortID;
782 U8 AliasIndex;
783 U8 Port;
784 U16 Reserved1;
785} EVENT_DATA_LOGOUT, MPI_POINTER PTR_EVENT_DATA_LOGOUT,
786 EventDataLogout_t, MPI_POINTER pEventDataLogout_t;
787
788#define MPI_EVENT_LOGOUT_ALL_ALIASES (0xFF)
789
790
791
792typedef struct _EVENT_DATA_SAS_SES
793{
794 U8 PhyNum;
795 U8 Port;
796 U8 PortWidth;
797 U8 Reserved1;
798} EVENT_DATA_SAS_SES, MPI_POINTER PTR_EVENT_DATA_SAS_SES,
799 MpiEventDataSasSes_t, MPI_POINTER pMpiEventDataSasSes_t;
800
801
802
803typedef struct _EVENT_DATA_SAS_BROADCAST_PRIMITIVE
804{
805 U8 PhyNum;
806 U8 Port;
807 U8 PortWidth;
808 U8 Primitive;
809} EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
810 MPI_POINTER PTR_EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
811 MpiEventDataSasBroadcastPrimitive_t,
812 MPI_POINTER pMpiEventDataSasBroadcastPrimitive_t;
813
814#define MPI_EVENT_PRIMITIVE_CHANGE (0x01)
815#define MPI_EVENT_PRIMITIVE_EXPANDER (0x03)
816#define MPI_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT (0x04)
817#define MPI_EVENT_PRIMITIVE_RESERVED3 (0x05)
818#define MPI_EVENT_PRIMITIVE_RESERVED4 (0x06)
819#define MPI_EVENT_PRIMITIVE_CHANGE0_RESERVED (0x07)
820#define MPI_EVENT_PRIMITIVE_CHANGE1_RESERVED (0x08)
821
822
823
824typedef struct _EVENT_DATA_SAS_PHY_LINK_STATUS
825{
826 U8 PhyNum;
827 U8 LinkRates;
828 U16 DevHandle;
829 U64 SASAddress;
830} EVENT_DATA_SAS_PHY_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_SAS_PHY_LINK_STATUS,
831 MpiEventDataSasPhyLinkStatus_t, MPI_POINTER pMpiEventDataSasPhyLinkStatus_t;
832
833
834#define MPI_EVENT_SAS_PLS_LR_CURRENT_MASK (0xF0)
835#define MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT (4)
836#define MPI_EVENT_SAS_PLS_LR_PREVIOUS_MASK (0x0F)
837#define MPI_EVENT_SAS_PLS_LR_PREVIOUS_SHIFT (0)
838#define MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN (0x00)
839#define MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED (0x01)
840#define MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION (0x02)
841#define MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE (0x03)
842#define MPI_EVENT_SAS_PLS_LR_RATE_1_5 (0x08)
843#define MPI_EVENT_SAS_PLS_LR_RATE_3_0 (0x09)
844#define MPI_EVENT_SAS_PLS_LR_RATE_6_0 (0x0A)
845
846
847
848typedef struct _EVENT_DATA_SAS_DISCOVERY
849{
850 U32 DiscoveryStatus;
851 U32 Reserved1;
852} EVENT_DATA_SAS_DISCOVERY, MPI_POINTER PTR_EVENT_DATA_SAS_DISCOVERY,
853 EventDataSasDiscovery_t, MPI_POINTER pEventDataSasDiscovery_t;
854
855#define MPI_EVENT_SAS_DSCVRY_COMPLETE (0x00000000)
856#define MPI_EVENT_SAS_DSCVRY_IN_PROGRESS (0x00000001)
857#define MPI_EVENT_SAS_DSCVRY_PHY_BITS_MASK (0xFFFF0000)
858#define MPI_EVENT_SAS_DSCVRY_PHY_BITS_SHIFT (16)
859
860
861
862typedef struct _EVENT_DATA_DISCOVERY_ERROR
863{
864 U32 DiscoveryStatus;
865 U8 Port;
866 U8 Reserved1;
867 U16 Reserved2;
868} EVENT_DATA_DISCOVERY_ERROR, MPI_POINTER PTR_EVENT_DATA_DISCOVERY_ERROR,
869 EventDataDiscoveryError_t, MPI_POINTER pEventDataDiscoveryError_t;
870
871#define MPI_EVENT_DSCVRY_ERR_DS_LOOP_DETECTED (0x00000001)
872#define MPI_EVENT_DSCVRY_ERR_DS_UNADDRESSABLE_DEVICE (0x00000002)
873#define MPI_EVENT_DSCVRY_ERR_DS_MULTIPLE_PORTS (0x00000004)
874#define MPI_EVENT_DSCVRY_ERR_DS_EXPANDER_ERR (0x00000008)
875#define MPI_EVENT_DSCVRY_ERR_DS_SMP_TIMEOUT (0x00000010)
876#define MPI_EVENT_DSCVRY_ERR_DS_OUT_ROUTE_ENTRIES (0x00000020)
877#define MPI_EVENT_DSCVRY_ERR_DS_INDEX_NOT_EXIST (0x00000040)
878#define MPI_EVENT_DSCVRY_ERR_DS_SMP_FUNCTION_FAILED (0x00000080)
879#define MPI_EVENT_DSCVRY_ERR_DS_SMP_CRC_ERROR (0x00000100)
880#define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_SUBTRACTIVE (0x00000200)
881#define MPI_EVENT_DSCVRY_ERR_DS_TABLE_TO_TABLE (0x00000400)
882#define MPI_EVENT_DSCVRY_ERR_DS_UNSUPPORTED_DEVICE (0x00000800)
883#define MPI_EVENT_DSCVRY_ERR_DS_MAX_SATA_TARGETS (0x00001000)
884#define MPI_EVENT_DSCVRY_ERR_DS_MULTI_PORT_DOMAIN (0x00002000)
885#define MPI_EVENT_DSCVRY_ERR_DS_SATA_INIT_FAILURE (0x00004000)
886
887
888
889typedef struct _EVENT_DATA_SAS_SMP_ERROR
890{
891 U8 Status;
892 U8 Port;
893 U8 SMPFunctionResult;
894 U8 Reserved1;
895 U64 SASAddress;
896} EVENT_DATA_SAS_SMP_ERROR, MPI_POINTER PTR_EVENT_DATA_SAS_SMP_ERROR,
897 MpiEventDataSasSmpError_t, MPI_POINTER pMpiEventDataSasSmpError_t;
898
899
900#define MPI_EVENT_SAS_SMP_FUNCTION_RESULT_VALID (0x00)
901#define MPI_EVENT_SAS_SMP_CRC_ERROR (0x01)
902#define MPI_EVENT_SAS_SMP_TIMEOUT (0x02)
903#define MPI_EVENT_SAS_SMP_NO_DESTINATION (0x03)
904#define MPI_EVENT_SAS_SMP_BAD_DESTINATION (0x04)
905
906
907
908typedef struct _EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE
909{
910 U8 ReasonCode;
911 U8 Port;
912 U16 DevHandle;
913 U64 SASAddress;
914} EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
915 MPI_POINTER PTR_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
916 MpiEventDataSasInitDevStatusChange_t,
917 MPI_POINTER pMpiEventDataSasInitDevStatusChange_t;
918
919
920#define MPI_EVENT_SAS_INIT_RC_ADDED (0x01)
921#define MPI_EVENT_SAS_INIT_RC_REMOVED (0x02)
922#define MPI_EVENT_SAS_INIT_RC_INACCESSIBLE (0x03)
923
924
925
926typedef struct _EVENT_DATA_SAS_INIT_TABLE_OVERFLOW
927{
928 U8 MaxInit;
929 U8 CurrentInit;
930 U16 Reserved1;
931 U64 SASAddress;
932} EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
933 MPI_POINTER PTR_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
934 MpiEventDataSasInitTableOverflow_t,
935 MPI_POINTER pMpiEventDataSasInitTableOverflow_t;
936
937
938
939typedef struct _EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE
940{
941 U8 ReasonCode;
942 U8 Reserved1;
943 U16 Reserved2;
944 U8 PhysicalPort;
945 U8 Reserved3;
946 U16 EnclosureHandle;
947 U64 SASAddress;
948 U32 DiscoveryStatus;
949 U16 DevHandle;
950 U16 ParentDevHandle;
951 U16 ExpanderChangeCount;
952 U16 ExpanderRouteIndexes;
953 U8 NumPhys;
954 U8 SASLevel;
955 U8 Flags;
956 U8 Reserved4;
957} EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE,
958 MPI_POINTER PTR_EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE,
959 MpiEventDataSasExpanderStatusChange_t,
960 MPI_POINTER pMpiEventDataSasExpanderStatusChange_t;
961
962
963#define MPI_EVENT_SAS_EXP_RC_ADDED (0x00)
964#define MPI_EVENT_SAS_EXP_RC_NOT_RESPONDING (0x01)
965
966
967#define MPI_EVENT_SAS_EXP_DS_LOOP_DETECTED (0x00000001)
968#define MPI_EVENT_SAS_EXP_DS_UNADDRESSABLE_DEVICE (0x00000002)
969#define MPI_EVENT_SAS_EXP_DS_MULTIPLE_PORTS (0x00000004)
970#define MPI_EVENT_SAS_EXP_DS_EXPANDER_ERR (0x00000008)
971#define MPI_EVENT_SAS_EXP_DS_SMP_TIMEOUT (0x00000010)
972#define MPI_EVENT_SAS_EXP_DS_OUT_ROUTE_ENTRIES (0x00000020)
973#define MPI_EVENT_SAS_EXP_DS_INDEX_NOT_EXIST (0x00000040)
974#define MPI_EVENT_SAS_EXP_DS_SMP_FUNCTION_FAILED (0x00000080)
975#define MPI_EVENT_SAS_EXP_DS_SMP_CRC_ERROR (0x00000100)
976#define MPI_EVENT_SAS_EXP_DS_SUBTRACTIVE_LINK (0x00000200)
977#define MPI_EVENT_SAS_EXP_DS_TABLE_LINK (0x00000400)
978#define MPI_EVENT_SAS_EXP_DS_UNSUPPORTED_DEVICE (0x00000800)
979
980
981#define MPI_EVENT_SAS_EXP_FLAGS_ROUTE_TABLE_CONFIG (0x02)
982#define MPI_EVENT_SAS_EXP_FLAGS_CONFIG_IN_PROGRESS (0x01)
983
984
985
986
987
988
989
990
991
992
993
994
995
996typedef struct _MSG_FW_DOWNLOAD
997{
998 U8 ImageType;
999 U8 Reserved;
1000 U8 ChainOffset;
1001 U8 Function;
1002 U8 Reserved1[3];
1003 U8 MsgFlags;
1004 U32 MsgContext;
1005 SGE_MPI_UNION SGL;
1006} MSG_FW_DOWNLOAD, MPI_POINTER PTR_MSG_FW_DOWNLOAD,
1007 FWDownload_t, MPI_POINTER pFWDownload_t;
1008
1009#define MPI_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT (0x01)
1010
1011#define MPI_FW_DOWNLOAD_ITYPE_RESERVED (0x00)
1012#define MPI_FW_DOWNLOAD_ITYPE_FW (0x01)
1013#define MPI_FW_DOWNLOAD_ITYPE_BIOS (0x02)
1014#define MPI_FW_DOWNLOAD_ITYPE_NVDATA (0x03)
1015#define MPI_FW_DOWNLOAD_ITYPE_BOOTLOADER (0x04)
1016#define MPI_FW_DOWNLOAD_ITYPE_MANUFACTURING (0x06)
1017#define MPI_FW_DOWNLOAD_ITYPE_CONFIG_1 (0x07)
1018#define MPI_FW_DOWNLOAD_ITYPE_CONFIG_2 (0x08)
1019#define MPI_FW_DOWNLOAD_ITYPE_MEGARAID (0x09)
1020#define MPI_FW_DOWNLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B)
1021
1022
1023typedef struct _FWDownloadTCSGE
1024{
1025 U8 Reserved;
1026 U8 ContextSize;
1027 U8 DetailsLength;
1028 U8 Flags;
1029 U32 Reserved_0100_Checksum;
1030 U32 ImageOffset;
1031 U32 ImageSize;
1032} FW_DOWNLOAD_TCSGE, MPI_POINTER PTR_FW_DOWNLOAD_TCSGE,
1033 FWDownloadTCSGE_t, MPI_POINTER pFWDownloadTCSGE_t;
1034
1035
1036typedef struct _MSG_FW_DOWNLOAD_REPLY
1037{
1038 U8 ImageType;
1039 U8 Reserved;
1040 U8 MsgLength;
1041 U8 Function;
1042 U8 Reserved1[3];
1043 U8 MsgFlags;
1044 U32 MsgContext;
1045 U16 Reserved2;
1046 U16 IOCStatus;
1047 U32 IOCLogInfo;
1048} MSG_FW_DOWNLOAD_REPLY, MPI_POINTER PTR_MSG_FW_DOWNLOAD_REPLY,
1049 FWDownloadReply_t, MPI_POINTER pFWDownloadReply_t;
1050
1051
1052
1053
1054
1055
1056typedef struct _MSG_FW_UPLOAD
1057{
1058 U8 ImageType;
1059 U8 Reserved;
1060 U8 ChainOffset;
1061 U8 Function;
1062 U8 Reserved1[3];
1063 U8 MsgFlags;
1064 U32 MsgContext;
1065 SGE_MPI_UNION SGL;
1066} MSG_FW_UPLOAD, MPI_POINTER PTR_MSG_FW_UPLOAD,
1067 FWUpload_t, MPI_POINTER pFWUpload_t;
1068
1069#define MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM (0x00)
1070#define MPI_FW_UPLOAD_ITYPE_FW_FLASH (0x01)
1071#define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH (0x02)
1072#define MPI_FW_UPLOAD_ITYPE_NVDATA (0x03)
1073#define MPI_FW_UPLOAD_ITYPE_BOOTLOADER (0x04)
1074#define MPI_FW_UPLOAD_ITYPE_FW_BACKUP (0x05)
1075#define MPI_FW_UPLOAD_ITYPE_MANUFACTURING (0x06)
1076#define MPI_FW_UPLOAD_ITYPE_CONFIG_1 (0x07)
1077#define MPI_FW_UPLOAD_ITYPE_CONFIG_2 (0x08)
1078#define MPI_FW_UPLOAD_ITYPE_MEGARAID (0x09)
1079#define MPI_FW_UPLOAD_ITYPE_COMPLETE (0x0A)
1080#define MPI_FW_UPLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B)
1081
1082typedef struct _FWUploadTCSGE
1083{
1084 U8 Reserved;
1085 U8 ContextSize;
1086 U8 DetailsLength;
1087 U8 Flags;
1088 U32 Reserved1;
1089 U32 ImageOffset;
1090 U32 ImageSize;
1091} FW_UPLOAD_TCSGE, MPI_POINTER PTR_FW_UPLOAD_TCSGE,
1092 FWUploadTCSGE_t, MPI_POINTER pFWUploadTCSGE_t;
1093
1094
1095typedef struct _MSG_FW_UPLOAD_REPLY
1096{
1097 U8 ImageType;
1098 U8 Reserved;
1099 U8 MsgLength;
1100 U8 Function;
1101 U8 Reserved1[3];
1102 U8 MsgFlags;
1103 U32 MsgContext;
1104 U16 Reserved2;
1105 U16 IOCStatus;
1106 U32 IOCLogInfo;
1107 U32 ActualImageSize;
1108} MSG_FW_UPLOAD_REPLY, MPI_POINTER PTR_MSG_FW_UPLOAD_REPLY,
1109 FWUploadReply_t, MPI_POINTER pFWUploadReply_t;
1110
1111
1112typedef struct _MPI_FW_HEADER
1113{
1114 U32 ArmBranchInstruction0;
1115 U32 Signature0;
1116 U32 Signature1;
1117 U32 Signature2;
1118 U32 ArmBranchInstruction1;
1119 U32 ArmBranchInstruction2;
1120 U32 Reserved;
1121 U32 Checksum;
1122 U16 VendorId;
1123 U16 ProductId;
1124 MPI_FW_VERSION FWVersion;
1125 U32 SeqCodeVersion;
1126 U32 ImageSize;
1127 U32 NextImageHeaderOffset;
1128 U32 LoadStartAddress;
1129 U32 IopResetVectorValue;
1130 U32 IopResetRegAddr;
1131 U32 VersionNameWhat;
1132 U8 VersionName[32];
1133 U32 VendorNameWhat;
1134 U8 VendorName[32];
1135} MPI_FW_HEADER, MPI_POINTER PTR_MPI_FW_HEADER,
1136 MpiFwHeader_t, MPI_POINTER pMpiFwHeader_t;
1137
1138#define MPI_FW_HEADER_WHAT_SIGNATURE (0x29232840)
1139
1140
1141#define MPI_FW_HEADER_PID_TYPE_MASK (0xF000)
1142#define MPI_FW_HEADER_PID_TYPE_SCSI (0x0000)
1143#define MPI_FW_HEADER_PID_TYPE_FC (0x1000)
1144#define MPI_FW_HEADER_PID_TYPE_SAS (0x2000)
1145
1146#define MPI_FW_HEADER_SIGNATURE_0 (0x5AEAA55A)
1147#define MPI_FW_HEADER_SIGNATURE_1 (0xA55AEAA5)
1148#define MPI_FW_HEADER_SIGNATURE_2 (0x5AA55AEA)
1149
1150#define MPI_FW_HEADER_PID_PROD_MASK (0x0F00)
1151#define MPI_FW_HEADER_PID_PROD_INITIATOR_SCSI (0x0100)
1152#define MPI_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI (0x0200)
1153#define MPI_FW_HEADER_PID_PROD_TARGET_SCSI (0x0300)
1154#define MPI_FW_HEADER_PID_PROD_IM_SCSI (0x0400)
1155#define MPI_FW_HEADER_PID_PROD_IS_SCSI (0x0500)
1156#define MPI_FW_HEADER_PID_PROD_CTX_SCSI (0x0600)
1157#define MPI_FW_HEADER_PID_PROD_IR_SCSI (0x0700)
1158
1159#define MPI_FW_HEADER_PID_FAMILY_MASK (0x00FF)
1160
1161#define MPI_FW_HEADER_PID_FAMILY_1030A0_SCSI (0x0001)
1162#define MPI_FW_HEADER_PID_FAMILY_1030B0_SCSI (0x0002)
1163#define MPI_FW_HEADER_PID_FAMILY_1030B1_SCSI (0x0003)
1164#define MPI_FW_HEADER_PID_FAMILY_1030C0_SCSI (0x0004)
1165#define MPI_FW_HEADER_PID_FAMILY_1020A0_SCSI (0x0005)
1166#define MPI_FW_HEADER_PID_FAMILY_1020B0_SCSI (0x0006)
1167#define MPI_FW_HEADER_PID_FAMILY_1020B1_SCSI (0x0007)
1168#define MPI_FW_HEADER_PID_FAMILY_1020C0_SCSI (0x0008)
1169#define MPI_FW_HEADER_PID_FAMILY_1035A0_SCSI (0x0009)
1170#define MPI_FW_HEADER_PID_FAMILY_1035B0_SCSI (0x000A)
1171#define MPI_FW_HEADER_PID_FAMILY_1030TA0_SCSI (0x000B)
1172#define MPI_FW_HEADER_PID_FAMILY_1020TA0_SCSI (0x000C)
1173
1174#define MPI_FW_HEADER_PID_FAMILY_909_FC (0x0000)
1175#define MPI_FW_HEADER_PID_FAMILY_919_FC (0x0001)
1176#define MPI_FW_HEADER_PID_FAMILY_919X_FC (0x0002)
1177#define MPI_FW_HEADER_PID_FAMILY_919XL_FC (0x0003)
1178#define MPI_FW_HEADER_PID_FAMILY_939X_FC (0x0004)
1179#define MPI_FW_HEADER_PID_FAMILY_959_FC (0x0005)
1180#define MPI_FW_HEADER_PID_FAMILY_949E_FC (0x0006)
1181
1182#define MPI_FW_HEADER_PID_FAMILY_1064_SAS (0x0001)
1183#define MPI_FW_HEADER_PID_FAMILY_1068_SAS (0x0002)
1184#define MPI_FW_HEADER_PID_FAMILY_1078_SAS (0x0003)
1185#define MPI_FW_HEADER_PID_FAMILY_106xE_SAS (0x0004)
1186
1187typedef struct _MPI_EXT_IMAGE_HEADER
1188{
1189 U8 ImageType;
1190 U8 Reserved;
1191 U16 Reserved1;
1192 U32 Checksum;
1193 U32 ImageSize;
1194 U32 NextImageHeaderOffset;
1195 U32 LoadStartAddress;
1196 U32 Reserved2;
1197} MPI_EXT_IMAGE_HEADER, MPI_POINTER PTR_MPI_EXT_IMAGE_HEADER,
1198 MpiExtImageHeader_t, MPI_POINTER pMpiExtImageHeader_t;
1199
1200
1201#define MPI_EXT_IMAGE_TYPE_UNSPECIFIED (0x00)
1202#define MPI_EXT_IMAGE_TYPE_FW (0x01)
1203#define MPI_EXT_IMAGE_TYPE_NVDATA (0x03)
1204#define MPI_EXT_IMAGE_TYPE_BOOTLOADER (0x04)
1205#define MPI_EXT_IMAGE_TYPE_INITIALIZATION (0x05)
1206
1207#endif
1208