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23#ifndef __WL1251_H__
24#define __WL1251_H__
25
26#include <linux/mutex.h>
27#include <linux/list.h>
28#include <linux/bitops.h>
29#include <net/mac80211.h>
30
31#define DRIVER_NAME "wl1251"
32#define DRIVER_PREFIX DRIVER_NAME ": "
33
34enum {
35 DEBUG_NONE = 0,
36 DEBUG_IRQ = BIT(0),
37 DEBUG_SPI = BIT(1),
38 DEBUG_BOOT = BIT(2),
39 DEBUG_MAILBOX = BIT(3),
40 DEBUG_NETLINK = BIT(4),
41 DEBUG_EVENT = BIT(5),
42 DEBUG_TX = BIT(6),
43 DEBUG_RX = BIT(7),
44 DEBUG_SCAN = BIT(8),
45 DEBUG_CRYPT = BIT(9),
46 DEBUG_PSM = BIT(10),
47 DEBUG_MAC80211 = BIT(11),
48 DEBUG_CMD = BIT(12),
49 DEBUG_ACX = BIT(13),
50 DEBUG_ALL = ~0,
51};
52
53#define DEBUG_LEVEL (DEBUG_NONE)
54
55#define DEBUG_DUMP_LIMIT 1024
56
57#define wl1251_error(fmt, arg...) \
58 printk(KERN_ERR DRIVER_PREFIX "ERROR " fmt "\n", ##arg)
59
60#define wl1251_warning(fmt, arg...) \
61 printk(KERN_WARNING DRIVER_PREFIX "WARNING " fmt "\n", ##arg)
62
63#define wl1251_notice(fmt, arg...) \
64 printk(KERN_INFO DRIVER_PREFIX fmt "\n", ##arg)
65
66#define wl1251_info(fmt, arg...) \
67 printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg)
68
69#define wl1251_debug(level, fmt, arg...) \
70 do { \
71 if (level & DEBUG_LEVEL) \
72 printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg); \
73 } while (0)
74
75#define wl1251_dump(level, prefix, buf, len) \
76 do { \
77 if (level & DEBUG_LEVEL) \
78 print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
79 DUMP_PREFIX_OFFSET, 16, 1, \
80 buf, \
81 min_t(size_t, len, DEBUG_DUMP_LIMIT), \
82 0); \
83 } while (0)
84
85#define wl1251_dump_ascii(level, prefix, buf, len) \
86 do { \
87 if (level & DEBUG_LEVEL) \
88 print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
89 DUMP_PREFIX_OFFSET, 16, 1, \
90 buf, \
91 min_t(size_t, len, DEBUG_DUMP_LIMIT), \
92 true); \
93 } while (0)
94
95#define WL1251_DEFAULT_RX_CONFIG (CFG_UNI_FILTER_EN | \
96 CFG_BSSID_FILTER_EN)
97
98#define WL1251_DEFAULT_RX_FILTER (CFG_RX_PRSP_EN | \
99 CFG_RX_MGMT_EN | \
100 CFG_RX_DATA_EN | \
101 CFG_RX_CTL_EN | \
102 CFG_RX_BCN_EN | \
103 CFG_RX_AUTH_EN | \
104 CFG_RX_ASSOC_EN)
105
106#define WL1251_BUSY_WORD_LEN 8
107
108struct boot_attr {
109 u32 radio_type;
110 u8 mac_clock;
111 u8 arm_clock;
112 int firmware_debug;
113 u32 minor;
114 u32 major;
115 u32 bugfix;
116};
117
118enum wl1251_state {
119 WL1251_STATE_OFF,
120 WL1251_STATE_ON,
121 WL1251_STATE_PLT,
122};
123
124enum wl1251_partition_type {
125 PART_DOWN,
126 PART_WORK,
127 PART_DRPW,
128
129 PART_TABLE_LEN
130};
131
132enum wl1251_station_mode {
133 STATION_ACTIVE_MODE,
134 STATION_POWER_SAVE_MODE,
135 STATION_IDLE,
136};
137
138struct wl1251_partition {
139 u32 size;
140 u32 start;
141};
142
143struct wl1251_partition_set {
144 struct wl1251_partition mem;
145 struct wl1251_partition reg;
146};
147
148struct wl1251;
149
150struct wl1251_stats {
151 struct acx_statistics *fw_stats;
152 unsigned long fw_stats_update;
153
154 unsigned int retry_count;
155 unsigned int excessive_retries;
156};
157
158struct wl1251_debugfs {
159 struct dentry *rootdir;
160 struct dentry *fw_statistics;
161
162 struct dentry *tx_internal_desc_overflow;
163
164 struct dentry *rx_out_of_mem;
165 struct dentry *rx_hdr_overflow;
166 struct dentry *rx_hw_stuck;
167 struct dentry *rx_dropped;
168 struct dentry *rx_fcs_err;
169 struct dentry *rx_xfr_hint_trig;
170 struct dentry *rx_path_reset;
171 struct dentry *rx_reset_counter;
172
173 struct dentry *dma_rx_requested;
174 struct dentry *dma_rx_errors;
175 struct dentry *dma_tx_requested;
176 struct dentry *dma_tx_errors;
177
178 struct dentry *isr_cmd_cmplt;
179 struct dentry *isr_fiqs;
180 struct dentry *isr_rx_headers;
181 struct dentry *isr_rx_mem_overflow;
182 struct dentry *isr_rx_rdys;
183 struct dentry *isr_irqs;
184 struct dentry *isr_tx_procs;
185 struct dentry *isr_decrypt_done;
186 struct dentry *isr_dma0_done;
187 struct dentry *isr_dma1_done;
188 struct dentry *isr_tx_exch_complete;
189 struct dentry *isr_commands;
190 struct dentry *isr_rx_procs;
191 struct dentry *isr_hw_pm_mode_changes;
192 struct dentry *isr_host_acknowledges;
193 struct dentry *isr_pci_pm;
194 struct dentry *isr_wakeups;
195 struct dentry *isr_low_rssi;
196
197 struct dentry *wep_addr_key_count;
198 struct dentry *wep_default_key_count;
199
200 struct dentry *wep_key_not_found;
201 struct dentry *wep_decrypt_fail;
202 struct dentry *wep_packets;
203 struct dentry *wep_interrupt;
204
205 struct dentry *pwr_ps_enter;
206 struct dentry *pwr_elp_enter;
207 struct dentry *pwr_missing_bcns;
208 struct dentry *pwr_wake_on_host;
209 struct dentry *pwr_wake_on_timer_exp;
210 struct dentry *pwr_tx_with_ps;
211 struct dentry *pwr_tx_without_ps;
212 struct dentry *pwr_rcvd_beacons;
213 struct dentry *pwr_power_save_off;
214 struct dentry *pwr_enable_ps;
215 struct dentry *pwr_disable_ps;
216 struct dentry *pwr_fix_tsf_ps;
217
218 struct dentry *pwr_rcvd_awake_beacons;
219
220 struct dentry *mic_rx_pkts;
221 struct dentry *mic_calc_failure;
222
223 struct dentry *aes_encrypt_fail;
224 struct dentry *aes_decrypt_fail;
225 struct dentry *aes_encrypt_packets;
226 struct dentry *aes_decrypt_packets;
227 struct dentry *aes_encrypt_interrupt;
228 struct dentry *aes_decrypt_interrupt;
229
230 struct dentry *event_heart_beat;
231 struct dentry *event_calibration;
232 struct dentry *event_rx_mismatch;
233 struct dentry *event_rx_mem_empty;
234 struct dentry *event_rx_pool;
235 struct dentry *event_oom_late;
236 struct dentry *event_phy_transmit_error;
237 struct dentry *event_tx_stuck;
238
239 struct dentry *ps_pspoll_timeouts;
240 struct dentry *ps_upsd_timeouts;
241 struct dentry *ps_upsd_max_sptime;
242 struct dentry *ps_upsd_max_apturn;
243 struct dentry *ps_pspoll_max_apturn;
244 struct dentry *ps_pspoll_utilization;
245 struct dentry *ps_upsd_utilization;
246
247 struct dentry *rxpipe_rx_prep_beacon_drop;
248 struct dentry *rxpipe_descr_host_int_trig_rx_data;
249 struct dentry *rxpipe_beacon_buffer_thres_host_int_trig_rx_data;
250 struct dentry *rxpipe_missed_beacon_host_int_trig_rx_data;
251 struct dentry *rxpipe_tx_xfr_host_int_trig_rx_data;
252
253 struct dentry *tx_queue_len;
254 struct dentry *tx_queue_status;
255
256 struct dentry *retry_count;
257 struct dentry *excessive_retries;
258};
259
260struct wl1251_if_operations {
261 void (*read)(struct wl1251 *wl, int addr, void *buf, size_t len);
262 void (*write)(struct wl1251 *wl, int addr, void *buf, size_t len);
263 void (*read_elp)(struct wl1251 *wl, int addr, u32 *val);
264 void (*write_elp)(struct wl1251 *wl, int addr, u32 val);
265 int (*power)(struct wl1251 *wl, bool enable);
266 void (*reset)(struct wl1251 *wl);
267 void (*enable_irq)(struct wl1251 *wl);
268 void (*disable_irq)(struct wl1251 *wl);
269};
270
271struct wl1251 {
272 struct ieee80211_hw *hw;
273 bool mac80211_registered;
274
275 void *if_priv;
276 const struct wl1251_if_operations *if_ops;
277
278 void (*set_power)(bool enable);
279 int irq;
280 bool use_eeprom;
281
282 spinlock_t wl_lock;
283
284 enum wl1251_state state;
285 struct mutex mutex;
286
287 int physical_mem_addr;
288 int physical_reg_addr;
289 int virtual_mem_addr;
290 int virtual_reg_addr;
291
292 int cmd_box_addr;
293 int event_box_addr;
294 struct boot_attr boot_attr;
295
296 u8 *fw;
297 size_t fw_len;
298 u8 *nvs;
299 size_t nvs_len;
300
301 u8 bssid[ETH_ALEN];
302 u8 mac_addr[ETH_ALEN];
303 u8 bss_type;
304 u8 listen_int;
305 int channel;
306
307 void *target_mem_map;
308 struct acx_data_path_params_resp *data_path;
309
310
311 u32 data_in_count;
312
313
314 struct sk_buff_head tx_queue;
315 bool tx_queue_stopped;
316
317 struct work_struct tx_work;
318
319
320 struct sk_buff *tx_frames[16];
321
322
323
324
325
326
327 u32 next_tx_complete;
328
329
330 u32 rx_counter;
331
332
333 u32 rx_handled;
334
335
336 u32 rx_current_buffer;
337 u32 rx_last_id;
338
339
340 u32 intr_mask;
341 struct work_struct irq_work;
342
343
344 u32 event_mask;
345
346
347 u32 mbox_ptr[2];
348
349
350 bool scanning;
351
352
353 u32 default_key;
354
355 unsigned int tx_mgmt_frm_rate;
356 unsigned int tx_mgmt_frm_mod;
357
358 unsigned int rx_config;
359 unsigned int rx_filter;
360
361
362 bool elp;
363
364 struct delayed_work elp_work;
365
366 enum wl1251_station_mode station_mode;
367
368
369 bool psm_requested;
370
371 u16 beacon_int;
372 u8 dtim_period;
373
374
375 int power_level;
376
377 int rssi_thold;
378
379 struct wl1251_stats stats;
380 struct wl1251_debugfs debugfs;
381
382 __le32 buffer_32;
383 u32 buffer_cmd;
384 u8 buffer_busyword[WL1251_BUSY_WORD_LEN];
385 struct wl1251_rx_descriptor *rx_descriptor;
386
387 struct ieee80211_vif *vif;
388
389 u32 chip_id;
390 char fw_ver[21];
391
392
393 s8 noise;
394};
395
396int wl1251_plt_start(struct wl1251 *wl);
397int wl1251_plt_stop(struct wl1251 *wl);
398
399struct ieee80211_hw *wl1251_alloc_hw(void);
400int wl1251_free_hw(struct wl1251 *wl);
401int wl1251_init_ieee80211(struct wl1251 *wl);
402void wl1251_enable_interrupts(struct wl1251 *wl);
403void wl1251_disable_interrupts(struct wl1251 *wl);
404
405#define DEFAULT_HW_GEN_MODULATION_TYPE CCK_LONG
406#define DEFAULT_HW_GEN_TX_RATE RATE_2MBPS
407#define JOIN_TIMEOUT 5000
408
409#define WL1251_DEFAULT_POWER_LEVEL 20
410
411#define WL1251_TX_QUEUE_LOW_WATERMARK 10
412#define WL1251_TX_QUEUE_HIGH_WATERMARK 25
413
414#define WL1251_DEFAULT_BEACON_INT 100
415#define WL1251_DEFAULT_DTIM_PERIOD 1
416
417#define WL1251_DEFAULT_CHANNEL 0
418
419#define WL1251_DEFAULT_BET_CONSECUTIVE 10
420
421#define CHIP_ID_1251_PG10 (0x7010101)
422#define CHIP_ID_1251_PG11 (0x7020101)
423#define CHIP_ID_1251_PG12 (0x7030101)
424#define CHIP_ID_1271_PG10 (0x4030101)
425#define CHIP_ID_1271_PG20 (0x4030111)
426
427#define WL1251_FW_NAME "wl1251-fw.bin"
428#define WL1251_NVS_NAME "wl1251-nvs.bin"
429
430#define WL1251_POWER_ON_SLEEP 10
431
432#define WL1251_PART_DOWN_MEM_START 0x0
433#define WL1251_PART_DOWN_MEM_SIZE 0x16800
434#define WL1251_PART_DOWN_REG_START REGISTERS_BASE
435#define WL1251_PART_DOWN_REG_SIZE REGISTERS_DOWN_SIZE
436
437#define WL1251_PART_WORK_MEM_START 0x28000
438#define WL1251_PART_WORK_MEM_SIZE 0x14000
439#define WL1251_PART_WORK_REG_START REGISTERS_BASE
440#define WL1251_PART_WORK_REG_SIZE REGISTERS_WORK_SIZE
441
442#define WL1251_DEFAULT_LOW_RSSI_WEIGHT 10
443#define WL1251_DEFAULT_LOW_RSSI_DEPTH 10
444
445#endif
446
