LXR linux/sound/pci/hda/hda

   1/*
   2 *  Common functionality for the alsa driver code base for HD Audio.
   3 *
   4 *  This program is free software; you can redistribute it and/or modify it
   5 *  under the terms of the GNU General Public License as published by the Free
   6 *  Software Foundation; either version 2 of the License, or (at your option)
   7 *  any later version.
   8 *
   9 *  This program is distributed in the hope that it will be useful, but WITHOUT
  10 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12 *  more details.
  13 */
  14
  15#ifndef __SOUND_HDA_CONTROLLER_H
  16#define __SOUND_HDA_CONTROLLER_H
  17
  18#include <linux/interrupt.h>
  19#include <sound/core.h>
  20#include <sound/pcm.h>
  21#include <sound/initval.h>
  22#include "hda_codec.h"
  23#include <sound/hda_register.h>
  24
  25#define AZX_MAX_CODECS          HDA_MAX_CODECS
  26#define AZX_DEFAULT_CODECS      4
  27
  28/* driver quirks (capabilities) */
  29/* bits 0-7 are used for indicating driver type */
  30#define AZX_DCAPS_NO_TCSEL      (1 << 8)        /* No Intel TCSEL bit */
  31#define AZX_DCAPS_NO_MSI        (1 << 9)        /* No MSI support */
  32#define AZX_DCAPS_SNOOP_MASK    (3 << 10)       /* snoop type mask */
  33#define AZX_DCAPS_SNOOP_OFF     (1 << 12)       /* snoop default off */
  34#ifdef CONFIG_SND_HDA_I915
  35#define AZX_DCAPS_I915_COMPONENT (1 << 13)      /* bind with i915 gfx */
  36#else
  37#define AZX_DCAPS_I915_COMPONENT 0              /* NOP */
  38#endif
  39/* 14 unused */
  40#define AZX_DCAPS_CTX_WORKAROUND (1 << 15)      /* X-Fi workaround */
  41#define AZX_DCAPS_POSFIX_LPIB   (1 << 16)       /* Use LPIB as default */
  42/* 17 unused */
  43#define AZX_DCAPS_NO_64BIT      (1 << 18)       /* No 64bit address */
  44#define AZX_DCAPS_SYNC_WRITE    (1 << 19)       /* sync each cmd write */
  45#define AZX_DCAPS_OLD_SSYNC     (1 << 20)       /* Old SSYNC reg for ICH */
  46#define AZX_DCAPS_NO_ALIGN_BUFSIZE (1 << 21)    /* no buffer size alignment */
  47/* 22 unused */
  48#define AZX_DCAPS_4K_BDLE_BOUNDARY (1 << 23)    /* BDLE in 4k boundary */
  49/* 24 unused */
  50#define AZX_DCAPS_COUNT_LPIB_DELAY  (1 << 25)   /* Take LPIB as delay */
  51#define AZX_DCAPS_PM_RUNTIME    (1 << 26)       /* runtime PM support */
  52#ifdef CONFIG_SND_HDA_I915
  53#define AZX_DCAPS_I915_POWERWELL (1 << 27)      /* HSW i915 powerwell support */
  54#else
  55#define AZX_DCAPS_I915_POWERWELL 0              /* NOP */
  56#endif
  57#define AZX_DCAPS_CORBRP_SELF_CLEAR (1 << 28)   /* CORBRP clears itself after reset */
  58#define AZX_DCAPS_NO_MSI64      (1 << 29)       /* Stick to 32-bit MSIs */
  59#define AZX_DCAPS_SEPARATE_STREAM_TAG   (1 << 30) /* capture and playback use separate stream tag */
  60
  61enum {
  62        AZX_SNOOP_TYPE_NONE,
  63        AZX_SNOOP_TYPE_SCH,
  64        AZX_SNOOP_TYPE_ATI,
  65        AZX_SNOOP_TYPE_NVIDIA,
  66};
  67
  68struct azx_dev {
  69        struct hdac_stream core;
  70
  71        unsigned int irq_pending:1;
  72        /*
  73         * For VIA:
  74         *  A flag to ensure DMA position is 0
  75         *  when link position is not greater than FIFO size
  76         */
  77        unsigned int insufficient:1;
  78        unsigned int wc_marked:1;
  79};
  80
  81#define azx_stream(dev)         (&(dev)->core)
  82#define stream_to_azx_dev(s)    container_of(s, struct azx_dev, core)
  83
  84struct azx;
  85
  86/* Functions to read/write to hda registers. */
  87struct hda_controller_ops {
  88        /* Disable msi if supported, PCI only */
  89        int (*disable_msi_reset_irq)(struct azx *);
  90        int (*substream_alloc_pages)(struct azx *chip,
  91                                     struct snd_pcm_substream *substream,
  92                                     size_t size);
  93        int (*substream_free_pages)(struct azx *chip,
  94                                    struct snd_pcm_substream *substream);
  95        void (*pcm_mmap_prepare)(struct snd_pcm_substream *substream,
  96                                 struct vm_area_struct *area);
  97        /* Check if current position is acceptable */
  98        int (*position_check)(struct azx *chip, struct azx_dev *azx_dev);
  99        /* enable/disable the link power */
 100        int (*link_power)(struct azx *chip, bool enable);
 101};
 102
 103struct azx_pcm {
 104        struct azx *chip;
 105        struct snd_pcm *pcm;
 106        struct hda_codec *codec;
 107        struct hda_pcm *info;
 108        struct list_head list;
 109};
 110
 111typedef unsigned int (*azx_get_pos_callback_t)(struct azx *, struct azx_dev *);
 112typedef int (*azx_get_delay_callback_t)(struct azx *, struct azx_dev *, unsigned int pos);
 113
 114struct azx {
 115        struct hda_bus bus;
 116
 117        struct snd_card *card;
 118        struct pci_dev *pci;
 119        int dev_index;
 120
 121        /* chip type specific */
 122        int driver_type;
 123        unsigned int driver_caps;
 124        int playback_streams;
 125        int playback_index_offset;
 126        int capture_streams;
 127        int capture_index_offset;
 128        int num_streams;
 129        const int *jackpoll_ms; /* per-card jack poll interval */
 130
 131        /* Register interaction. */
 132        const struct hda_controller_ops *ops;
 133
 134        /* position adjustment callbacks */
 135        azx_get_pos_callback_t get_position[2];
 136        azx_get_delay_callback_t get_delay[2];
 137
 138        /* locks */
 139        struct mutex open_mutex; /* Prevents concurrent open/close operations */
 140
 141        /* PCM */
 142        struct list_head pcm_list; /* azx_pcm list */
 143
 144        /* HD codec */
 145        int  codec_probe_mask; /* copied from probe_mask option */
 146        unsigned int beep_mode;
 147
 148#ifdef CONFIG_SND_HDA_PATCH_LOADER
 149        const struct firmware *fw;
 150#endif
 151
 152        /* flags */
 153        int bdl_pos_adj;
 154        int poll_count;
 155        unsigned int running:1;
 156        unsigned int fallback_to_single_cmd:1;
 157        unsigned int single_cmd:1;
 158        unsigned int polling_mode:1;
 159        unsigned int msi:1;
 160        unsigned int probing:1; /* codec probing phase */
 161        unsigned int snoop:1;
 162        unsigned int align_buffer_size:1;
 163        unsigned int region_requested:1;
 164        unsigned int disabled:1; /* disabled by vga_switcheroo */
 165
 166        /* GTS present */
 167        unsigned int gts_present:1;
 168
 169#ifdef CONFIG_SND_HDA_DSP_LOADER
 170        struct azx_dev saved_azx_dev;
 171#endif
 172};
 173
 174#define azx_bus(chip)   (&(chip)->bus.core)
 175#define bus_to_azx(_bus)        container_of(_bus, struct azx, bus.core)
 176
 177#ifdef CONFIG_X86
 178#define azx_snoop(chip)         ((chip)->snoop)
 179#else
 180#define azx_snoop(chip)         true
 181#endif
 182
 183/*
 184 * macros for easy use
 185 */
 186
 187#define azx_writel(chip, reg, value) \
 188        snd_hdac_chip_writel(azx_bus(chip), reg, value)
 189#define azx_readl(chip, reg) \
 190        snd_hdac_chip_readl(azx_bus(chip), reg)
 191#define azx_writew(chip, reg, value) \
 192        snd_hdac_chip_writew(azx_bus(chip), reg, value)
 193#define azx_readw(chip, reg) \
 194        snd_hdac_chip_readw(azx_bus(chip), reg)
 195#define azx_writeb(chip, reg, value) \
 196        snd_hdac_chip_writeb(azx_bus(chip), reg, value)
 197#define azx_readb(chip, reg) \
 198        snd_hdac_chip_readb(azx_bus(chip), reg)
 199
 200#define azx_has_pm_runtime(chip) \
 201        ((chip)->driver_caps & AZX_DCAPS_PM_RUNTIME)
 202
 203/* PCM setup */
 204static inline struct azx_dev *get_azx_dev(struct snd_pcm_substream *substream)
 205{
 206        return substream->runtime->private_data;
 207}
 208unsigned int azx_get_position(struct azx *chip, struct azx_dev *azx_dev);
 209unsigned int azx_get_pos_lpib(struct azx *chip, struct azx_dev *azx_dev);
 210unsigned int azx_get_pos_posbuf(struct azx *chip, struct azx_dev *azx_dev);
 211
 212/* Stream control. */
 213void azx_stop_all_streams(struct azx *chip);
 214
 215/* Allocation functions. */
 216#define azx_alloc_stream_pages(chip) \
 217        snd_hdac_bus_alloc_stream_pages(azx_bus(chip))
 218#define azx_free_stream_pages(chip) \
 219        snd_hdac_bus_free_stream_pages(azx_bus(chip))
 220
 221/* Low level azx interface */
 222void azx_init_chip(struct azx *chip, bool full_reset);
 223void azx_stop_chip(struct azx *chip);
 224#define azx_enter_link_reset(chip) \
 225        snd_hdac_bus_enter_link_reset(azx_bus(chip))
 226irqreturn_t azx_interrupt(int irq, void *dev_id);
 227
 228/* Codec interface */
 229int azx_bus_init(struct azx *chip, const char *model,
 230                 const struct hdac_io_ops *io_ops);
 231int azx_probe_codecs(struct azx *chip, unsigned int max_slots);
 232int azx_codec_configure(struct azx *chip);
 233int azx_init_streams(struct azx *chip);
 234void azx_free_streams(struct azx *chip);
 235
 236#endif /* __SOUND_HDA_CONTROLLER_H */
 237