linux/sound/soc/intel/boards/cht_bsw_rt5672.c
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   1/*
   2 *  cht_bsw_rt5672.c - ASoc Machine driver for Intel Cherryview-based platforms
   3 *                     Cherrytrail and Braswell, with RT5672 codec.
   4 *
   5 *  Copyright (C) 2014 Intel Corp
   6 *  Author: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
   7 *          Mengdong Lin <mengdong.lin@intel.com>
   8 *
   9 *  This program is free software; you can redistribute it and/or modify
  10 *  it under the terms of the GNU General Public License as published by
  11 *  the Free Software Foundation; version 2 of the License.
  12 *
  13 *  This program is distributed in the hope that it will be useful, but
  14 *  WITHOUT ANY WARRANTY; without even the implied warranty of
  15 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16 *  General Public License for more details.
  17 */
  18
  19#include <linux/module.h>
  20#include <linux/platform_device.h>
  21#include <linux/slab.h>
  22#include <linux/clk.h>
  23#include <sound/pcm.h>
  24#include <sound/pcm_params.h>
  25#include <sound/soc.h>
  26#include <sound/jack.h>
  27#include <sound/soc-acpi.h>
  28#include "../../codecs/rt5670.h"
  29#include "../atom/sst-atom-controls.h"
  30
  31
  32/* The platform clock #3 outputs 19.2Mhz clock to codec as I2S MCLK */
  33#define CHT_PLAT_CLK_3_HZ       19200000
  34#define CHT_CODEC_DAI   "rt5670-aif1"
  35
  36struct cht_mc_private {
  37        struct snd_soc_jack headset;
  38        char codec_name[SND_ACPI_I2C_ID_LEN];
  39        struct clk *mclk;
  40};
  41
  42/* Headset jack detection DAPM pins */
  43static struct snd_soc_jack_pin cht_bsw_headset_pins[] = {
  44        {
  45                .pin = "Headset Mic",
  46                .mask = SND_JACK_MICROPHONE,
  47        },
  48        {
  49                .pin = "Headphone",
  50                .mask = SND_JACK_HEADPHONE,
  51        },
  52};
  53
  54static int platform_clock_control(struct snd_soc_dapm_widget *w,
  55                struct snd_kcontrol *k, int  event)
  56{
  57        struct snd_soc_dapm_context *dapm = w->dapm;
  58        struct snd_soc_card *card = dapm->card;
  59        struct snd_soc_dai *codec_dai;
  60        struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
  61        int ret;
  62
  63        codec_dai = snd_soc_card_get_codec_dai(card, CHT_CODEC_DAI);
  64        if (!codec_dai) {
  65                dev_err(card->dev, "Codec dai not found; Unable to set platform clock\n");
  66                return -EIO;
  67        }
  68
  69        if (SND_SOC_DAPM_EVENT_ON(event)) {
  70                if (ctx->mclk) {
  71                        ret = clk_prepare_enable(ctx->mclk);
  72                        if (ret < 0) {
  73                                dev_err(card->dev,
  74                                        "could not configure MCLK state");
  75                                return ret;
  76                        }
  77                }
  78
  79                /* set codec PLL source to the 19.2MHz platform clock (MCLK) */
  80                ret = snd_soc_dai_set_pll(codec_dai, 0, RT5670_PLL1_S_MCLK,
  81                                CHT_PLAT_CLK_3_HZ, 48000 * 512);
  82                if (ret < 0) {
  83                        dev_err(card->dev, "can't set codec pll: %d\n", ret);
  84                        return ret;
  85                }
  86
  87                /* set codec sysclk source to PLL */
  88                ret = snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_PLL1,
  89                        48000 * 512, SND_SOC_CLOCK_IN);
  90                if (ret < 0) {
  91                        dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
  92                        return ret;
  93                }
  94        } else {
  95                /* Set codec sysclk source to its internal clock because codec
  96                 * PLL will be off when idle and MCLK will also be off by ACPI
  97                 * when codec is runtime suspended. Codec needs clock for jack
  98                 * detection and button press.
  99                 */
 100                snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_RCCLK,
 101                                       48000 * 512, SND_SOC_CLOCK_IN);
 102
 103                if (ctx->mclk)
 104                        clk_disable_unprepare(ctx->mclk);
 105        }
 106        return 0;
 107}
 108
 109static const struct snd_soc_dapm_widget cht_dapm_widgets[] = {
 110        SND_SOC_DAPM_HP("Headphone", NULL),
 111        SND_SOC_DAPM_MIC("Headset Mic", NULL),
 112        SND_SOC_DAPM_MIC("Int Mic", NULL),
 113        SND_SOC_DAPM_SPK("Ext Spk", NULL),
 114        SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
 115                        platform_clock_control, SND_SOC_DAPM_PRE_PMU |
 116                        SND_SOC_DAPM_POST_PMD),
 117};
 118
 119static const struct snd_soc_dapm_route cht_audio_map[] = {
 120        {"IN1P", NULL, "Headset Mic"},
 121        {"IN1N", NULL, "Headset Mic"},
 122        {"DMIC L1", NULL, "Int Mic"},
 123        {"DMIC R1", NULL, "Int Mic"},
 124        {"Headphone", NULL, "HPOL"},
 125        {"Headphone", NULL, "HPOR"},
 126        {"Ext Spk", NULL, "SPOLP"},
 127        {"Ext Spk", NULL, "SPOLN"},
 128        {"Ext Spk", NULL, "SPORP"},
 129        {"Ext Spk", NULL, "SPORN"},
 130        {"AIF1 Playback", NULL, "ssp2 Tx"},
 131        {"ssp2 Tx", NULL, "codec_out0"},
 132        {"ssp2 Tx", NULL, "codec_out1"},
 133        {"codec_in0", NULL, "ssp2 Rx"},
 134        {"codec_in1", NULL, "ssp2 Rx"},
 135        {"ssp2 Rx", NULL, "AIF1 Capture"},
 136        {"Headphone", NULL, "Platform Clock"},
 137        {"Headset Mic", NULL, "Platform Clock"},
 138        {"Int Mic", NULL, "Platform Clock"},
 139        {"Ext Spk", NULL, "Platform Clock"},
 140};
 141
 142static const struct snd_kcontrol_new cht_mc_controls[] = {
 143        SOC_DAPM_PIN_SWITCH("Headphone"),
 144        SOC_DAPM_PIN_SWITCH("Headset Mic"),
 145        SOC_DAPM_PIN_SWITCH("Int Mic"),
 146        SOC_DAPM_PIN_SWITCH("Ext Spk"),
 147};
 148
 149static int cht_aif1_hw_params(struct snd_pcm_substream *substream,
 150                                        struct snd_pcm_hw_params *params)
 151{
 152        struct snd_soc_pcm_runtime *rtd = substream->private_data;
 153        struct snd_soc_dai *codec_dai = rtd->codec_dai;
 154        int ret;
 155
 156        /* set codec PLL source to the 19.2MHz platform clock (MCLK) */
 157        ret = snd_soc_dai_set_pll(codec_dai, 0, RT5670_PLL1_S_MCLK,
 158                                  CHT_PLAT_CLK_3_HZ, params_rate(params) * 512);
 159        if (ret < 0) {
 160                dev_err(rtd->dev, "can't set codec pll: %d\n", ret);
 161                return ret;
 162        }
 163
 164        /* set codec sysclk source to PLL */
 165        ret = snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_PLL1,
 166                                     params_rate(params) * 512,
 167                                     SND_SOC_CLOCK_IN);
 168        if (ret < 0) {
 169                dev_err(rtd->dev, "can't set codec sysclk: %d\n", ret);
 170                return ret;
 171        }
 172        return 0;
 173}
 174
 175static const struct acpi_gpio_params headset_gpios = { 0, 0, false };
 176
 177static const struct acpi_gpio_mapping cht_rt5672_gpios[] = {
 178        { "headset-gpios", &headset_gpios, 1 },
 179        {},
 180};
 181
 182static int cht_codec_init(struct snd_soc_pcm_runtime *runtime)
 183{
 184        int ret;
 185        struct snd_soc_dai *codec_dai = runtime->codec_dai;
 186        struct snd_soc_component *component = codec_dai->component;
 187        struct cht_mc_private *ctx = snd_soc_card_get_drvdata(runtime->card);
 188
 189        if (devm_acpi_dev_add_driver_gpios(component->dev, cht_rt5672_gpios))
 190                dev_warn(runtime->dev, "Unable to add GPIO mapping table\n");
 191
 192        /* TDM 4 slots 24 bit, set Rx & Tx bitmask to 4 active slots */
 193        ret = snd_soc_dai_set_tdm_slot(codec_dai, 0xF, 0xF, 4, 24);
 194        if (ret < 0) {
 195                dev_err(runtime->dev, "can't set codec TDM slot %d\n", ret);
 196                return ret;
 197        }
 198
 199        /* Select codec ASRC clock source to track I2S1 clock, because codec
 200         * is in slave mode and 100fs I2S format (BCLK = 100 * LRCLK) cannot
 201         * be supported by RT5672. Otherwise, ASRC will be disabled and cause
 202         * noise.
 203         */
 204        rt5670_sel_asrc_clk_src(component,
 205                                RT5670_DA_STEREO_FILTER
 206                                | RT5670_DA_MONO_L_FILTER
 207                                | RT5670_DA_MONO_R_FILTER
 208                                | RT5670_AD_STEREO_FILTER
 209                                | RT5670_AD_MONO_L_FILTER
 210                                | RT5670_AD_MONO_R_FILTER,
 211                                RT5670_CLK_SEL_I2S1_ASRC);
 212
 213        ret = snd_soc_card_jack_new(runtime->card, "Headset",
 214                                    SND_JACK_HEADSET | SND_JACK_BTN_0 |
 215                                    SND_JACK_BTN_1 | SND_JACK_BTN_2,
 216                                    &ctx->headset,
 217                                    cht_bsw_headset_pins,
 218                                    ARRAY_SIZE(cht_bsw_headset_pins));
 219        if (ret)
 220                return ret;
 221
 222        rt5670_set_jack_detect(component, &ctx->headset);
 223        if (ctx->mclk) {
 224                /*
 225                 * The firmware might enable the clock at
 226                 * boot (this information may or may not
 227                 * be reflected in the enable clock register).
 228                 * To change the rate we must disable the clock
 229                 * first to cover these cases. Due to common
 230                 * clock framework restrictions that do not allow
 231                 * to disable a clock that has not been enabled,
 232                 * we need to enable the clock first.
 233                 */
 234                ret = clk_prepare_enable(ctx->mclk);
 235                if (!ret)
 236                        clk_disable_unprepare(ctx->mclk);
 237
 238                ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ);
 239
 240                if (ret) {
 241                        dev_err(runtime->dev, "unable to set MCLK rate\n");
 242                        return ret;
 243                }
 244        }
 245        return 0;
 246}
 247
 248static int cht_codec_fixup(struct snd_soc_pcm_runtime *rtd,
 249                            struct snd_pcm_hw_params *params)
 250{
 251        struct snd_interval *rate = hw_param_interval(params,
 252                        SNDRV_PCM_HW_PARAM_RATE);
 253        struct snd_interval *channels = hw_param_interval(params,
 254                                                SNDRV_PCM_HW_PARAM_CHANNELS);
 255
 256        /* The DSP will covert the FE rate to 48k, stereo, 24bits */
 257        rate->min = rate->max = 48000;
 258        channels->min = channels->max = 2;
 259
 260        /* set SSP2 to 24-bit */
 261        params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
 262        return 0;
 263}
 264
 265static int cht_aif1_startup(struct snd_pcm_substream *substream)
 266{
 267        return snd_pcm_hw_constraint_single(substream->runtime,
 268                        SNDRV_PCM_HW_PARAM_RATE, 48000);
 269}
 270
 271static const struct snd_soc_ops cht_aif1_ops = {
 272        .startup = cht_aif1_startup,
 273};
 274
 275static const struct snd_soc_ops cht_be_ssp2_ops = {
 276        .hw_params = cht_aif1_hw_params,
 277};
 278
 279static struct snd_soc_dai_link cht_dailink[] = {
 280        /* Front End DAI links */
 281        [MERR_DPCM_AUDIO] = {
 282                .name = "Audio Port",
 283                .stream_name = "Audio",
 284                .cpu_dai_name = "media-cpu-dai",
 285                .codec_dai_name = "snd-soc-dummy-dai",
 286                .codec_name = "snd-soc-dummy",
 287                .platform_name = "sst-mfld-platform",
 288                .nonatomic = true,
 289                .dynamic = 1,
 290                .dpcm_playback = 1,
 291                .dpcm_capture = 1,
 292                .ops = &cht_aif1_ops,
 293        },
 294        [MERR_DPCM_DEEP_BUFFER] = {
 295                .name = "Deep-Buffer Audio Port",
 296                .stream_name = "Deep-Buffer Audio",
 297                .cpu_dai_name = "deepbuffer-cpu-dai",
 298                .codec_dai_name = "snd-soc-dummy-dai",
 299                .codec_name = "snd-soc-dummy",
 300                .platform_name = "sst-mfld-platform",
 301                .nonatomic = true,
 302                .dynamic = 1,
 303                .dpcm_playback = 1,
 304                .ops = &cht_aif1_ops,
 305        },
 306
 307        /* Back End DAI links */
 308        {
 309                /* SSP2 - Codec */
 310                .name = "SSP2-Codec",
 311                .id = 0,
 312                .cpu_dai_name = "ssp2-port",
 313                .platform_name = "sst-mfld-platform",
 314                .no_pcm = 1,
 315                .nonatomic = true,
 316                .codec_dai_name = "rt5670-aif1",
 317                .codec_name = "i2c-10EC5670:00",
 318                .dai_fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_IB_NF
 319                                        | SND_SOC_DAIFMT_CBS_CFS,
 320                .init = cht_codec_init,
 321                .be_hw_params_fixup = cht_codec_fixup,
 322                .dpcm_playback = 1,
 323                .dpcm_capture = 1,
 324                .ops = &cht_be_ssp2_ops,
 325        },
 326};
 327
 328static int cht_suspend_pre(struct snd_soc_card *card)
 329{
 330        struct snd_soc_component *component;
 331        struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
 332
 333        list_for_each_entry(component, &card->component_dev_list, card_list) {
 334                if (!strncmp(component->name,
 335                             ctx->codec_name, sizeof(ctx->codec_name))) {
 336
 337                        dev_dbg(component->dev, "disabling jack detect before going to suspend.\n");
 338                        rt5670_jack_suspend(component);
 339                        break;
 340                }
 341        }
 342        return 0;
 343}
 344
 345static int cht_resume_post(struct snd_soc_card *card)
 346{
 347        struct snd_soc_component *component;
 348        struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
 349
 350        list_for_each_entry(component, &card->component_dev_list, card_list) {
 351                if (!strncmp(component->name,
 352                             ctx->codec_name, sizeof(ctx->codec_name))) {
 353
 354                        dev_dbg(component->dev, "enabling jack detect for resume.\n");
 355                        rt5670_jack_resume(component);
 356                        break;
 357                }
 358        }
 359
 360        return 0;
 361}
 362
 363/* SoC card */
 364static struct snd_soc_card snd_soc_card_cht = {
 365        .name = "cht-bsw-rt5672",
 366        .owner = THIS_MODULE,
 367        .dai_link = cht_dailink,
 368        .num_links = ARRAY_SIZE(cht_dailink),
 369        .dapm_widgets = cht_dapm_widgets,
 370        .num_dapm_widgets = ARRAY_SIZE(cht_dapm_widgets),
 371        .dapm_routes = cht_audio_map,
 372        .num_dapm_routes = ARRAY_SIZE(cht_audio_map),
 373        .controls = cht_mc_controls,
 374        .num_controls = ARRAY_SIZE(cht_mc_controls),
 375        .suspend_pre = cht_suspend_pre,
 376        .resume_post = cht_resume_post,
 377};
 378
 379#define RT5672_I2C_DEFAULT      "i2c-10EC5670:00"
 380
 381static int snd_cht_mc_probe(struct platform_device *pdev)
 382{
 383        int ret_val = 0;
 384        struct cht_mc_private *drv;
 385        struct snd_soc_acpi_mach *mach = pdev->dev.platform_data;
 386        const char *i2c_name;
 387        int i;
 388
 389        drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_ATOMIC);
 390        if (!drv)
 391                return -ENOMEM;
 392
 393        strcpy(drv->codec_name, RT5672_I2C_DEFAULT);
 394
 395        /* fixup codec name based on HID */
 396        if (mach) {
 397                i2c_name = snd_soc_acpi_find_name_from_hid(mach->id);
 398                if (i2c_name) {
 399                        snprintf(drv->codec_name, sizeof(drv->codec_name),
 400                                 "i2c-%s", i2c_name);
 401                        for (i = 0; i < ARRAY_SIZE(cht_dailink); i++) {
 402                                if (!strcmp(cht_dailink[i].codec_name,
 403                                            RT5672_I2C_DEFAULT)) {
 404                                        cht_dailink[i].codec_name =
 405                                                drv->codec_name;
 406                                        break;
 407                                }
 408                        }
 409                }
 410        }
 411
 412        drv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
 413        if (IS_ERR(drv->mclk)) {
 414                dev_err(&pdev->dev,
 415                        "Failed to get MCLK from pmc_plt_clk_3: %ld\n",
 416                        PTR_ERR(drv->mclk));
 417                return PTR_ERR(drv->mclk);
 418        }
 419        snd_soc_card_set_drvdata(&snd_soc_card_cht, drv);
 420
 421        /* register the soc card */
 422        snd_soc_card_cht.dev = &pdev->dev;
 423        ret_val = devm_snd_soc_register_card(&pdev->dev, &snd_soc_card_cht);
 424        if (ret_val) {
 425                dev_err(&pdev->dev,
 426                        "snd_soc_register_card failed %d\n", ret_val);
 427                return ret_val;
 428        }
 429        platform_set_drvdata(pdev, &snd_soc_card_cht);
 430        return ret_val;
 431}
 432
 433static struct platform_driver snd_cht_mc_driver = {
 434        .driver = {
 435                .name = "cht-bsw-rt5672",
 436        },
 437        .probe = snd_cht_mc_probe,
 438};
 439
 440module_platform_driver(snd_cht_mc_driver);
 441
 442MODULE_DESCRIPTION("ASoC Intel(R) Baytrail CR Machine driver");
 443MODULE_AUTHOR("Subhransu S. Prusty, Mengdong Lin");
 444MODULE_LICENSE("GPL v2");
 445MODULE_ALIAS("platform:cht-bsw-rt5672");
 446