LXR linux/arch/powerpc/include/asm/smp.h

   1/* 
   2 * smp.h: PowerPC-specific SMP code.
   3 *
   4 * Original was a copy of sparc smp.h.  Now heavily modified
   5 * for PPC.
   6 *
   7 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
   8 * Copyright (C) 1996-2001 Cort Dougan <cort@fsmlabs.com>
   9 *
  10 * This program is free software; you can redistribute it and/or
  11 * modify it under the terms of the GNU General Public License
  12 * as published by the Free Software Foundation; either version
  13 * 2 of the License, or (at your option) any later version.
  14 */
  15
  16#ifndef _ASM_POWERPC_SMP_H
  17#define _ASM_POWERPC_SMP_H
  18#ifdef __KERNEL__
  19
  20#include <linux/threads.h>
  21#include <linux/cpumask.h>
  22#include <linux/kernel.h>
  23#include <linux/irqreturn.h>
  24
  25#ifndef __ASSEMBLY__
  26
  27#ifdef CONFIG_PPC64
  28#include <asm/paca.h>
  29#endif
  30#include <asm/percpu.h>
  31
  32extern int boot_cpuid;
  33extern int spinning_secondaries;
  34extern u32 *cpu_to_phys_id;
  35
  36extern void cpu_die(void);
  37extern int cpu_to_chip_id(int cpu);
  38
  39#ifdef CONFIG_SMP
  40
  41struct smp_ops_t {
  42        void  (*message_pass)(int cpu, int msg);
  43#ifdef CONFIG_PPC_SMP_MUXED_IPI
  44        void  (*cause_ipi)(int cpu);
  45#endif
  46        int   (*cause_nmi_ipi)(int cpu);
  47        void  (*probe)(void);
  48        int   (*kick_cpu)(int nr);
  49        int   (*prepare_cpu)(int nr);
  50        void  (*setup_cpu)(int nr);
  51        void  (*bringup_done)(void);
  52        void  (*take_timebase)(void);
  53        void  (*give_timebase)(void);
  54        int   (*cpu_disable)(void);
  55        void  (*cpu_die)(unsigned int nr);
  56        int   (*cpu_bootable)(unsigned int nr);
  57};
  58
  59extern void smp_flush_nmi_ipi(u64 delay_us);
  60extern int smp_send_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us);
  61extern int smp_send_safe_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us);
  62extern void smp_send_debugger_break(void);
  63extern void start_secondary_resume(void);
  64extern void smp_generic_give_timebase(void);
  65extern void smp_generic_take_timebase(void);
  66
  67DECLARE_PER_CPU(unsigned int, cpu_pvr);
  68
  69#ifdef CONFIG_HOTPLUG_CPU
  70int generic_cpu_disable(void);
  71void generic_cpu_die(unsigned int cpu);
  72void generic_set_cpu_dead(unsigned int cpu);
  73void generic_set_cpu_up(unsigned int cpu);
  74int generic_check_cpu_restart(unsigned int cpu);
  75int is_cpu_dead(unsigned int cpu);
  76#else
  77#define generic_set_cpu_up(i)   do { } while (0)
  78#endif
  79
  80#ifdef CONFIG_PPC64
  81#define raw_smp_processor_id()  (local_paca->paca_index)
  82#define hard_smp_processor_id() (get_paca()->hw_cpu_id)
  83#else
  84/* 32-bit */
  85extern int smp_hw_index[];
  86
  87#define raw_smp_processor_id()  (current_thread_info()->cpu)
  88#define hard_smp_processor_id()         (smp_hw_index[smp_processor_id()])
  89
  90static inline int get_hard_smp_processor_id(int cpu)
  91{
  92        return smp_hw_index[cpu];
  93}
  94
  95static inline void set_hard_smp_processor_id(int cpu, int phys)
  96{
  97        smp_hw_index[cpu] = phys;
  98}
  99#endif
 100
 101DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map);
 102DECLARE_PER_CPU(cpumask_var_t, cpu_l2_cache_map);
 103DECLARE_PER_CPU(cpumask_var_t, cpu_core_map);
 104DECLARE_PER_CPU(cpumask_var_t, cpu_smallcore_map);
 105
 106static inline struct cpumask *cpu_sibling_mask(int cpu)
 107{
 108        return per_cpu(cpu_sibling_map, cpu);
 109}
 110
 111static inline struct cpumask *cpu_core_mask(int cpu)
 112{
 113        return per_cpu(cpu_core_map, cpu);
 114}
 115
 116static inline struct cpumask *cpu_l2_cache_mask(int cpu)
 117{
 118        return per_cpu(cpu_l2_cache_map, cpu);
 119}
 120
 121static inline struct cpumask *cpu_smallcore_mask(int cpu)
 122{
 123        return per_cpu(cpu_smallcore_map, cpu);
 124}
 125
 126extern int cpu_to_core_id(int cpu);
 127
 128/* Since OpenPIC has only 4 IPIs, we use slightly different message numbers.
 129 *
 130 * Make sure this matches openpic_request_IPIs in open_pic.c, or what shows up
 131 * in /proc/interrupts will be wrong!!! --Troy */
 132#define PPC_MSG_CALL_FUNCTION   0
 133#define PPC_MSG_RESCHEDULE      1
 134#define PPC_MSG_TICK_BROADCAST  2
 135#define PPC_MSG_NMI_IPI         3
 136
 137/* This is only used by the powernv kernel */
 138#define PPC_MSG_RM_HOST_ACTION  4
 139
 140#define NMI_IPI_ALL_OTHERS              -2
 141
 142#ifdef CONFIG_NMI_IPI
 143extern int smp_handle_nmi_ipi(struct pt_regs *regs);
 144#else
 145static inline int smp_handle_nmi_ipi(struct pt_regs *regs) { return 0; }
 146#endif
 147
 148/* for irq controllers that have dedicated ipis per message (4) */
 149extern int smp_request_message_ipi(int virq, int message);
 150extern const char *smp_ipi_name[];
 151
 152/* for irq controllers with only a single ipi */
 153extern void smp_muxed_ipi_message_pass(int cpu, int msg);
 154extern void smp_muxed_ipi_set_message(int cpu, int msg);
 155extern irqreturn_t smp_ipi_demux(void);
 156extern irqreturn_t smp_ipi_demux_relaxed(void);
 157
 158void smp_init_pSeries(void);
 159void smp_init_cell(void);
 160void smp_setup_cpu_maps(void);
 161
 162extern int __cpu_disable(void);
 163extern void __cpu_die(unsigned int cpu);
 164
 165#else
 166/* for UP */
 167#define hard_smp_processor_id()         get_hard_smp_processor_id(0)
 168#define smp_setup_cpu_maps()
 169static inline void inhibit_secondary_onlining(void) {}
 170static inline void uninhibit_secondary_onlining(void) {}
 171static inline const struct cpumask *cpu_sibling_mask(int cpu)
 172{
 173        return cpumask_of(cpu);
 174}
 175
 176static inline const struct cpumask *cpu_smallcore_mask(int cpu)
 177{
 178        return cpumask_of(cpu);
 179}
 180
 181#endif /* CONFIG_SMP */
 182
 183#ifdef CONFIG_PPC64
 184static inline int get_hard_smp_processor_id(int cpu)
 185{
 186        return paca_ptrs[cpu]->hw_cpu_id;
 187}
 188
 189static inline void set_hard_smp_processor_id(int cpu, int phys)
 190{
 191        paca_ptrs[cpu]->hw_cpu_id = phys;
 192}
 193#else
 194/* 32-bit */
 195#ifndef CONFIG_SMP
 196extern int boot_cpuid_phys;
 197static inline int get_hard_smp_processor_id(int cpu)
 198{
 199        return boot_cpuid_phys;
 200}
 201
 202static inline void set_hard_smp_processor_id(int cpu, int phys)
 203{
 204        boot_cpuid_phys = phys;
 205}
 206#endif /* !CONFIG_SMP */
 207#endif /* !CONFIG_PPC64 */
 208
 209#if defined(CONFIG_PPC64) && (defined(CONFIG_SMP) || defined(CONFIG_KEXEC_CORE))
 210extern void smp_release_cpus(void);
 211#else
 212static inline void smp_release_cpus(void) { };
 213#endif
 214
 215extern int smt_enabled_at_boot;
 216
 217extern void smp_mpic_probe(void);
 218extern void smp_mpic_setup_cpu(int cpu);
 219extern int smp_generic_kick_cpu(int nr);
 220extern int smp_generic_cpu_bootable(unsigned int nr);
 221
 222
 223extern void smp_generic_give_timebase(void);
 224extern void smp_generic_take_timebase(void);
 225
 226extern struct smp_ops_t *smp_ops;
 227
 228extern void arch_send_call_function_single_ipi(int cpu);
 229extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
 230
 231/* Definitions relative to the secondary CPU spin loop
 232 * and entry point. Not all of them exist on both 32 and
 233 * 64-bit but defining them all here doesn't harm
 234 */
 235extern void generic_secondary_smp_init(void);
 236extern void generic_secondary_thread_init(void);
 237extern unsigned long __secondary_hold_spinloop;
 238extern unsigned long __secondary_hold_acknowledge;
 239extern char __secondary_hold;
 240extern unsigned int booting_thread_hwid;
 241
 242extern void __early_start(void);
 243#endif /* __ASSEMBLY__ */
 244
 245#endif /* __KERNEL__ */
 246#endif /* _ASM_POWERPC_SMP_H) */
 247