linux/drivers/gpu/drm/i915/i915_gem_context.h
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   1/*
   2 * Copyright © 2016 Intel Corporation
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice (including the next
  12 * paragraph) shall be included in all copies or substantial portions of the
  13 * Software.
  14 *
  15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21 * IN THE SOFTWARE.
  22 *
  23 */
  24
  25#ifndef __I915_GEM_CONTEXT_H__
  26#define __I915_GEM_CONTEXT_H__
  27
  28#include <linux/bitops.h>
  29#include <linux/list.h>
  30#include <linux/radix-tree.h>
  31
  32#include "i915_gem.h"
  33#include "i915_scheduler.h"
  34#include "intel_device_info.h"
  35
  36struct pid;
  37
  38struct drm_device;
  39struct drm_file;
  40
  41struct drm_i915_private;
  42struct drm_i915_file_private;
  43struct i915_hw_ppgtt;
  44struct i915_request;
  45struct i915_vma;
  46struct intel_ring;
  47
  48#define DEFAULT_CONTEXT_HANDLE 0
  49
  50struct intel_context;
  51
  52struct intel_context_ops {
  53        void (*unpin)(struct intel_context *ce);
  54        void (*destroy)(struct intel_context *ce);
  55};
  56
  57/*
  58 * Powergating configuration for a particular (context,engine).
  59 */
  60struct intel_sseu {
  61        u8 slice_mask;
  62        u8 subslice_mask;
  63        u8 min_eus_per_subslice;
  64        u8 max_eus_per_subslice;
  65};
  66
  67/**
  68 * struct i915_gem_context - client state
  69 *
  70 * The struct i915_gem_context represents the combined view of the driver and
  71 * logical hardware state for a particular client.
  72 */
  73struct i915_gem_context {
  74        /** i915: i915 device backpointer */
  75        struct drm_i915_private *i915;
  76
  77        /** file_priv: owning file descriptor */
  78        struct drm_i915_file_private *file_priv;
  79
  80        /**
  81         * @ppgtt: unique address space (GTT)
  82         *
  83         * In full-ppgtt mode, each context has its own address space ensuring
  84         * complete seperation of one client from all others.
  85         *
  86         * In other modes, this is a NULL pointer with the expectation that
  87         * the caller uses the shared global GTT.
  88         */
  89        struct i915_hw_ppgtt *ppgtt;
  90
  91        /**
  92         * @pid: process id of creator
  93         *
  94         * Note that who created the context may not be the principle user,
  95         * as the context may be shared across a local socket. However,
  96         * that should only affect the default context, all contexts created
  97         * explicitly by the client are expected to be isolated.
  98         */
  99        struct pid *pid;
 100
 101        /**
 102         * @name: arbitrary name
 103         *
 104         * A name is constructed for the context from the creator's process
 105         * name, pid and user handle in order to uniquely identify the
 106         * context in messages.
 107         */
 108        const char *name;
 109
 110        /** link: place with &drm_i915_private.context_list */
 111        struct list_head link;
 112        struct llist_node free_link;
 113
 114        /**
 115         * @ref: reference count
 116         *
 117         * A reference to a context is held by both the client who created it
 118         * and on each request submitted to the hardware using the request
 119         * (to ensure the hardware has access to the state until it has
 120         * finished all pending writes). See i915_gem_context_get() and
 121         * i915_gem_context_put() for access.
 122         */
 123        struct kref ref;
 124
 125        /**
 126         * @rcu: rcu_head for deferred freeing.
 127         */
 128        struct rcu_head rcu;
 129
 130        /**
 131         * @user_flags: small set of booleans controlled by the user
 132         */
 133        unsigned long user_flags;
 134#define UCONTEXT_NO_ZEROMAP             0
 135#define UCONTEXT_NO_ERROR_CAPTURE       1
 136#define UCONTEXT_BANNABLE               2
 137
 138        /**
 139         * @flags: small set of booleans
 140         */
 141        unsigned long flags;
 142#define CONTEXT_BANNED                  0
 143#define CONTEXT_CLOSED                  1
 144#define CONTEXT_FORCE_SINGLE_SUBMISSION 2
 145
 146        /**
 147         * @hw_id: - unique identifier for the context
 148         *
 149         * The hardware needs to uniquely identify the context for a few
 150         * functions like fault reporting, PASID, scheduling. The
 151         * &drm_i915_private.context_hw_ida is used to assign a unqiue
 152         * id for the lifetime of the context.
 153         *
 154         * @hw_id_pin_count: - number of times this context had been pinned
 155         * for use (should be, at most, once per engine).
 156         *
 157         * @hw_id_link: - all contexts with an assigned id are tracked
 158         * for possible repossession.
 159         */
 160        unsigned int hw_id;
 161        atomic_t hw_id_pin_count;
 162        struct list_head hw_id_link;
 163
 164        /**
 165         * @user_handle: userspace identifier
 166         *
 167         * A unique per-file identifier is generated from
 168         * &drm_i915_file_private.contexts.
 169         */
 170        u32 user_handle;
 171
 172        struct i915_sched_attr sched;
 173
 174        /** engine: per-engine logical HW state */
 175        struct intel_context {
 176                struct i915_gem_context *gem_context;
 177                struct intel_engine_cs *active;
 178                struct list_head signal_link;
 179                struct list_head signals;
 180                struct i915_vma *state;
 181                struct intel_ring *ring;
 182                u32 *lrc_reg_state;
 183                u64 lrc_desc;
 184                int pin_count;
 185
 186                /**
 187                 * active_tracker: Active tracker for the external rq activity
 188                 * on this intel_context object.
 189                 */
 190                struct i915_active_request active_tracker;
 191
 192                const struct intel_context_ops *ops;
 193
 194                /** sseu: Control eu/slice partitioning */
 195                struct intel_sseu sseu;
 196        } __engine[I915_NUM_ENGINES];
 197
 198        /** ring_size: size for allocating the per-engine ring buffer */
 199        u32 ring_size;
 200        /** desc_template: invariant fields for the HW context descriptor */
 201        u32 desc_template;
 202
 203        /** guilty_count: How many times this context has caused a GPU hang. */
 204        atomic_t guilty_count;
 205        /**
 206         * @active_count: How many times this context was active during a GPU
 207         * hang, but did not cause it.
 208         */
 209        atomic_t active_count;
 210
 211#define CONTEXT_SCORE_GUILTY            10
 212#define CONTEXT_SCORE_BAN_THRESHOLD     40
 213        /** ban_score: Accumulated score of all hangs caused by this context. */
 214        atomic_t ban_score;
 215
 216        /** remap_slice: Bitmask of cache lines that need remapping */
 217        u8 remap_slice;
 218
 219        /** handles_vma: rbtree to look up our context specific obj/vma for
 220         * the user handle. (user handles are per fd, but the binding is
 221         * per vm, which may be one per context or shared with the global GTT)
 222         */
 223        struct radix_tree_root handles_vma;
 224
 225        /** handles_list: reverse list of all the rbtree entries in use for
 226         * this context, which allows us to free all the allocations on
 227         * context close.
 228         */
 229        struct list_head handles_list;
 230};
 231
 232static inline bool i915_gem_context_is_closed(const struct i915_gem_context *ctx)
 233{
 234        return test_bit(CONTEXT_CLOSED, &ctx->flags);
 235}
 236
 237static inline void i915_gem_context_set_closed(struct i915_gem_context *ctx)
 238{
 239        GEM_BUG_ON(i915_gem_context_is_closed(ctx));
 240        set_bit(CONTEXT_CLOSED, &ctx->flags);
 241}
 242
 243static inline bool i915_gem_context_no_error_capture(const struct i915_gem_context *ctx)
 244{
 245        return test_bit(UCONTEXT_NO_ERROR_CAPTURE, &ctx->user_flags);
 246}
 247
 248static inline void i915_gem_context_set_no_error_capture(struct i915_gem_context *ctx)
 249{
 250        set_bit(UCONTEXT_NO_ERROR_CAPTURE, &ctx->user_flags);
 251}
 252
 253static inline void i915_gem_context_clear_no_error_capture(struct i915_gem_context *ctx)
 254{
 255        clear_bit(UCONTEXT_NO_ERROR_CAPTURE, &ctx->user_flags);
 256}
 257
 258static inline bool i915_gem_context_is_bannable(const struct i915_gem_context *ctx)
 259{
 260        return test_bit(UCONTEXT_BANNABLE, &ctx->user_flags);
 261}
 262
 263static inline void i915_gem_context_set_bannable(struct i915_gem_context *ctx)
 264{
 265        set_bit(UCONTEXT_BANNABLE, &ctx->user_flags);
 266}
 267
 268static inline void i915_gem_context_clear_bannable(struct i915_gem_context *ctx)
 269{
 270        clear_bit(UCONTEXT_BANNABLE, &ctx->user_flags);
 271}
 272
 273static inline bool i915_gem_context_is_banned(const struct i915_gem_context *ctx)
 274{
 275        return test_bit(CONTEXT_BANNED, &ctx->flags);
 276}
 277
 278static inline void i915_gem_context_set_banned(struct i915_gem_context *ctx)
 279{
 280        set_bit(CONTEXT_BANNED, &ctx->flags);
 281}
 282
 283static inline bool i915_gem_context_force_single_submission(const struct i915_gem_context *ctx)
 284{
 285        return test_bit(CONTEXT_FORCE_SINGLE_SUBMISSION, &ctx->flags);
 286}
 287
 288static inline void i915_gem_context_set_force_single_submission(struct i915_gem_context *ctx)
 289{
 290        __set_bit(CONTEXT_FORCE_SINGLE_SUBMISSION, &ctx->flags);
 291}
 292
 293int __i915_gem_context_pin_hw_id(struct i915_gem_context *ctx);
 294static inline int i915_gem_context_pin_hw_id(struct i915_gem_context *ctx)
 295{
 296        if (atomic_inc_not_zero(&ctx->hw_id_pin_count))
 297                return 0;
 298
 299        return __i915_gem_context_pin_hw_id(ctx);
 300}
 301
 302static inline void i915_gem_context_unpin_hw_id(struct i915_gem_context *ctx)
 303{
 304        GEM_BUG_ON(atomic_read(&ctx->hw_id_pin_count) == 0u);
 305        atomic_dec(&ctx->hw_id_pin_count);
 306}
 307
 308static inline bool i915_gem_context_is_default(const struct i915_gem_context *c)
 309{
 310        return c->user_handle == DEFAULT_CONTEXT_HANDLE;
 311}
 312
 313static inline bool i915_gem_context_is_kernel(struct i915_gem_context *ctx)
 314{
 315        return !ctx->file_priv;
 316}
 317
 318static inline struct intel_context *
 319to_intel_context(struct i915_gem_context *ctx,
 320                 const struct intel_engine_cs *engine)
 321{
 322        return &ctx->__engine[engine->id];
 323}
 324
 325static inline struct intel_context *
 326intel_context_pin(struct i915_gem_context *ctx, struct intel_engine_cs *engine)
 327{
 328        return engine->context_pin(engine, ctx);
 329}
 330
 331static inline void __intel_context_pin(struct intel_context *ce)
 332{
 333        GEM_BUG_ON(!ce->pin_count);
 334        ce->pin_count++;
 335}
 336
 337static inline void intel_context_unpin(struct intel_context *ce)
 338{
 339        GEM_BUG_ON(!ce->pin_count);
 340        if (--ce->pin_count)
 341                return;
 342
 343        GEM_BUG_ON(!ce->ops);
 344        ce->ops->unpin(ce);
 345}
 346
 347/* i915_gem_context.c */
 348int __must_check i915_gem_contexts_init(struct drm_i915_private *dev_priv);
 349void i915_gem_contexts_lost(struct drm_i915_private *dev_priv);
 350void i915_gem_contexts_fini(struct drm_i915_private *dev_priv);
 351
 352int i915_gem_context_open(struct drm_i915_private *i915,
 353                          struct drm_file *file);
 354void i915_gem_context_close(struct drm_file *file);
 355
 356int i915_switch_context(struct i915_request *rq);
 357int i915_gem_switch_to_kernel_context(struct drm_i915_private *dev_priv);
 358
 359void i915_gem_context_release(struct kref *ctx_ref);
 360struct i915_gem_context *
 361i915_gem_context_create_gvt(struct drm_device *dev);
 362
 363int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
 364                                  struct drm_file *file);
 365int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
 366                                   struct drm_file *file);
 367int i915_gem_context_getparam_ioctl(struct drm_device *dev, void *data,
 368                                    struct drm_file *file_priv);
 369int i915_gem_context_setparam_ioctl(struct drm_device *dev, void *data,
 370                                    struct drm_file *file_priv);
 371int i915_gem_context_reset_stats_ioctl(struct drm_device *dev, void *data,
 372                                       struct drm_file *file);
 373
 374struct i915_gem_context *
 375i915_gem_context_create_kernel(struct drm_i915_private *i915, int prio);
 376
 377static inline struct i915_gem_context *
 378i915_gem_context_get(struct i915_gem_context *ctx)
 379{
 380        kref_get(&ctx->ref);
 381        return ctx;
 382}
 383
 384static inline void i915_gem_context_put(struct i915_gem_context *ctx)
 385{
 386        kref_put(&ctx->ref, i915_gem_context_release);
 387}
 388
 389void intel_context_init(struct intel_context *ce,
 390                        struct i915_gem_context *ctx,
 391                        struct intel_engine_cs *engine);
 392
 393#endif /* !__I915_GEM_CONTEXT_H__ */
 394