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25#include "priv.h"
26
27static void
28gf100_bus_intr(struct nvkm_bus *bus)
29{
30 struct nvkm_subdev *subdev = &bus->subdev;
31 struct nvkm_device *device = subdev->device;
32 u32 stat = nvkm_rd32(device, 0x001100) & nvkm_rd32(device, 0x001140);
33
34 if (stat & 0x0000000e) {
35 u32 addr = nvkm_rd32(device, 0x009084);
36 u32 data = nvkm_rd32(device, 0x009088);
37
38 nvkm_error(subdev,
39 "MMIO %s of %08x FAULT at %06x [ %s%s%s]\n",
40 (addr & 0x00000002) ? "write" : "read", data,
41 (addr & 0x00fffffc),
42 (stat & 0x00000002) ? "!ENGINE " : "",
43 (stat & 0x00000004) ? "IBUS " : "",
44 (stat & 0x00000008) ? "TIMEOUT " : "");
45
46 nvkm_wr32(device, 0x009084, 0x00000000);
47 nvkm_wr32(device, 0x001100, (stat & 0x0000000e));
48 stat &= ~0x0000000e;
49 }
50
51 if (stat) {
52 nvkm_error(subdev, "intr %08x\n", stat);
53 nvkm_mask(device, 0x001140, stat, 0x00000000);
54 }
55}
56
57static void
58gf100_bus_init(struct nvkm_bus *bus)
59{
60 struct nvkm_device *device = bus->subdev.device;
61 nvkm_wr32(device, 0x001100, 0xffffffff);
62 nvkm_wr32(device, 0x001140, 0x0000000e);
63}
64
65static const struct nvkm_bus_func
66gf100_bus = {
67 .init = gf100_bus_init,
68 .intr = gf100_bus_intr,
69};
70
71int
72gf100_bus_new(struct nvkm_device *device, int index, struct nvkm_bus **pbus)
73{
74 return nvkm_bus_new_(&gf100_bus, device, index, pbus);
75}
76