linux/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c
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   1/*
   2 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  20 * DEALINGS IN THE SOFTWARE.
  21 */
  22
  23
  24#include "ls_ucode.h"
  25#include "acr.h"
  26
  27#include <core/firmware.h>
  28#include <core/msgqueue.h>
  29#include <subdev/pmu.h>
  30#include <engine/sec2.h>
  31#include <subdev/mc.h>
  32#include <subdev/timer.h>
  33
  34/**
  35 * acr_ls_ucode_load_msgqueue - load and prepare a ucode img for a msgqueue fw
  36 *
  37 * Load the LS microcode, desc and signature and pack them into a single
  38 * blob.
  39 */
  40static int
  41acr_ls_ucode_load_msgqueue(const struct nvkm_subdev *subdev, const char *name,
  42                           struct ls_ucode_img *img)
  43{
  44        const struct firmware *image, *desc, *sig;
  45        char f[64];
  46        int ret;
  47
  48        snprintf(f, sizeof(f), "%s/image", name);
  49        ret = nvkm_firmware_get(subdev->device, f, &image);
  50        if (ret)
  51                return ret;
  52        img->ucode_data = kmemdup(image->data, image->size, GFP_KERNEL);
  53        nvkm_firmware_put(image);
  54        if (!img->ucode_data)
  55                return -ENOMEM;
  56
  57        snprintf(f, sizeof(f), "%s/desc", name);
  58        ret = nvkm_firmware_get(subdev->device, f, &desc);
  59        if (ret)
  60                return ret;
  61        memcpy(&img->ucode_desc, desc->data, sizeof(img->ucode_desc));
  62        img->ucode_size = ALIGN(img->ucode_desc.app_start_offset + img->ucode_desc.app_size, 256);
  63        nvkm_firmware_put(desc);
  64
  65        snprintf(f, sizeof(f), "%s/sig", name);
  66        ret = nvkm_firmware_get(subdev->device, f, &sig);
  67        if (ret)
  68                return ret;
  69        img->sig_size = sig->size;
  70        img->sig = kmemdup(sig->data, sig->size, GFP_KERNEL);
  71        nvkm_firmware_put(sig);
  72        if (!img->sig)
  73                return -ENOMEM;
  74
  75        return 0;
  76}
  77
  78static int
  79acr_ls_msgqueue_post_run(struct nvkm_msgqueue *queue,
  80                         struct nvkm_falcon *falcon, u32 addr_args)
  81{
  82        struct nvkm_device *device = falcon->owner->device;
  83        u8 buf[NVKM_MSGQUEUE_CMDLINE_SIZE];
  84
  85        memset(buf, 0, sizeof(buf));
  86        nvkm_msgqueue_write_cmdline(queue, buf);
  87        nvkm_falcon_load_dmem(falcon, buf, addr_args, sizeof(buf), 0);
  88        /* rearm the queue so it will wait for the init message */
  89        nvkm_msgqueue_reinit(queue);
  90
  91        /* Enable interrupts */
  92        nvkm_falcon_wr32(falcon, 0x10, 0xff);
  93        nvkm_mc_intr_mask(device, falcon->owner->index, true);
  94
  95        /* Start LS firmware on boot falcon */
  96        nvkm_falcon_start(falcon);
  97
  98        return 0;
  99}
 100
 101int
 102acr_ls_ucode_load_pmu(const struct nvkm_secboot *sb, struct ls_ucode_img *img)
 103{
 104        struct nvkm_pmu *pmu = sb->subdev.device->pmu;
 105        int ret;
 106
 107        ret = acr_ls_ucode_load_msgqueue(&sb->subdev, "pmu", img);
 108        if (ret)
 109                return ret;
 110
 111        /* Allocate the PMU queue corresponding to the FW version */
 112        ret = nvkm_msgqueue_new(img->ucode_desc.app_version, pmu->falcon,
 113                                sb, &pmu->queue);
 114        if (ret)
 115                return ret;
 116
 117        return 0;
 118}
 119
 120int
 121acr_ls_pmu_post_run(const struct nvkm_acr *acr, const struct nvkm_secboot *sb)
 122{
 123        struct nvkm_device *device = sb->subdev.device;
 124        struct nvkm_pmu *pmu = device->pmu;
 125        u32 addr_args = pmu->falcon->data.limit - NVKM_MSGQUEUE_CMDLINE_SIZE;
 126        int ret;
 127
 128        ret = acr_ls_msgqueue_post_run(pmu->queue, pmu->falcon, addr_args);
 129        if (ret)
 130                return ret;
 131
 132        nvkm_debug(&sb->subdev, "%s started\n",
 133                   nvkm_secboot_falcon_name[acr->boot_falcon]);
 134
 135        return 0;
 136}
 137
 138int
 139acr_ls_ucode_load_sec2(const struct nvkm_secboot *sb, struct ls_ucode_img *img)
 140{
 141        struct nvkm_sec2 *sec = sb->subdev.device->sec2;
 142        int ret;
 143
 144        ret = acr_ls_ucode_load_msgqueue(&sb->subdev, "sec2", img);
 145        if (ret)
 146                return ret;
 147
 148        /* Allocate the PMU queue corresponding to the FW version */
 149        ret = nvkm_msgqueue_new(img->ucode_desc.app_version, sec->falcon,
 150                                sb, &sec->queue);
 151        if (ret)
 152                return ret;
 153
 154        return 0;
 155}
 156
 157int
 158acr_ls_sec2_post_run(const struct nvkm_acr *acr, const struct nvkm_secboot *sb)
 159{
 160        const struct nvkm_subdev *subdev = &sb->subdev;
 161        struct nvkm_device *device = subdev->device;
 162        struct nvkm_sec2 *sec = device->sec2;
 163        /* on SEC arguments are always at the beginning of EMEM */
 164        const u32 addr_args = 0x01000000;
 165        u32 reg;
 166        int ret;
 167
 168        ret = acr_ls_msgqueue_post_run(sec->queue, sec->falcon, addr_args);
 169        if (ret)
 170                return ret;
 171
 172        /*
 173         * There is a bug where the LS firmware sometimes require to be started
 174         * twice (this happens only on SEC). Detect and workaround that
 175         * condition.
 176         *
 177         * Once started, the falcon will end up in STOPPED condition (bit 5)
 178         * if successful, or in HALT condition (bit 4) if not.
 179         */
 180        nvkm_msec(device, 1,
 181                  if ((reg = nvkm_falcon_rd32(sb->boot_falcon, 0x100) & 0x30) != 0)
 182                          break;
 183        );
 184        if (reg & BIT(4)) {
 185                nvkm_debug(subdev, "applying workaround for start bug...\n");
 186                nvkm_falcon_start(sb->boot_falcon);
 187                nvkm_msec(subdev->device, 1,
 188                        if ((reg = nvkm_rd32(subdev->device,
 189                                             sb->boot_falcon->addr + 0x100)
 190                             & 0x30) != 0)
 191                                break;
 192                );
 193                if (reg & BIT(4)) {
 194                        nvkm_error(subdev, "%s failed to start\n",
 195                               nvkm_secboot_falcon_name[acr->boot_falcon]);
 196                        return -EINVAL;
 197                }
 198        }
 199
 200        nvkm_debug(&sb->subdev, "%s started\n",
 201                   nvkm_secboot_falcon_name[acr->boot_falcon]);
 202
 203        return 0;
 204}
 205