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25#include <linux/interrupt.h>
26#include <linux/device.h>
27#include <linux/kernel.h>
28#include <linux/sysfs.h>
29#include <linux/i2c.h>
30#include <linux/regulator/consumer.h>
31#include <linux/slab.h>
32#include <linux/types.h>
33#include <linux/err.h>
34#include <linux/module.h>
35#include <linux/bitops.h>
36
37#include <linux/iio/iio.h>
38#include <linux/iio/sysfs.h>
39#include <linux/iio/events.h>
40#include <linux/iio/buffer.h>
41#include <linux/iio/trigger_consumer.h>
42#include <linux/iio/triggered_buffer.h>
43
44#define AD799X_CHANNEL_SHIFT 4
45
46
47
48
49
50#define AD7991_REF_SEL 0x08
51#define AD7991_FLTR 0x04
52#define AD7991_BIT_TRIAL_DELAY 0x02
53#define AD7991_SAMPLE_DELAY 0x01
54
55
56
57
58
59#define AD7998_FLTR BIT(3)
60#define AD7998_ALERT_EN BIT(2)
61#define AD7998_BUSY_ALERT BIT(1)
62#define AD7998_BUSY_ALERT_POL BIT(0)
63
64#define AD7998_CONV_RES_REG 0x0
65#define AD7998_ALERT_STAT_REG 0x1
66#define AD7998_CONF_REG 0x2
67#define AD7998_CYCLE_TMR_REG 0x3
68
69#define AD7998_DATALOW_REG(x) ((x) * 3 + 0x4)
70#define AD7998_DATAHIGH_REG(x) ((x) * 3 + 0x5)
71#define AD7998_HYST_REG(x) ((x) * 3 + 0x6)
72
73#define AD7998_CYC_MASK GENMASK(2, 0)
74#define AD7998_CYC_DIS 0x0
75#define AD7998_CYC_TCONF_32 0x1
76#define AD7998_CYC_TCONF_64 0x2
77#define AD7998_CYC_TCONF_128 0x3
78#define AD7998_CYC_TCONF_256 0x4
79#define AD7998_CYC_TCONF_512 0x5
80#define AD7998_CYC_TCONF_1024 0x6
81#define AD7998_CYC_TCONF_2048 0x7
82
83#define AD7998_ALERT_STAT_CLEAR 0xFF
84
85
86
87
88
89#define AD7997_8_READ_SINGLE BIT(7)
90#define AD7997_8_READ_SEQUENCE (BIT(6) | BIT(5) | BIT(4))
91
92enum {
93 ad7991,
94 ad7995,
95 ad7999,
96 ad7992,
97 ad7993,
98 ad7994,
99 ad7997,
100 ad7998
101};
102
103
104
105
106
107
108
109struct ad799x_chip_config {
110 const struct iio_chan_spec channel[9];
111 u16 default_config;
112 const struct iio_info *info;
113};
114
115
116
117
118
119
120
121struct ad799x_chip_info {
122 int num_channels;
123 const struct ad799x_chip_config noirq_config;
124 const struct ad799x_chip_config irq_config;
125};
126
127struct ad799x_state {
128 struct i2c_client *client;
129 const struct ad799x_chip_config *chip_config;
130 struct regulator *reg;
131 struct regulator *vref;
132 unsigned id;
133 u16 config;
134
135 u8 *rx_buf;
136 unsigned int transfer_size;
137};
138
139static int ad799x_write_config(struct ad799x_state *st, u16 val)
140{
141 switch (st->id) {
142 case ad7997:
143 case ad7998:
144 return i2c_smbus_write_word_swapped(st->client, AD7998_CONF_REG,
145 val);
146 case ad7992:
147 case ad7993:
148 case ad7994:
149 return i2c_smbus_write_byte_data(st->client, AD7998_CONF_REG,
150 val);
151 default:
152
153 st->config = val;
154 return 0;
155 }
156}
157
158static int ad799x_read_config(struct ad799x_state *st)
159{
160 switch (st->id) {
161 case ad7997:
162 case ad7998:
163 return i2c_smbus_read_word_swapped(st->client, AD7998_CONF_REG);
164 case ad7992:
165 case ad7993:
166 case ad7994:
167 return i2c_smbus_read_byte_data(st->client, AD7998_CONF_REG);
168 default:
169
170 return st->config;
171 }
172}
173
174
175
176
177
178
179
180static irqreturn_t ad799x_trigger_handler(int irq, void *p)
181{
182 struct iio_poll_func *pf = p;
183 struct iio_dev *indio_dev = pf->indio_dev;
184 struct ad799x_state *st = iio_priv(indio_dev);
185 int b_sent;
186 u8 cmd;
187
188 switch (st->id) {
189 case ad7991:
190 case ad7995:
191 case ad7999:
192 cmd = st->config |
193 (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT);
194 break;
195 case ad7992:
196 case ad7993:
197 case ad7994:
198 cmd = (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT) |
199 AD7998_CONV_RES_REG;
200 break;
201 case ad7997:
202 case ad7998:
203 cmd = AD7997_8_READ_SEQUENCE | AD7998_CONV_RES_REG;
204 break;
205 default:
206 cmd = 0;
207 }
208
209 b_sent = i2c_smbus_read_i2c_block_data(st->client,
210 cmd, st->transfer_size, st->rx_buf);
211 if (b_sent < 0)
212 goto out;
213
214 iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
215 iio_get_time_ns(indio_dev));
216out:
217 iio_trigger_notify_done(indio_dev->trig);
218
219 return IRQ_HANDLED;
220}
221
222static int ad799x_update_scan_mode(struct iio_dev *indio_dev,
223 const unsigned long *scan_mask)
224{
225 struct ad799x_state *st = iio_priv(indio_dev);
226
227 kfree(st->rx_buf);
228 st->rx_buf = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
229 if (!st->rx_buf)
230 return -ENOMEM;
231
232 st->transfer_size = bitmap_weight(scan_mask, indio_dev->masklength) * 2;
233
234 switch (st->id) {
235 case ad7992:
236 case ad7993:
237 case ad7994:
238 case ad7997:
239 case ad7998:
240 st->config &= ~(GENMASK(7, 0) << AD799X_CHANNEL_SHIFT);
241 st->config |= (*scan_mask << AD799X_CHANNEL_SHIFT);
242 return ad799x_write_config(st, st->config);
243 default:
244 return 0;
245 }
246}
247
248static int ad799x_scan_direct(struct ad799x_state *st, unsigned ch)
249{
250 u8 cmd;
251
252 switch (st->id) {
253 case ad7991:
254 case ad7995:
255 case ad7999:
256 cmd = st->config | (BIT(ch) << AD799X_CHANNEL_SHIFT);
257 break;
258 case ad7992:
259 case ad7993:
260 case ad7994:
261 cmd = BIT(ch) << AD799X_CHANNEL_SHIFT;
262 break;
263 case ad7997:
264 case ad7998:
265 cmd = (ch << AD799X_CHANNEL_SHIFT) | AD7997_8_READ_SINGLE;
266 break;
267 default:
268 return -EINVAL;
269 }
270
271 return i2c_smbus_read_word_swapped(st->client, cmd);
272}
273
274static int ad799x_read_raw(struct iio_dev *indio_dev,
275 struct iio_chan_spec const *chan,
276 int *val,
277 int *val2,
278 long m)
279{
280 int ret;
281 struct ad799x_state *st = iio_priv(indio_dev);
282
283 switch (m) {
284 case IIO_CHAN_INFO_RAW:
285 ret = iio_device_claim_direct_mode(indio_dev);
286 if (ret)
287 return ret;
288 ret = ad799x_scan_direct(st, chan->scan_index);
289 iio_device_release_direct_mode(indio_dev);
290
291 if (ret < 0)
292 return ret;
293 *val = (ret >> chan->scan_type.shift) &
294 GENMASK(chan->scan_type.realbits - 1, 0);
295 return IIO_VAL_INT;
296 case IIO_CHAN_INFO_SCALE:
297 ret = regulator_get_voltage(st->vref);
298 if (ret < 0)
299 return ret;
300 *val = ret / 1000;
301 *val2 = chan->scan_type.realbits;
302 return IIO_VAL_FRACTIONAL_LOG2;
303 }
304 return -EINVAL;
305}
306static const unsigned int ad7998_frequencies[] = {
307 [AD7998_CYC_DIS] = 0,
308 [AD7998_CYC_TCONF_32] = 15625,
309 [AD7998_CYC_TCONF_64] = 7812,
310 [AD7998_CYC_TCONF_128] = 3906,
311 [AD7998_CYC_TCONF_512] = 976,
312 [AD7998_CYC_TCONF_1024] = 488,
313 [AD7998_CYC_TCONF_2048] = 244,
314};
315
316static ssize_t ad799x_read_frequency(struct device *dev,
317 struct device_attribute *attr,
318 char *buf)
319{
320 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
321 struct ad799x_state *st = iio_priv(indio_dev);
322
323 int ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG);
324 if (ret < 0)
325 return ret;
326
327 return sprintf(buf, "%u\n", ad7998_frequencies[ret & AD7998_CYC_MASK]);
328}
329
330static ssize_t ad799x_write_frequency(struct device *dev,
331 struct device_attribute *attr,
332 const char *buf,
333 size_t len)
334{
335 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
336 struct ad799x_state *st = iio_priv(indio_dev);
337
338 long val;
339 int ret, i;
340
341 ret = kstrtol(buf, 10, &val);
342 if (ret)
343 return ret;
344
345 mutex_lock(&indio_dev->mlock);
346 ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG);
347 if (ret < 0)
348 goto error_ret_mutex;
349
350 ret &= ~AD7998_CYC_MASK;
351
352 for (i = 0; i < ARRAY_SIZE(ad7998_frequencies); i++)
353 if (val == ad7998_frequencies[i])
354 break;
355 if (i == ARRAY_SIZE(ad7998_frequencies)) {
356 ret = -EINVAL;
357 goto error_ret_mutex;
358 }
359
360 ret = i2c_smbus_write_byte_data(st->client, AD7998_CYCLE_TMR_REG,
361 ret | i);
362 if (ret < 0)
363 goto error_ret_mutex;
364 ret = len;
365
366error_ret_mutex:
367 mutex_unlock(&indio_dev->mlock);
368
369 return ret;
370}
371
372static int ad799x_read_event_config(struct iio_dev *indio_dev,
373 const struct iio_chan_spec *chan,
374 enum iio_event_type type,
375 enum iio_event_direction dir)
376{
377 struct ad799x_state *st = iio_priv(indio_dev);
378
379 if (!(st->config & AD7998_ALERT_EN))
380 return 0;
381
382 if ((st->config >> AD799X_CHANNEL_SHIFT) & BIT(chan->scan_index))
383 return 1;
384
385 return 0;
386}
387
388static int ad799x_write_event_config(struct iio_dev *indio_dev,
389 const struct iio_chan_spec *chan,
390 enum iio_event_type type,
391 enum iio_event_direction dir,
392 int state)
393{
394 struct ad799x_state *st = iio_priv(indio_dev);
395 int ret;
396
397 ret = iio_device_claim_direct_mode(indio_dev);
398 if (ret)
399 return ret;
400
401 if (state)
402 st->config |= BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT;
403 else
404 st->config &= ~(BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT);
405
406 if (st->config >> AD799X_CHANNEL_SHIFT)
407 st->config |= AD7998_ALERT_EN;
408 else
409 st->config &= ~AD7998_ALERT_EN;
410
411 ret = ad799x_write_config(st, st->config);
412 iio_device_release_direct_mode(indio_dev);
413 return ret;
414}
415
416static unsigned int ad799x_threshold_reg(const struct iio_chan_spec *chan,
417 enum iio_event_direction dir,
418 enum iio_event_info info)
419{
420 switch (info) {
421 case IIO_EV_INFO_VALUE:
422 if (dir == IIO_EV_DIR_FALLING)
423 return AD7998_DATALOW_REG(chan->channel);
424 else
425 return AD7998_DATAHIGH_REG(chan->channel);
426 case IIO_EV_INFO_HYSTERESIS:
427 return AD7998_HYST_REG(chan->channel);
428 default:
429 return -EINVAL;
430 }
431
432 return 0;
433}
434
435static int ad799x_write_event_value(struct iio_dev *indio_dev,
436 const struct iio_chan_spec *chan,
437 enum iio_event_type type,
438 enum iio_event_direction dir,
439 enum iio_event_info info,
440 int val, int val2)
441{
442 int ret;
443 struct ad799x_state *st = iio_priv(indio_dev);
444
445 if (val < 0 || val > GENMASK(chan->scan_type.realbits - 1, 0))
446 return -EINVAL;
447
448 mutex_lock(&indio_dev->mlock);
449 ret = i2c_smbus_write_word_swapped(st->client,
450 ad799x_threshold_reg(chan, dir, info),
451 val << chan->scan_type.shift);
452 mutex_unlock(&indio_dev->mlock);
453
454 return ret;
455}
456
457static int ad799x_read_event_value(struct iio_dev *indio_dev,
458 const struct iio_chan_spec *chan,
459 enum iio_event_type type,
460 enum iio_event_direction dir,
461 enum iio_event_info info,
462 int *val, int *val2)
463{
464 int ret;
465 struct ad799x_state *st = iio_priv(indio_dev);
466
467 mutex_lock(&indio_dev->mlock);
468 ret = i2c_smbus_read_word_swapped(st->client,
469 ad799x_threshold_reg(chan, dir, info));
470 mutex_unlock(&indio_dev->mlock);
471 if (ret < 0)
472 return ret;
473 *val = (ret >> chan->scan_type.shift) &
474 GENMASK(chan->scan_type.realbits - 1, 0);
475
476 return IIO_VAL_INT;
477}
478
479static irqreturn_t ad799x_event_handler(int irq, void *private)
480{
481 struct iio_dev *indio_dev = private;
482 struct ad799x_state *st = iio_priv(private);
483 int i, ret;
484
485 ret = i2c_smbus_read_byte_data(st->client, AD7998_ALERT_STAT_REG);
486 if (ret <= 0)
487 goto done;
488
489 if (i2c_smbus_write_byte_data(st->client, AD7998_ALERT_STAT_REG,
490 AD7998_ALERT_STAT_CLEAR) < 0)
491 goto done;
492
493 for (i = 0; i < 8; i++) {
494 if (ret & BIT(i))
495 iio_push_event(indio_dev,
496 i & 0x1 ?
497 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
498 (i >> 1),
499 IIO_EV_TYPE_THRESH,
500 IIO_EV_DIR_RISING) :
501 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
502 (i >> 1),
503 IIO_EV_TYPE_THRESH,
504 IIO_EV_DIR_FALLING),
505 iio_get_time_ns(indio_dev));
506 }
507
508done:
509 return IRQ_HANDLED;
510}
511
512static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
513 ad799x_read_frequency,
514 ad799x_write_frequency);
515static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("15625 7812 3906 1953 976 488 244 0");
516
517static struct attribute *ad799x_event_attributes[] = {
518 &iio_dev_attr_sampling_frequency.dev_attr.attr,
519 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
520 NULL,
521};
522
523static const struct attribute_group ad799x_event_attrs_group = {
524 .attrs = ad799x_event_attributes,
525};
526
527static const struct iio_info ad7991_info = {
528 .read_raw = &ad799x_read_raw,
529 .update_scan_mode = ad799x_update_scan_mode,
530};
531
532static const struct iio_info ad7993_4_7_8_noirq_info = {
533 .read_raw = &ad799x_read_raw,
534 .update_scan_mode = ad799x_update_scan_mode,
535};
536
537static const struct iio_info ad7993_4_7_8_irq_info = {
538 .read_raw = &ad799x_read_raw,
539 .event_attrs = &ad799x_event_attrs_group,
540 .read_event_config = &ad799x_read_event_config,
541 .write_event_config = &ad799x_write_event_config,
542 .read_event_value = &ad799x_read_event_value,
543 .write_event_value = &ad799x_write_event_value,
544 .update_scan_mode = ad799x_update_scan_mode,
545};
546
547static const struct iio_event_spec ad799x_events[] = {
548 {
549 .type = IIO_EV_TYPE_THRESH,
550 .dir = IIO_EV_DIR_RISING,
551 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
552 BIT(IIO_EV_INFO_ENABLE),
553 }, {
554 .type = IIO_EV_TYPE_THRESH,
555 .dir = IIO_EV_DIR_FALLING,
556 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
557 BIT(IIO_EV_INFO_ENABLE),
558 }, {
559 .type = IIO_EV_TYPE_THRESH,
560 .dir = IIO_EV_DIR_EITHER,
561 .mask_separate = BIT(IIO_EV_INFO_HYSTERESIS),
562 },
563};
564
565#define _AD799X_CHANNEL(_index, _realbits, _ev_spec, _num_ev_spec) { \
566 .type = IIO_VOLTAGE, \
567 .indexed = 1, \
568 .channel = (_index), \
569 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
570 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
571 .scan_index = (_index), \
572 .scan_type = { \
573 .sign = 'u', \
574 .realbits = (_realbits), \
575 .storagebits = 16, \
576 .shift = 12 - (_realbits), \
577 .endianness = IIO_BE, \
578 }, \
579 .event_spec = _ev_spec, \
580 .num_event_specs = _num_ev_spec, \
581}
582
583#define AD799X_CHANNEL(_index, _realbits) \
584 _AD799X_CHANNEL(_index, _realbits, NULL, 0)
585
586#define AD799X_CHANNEL_WITH_EVENTS(_index, _realbits) \
587 _AD799X_CHANNEL(_index, _realbits, ad799x_events, \
588 ARRAY_SIZE(ad799x_events))
589
590static const struct ad799x_chip_info ad799x_chip_info_tbl[] = {
591 [ad7991] = {
592 .num_channels = 5,
593 .noirq_config = {
594 .channel = {
595 AD799X_CHANNEL(0, 12),
596 AD799X_CHANNEL(1, 12),
597 AD799X_CHANNEL(2, 12),
598 AD799X_CHANNEL(3, 12),
599 IIO_CHAN_SOFT_TIMESTAMP(4),
600 },
601 .info = &ad7991_info,
602 },
603 },
604 [ad7995] = {
605 .num_channels = 5,
606 .noirq_config = {
607 .channel = {
608 AD799X_CHANNEL(0, 10),
609 AD799X_CHANNEL(1, 10),
610 AD799X_CHANNEL(2, 10),
611 AD799X_CHANNEL(3, 10),
612 IIO_CHAN_SOFT_TIMESTAMP(4),
613 },
614 .info = &ad7991_info,
615 },
616 },
617 [ad7999] = {
618 .num_channels = 5,
619 .noirq_config = {
620 .channel = {
621 AD799X_CHANNEL(0, 8),
622 AD799X_CHANNEL(1, 8),
623 AD799X_CHANNEL(2, 8),
624 AD799X_CHANNEL(3, 8),
625 IIO_CHAN_SOFT_TIMESTAMP(4),
626 },
627 .info = &ad7991_info,
628 },
629 },
630 [ad7992] = {
631 .num_channels = 3,
632 .noirq_config = {
633 .channel = {
634 AD799X_CHANNEL(0, 12),
635 AD799X_CHANNEL(1, 12),
636 IIO_CHAN_SOFT_TIMESTAMP(3),
637 },
638 .info = &ad7993_4_7_8_noirq_info,
639 },
640 .irq_config = {
641 .channel = {
642 AD799X_CHANNEL_WITH_EVENTS(0, 12),
643 AD799X_CHANNEL_WITH_EVENTS(1, 12),
644 IIO_CHAN_SOFT_TIMESTAMP(3),
645 },
646 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
647 .info = &ad7993_4_7_8_irq_info,
648 },
649 },
650 [ad7993] = {
651 .num_channels = 5,
652 .noirq_config = {
653 .channel = {
654 AD799X_CHANNEL(0, 10),
655 AD799X_CHANNEL(1, 10),
656 AD799X_CHANNEL(2, 10),
657 AD799X_CHANNEL(3, 10),
658 IIO_CHAN_SOFT_TIMESTAMP(4),
659 },
660 .info = &ad7993_4_7_8_noirq_info,
661 },
662 .irq_config = {
663 .channel = {
664 AD799X_CHANNEL_WITH_EVENTS(0, 10),
665 AD799X_CHANNEL_WITH_EVENTS(1, 10),
666 AD799X_CHANNEL_WITH_EVENTS(2, 10),
667 AD799X_CHANNEL_WITH_EVENTS(3, 10),
668 IIO_CHAN_SOFT_TIMESTAMP(4),
669 },
670 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
671 .info = &ad7993_4_7_8_irq_info,
672 },
673 },
674 [ad7994] = {
675 .num_channels = 5,
676 .noirq_config = {
677 .channel = {
678 AD799X_CHANNEL(0, 12),
679 AD799X_CHANNEL(1, 12),
680 AD799X_CHANNEL(2, 12),
681 AD799X_CHANNEL(3, 12),
682 IIO_CHAN_SOFT_TIMESTAMP(4),
683 },
684 .info = &ad7993_4_7_8_noirq_info,
685 },
686 .irq_config = {
687 .channel = {
688 AD799X_CHANNEL_WITH_EVENTS(0, 12),
689 AD799X_CHANNEL_WITH_EVENTS(1, 12),
690 AD799X_CHANNEL_WITH_EVENTS(2, 12),
691 AD799X_CHANNEL_WITH_EVENTS(3, 12),
692 IIO_CHAN_SOFT_TIMESTAMP(4),
693 },
694 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
695 .info = &ad7993_4_7_8_irq_info,
696 },
697 },
698 [ad7997] = {
699 .num_channels = 9,
700 .noirq_config = {
701 .channel = {
702 AD799X_CHANNEL(0, 10),
703 AD799X_CHANNEL(1, 10),
704 AD799X_CHANNEL(2, 10),
705 AD799X_CHANNEL(3, 10),
706 AD799X_CHANNEL(4, 10),
707 AD799X_CHANNEL(5, 10),
708 AD799X_CHANNEL(6, 10),
709 AD799X_CHANNEL(7, 10),
710 IIO_CHAN_SOFT_TIMESTAMP(8),
711 },
712 .info = &ad7993_4_7_8_noirq_info,
713 },
714 .irq_config = {
715 .channel = {
716 AD799X_CHANNEL_WITH_EVENTS(0, 10),
717 AD799X_CHANNEL_WITH_EVENTS(1, 10),
718 AD799X_CHANNEL_WITH_EVENTS(2, 10),
719 AD799X_CHANNEL_WITH_EVENTS(3, 10),
720 AD799X_CHANNEL(4, 10),
721 AD799X_CHANNEL(5, 10),
722 AD799X_CHANNEL(6, 10),
723 AD799X_CHANNEL(7, 10),
724 IIO_CHAN_SOFT_TIMESTAMP(8),
725 },
726 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
727 .info = &ad7993_4_7_8_irq_info,
728 },
729 },
730 [ad7998] = {
731 .num_channels = 9,
732 .noirq_config = {
733 .channel = {
734 AD799X_CHANNEL(0, 12),
735 AD799X_CHANNEL(1, 12),
736 AD799X_CHANNEL(2, 12),
737 AD799X_CHANNEL(3, 12),
738 AD799X_CHANNEL(4, 12),
739 AD799X_CHANNEL(5, 12),
740 AD799X_CHANNEL(6, 12),
741 AD799X_CHANNEL(7, 12),
742 IIO_CHAN_SOFT_TIMESTAMP(8),
743 },
744 .info = &ad7993_4_7_8_noirq_info,
745 },
746 .irq_config = {
747 .channel = {
748 AD799X_CHANNEL_WITH_EVENTS(0, 12),
749 AD799X_CHANNEL_WITH_EVENTS(1, 12),
750 AD799X_CHANNEL_WITH_EVENTS(2, 12),
751 AD799X_CHANNEL_WITH_EVENTS(3, 12),
752 AD799X_CHANNEL(4, 12),
753 AD799X_CHANNEL(5, 12),
754 AD799X_CHANNEL(6, 12),
755 AD799X_CHANNEL(7, 12),
756 IIO_CHAN_SOFT_TIMESTAMP(8),
757 },
758 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
759 .info = &ad7993_4_7_8_irq_info,
760 },
761 },
762};
763
764static int ad799x_probe(struct i2c_client *client,
765 const struct i2c_device_id *id)
766{
767 int ret;
768 struct ad799x_state *st;
769 struct iio_dev *indio_dev;
770 const struct ad799x_chip_info *chip_info =
771 &ad799x_chip_info_tbl[id->driver_data];
772
773 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
774 if (indio_dev == NULL)
775 return -ENOMEM;
776
777 st = iio_priv(indio_dev);
778
779 i2c_set_clientdata(client, indio_dev);
780
781 st->id = id->driver_data;
782 if (client->irq > 0 && chip_info->irq_config.info)
783 st->chip_config = &chip_info->irq_config;
784 else
785 st->chip_config = &chip_info->noirq_config;
786
787
788
789 st->reg = devm_regulator_get(&client->dev, "vcc");
790 if (IS_ERR(st->reg))
791 return PTR_ERR(st->reg);
792 ret = regulator_enable(st->reg);
793 if (ret)
794 return ret;
795 st->vref = devm_regulator_get(&client->dev, "vref");
796 if (IS_ERR(st->vref)) {
797 ret = PTR_ERR(st->vref);
798 goto error_disable_reg;
799 }
800 ret = regulator_enable(st->vref);
801 if (ret)
802 goto error_disable_reg;
803
804 st->client = client;
805
806 indio_dev->dev.parent = &client->dev;
807 indio_dev->dev.of_node = client->dev.of_node;
808 indio_dev->name = id->name;
809 indio_dev->info = st->chip_config->info;
810
811 indio_dev->modes = INDIO_DIRECT_MODE;
812 indio_dev->channels = st->chip_config->channel;
813 indio_dev->num_channels = chip_info->num_channels;
814
815 ret = ad799x_write_config(st, st->chip_config->default_config);
816 if (ret < 0)
817 goto error_disable_reg;
818 ret = ad799x_read_config(st);
819 if (ret < 0)
820 goto error_disable_reg;
821 st->config = ret;
822
823 ret = iio_triggered_buffer_setup(indio_dev, NULL,
824 &ad799x_trigger_handler, NULL);
825 if (ret)
826 goto error_disable_vref;
827
828 if (client->irq > 0) {
829 ret = devm_request_threaded_irq(&client->dev,
830 client->irq,
831 NULL,
832 ad799x_event_handler,
833 IRQF_TRIGGER_FALLING |
834 IRQF_ONESHOT,
835 client->name,
836 indio_dev);
837 if (ret)
838 goto error_cleanup_ring;
839 }
840 ret = iio_device_register(indio_dev);
841 if (ret)
842 goto error_cleanup_ring;
843
844 return 0;
845
846error_cleanup_ring:
847 iio_triggered_buffer_cleanup(indio_dev);
848error_disable_vref:
849 regulator_disable(st->vref);
850error_disable_reg:
851 regulator_disable(st->reg);
852
853 return ret;
854}
855
856static int ad799x_remove(struct i2c_client *client)
857{
858 struct iio_dev *indio_dev = i2c_get_clientdata(client);
859 struct ad799x_state *st = iio_priv(indio_dev);
860
861 iio_device_unregister(indio_dev);
862
863 iio_triggered_buffer_cleanup(indio_dev);
864 regulator_disable(st->vref);
865 regulator_disable(st->reg);
866 kfree(st->rx_buf);
867
868 return 0;
869}
870
871static const struct i2c_device_id ad799x_id[] = {
872 { "ad7991", ad7991 },
873 { "ad7995", ad7995 },
874 { "ad7999", ad7999 },
875 { "ad7992", ad7992 },
876 { "ad7993", ad7993 },
877 { "ad7994", ad7994 },
878 { "ad7997", ad7997 },
879 { "ad7998", ad7998 },
880 {}
881};
882
883MODULE_DEVICE_TABLE(i2c, ad799x_id);
884
885static struct i2c_driver ad799x_driver = {
886 .driver = {
887 .name = "ad799x",
888 },
889 .probe = ad799x_probe,
890 .remove = ad799x_remove,
891 .id_table = ad799x_id,
892};
893module_i2c_driver(ad799x_driver);
894
895MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
896MODULE_DESCRIPTION("Analog Devices AD799x ADC");
897MODULE_LICENSE("GPL v2");
898
