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10#ifndef __DRIVERS_IIO_DAC_AD5592R_BASE_H__
11#define __DRIVERS_IIO_DAC_AD5592R_BASE_H__
12
13#include <linux/types.h>
14#include <linux/cache.h>
15#include <linux/mutex.h>
16#include <linux/gpio/driver.h>
17
18struct device;
19struct ad5592r_state;
20
21enum ad5592r_registers {
22 AD5592R_REG_NOOP = 0x0,
23 AD5592R_REG_DAC_READBACK = 0x1,
24 AD5592R_REG_ADC_SEQ = 0x2,
25 AD5592R_REG_CTRL = 0x3,
26 AD5592R_REG_ADC_EN = 0x4,
27 AD5592R_REG_DAC_EN = 0x5,
28 AD5592R_REG_PULLDOWN = 0x6,
29 AD5592R_REG_LDAC = 0x7,
30 AD5592R_REG_GPIO_OUT_EN = 0x8,
31 AD5592R_REG_GPIO_SET = 0x9,
32 AD5592R_REG_GPIO_IN_EN = 0xA,
33 AD5592R_REG_PD = 0xB,
34 AD5592R_REG_OPEN_DRAIN = 0xC,
35 AD5592R_REG_TRISTATE = 0xD,
36 AD5592R_REG_RESET = 0xF,
37};
38
39#define AD5592R_REG_PD_EN_REF BIT(9)
40#define AD5592R_REG_CTRL_ADC_RANGE BIT(5)
41#define AD5592R_REG_CTRL_DAC_RANGE BIT(4)
42
43struct ad5592r_rw_ops {
44 int (*write_dac)(struct ad5592r_state *st, unsigned chan, u16 value);
45 int (*read_adc)(struct ad5592r_state *st, unsigned chan, u16 *value);
46 int (*reg_write)(struct ad5592r_state *st, u8 reg, u16 value);
47 int (*reg_read)(struct ad5592r_state *st, u8 reg, u16 *value);
48 int (*gpio_read)(struct ad5592r_state *st, u8 *value);
49};
50
51struct ad5592r_state {
52 struct device *dev;
53 struct regulator *reg;
54 struct gpio_chip gpiochip;
55 struct mutex gpio_lock;
56 unsigned int num_channels;
57 const struct ad5592r_rw_ops *ops;
58 int scale_avail[2][2];
59 u16 cached_dac[8];
60 u16 cached_gp_ctrl;
61 u8 channel_modes[8];
62 u8 channel_offstate[8];
63 u8 gpio_map;
64 u8 gpio_out;
65 u8 gpio_in;
66 u8 gpio_val;
67
68 __be16 spi_msg ____cacheline_aligned;
69 __be16 spi_msg_nop;
70};
71
72int ad5592r_probe(struct device *dev, const char *name,
73 const struct ad5592r_rw_ops *ops);
74int ad5592r_remove(struct device *dev);
75
76#endif
77