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20#include <linux/module.h>
21#include <linux/i2c.h>
22#include <linux/interrupt.h>
23#include <linux/delay.h>
24#include <linux/slab.h>
25#include <linux/acpi.h>
26#include <linux/pm.h>
27#include <linux/pm_runtime.h>
28#include <linux/iio/iio.h>
29#include <linux/iio/sysfs.h>
30#include <linux/iio/buffer.h>
31#include <linux/iio/events.h>
32#include <linux/iio/trigger.h>
33#include <linux/iio/trigger_consumer.h>
34#include <linux/iio/triggered_buffer.h>
35#include <linux/regmap.h>
36
37#include "bmc150_magn.h"
38
39#define BMC150_MAGN_DRV_NAME "bmc150_magn"
40#define BMC150_MAGN_IRQ_NAME "bmc150_magn_event"
41
42#define BMC150_MAGN_REG_CHIP_ID 0x40
43#define BMC150_MAGN_CHIP_ID_VAL 0x32
44
45#define BMC150_MAGN_REG_X_L 0x42
46#define BMC150_MAGN_REG_X_M 0x43
47#define BMC150_MAGN_REG_Y_L 0x44
48#define BMC150_MAGN_REG_Y_M 0x45
49#define BMC150_MAGN_SHIFT_XY_L 3
50#define BMC150_MAGN_REG_Z_L 0x46
51#define BMC150_MAGN_REG_Z_M 0x47
52#define BMC150_MAGN_SHIFT_Z_L 1
53#define BMC150_MAGN_REG_RHALL_L 0x48
54#define BMC150_MAGN_REG_RHALL_M 0x49
55#define BMC150_MAGN_SHIFT_RHALL_L 2
56
57#define BMC150_MAGN_REG_INT_STATUS 0x4A
58
59#define BMC150_MAGN_REG_POWER 0x4B
60#define BMC150_MAGN_MASK_POWER_CTL BIT(0)
61
62#define BMC150_MAGN_REG_OPMODE_ODR 0x4C
63#define BMC150_MAGN_MASK_OPMODE GENMASK(2, 1)
64#define BMC150_MAGN_SHIFT_OPMODE 1
65#define BMC150_MAGN_MODE_NORMAL 0x00
66#define BMC150_MAGN_MODE_FORCED 0x01
67#define BMC150_MAGN_MODE_SLEEP 0x03
68#define BMC150_MAGN_MASK_ODR GENMASK(5, 3)
69#define BMC150_MAGN_SHIFT_ODR 3
70
71#define BMC150_MAGN_REG_INT 0x4D
72
73#define BMC150_MAGN_REG_INT_DRDY 0x4E
74#define BMC150_MAGN_MASK_DRDY_EN BIT(7)
75#define BMC150_MAGN_SHIFT_DRDY_EN 7
76#define BMC150_MAGN_MASK_DRDY_INT3 BIT(6)
77#define BMC150_MAGN_MASK_DRDY_Z_EN BIT(5)
78#define BMC150_MAGN_MASK_DRDY_Y_EN BIT(4)
79#define BMC150_MAGN_MASK_DRDY_X_EN BIT(3)
80#define BMC150_MAGN_MASK_DRDY_DR_POLARITY BIT(2)
81#define BMC150_MAGN_MASK_DRDY_LATCHING BIT(1)
82#define BMC150_MAGN_MASK_DRDY_INT3_POLARITY BIT(0)
83
84#define BMC150_MAGN_REG_LOW_THRESH 0x4F
85#define BMC150_MAGN_REG_HIGH_THRESH 0x50
86#define BMC150_MAGN_REG_REP_XY 0x51
87#define BMC150_MAGN_REG_REP_Z 0x52
88#define BMC150_MAGN_REG_REP_DATAMASK GENMASK(7, 0)
89
90#define BMC150_MAGN_REG_TRIM_START 0x5D
91#define BMC150_MAGN_REG_TRIM_END 0x71
92
93#define BMC150_MAGN_XY_OVERFLOW_VAL -4096
94#define BMC150_MAGN_Z_OVERFLOW_VAL -16384
95
96
97#define BMC150_MAGN_START_UP_TIME_MS 3
98
99#define BMC150_MAGN_AUTO_SUSPEND_DELAY_MS 2000
100
101#define BMC150_MAGN_REGVAL_TO_REPXY(regval) (((regval) * 2) + 1)
102#define BMC150_MAGN_REGVAL_TO_REPZ(regval) ((regval) + 1)
103#define BMC150_MAGN_REPXY_TO_REGVAL(rep) (((rep) - 1) / 2)
104#define BMC150_MAGN_REPZ_TO_REGVAL(rep) ((rep) - 1)
105
106enum bmc150_magn_axis {
107 AXIS_X,
108 AXIS_Y,
109 AXIS_Z,
110 RHALL,
111 AXIS_XYZ_MAX = RHALL,
112 AXIS_XYZR_MAX,
113};
114
115enum bmc150_magn_power_modes {
116 BMC150_MAGN_POWER_MODE_SUSPEND,
117 BMC150_MAGN_POWER_MODE_SLEEP,
118 BMC150_MAGN_POWER_MODE_NORMAL,
119};
120
121struct bmc150_magn_trim_regs {
122 s8 x1;
123 s8 y1;
124 __le16 reserved1;
125 u8 reserved2;
126 __le16 z4;
127 s8 x2;
128 s8 y2;
129 __le16 reserved3;
130 __le16 z2;
131 __le16 z1;
132 __le16 xyz1;
133 __le16 z3;
134 s8 xy2;
135 u8 xy1;
136} __packed;
137
138struct bmc150_magn_data {
139 struct device *dev;
140
141
142
143
144 struct mutex mutex;
145 struct regmap *regmap;
146
147 s32 buffer[6];
148 struct iio_trigger *dready_trig;
149 bool dready_trigger_on;
150 int max_odr;
151 int irq;
152};
153
154static const struct {
155 int freq;
156 u8 reg_val;
157} bmc150_magn_samp_freq_table[] = { {2, 0x01},
158 {6, 0x02},
159 {8, 0x03},
160 {10, 0x00},
161 {15, 0x04},
162 {20, 0x05},
163 {25, 0x06},
164 {30, 0x07} };
165
166enum bmc150_magn_presets {
167 LOW_POWER_PRESET,
168 REGULAR_PRESET,
169 ENHANCED_REGULAR_PRESET,
170 HIGH_ACCURACY_PRESET
171};
172
173static const struct bmc150_magn_preset {
174 u8 rep_xy;
175 u8 rep_z;
176 u8 odr;
177} bmc150_magn_presets_table[] = {
178 [LOW_POWER_PRESET] = {3, 3, 10},
179 [REGULAR_PRESET] = {9, 15, 10},
180 [ENHANCED_REGULAR_PRESET] = {15, 27, 10},
181 [HIGH_ACCURACY_PRESET] = {47, 83, 20},
182};
183
184#define BMC150_MAGN_DEFAULT_PRESET REGULAR_PRESET
185
186static bool bmc150_magn_is_writeable_reg(struct device *dev, unsigned int reg)
187{
188 switch (reg) {
189 case BMC150_MAGN_REG_POWER:
190 case BMC150_MAGN_REG_OPMODE_ODR:
191 case BMC150_MAGN_REG_INT:
192 case BMC150_MAGN_REG_INT_DRDY:
193 case BMC150_MAGN_REG_LOW_THRESH:
194 case BMC150_MAGN_REG_HIGH_THRESH:
195 case BMC150_MAGN_REG_REP_XY:
196 case BMC150_MAGN_REG_REP_Z:
197 return true;
198 default:
199 return false;
200 };
201}
202
203static bool bmc150_magn_is_volatile_reg(struct device *dev, unsigned int reg)
204{
205 switch (reg) {
206 case BMC150_MAGN_REG_X_L:
207 case BMC150_MAGN_REG_X_M:
208 case BMC150_MAGN_REG_Y_L:
209 case BMC150_MAGN_REG_Y_M:
210 case BMC150_MAGN_REG_Z_L:
211 case BMC150_MAGN_REG_Z_M:
212 case BMC150_MAGN_REG_RHALL_L:
213 case BMC150_MAGN_REG_RHALL_M:
214 case BMC150_MAGN_REG_INT_STATUS:
215 return true;
216 default:
217 return false;
218 }
219}
220
221const struct regmap_config bmc150_magn_regmap_config = {
222 .reg_bits = 8,
223 .val_bits = 8,
224
225 .max_register = BMC150_MAGN_REG_TRIM_END,
226 .cache_type = REGCACHE_RBTREE,
227
228 .writeable_reg = bmc150_magn_is_writeable_reg,
229 .volatile_reg = bmc150_magn_is_volatile_reg,
230};
231EXPORT_SYMBOL(bmc150_magn_regmap_config);
232
233static int bmc150_magn_set_power_mode(struct bmc150_magn_data *data,
234 enum bmc150_magn_power_modes mode,
235 bool state)
236{
237 int ret;
238
239 switch (mode) {
240 case BMC150_MAGN_POWER_MODE_SUSPEND:
241 ret = regmap_update_bits(data->regmap, BMC150_MAGN_REG_POWER,
242 BMC150_MAGN_MASK_POWER_CTL, !state);
243 if (ret < 0)
244 return ret;
245 usleep_range(BMC150_MAGN_START_UP_TIME_MS * 1000, 20000);
246 return 0;
247 case BMC150_MAGN_POWER_MODE_SLEEP:
248 return regmap_update_bits(data->regmap,
249 BMC150_MAGN_REG_OPMODE_ODR,
250 BMC150_MAGN_MASK_OPMODE,
251 BMC150_MAGN_MODE_SLEEP <<
252 BMC150_MAGN_SHIFT_OPMODE);
253 case BMC150_MAGN_POWER_MODE_NORMAL:
254 return regmap_update_bits(data->regmap,
255 BMC150_MAGN_REG_OPMODE_ODR,
256 BMC150_MAGN_MASK_OPMODE,
257 BMC150_MAGN_MODE_NORMAL <<
258 BMC150_MAGN_SHIFT_OPMODE);
259 }
260
261 return -EINVAL;
262}
263
264static int bmc150_magn_set_power_state(struct bmc150_magn_data *data, bool on)
265{
266#ifdef CONFIG_PM
267 int ret;
268
269 if (on) {
270 ret = pm_runtime_get_sync(data->dev);
271 } else {
272 pm_runtime_mark_last_busy(data->dev);
273 ret = pm_runtime_put_autosuspend(data->dev);
274 }
275
276 if (ret < 0) {
277 dev_err(data->dev,
278 "failed to change power state to %d\n", on);
279 if (on)
280 pm_runtime_put_noidle(data->dev);
281
282 return ret;
283 }
284#endif
285
286 return 0;
287}
288
289static int bmc150_magn_get_odr(struct bmc150_magn_data *data, int *val)
290{
291 int ret, reg_val;
292 u8 i, odr_val;
293
294 ret = regmap_read(data->regmap, BMC150_MAGN_REG_OPMODE_ODR, ®_val);
295 if (ret < 0)
296 return ret;
297 odr_val = (reg_val & BMC150_MAGN_MASK_ODR) >> BMC150_MAGN_SHIFT_ODR;
298
299 for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++)
300 if (bmc150_magn_samp_freq_table[i].reg_val == odr_val) {
301 *val = bmc150_magn_samp_freq_table[i].freq;
302 return 0;
303 }
304
305 return -EINVAL;
306}
307
308static int bmc150_magn_set_odr(struct bmc150_magn_data *data, int val)
309{
310 int ret;
311 u8 i;
312
313 for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++) {
314 if (bmc150_magn_samp_freq_table[i].freq == val) {
315 ret = regmap_update_bits(data->regmap,
316 BMC150_MAGN_REG_OPMODE_ODR,
317 BMC150_MAGN_MASK_ODR,
318 bmc150_magn_samp_freq_table[i].
319 reg_val <<
320 BMC150_MAGN_SHIFT_ODR);
321 if (ret < 0)
322 return ret;
323 return 0;
324 }
325 }
326
327 return -EINVAL;
328}
329
330static int bmc150_magn_set_max_odr(struct bmc150_magn_data *data, int rep_xy,
331 int rep_z, int odr)
332{
333 int ret, reg_val, max_odr;
334
335 if (rep_xy <= 0) {
336 ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_XY,
337 ®_val);
338 if (ret < 0)
339 return ret;
340 rep_xy = BMC150_MAGN_REGVAL_TO_REPXY(reg_val);
341 }
342 if (rep_z <= 0) {
343 ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_Z,
344 ®_val);
345 if (ret < 0)
346 return ret;
347 rep_z = BMC150_MAGN_REGVAL_TO_REPZ(reg_val);
348 }
349 if (odr <= 0) {
350 ret = bmc150_magn_get_odr(data, &odr);
351 if (ret < 0)
352 return ret;
353 }
354
355 max_odr = 1000000 / (145 * rep_xy + 500 * rep_z + 980);
356 if (odr > max_odr) {
357 dev_err(data->dev,
358 "Can't set oversampling with sampling freq %d\n",
359 odr);
360 return -EINVAL;
361 }
362 data->max_odr = max_odr;
363
364 return 0;
365}
366
367static s32 bmc150_magn_compensate_x(struct bmc150_magn_trim_regs *tregs, s16 x,
368 u16 rhall)
369{
370 s16 val;
371 u16 xyz1 = le16_to_cpu(tregs->xyz1);
372
373 if (x == BMC150_MAGN_XY_OVERFLOW_VAL)
374 return S32_MIN;
375
376 if (!rhall)
377 rhall = xyz1;
378
379 val = ((s16)(((u16)((((s32)xyz1) << 14) / rhall)) - ((u16)0x4000)));
380 val = ((s16)((((s32)x) * ((((((((s32)tregs->xy2) * ((((s32)val) *
381 ((s32)val)) >> 7)) + (((s32)val) *
382 ((s32)(((s16)tregs->xy1) << 7)))) >> 9) + ((s32)0x100000)) *
383 ((s32)(((s16)tregs->x2) + ((s16)0xA0)))) >> 12)) >> 13)) +
384 (((s16)tregs->x1) << 3);
385
386 return (s32)val;
387}
388
389static s32 bmc150_magn_compensate_y(struct bmc150_magn_trim_regs *tregs, s16 y,
390 u16 rhall)
391{
392 s16 val;
393 u16 xyz1 = le16_to_cpu(tregs->xyz1);
394
395 if (y == BMC150_MAGN_XY_OVERFLOW_VAL)
396 return S32_MIN;
397
398 if (!rhall)
399 rhall = xyz1;
400
401 val = ((s16)(((u16)((((s32)xyz1) << 14) / rhall)) - ((u16)0x4000)));
402 val = ((s16)((((s32)y) * ((((((((s32)tregs->xy2) * ((((s32)val) *
403 ((s32)val)) >> 7)) + (((s32)val) *
404 ((s32)(((s16)tregs->xy1) << 7)))) >> 9) + ((s32)0x100000)) *
405 ((s32)(((s16)tregs->y2) + ((s16)0xA0)))) >> 12)) >> 13)) +
406 (((s16)tregs->y1) << 3);
407
408 return (s32)val;
409}
410
411static s32 bmc150_magn_compensate_z(struct bmc150_magn_trim_regs *tregs, s16 z,
412 u16 rhall)
413{
414 s32 val;
415 u16 xyz1 = le16_to_cpu(tregs->xyz1);
416 u16 z1 = le16_to_cpu(tregs->z1);
417 s16 z2 = le16_to_cpu(tregs->z2);
418 s16 z3 = le16_to_cpu(tregs->z3);
419 s16 z4 = le16_to_cpu(tregs->z4);
420
421 if (z == BMC150_MAGN_Z_OVERFLOW_VAL)
422 return S32_MIN;
423
424 val = (((((s32)(z - z4)) << 15) - ((((s32)z3) * ((s32)(((s16)rhall) -
425 ((s16)xyz1)))) >> 2)) / (z2 + ((s16)(((((s32)z1) *
426 ((((s16)rhall) << 1))) + (1 << 15)) >> 16))));
427
428 return val;
429}
430
431static int bmc150_magn_read_xyz(struct bmc150_magn_data *data, s32 *buffer)
432{
433 int ret;
434 __le16 values[AXIS_XYZR_MAX];
435 s16 raw_x, raw_y, raw_z;
436 u16 rhall;
437 struct bmc150_magn_trim_regs tregs;
438
439 ret = regmap_bulk_read(data->regmap, BMC150_MAGN_REG_X_L,
440 values, sizeof(values));
441 if (ret < 0)
442 return ret;
443
444 raw_x = (s16)le16_to_cpu(values[AXIS_X]) >> BMC150_MAGN_SHIFT_XY_L;
445 raw_y = (s16)le16_to_cpu(values[AXIS_Y]) >> BMC150_MAGN_SHIFT_XY_L;
446 raw_z = (s16)le16_to_cpu(values[AXIS_Z]) >> BMC150_MAGN_SHIFT_Z_L;
447 rhall = le16_to_cpu(values[RHALL]) >> BMC150_MAGN_SHIFT_RHALL_L;
448
449 ret = regmap_bulk_read(data->regmap, BMC150_MAGN_REG_TRIM_START,
450 &tregs, sizeof(tregs));
451 if (ret < 0)
452 return ret;
453
454 buffer[AXIS_X] = bmc150_magn_compensate_x(&tregs, raw_x, rhall);
455 buffer[AXIS_Y] = bmc150_magn_compensate_y(&tregs, raw_y, rhall);
456 buffer[AXIS_Z] = bmc150_magn_compensate_z(&tregs, raw_z, rhall);
457
458 return 0;
459}
460
461static int bmc150_magn_read_raw(struct iio_dev *indio_dev,
462 struct iio_chan_spec const *chan,
463 int *val, int *val2, long mask)
464{
465 struct bmc150_magn_data *data = iio_priv(indio_dev);
466 int ret, tmp;
467 s32 values[AXIS_XYZ_MAX];
468
469 switch (mask) {
470 case IIO_CHAN_INFO_RAW:
471 if (iio_buffer_enabled(indio_dev))
472 return -EBUSY;
473 mutex_lock(&data->mutex);
474
475 ret = bmc150_magn_set_power_state(data, true);
476 if (ret < 0) {
477 mutex_unlock(&data->mutex);
478 return ret;
479 }
480
481 ret = bmc150_magn_read_xyz(data, values);
482 if (ret < 0) {
483 bmc150_magn_set_power_state(data, false);
484 mutex_unlock(&data->mutex);
485 return ret;
486 }
487 *val = values[chan->scan_index];
488
489 ret = bmc150_magn_set_power_state(data, false);
490 if (ret < 0) {
491 mutex_unlock(&data->mutex);
492 return ret;
493 }
494
495 mutex_unlock(&data->mutex);
496 return IIO_VAL_INT;
497 case IIO_CHAN_INFO_SCALE:
498
499
500
501
502
503 *val = 0;
504 *val2 = 625;
505 return IIO_VAL_INT_PLUS_MICRO;
506 case IIO_CHAN_INFO_SAMP_FREQ:
507 ret = bmc150_magn_get_odr(data, val);
508 if (ret < 0)
509 return ret;
510 return IIO_VAL_INT;
511 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
512 switch (chan->channel2) {
513 case IIO_MOD_X:
514 case IIO_MOD_Y:
515 ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_XY,
516 &tmp);
517 if (ret < 0)
518 return ret;
519 *val = BMC150_MAGN_REGVAL_TO_REPXY(tmp);
520 return IIO_VAL_INT;
521 case IIO_MOD_Z:
522 ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_Z,
523 &tmp);
524 if (ret < 0)
525 return ret;
526 *val = BMC150_MAGN_REGVAL_TO_REPZ(tmp);
527 return IIO_VAL_INT;
528 default:
529 return -EINVAL;
530 }
531 default:
532 return -EINVAL;
533 }
534}
535
536static int bmc150_magn_write_raw(struct iio_dev *indio_dev,
537 struct iio_chan_spec const *chan,
538 int val, int val2, long mask)
539{
540 struct bmc150_magn_data *data = iio_priv(indio_dev);
541 int ret;
542
543 switch (mask) {
544 case IIO_CHAN_INFO_SAMP_FREQ:
545 if (val > data->max_odr)
546 return -EINVAL;
547 mutex_lock(&data->mutex);
548 ret = bmc150_magn_set_odr(data, val);
549 mutex_unlock(&data->mutex);
550 return ret;
551 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
552 switch (chan->channel2) {
553 case IIO_MOD_X:
554 case IIO_MOD_Y:
555 if (val < 1 || val > 511)
556 return -EINVAL;
557 mutex_lock(&data->mutex);
558 ret = bmc150_magn_set_max_odr(data, val, 0, 0);
559 if (ret < 0) {
560 mutex_unlock(&data->mutex);
561 return ret;
562 }
563 ret = regmap_update_bits(data->regmap,
564 BMC150_MAGN_REG_REP_XY,
565 BMC150_MAGN_REG_REP_DATAMASK,
566 BMC150_MAGN_REPXY_TO_REGVAL
567 (val));
568 mutex_unlock(&data->mutex);
569 return ret;
570 case IIO_MOD_Z:
571 if (val < 1 || val > 256)
572 return -EINVAL;
573 mutex_lock(&data->mutex);
574 ret = bmc150_magn_set_max_odr(data, 0, val, 0);
575 if (ret < 0) {
576 mutex_unlock(&data->mutex);
577 return ret;
578 }
579 ret = regmap_update_bits(data->regmap,
580 BMC150_MAGN_REG_REP_Z,
581 BMC150_MAGN_REG_REP_DATAMASK,
582 BMC150_MAGN_REPZ_TO_REGVAL
583 (val));
584 mutex_unlock(&data->mutex);
585 return ret;
586 default:
587 return -EINVAL;
588 }
589 default:
590 return -EINVAL;
591 }
592}
593
594static ssize_t bmc150_magn_show_samp_freq_avail(struct device *dev,
595 struct device_attribute *attr,
596 char *buf)
597{
598 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
599 struct bmc150_magn_data *data = iio_priv(indio_dev);
600 size_t len = 0;
601 u8 i;
602
603 for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++) {
604 if (bmc150_magn_samp_freq_table[i].freq > data->max_odr)
605 break;
606 len += scnprintf(buf + len, PAGE_SIZE - len, "%d ",
607 bmc150_magn_samp_freq_table[i].freq);
608 }
609
610 buf[len - 1] = '\n';
611
612 return len;
613}
614
615static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(bmc150_magn_show_samp_freq_avail);
616
617static struct attribute *bmc150_magn_attributes[] = {
618 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
619 NULL,
620};
621
622static const struct attribute_group bmc150_magn_attrs_group = {
623 .attrs = bmc150_magn_attributes,
624};
625
626#define BMC150_MAGN_CHANNEL(_axis) { \
627 .type = IIO_MAGN, \
628 .modified = 1, \
629 .channel2 = IIO_MOD_##_axis, \
630 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
631 BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
632 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
633 BIT(IIO_CHAN_INFO_SCALE), \
634 .scan_index = AXIS_##_axis, \
635 .scan_type = { \
636 .sign = 's', \
637 .realbits = 32, \
638 .storagebits = 32, \
639 .endianness = IIO_LE \
640 }, \
641}
642
643static const struct iio_chan_spec bmc150_magn_channels[] = {
644 BMC150_MAGN_CHANNEL(X),
645 BMC150_MAGN_CHANNEL(Y),
646 BMC150_MAGN_CHANNEL(Z),
647 IIO_CHAN_SOFT_TIMESTAMP(3),
648};
649
650static const struct iio_info bmc150_magn_info = {
651 .attrs = &bmc150_magn_attrs_group,
652 .read_raw = bmc150_magn_read_raw,
653 .write_raw = bmc150_magn_write_raw,
654};
655
656static const unsigned long bmc150_magn_scan_masks[] = {
657 BIT(AXIS_X) | BIT(AXIS_Y) | BIT(AXIS_Z),
658 0};
659
660static irqreturn_t bmc150_magn_trigger_handler(int irq, void *p)
661{
662 struct iio_poll_func *pf = p;
663 struct iio_dev *indio_dev = pf->indio_dev;
664 struct bmc150_magn_data *data = iio_priv(indio_dev);
665 int ret;
666
667 mutex_lock(&data->mutex);
668 ret = bmc150_magn_read_xyz(data, data->buffer);
669 if (ret < 0)
670 goto err;
671
672 iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
673 pf->timestamp);
674
675err:
676 mutex_unlock(&data->mutex);
677 iio_trigger_notify_done(indio_dev->trig);
678
679 return IRQ_HANDLED;
680}
681
682static int bmc150_magn_init(struct bmc150_magn_data *data)
683{
684 int ret, chip_id;
685 struct bmc150_magn_preset preset;
686
687 ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND,
688 false);
689 if (ret < 0) {
690 dev_err(data->dev,
691 "Failed to bring up device from suspend mode\n");
692 return ret;
693 }
694
695 ret = regmap_read(data->regmap, BMC150_MAGN_REG_CHIP_ID, &chip_id);
696 if (ret < 0) {
697 dev_err(data->dev, "Failed reading chip id\n");
698 goto err_poweroff;
699 }
700 if (chip_id != BMC150_MAGN_CHIP_ID_VAL) {
701 dev_err(data->dev, "Invalid chip id 0x%x\n", chip_id);
702 ret = -ENODEV;
703 goto err_poweroff;
704 }
705 dev_dbg(data->dev, "Chip id %x\n", chip_id);
706
707 preset = bmc150_magn_presets_table[BMC150_MAGN_DEFAULT_PRESET];
708 ret = bmc150_magn_set_odr(data, preset.odr);
709 if (ret < 0) {
710 dev_err(data->dev, "Failed to set ODR to %d\n",
711 preset.odr);
712 goto err_poweroff;
713 }
714
715 ret = regmap_write(data->regmap, BMC150_MAGN_REG_REP_XY,
716 BMC150_MAGN_REPXY_TO_REGVAL(preset.rep_xy));
717 if (ret < 0) {
718 dev_err(data->dev, "Failed to set REP XY to %d\n",
719 preset.rep_xy);
720 goto err_poweroff;
721 }
722
723 ret = regmap_write(data->regmap, BMC150_MAGN_REG_REP_Z,
724 BMC150_MAGN_REPZ_TO_REGVAL(preset.rep_z));
725 if (ret < 0) {
726 dev_err(data->dev, "Failed to set REP Z to %d\n",
727 preset.rep_z);
728 goto err_poweroff;
729 }
730
731 ret = bmc150_magn_set_max_odr(data, preset.rep_xy, preset.rep_z,
732 preset.odr);
733 if (ret < 0)
734 goto err_poweroff;
735
736 ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_NORMAL,
737 true);
738 if (ret < 0) {
739 dev_err(data->dev, "Failed to power on device\n");
740 goto err_poweroff;
741 }
742
743 return 0;
744
745err_poweroff:
746 bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND, true);
747 return ret;
748}
749
750static int bmc150_magn_reset_intr(struct bmc150_magn_data *data)
751{
752 int tmp;
753
754
755
756
757
758 return regmap_read(data->regmap, BMC150_MAGN_REG_X_L, &tmp);
759}
760
761static int bmc150_magn_trig_try_reen(struct iio_trigger *trig)
762{
763 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
764 struct bmc150_magn_data *data = iio_priv(indio_dev);
765 int ret;
766
767 if (!data->dready_trigger_on)
768 return 0;
769
770 mutex_lock(&data->mutex);
771 ret = bmc150_magn_reset_intr(data);
772 mutex_unlock(&data->mutex);
773
774 return ret;
775}
776
777static int bmc150_magn_data_rdy_trigger_set_state(struct iio_trigger *trig,
778 bool state)
779{
780 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
781 struct bmc150_magn_data *data = iio_priv(indio_dev);
782 int ret = 0;
783
784 mutex_lock(&data->mutex);
785 if (state == data->dready_trigger_on)
786 goto err_unlock;
787
788 ret = regmap_update_bits(data->regmap, BMC150_MAGN_REG_INT_DRDY,
789 BMC150_MAGN_MASK_DRDY_EN,
790 state << BMC150_MAGN_SHIFT_DRDY_EN);
791 if (ret < 0)
792 goto err_unlock;
793
794 data->dready_trigger_on = state;
795
796 if (state) {
797 ret = bmc150_magn_reset_intr(data);
798 if (ret < 0)
799 goto err_unlock;
800 }
801 mutex_unlock(&data->mutex);
802
803 return 0;
804
805err_unlock:
806 mutex_unlock(&data->mutex);
807 return ret;
808}
809
810static const struct iio_trigger_ops bmc150_magn_trigger_ops = {
811 .set_trigger_state = bmc150_magn_data_rdy_trigger_set_state,
812 .try_reenable = bmc150_magn_trig_try_reen,
813};
814
815static int bmc150_magn_buffer_preenable(struct iio_dev *indio_dev)
816{
817 struct bmc150_magn_data *data = iio_priv(indio_dev);
818
819 return bmc150_magn_set_power_state(data, true);
820}
821
822static int bmc150_magn_buffer_postdisable(struct iio_dev *indio_dev)
823{
824 struct bmc150_magn_data *data = iio_priv(indio_dev);
825
826 return bmc150_magn_set_power_state(data, false);
827}
828
829static const struct iio_buffer_setup_ops bmc150_magn_buffer_setup_ops = {
830 .preenable = bmc150_magn_buffer_preenable,
831 .postenable = iio_triggered_buffer_postenable,
832 .predisable = iio_triggered_buffer_predisable,
833 .postdisable = bmc150_magn_buffer_postdisable,
834};
835
836static const char *bmc150_magn_match_acpi_device(struct device *dev)
837{
838 const struct acpi_device_id *id;
839
840 id = acpi_match_device(dev->driver->acpi_match_table, dev);
841 if (!id)
842 return NULL;
843
844 return dev_name(dev);
845}
846
847int bmc150_magn_probe(struct device *dev, struct regmap *regmap,
848 int irq, const char *name)
849{
850 struct bmc150_magn_data *data;
851 struct iio_dev *indio_dev;
852 int ret;
853
854 indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
855 if (!indio_dev)
856 return -ENOMEM;
857
858 data = iio_priv(indio_dev);
859 dev_set_drvdata(dev, indio_dev);
860 data->regmap = regmap;
861 data->irq = irq;
862 data->dev = dev;
863
864 if (!name && ACPI_HANDLE(dev))
865 name = bmc150_magn_match_acpi_device(dev);
866
867 mutex_init(&data->mutex);
868
869 ret = bmc150_magn_init(data);
870 if (ret < 0)
871 return ret;
872
873 indio_dev->dev.parent = dev;
874 indio_dev->channels = bmc150_magn_channels;
875 indio_dev->num_channels = ARRAY_SIZE(bmc150_magn_channels);
876 indio_dev->available_scan_masks = bmc150_magn_scan_masks;
877 indio_dev->name = name;
878 indio_dev->modes = INDIO_DIRECT_MODE;
879 indio_dev->info = &bmc150_magn_info;
880
881 if (irq > 0) {
882 data->dready_trig = devm_iio_trigger_alloc(dev,
883 "%s-dev%d",
884 indio_dev->name,
885 indio_dev->id);
886 if (!data->dready_trig) {
887 ret = -ENOMEM;
888 dev_err(dev, "iio trigger alloc failed\n");
889 goto err_poweroff;
890 }
891
892 data->dready_trig->dev.parent = dev;
893 data->dready_trig->ops = &bmc150_magn_trigger_ops;
894 iio_trigger_set_drvdata(data->dready_trig, indio_dev);
895 ret = iio_trigger_register(data->dready_trig);
896 if (ret) {
897 dev_err(dev, "iio trigger register failed\n");
898 goto err_poweroff;
899 }
900
901 ret = request_threaded_irq(irq,
902 iio_trigger_generic_data_rdy_poll,
903 NULL,
904 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
905 BMC150_MAGN_IRQ_NAME,
906 data->dready_trig);
907 if (ret < 0) {
908 dev_err(dev, "request irq %d failed\n", irq);
909 goto err_trigger_unregister;
910 }
911 }
912
913 ret = iio_triggered_buffer_setup(indio_dev,
914 iio_pollfunc_store_time,
915 bmc150_magn_trigger_handler,
916 &bmc150_magn_buffer_setup_ops);
917 if (ret < 0) {
918 dev_err(dev, "iio triggered buffer setup failed\n");
919 goto err_free_irq;
920 }
921
922 ret = pm_runtime_set_active(dev);
923 if (ret)
924 goto err_buffer_cleanup;
925
926 pm_runtime_enable(dev);
927 pm_runtime_set_autosuspend_delay(dev,
928 BMC150_MAGN_AUTO_SUSPEND_DELAY_MS);
929 pm_runtime_use_autosuspend(dev);
930
931 ret = iio_device_register(indio_dev);
932 if (ret < 0) {
933 dev_err(dev, "unable to register iio device\n");
934 goto err_buffer_cleanup;
935 }
936
937 dev_dbg(dev, "Registered device %s\n", name);
938 return 0;
939
940err_buffer_cleanup:
941 iio_triggered_buffer_cleanup(indio_dev);
942err_free_irq:
943 if (irq > 0)
944 free_irq(irq, data->dready_trig);
945err_trigger_unregister:
946 if (data->dready_trig)
947 iio_trigger_unregister(data->dready_trig);
948err_poweroff:
949 bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND, true);
950 return ret;
951}
952EXPORT_SYMBOL(bmc150_magn_probe);
953
954int bmc150_magn_remove(struct device *dev)
955{
956 struct iio_dev *indio_dev = dev_get_drvdata(dev);
957 struct bmc150_magn_data *data = iio_priv(indio_dev);
958
959 iio_device_unregister(indio_dev);
960
961 pm_runtime_disable(dev);
962 pm_runtime_set_suspended(dev);
963 pm_runtime_put_noidle(dev);
964
965 iio_triggered_buffer_cleanup(indio_dev);
966
967 if (data->irq > 0)
968 free_irq(data->irq, data->dready_trig);
969
970 if (data->dready_trig)
971 iio_trigger_unregister(data->dready_trig);
972
973 mutex_lock(&data->mutex);
974 bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND, true);
975 mutex_unlock(&data->mutex);
976
977 return 0;
978}
979EXPORT_SYMBOL(bmc150_magn_remove);
980
981#ifdef CONFIG_PM
982static int bmc150_magn_runtime_suspend(struct device *dev)
983{
984 struct iio_dev *indio_dev = dev_get_drvdata(dev);
985 struct bmc150_magn_data *data = iio_priv(indio_dev);
986 int ret;
987
988 mutex_lock(&data->mutex);
989 ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SLEEP,
990 true);
991 mutex_unlock(&data->mutex);
992 if (ret < 0) {
993 dev_err(dev, "powering off device failed\n");
994 return ret;
995 }
996 return 0;
997}
998
999
1000
1001
1002static int bmc150_magn_runtime_resume(struct device *dev)
1003{
1004 struct iio_dev *indio_dev = dev_get_drvdata(dev);
1005 struct bmc150_magn_data *data = iio_priv(indio_dev);
1006
1007 return bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_NORMAL,
1008 true);
1009}
1010#endif
1011
1012#ifdef CONFIG_PM_SLEEP
1013static int bmc150_magn_suspend(struct device *dev)
1014{
1015 struct iio_dev *indio_dev = dev_get_drvdata(dev);
1016 struct bmc150_magn_data *data = iio_priv(indio_dev);
1017 int ret;
1018
1019 mutex_lock(&data->mutex);
1020 ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SLEEP,
1021 true);
1022 mutex_unlock(&data->mutex);
1023
1024 return ret;
1025}
1026
1027static int bmc150_magn_resume(struct device *dev)
1028{
1029 struct iio_dev *indio_dev = dev_get_drvdata(dev);
1030 struct bmc150_magn_data *data = iio_priv(indio_dev);
1031 int ret;
1032
1033 mutex_lock(&data->mutex);
1034 ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_NORMAL,
1035 true);
1036 mutex_unlock(&data->mutex);
1037
1038 return ret;
1039}
1040#endif
1041
1042const struct dev_pm_ops bmc150_magn_pm_ops = {
1043 SET_SYSTEM_SLEEP_PM_OPS(bmc150_magn_suspend, bmc150_magn_resume)
1044 SET_RUNTIME_PM_OPS(bmc150_magn_runtime_suspend,
1045 bmc150_magn_runtime_resume, NULL)
1046};
1047EXPORT_SYMBOL(bmc150_magn_pm_ops);
1048
1049MODULE_AUTHOR("Irina Tirdea <irina.tirdea@intel.com>");
1050MODULE_LICENSE("GPL v2");
1051MODULE_DESCRIPTION("BMC150 magnetometer core driver");
1052
