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39#include <linux/module.h>
40#include <linux/netdevice.h>
41#include <linux/ethtool.h>
42#include <linux/mutex.h>
43#include <linux/list.h>
44#include <linux/rculist.h>
45#include <linux/spinlock.h>
46#include <linux/pci.h>
47#include <net/dcbnl.h>
48#include <net/ipv6.h>
49#include <net/addrconf.h>
50#include <linux/if_ether.h>
51
52#include <rdma/ib_verbs.h>
53#include <rdma/ib_user_verbs.h>
54#include <rdma/ib_umem.h>
55#include <rdma/ib_addr.h>
56
57#include "bnxt_ulp.h"
58#include "roce_hsi.h"
59#include "qplib_res.h"
60#include "qplib_sp.h"
61#include "qplib_fp.h"
62#include "qplib_rcfw.h"
63#include "bnxt_re.h"
64#include "ib_verbs.h"
65#include <rdma/bnxt_re-abi.h>
66#include "bnxt.h"
67#include "hw_counters.h"
68
69static char version[] =
70 BNXT_RE_DESC "\n";
71
72MODULE_AUTHOR("Eddie Wai <eddie.wai@broadcom.com>");
73MODULE_DESCRIPTION(BNXT_RE_DESC " Driver");
74MODULE_LICENSE("Dual BSD/GPL");
75
76
77static struct list_head bnxt_re_dev_list = LIST_HEAD_INIT(bnxt_re_dev_list);
78
79static DEFINE_MUTEX(bnxt_re_dev_lock);
80static struct workqueue_struct *bnxt_re_wq;
81static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev);
82
83static void bnxt_re_destroy_chip_ctx(struct bnxt_re_dev *rdev)
84{
85 rdev->rcfw.res = NULL;
86 rdev->qplib_res.cctx = NULL;
87}
88
89static int bnxt_re_setup_chip_ctx(struct bnxt_re_dev *rdev)
90{
91 struct bnxt_en_dev *en_dev;
92 struct bnxt *bp;
93
94 en_dev = rdev->en_dev;
95 bp = netdev_priv(en_dev->net);
96
97 rdev->chip_ctx.chip_num = bp->chip_num;
98
99
100 rdev->qplib_res.cctx = &rdev->chip_ctx;
101 rdev->rcfw.res = &rdev->qplib_res;
102
103 return 0;
104}
105
106
107
108static void bnxt_re_get_sriov_func_type(struct bnxt_re_dev *rdev)
109{
110 struct bnxt *bp;
111
112 bp = netdev_priv(rdev->en_dev->net);
113 if (BNXT_VF(bp))
114 rdev->is_virtfn = 1;
115}
116
117
118
119
120
121
122static void bnxt_re_set_resource_limits(struct bnxt_re_dev *rdev)
123{
124 u32 vf_qps = 0, vf_srqs = 0, vf_cqs = 0, vf_mrws = 0, vf_gids = 0;
125 u32 i;
126 u32 vf_pct;
127 u32 num_vfs;
128 struct bnxt_qplib_dev_attr *dev_attr = &rdev->dev_attr;
129
130 rdev->qplib_ctx.qpc_count = min_t(u32, BNXT_RE_MAX_QPC_COUNT,
131 dev_attr->max_qp);
132
133 rdev->qplib_ctx.mrw_count = BNXT_RE_MAX_MRW_COUNT_256K;
134
135 rdev->qplib_ctx.mrw_count = min_t(u32, rdev->qplib_ctx.mrw_count,
136 dev_attr->max_mr);
137 rdev->qplib_ctx.srqc_count = min_t(u32, BNXT_RE_MAX_SRQC_COUNT,
138 dev_attr->max_srq);
139 rdev->qplib_ctx.cq_count = min_t(u32, BNXT_RE_MAX_CQ_COUNT,
140 dev_attr->max_cq);
141
142 for (i = 0; i < MAX_TQM_ALLOC_REQ; i++)
143 rdev->qplib_ctx.tqm_count[i] =
144 rdev->dev_attr.tqm_alloc_reqs[i];
145
146 if (rdev->num_vfs) {
147
148
149
150
151 vf_pct = 100 - BNXT_RE_PCT_RSVD_FOR_PF;
152 num_vfs = 100 * rdev->num_vfs;
153 vf_qps = (rdev->qplib_ctx.qpc_count * vf_pct) / num_vfs;
154 vf_srqs = (rdev->qplib_ctx.srqc_count * vf_pct) / num_vfs;
155 vf_cqs = (rdev->qplib_ctx.cq_count * vf_pct) / num_vfs;
156
157
158
159
160
161
162
163
164
165 if (rdev->qplib_ctx.mrw_count < BNXT_RE_MAX_MRW_COUNT_64K)
166 vf_mrws = rdev->qplib_ctx.mrw_count * vf_pct / num_vfs;
167 else
168 vf_mrws = (rdev->qplib_ctx.mrw_count -
169 BNXT_RE_RESVD_MR_FOR_PF) / rdev->num_vfs;
170 vf_gids = BNXT_RE_MAX_GID_PER_VF;
171 }
172 rdev->qplib_ctx.vf_res.max_mrw_per_vf = vf_mrws;
173 rdev->qplib_ctx.vf_res.max_gid_per_vf = vf_gids;
174 rdev->qplib_ctx.vf_res.max_qp_per_vf = vf_qps;
175 rdev->qplib_ctx.vf_res.max_srq_per_vf = vf_srqs;
176 rdev->qplib_ctx.vf_res.max_cq_per_vf = vf_cqs;
177}
178
179
180static void bnxt_re_stop(void *p)
181{
182}
183
184static void bnxt_re_start(void *p)
185{
186}
187
188static void bnxt_re_sriov_config(void *p, int num_vfs)
189{
190 struct bnxt_re_dev *rdev = p;
191
192 if (!rdev)
193 return;
194
195 rdev->num_vfs = num_vfs;
196 bnxt_re_set_resource_limits(rdev);
197 bnxt_qplib_set_func_resources(&rdev->qplib_res, &rdev->rcfw,
198 &rdev->qplib_ctx);
199}
200
201static void bnxt_re_shutdown(void *p)
202{
203 struct bnxt_re_dev *rdev = p;
204
205 if (!rdev)
206 return;
207
208 bnxt_re_ib_unreg(rdev);
209}
210
211static void bnxt_re_stop_irq(void *handle)
212{
213 struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle;
214 struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw;
215 struct bnxt_qplib_nq *nq;
216 int indx;
217
218 for (indx = BNXT_RE_NQ_IDX; indx < rdev->num_msix; indx++) {
219 nq = &rdev->nq[indx - 1];
220 bnxt_qplib_nq_stop_irq(nq, false);
221 }
222
223 bnxt_qplib_rcfw_stop_irq(rcfw, false);
224}
225
226static void bnxt_re_start_irq(void *handle, struct bnxt_msix_entry *ent)
227{
228 struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle;
229 struct bnxt_msix_entry *msix_ent = rdev->msix_entries;
230 struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw;
231 struct bnxt_qplib_nq *nq;
232 int indx, rc;
233
234 if (!ent) {
235
236
237
238
239
240 dev_err(rdev_to_dev(rdev), "Failed to re-start IRQs\n");
241 return;
242 }
243
244
245
246
247 for (indx = 0; indx < rdev->num_msix; indx++)
248 rdev->msix_entries[indx].vector = ent[indx].vector;
249
250 bnxt_qplib_rcfw_start_irq(rcfw, msix_ent[BNXT_RE_AEQ_IDX].vector,
251 false);
252 for (indx = BNXT_RE_NQ_IDX ; indx < rdev->num_msix; indx++) {
253 nq = &rdev->nq[indx - 1];
254 rc = bnxt_qplib_nq_start_irq(nq, indx - 1,
255 msix_ent[indx].vector, false);
256 if (rc)
257 dev_warn(rdev_to_dev(rdev),
258 "Failed to reinit NQ index %d\n", indx - 1);
259 }
260}
261
262static struct bnxt_ulp_ops bnxt_re_ulp_ops = {
263 .ulp_async_notifier = NULL,
264 .ulp_stop = bnxt_re_stop,
265 .ulp_start = bnxt_re_start,
266 .ulp_sriov_config = bnxt_re_sriov_config,
267 .ulp_shutdown = bnxt_re_shutdown,
268 .ulp_irq_stop = bnxt_re_stop_irq,
269 .ulp_irq_restart = bnxt_re_start_irq
270};
271
272
273
274
275
276
277static int bnxt_re_unregister_netdev(struct bnxt_re_dev *rdev)
278{
279 struct bnxt_en_dev *en_dev;
280 int rc;
281
282 if (!rdev)
283 return -EINVAL;
284
285 en_dev = rdev->en_dev;
286
287 rc = en_dev->en_ops->bnxt_unregister_device(rdev->en_dev,
288 BNXT_ROCE_ULP);
289 return rc;
290}
291
292static int bnxt_re_register_netdev(struct bnxt_re_dev *rdev)
293{
294 struct bnxt_en_dev *en_dev;
295 int rc = 0;
296
297 if (!rdev)
298 return -EINVAL;
299
300 en_dev = rdev->en_dev;
301
302 rc = en_dev->en_ops->bnxt_register_device(en_dev, BNXT_ROCE_ULP,
303 &bnxt_re_ulp_ops, rdev);
304 rdev->qplib_res.pdev = rdev->en_dev->pdev;
305 return rc;
306}
307
308static int bnxt_re_free_msix(struct bnxt_re_dev *rdev)
309{
310 struct bnxt_en_dev *en_dev;
311 int rc;
312
313 if (!rdev)
314 return -EINVAL;
315
316 en_dev = rdev->en_dev;
317
318
319 rc = en_dev->en_ops->bnxt_free_msix(rdev->en_dev, BNXT_ROCE_ULP);
320
321 return rc;
322}
323
324static int bnxt_re_request_msix(struct bnxt_re_dev *rdev)
325{
326 int rc = 0, num_msix_want = BNXT_RE_MAX_MSIX, num_msix_got;
327 struct bnxt_en_dev *en_dev;
328
329 if (!rdev)
330 return -EINVAL;
331
332 en_dev = rdev->en_dev;
333
334 num_msix_want = min_t(u32, BNXT_RE_MAX_MSIX, num_online_cpus());
335
336 num_msix_got = en_dev->en_ops->bnxt_request_msix(en_dev, BNXT_ROCE_ULP,
337 rdev->msix_entries,
338 num_msix_want);
339 if (num_msix_got < BNXT_RE_MIN_MSIX) {
340 rc = -EINVAL;
341 goto done;
342 }
343 if (num_msix_got != num_msix_want) {
344 dev_warn(rdev_to_dev(rdev),
345 "Requested %d MSI-X vectors, got %d\n",
346 num_msix_want, num_msix_got);
347 }
348 rdev->num_msix = num_msix_got;
349done:
350 return rc;
351}
352
353static void bnxt_re_init_hwrm_hdr(struct bnxt_re_dev *rdev, struct input *hdr,
354 u16 opcd, u16 crid, u16 trid)
355{
356 hdr->req_type = cpu_to_le16(opcd);
357 hdr->cmpl_ring = cpu_to_le16(crid);
358 hdr->target_id = cpu_to_le16(trid);
359}
360
361static void bnxt_re_fill_fw_msg(struct bnxt_fw_msg *fw_msg, void *msg,
362 int msg_len, void *resp, int resp_max_len,
363 int timeout)
364{
365 fw_msg->msg = msg;
366 fw_msg->msg_len = msg_len;
367 fw_msg->resp = resp;
368 fw_msg->resp_max_len = resp_max_len;
369 fw_msg->timeout = timeout;
370}
371
372static int bnxt_re_net_ring_free(struct bnxt_re_dev *rdev,
373 u16 fw_ring_id, int type)
374{
375 struct bnxt_en_dev *en_dev = rdev->en_dev;
376 struct hwrm_ring_free_input req = {0};
377 struct hwrm_ring_free_output resp;
378 struct bnxt_fw_msg fw_msg;
379 int rc = -EINVAL;
380
381 if (!en_dev)
382 return rc;
383
384 memset(&fw_msg, 0, sizeof(fw_msg));
385
386 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_FREE, -1, -1);
387 req.ring_type = type;
388 req.ring_id = cpu_to_le16(fw_ring_id);
389 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
390 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
391 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
392 if (rc)
393 dev_err(rdev_to_dev(rdev),
394 "Failed to free HW ring:%d :%#x", req.ring_id, rc);
395 return rc;
396}
397
398static int bnxt_re_net_ring_alloc(struct bnxt_re_dev *rdev, dma_addr_t *dma_arr,
399 int pages, int type, u32 ring_mask,
400 u32 map_index, u16 *fw_ring_id)
401{
402 struct bnxt_en_dev *en_dev = rdev->en_dev;
403 struct hwrm_ring_alloc_input req = {0};
404 struct hwrm_ring_alloc_output resp;
405 struct bnxt_fw_msg fw_msg;
406 int rc = -EINVAL;
407
408 if (!en_dev)
409 return rc;
410
411 memset(&fw_msg, 0, sizeof(fw_msg));
412 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_ALLOC, -1, -1);
413 req.enables = 0;
414 req.page_tbl_addr = cpu_to_le64(dma_arr[0]);
415 if (pages > 1) {
416
417 req.page_size = BNXT_PAGE_SHIFT;
418 req.page_tbl_depth = 1;
419 }
420 req.fbo = 0;
421
422 req.logical_id = cpu_to_le16(map_index);
423 req.length = cpu_to_le32(ring_mask + 1);
424 req.ring_type = type;
425 req.int_mode = RING_ALLOC_REQ_INT_MODE_MSIX;
426 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
427 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
428 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
429 if (!rc)
430 *fw_ring_id = le16_to_cpu(resp.ring_id);
431
432 return rc;
433}
434
435static int bnxt_re_net_stats_ctx_free(struct bnxt_re_dev *rdev,
436 u32 fw_stats_ctx_id)
437{
438 struct bnxt_en_dev *en_dev = rdev->en_dev;
439 struct hwrm_stat_ctx_free_input req = {0};
440 struct bnxt_fw_msg fw_msg;
441 int rc = -EINVAL;
442
443 if (!en_dev)
444 return rc;
445
446 memset(&fw_msg, 0, sizeof(fw_msg));
447
448 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_FREE, -1, -1);
449 req.stat_ctx_id = cpu_to_le32(fw_stats_ctx_id);
450 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&req,
451 sizeof(req), DFLT_HWRM_CMD_TIMEOUT);
452 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
453 if (rc)
454 dev_err(rdev_to_dev(rdev),
455 "Failed to free HW stats context %#x", rc);
456
457 return rc;
458}
459
460static int bnxt_re_net_stats_ctx_alloc(struct bnxt_re_dev *rdev,
461 dma_addr_t dma_map,
462 u32 *fw_stats_ctx_id)
463{
464 struct hwrm_stat_ctx_alloc_output resp = {0};
465 struct hwrm_stat_ctx_alloc_input req = {0};
466 struct bnxt_en_dev *en_dev = rdev->en_dev;
467 struct bnxt_fw_msg fw_msg;
468 int rc = -EINVAL;
469
470 *fw_stats_ctx_id = INVALID_STATS_CTX_ID;
471
472 if (!en_dev)
473 return rc;
474
475 memset(&fw_msg, 0, sizeof(fw_msg));
476
477 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_ALLOC, -1, -1);
478 req.update_period_ms = cpu_to_le32(1000);
479 req.stats_dma_addr = cpu_to_le64(dma_map);
480 req.stat_ctx_flags = STAT_CTX_ALLOC_REQ_STAT_CTX_FLAGS_ROCE;
481 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
482 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
483 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
484 if (!rc)
485 *fw_stats_ctx_id = le32_to_cpu(resp.stat_ctx_id);
486
487 return rc;
488}
489
490
491
492static bool is_bnxt_re_dev(struct net_device *netdev)
493{
494 struct ethtool_drvinfo drvinfo;
495
496 if (netdev->ethtool_ops && netdev->ethtool_ops->get_drvinfo) {
497 memset(&drvinfo, 0, sizeof(drvinfo));
498 netdev->ethtool_ops->get_drvinfo(netdev, &drvinfo);
499
500 if (strcmp(drvinfo.driver, "bnxt_en"))
501 return false;
502 return true;
503 }
504 return false;
505}
506
507static struct bnxt_re_dev *bnxt_re_from_netdev(struct net_device *netdev)
508{
509 struct bnxt_re_dev *rdev;
510
511 rcu_read_lock();
512 list_for_each_entry_rcu(rdev, &bnxt_re_dev_list, list) {
513 if (rdev->netdev == netdev) {
514 rcu_read_unlock();
515 return rdev;
516 }
517 }
518 rcu_read_unlock();
519 return NULL;
520}
521
522static void bnxt_re_dev_unprobe(struct net_device *netdev,
523 struct bnxt_en_dev *en_dev)
524{
525 dev_put(netdev);
526 module_put(en_dev->pdev->driver->driver.owner);
527}
528
529static struct bnxt_en_dev *bnxt_re_dev_probe(struct net_device *netdev)
530{
531 struct bnxt *bp = netdev_priv(netdev);
532 struct bnxt_en_dev *en_dev;
533 struct pci_dev *pdev;
534
535
536 if (!bp->ulp_probe)
537 return ERR_PTR(-EINVAL);
538
539 en_dev = bp->ulp_probe(netdev);
540 if (IS_ERR(en_dev))
541 return en_dev;
542
543 pdev = en_dev->pdev;
544 if (!pdev)
545 return ERR_PTR(-EINVAL);
546
547 if (!(en_dev->flags & BNXT_EN_FLAG_ROCE_CAP)) {
548 dev_info(&pdev->dev,
549 "%s: probe error: RoCE is not supported on this device",
550 ROCE_DRV_MODULE_NAME);
551 return ERR_PTR(-ENODEV);
552 }
553
554
555 if (!try_module_get(pdev->driver->driver.owner))
556 return ERR_PTR(-ENODEV);
557
558 dev_hold(netdev);
559
560 return en_dev;
561}
562
563static ssize_t hw_rev_show(struct device *device, struct device_attribute *attr,
564 char *buf)
565{
566 struct bnxt_re_dev *rdev =
567 rdma_device_to_drv_device(device, struct bnxt_re_dev, ibdev);
568
569 return scnprintf(buf, PAGE_SIZE, "0x%x\n", rdev->en_dev->pdev->vendor);
570}
571static DEVICE_ATTR_RO(hw_rev);
572
573static ssize_t hca_type_show(struct device *device,
574 struct device_attribute *attr, char *buf)
575{
576 struct bnxt_re_dev *rdev =
577 rdma_device_to_drv_device(device, struct bnxt_re_dev, ibdev);
578
579 return scnprintf(buf, PAGE_SIZE, "%s\n", rdev->ibdev.node_desc);
580}
581static DEVICE_ATTR_RO(hca_type);
582
583static struct attribute *bnxt_re_attributes[] = {
584 &dev_attr_hw_rev.attr,
585 &dev_attr_hca_type.attr,
586 NULL
587};
588
589static const struct attribute_group bnxt_re_dev_attr_group = {
590 .attrs = bnxt_re_attributes,
591};
592
593static void bnxt_re_unregister_ib(struct bnxt_re_dev *rdev)
594{
595 ib_unregister_device(&rdev->ibdev);
596}
597
598static const struct ib_device_ops bnxt_re_dev_ops = {
599 .add_gid = bnxt_re_add_gid,
600 .alloc_hw_stats = bnxt_re_ib_alloc_hw_stats,
601 .alloc_mr = bnxt_re_alloc_mr,
602 .alloc_pd = bnxt_re_alloc_pd,
603 .alloc_ucontext = bnxt_re_alloc_ucontext,
604 .create_ah = bnxt_re_create_ah,
605 .create_cq = bnxt_re_create_cq,
606 .create_qp = bnxt_re_create_qp,
607 .create_srq = bnxt_re_create_srq,
608 .dealloc_pd = bnxt_re_dealloc_pd,
609 .dealloc_ucontext = bnxt_re_dealloc_ucontext,
610 .del_gid = bnxt_re_del_gid,
611 .dereg_mr = bnxt_re_dereg_mr,
612 .destroy_ah = bnxt_re_destroy_ah,
613 .destroy_cq = bnxt_re_destroy_cq,
614 .destroy_qp = bnxt_re_destroy_qp,
615 .destroy_srq = bnxt_re_destroy_srq,
616 .get_dev_fw_str = bnxt_re_query_fw_str,
617 .get_dma_mr = bnxt_re_get_dma_mr,
618 .get_hw_stats = bnxt_re_ib_get_hw_stats,
619 .get_link_layer = bnxt_re_get_link_layer,
620 .get_netdev = bnxt_re_get_netdev,
621 .get_port_immutable = bnxt_re_get_port_immutable,
622 .map_mr_sg = bnxt_re_map_mr_sg,
623 .mmap = bnxt_re_mmap,
624 .modify_ah = bnxt_re_modify_ah,
625 .modify_device = bnxt_re_modify_device,
626 .modify_qp = bnxt_re_modify_qp,
627 .modify_srq = bnxt_re_modify_srq,
628 .poll_cq = bnxt_re_poll_cq,
629 .post_recv = bnxt_re_post_recv,
630 .post_send = bnxt_re_post_send,
631 .post_srq_recv = bnxt_re_post_srq_recv,
632 .query_ah = bnxt_re_query_ah,
633 .query_device = bnxt_re_query_device,
634 .query_pkey = bnxt_re_query_pkey,
635 .query_port = bnxt_re_query_port,
636 .query_qp = bnxt_re_query_qp,
637 .query_srq = bnxt_re_query_srq,
638 .reg_user_mr = bnxt_re_reg_user_mr,
639 .req_notify_cq = bnxt_re_req_notify_cq,
640};
641
642static int bnxt_re_register_ib(struct bnxt_re_dev *rdev)
643{
644 struct ib_device *ibdev = &rdev->ibdev;
645
646
647 ibdev->owner = THIS_MODULE;
648 ibdev->node_type = RDMA_NODE_IB_CA;
649 strlcpy(ibdev->node_desc, BNXT_RE_DESC " HCA",
650 strlen(BNXT_RE_DESC) + 5);
651 ibdev->phys_port_cnt = 1;
652
653 bnxt_qplib_get_guid(rdev->netdev->dev_addr, (u8 *)&ibdev->node_guid);
654
655 ibdev->num_comp_vectors = 1;
656 ibdev->dev.parent = &rdev->en_dev->pdev->dev;
657 ibdev->local_dma_lkey = BNXT_QPLIB_RSVD_LKEY;
658
659
660 ibdev->uverbs_abi_ver = BNXT_RE_ABI_VERSION;
661 ibdev->uverbs_cmd_mask =
662 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
663 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
664 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
665 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
666 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
667 (1ull << IB_USER_VERBS_CMD_REG_MR) |
668 (1ull << IB_USER_VERBS_CMD_REREG_MR) |
669 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
670 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
671 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
672 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
673 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
674 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
675 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
676 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
677 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
678 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
679 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
680 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
681 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
682 (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
683 (1ull << IB_USER_VERBS_CMD_MODIFY_AH) |
684 (1ull << IB_USER_VERBS_CMD_QUERY_AH) |
685 (1ull << IB_USER_VERBS_CMD_DESTROY_AH);
686
687
688
689 rdma_set_device_sysfs_group(ibdev, &bnxt_re_dev_attr_group);
690 ibdev->driver_id = RDMA_DRIVER_BNXT_RE;
691 ib_set_device_ops(ibdev, &bnxt_re_dev_ops);
692 return ib_register_device(ibdev, "bnxt_re%d", NULL);
693}
694
695static void bnxt_re_dev_remove(struct bnxt_re_dev *rdev)
696{
697 dev_put(rdev->netdev);
698 rdev->netdev = NULL;
699
700 mutex_lock(&bnxt_re_dev_lock);
701 list_del_rcu(&rdev->list);
702 mutex_unlock(&bnxt_re_dev_lock);
703
704 synchronize_rcu();
705
706 ib_dealloc_device(&rdev->ibdev);
707
708}
709
710static struct bnxt_re_dev *bnxt_re_dev_add(struct net_device *netdev,
711 struct bnxt_en_dev *en_dev)
712{
713 struct bnxt_re_dev *rdev;
714
715
716 rdev = ib_alloc_device(bnxt_re_dev, ibdev);
717 if (!rdev) {
718 dev_err(NULL, "%s: bnxt_re_dev allocation failure!",
719 ROCE_DRV_MODULE_NAME);
720 return NULL;
721 }
722
723 rdev->netdev = netdev;
724 dev_hold(rdev->netdev);
725 rdev->en_dev = en_dev;
726 rdev->id = rdev->en_dev->pdev->devfn;
727 INIT_LIST_HEAD(&rdev->qp_list);
728 mutex_init(&rdev->qp_lock);
729 atomic_set(&rdev->qp_count, 0);
730 atomic_set(&rdev->cq_count, 0);
731 atomic_set(&rdev->srq_count, 0);
732 atomic_set(&rdev->mr_count, 0);
733 atomic_set(&rdev->mw_count, 0);
734 rdev->cosq[0] = 0xFFFF;
735 rdev->cosq[1] = 0xFFFF;
736
737 mutex_lock(&bnxt_re_dev_lock);
738 list_add_tail_rcu(&rdev->list, &bnxt_re_dev_list);
739 mutex_unlock(&bnxt_re_dev_lock);
740 return rdev;
741}
742
743static int bnxt_re_handle_unaffi_async_event(struct creq_func_event
744 *unaffi_async)
745{
746 switch (unaffi_async->event) {
747 case CREQ_FUNC_EVENT_EVENT_TX_WQE_ERROR:
748 break;
749 case CREQ_FUNC_EVENT_EVENT_TX_DATA_ERROR:
750 break;
751 case CREQ_FUNC_EVENT_EVENT_RX_WQE_ERROR:
752 break;
753 case CREQ_FUNC_EVENT_EVENT_RX_DATA_ERROR:
754 break;
755 case CREQ_FUNC_EVENT_EVENT_CQ_ERROR:
756 break;
757 case CREQ_FUNC_EVENT_EVENT_TQM_ERROR:
758 break;
759 case CREQ_FUNC_EVENT_EVENT_CFCQ_ERROR:
760 break;
761 case CREQ_FUNC_EVENT_EVENT_CFCS_ERROR:
762 break;
763 case CREQ_FUNC_EVENT_EVENT_CFCC_ERROR:
764 break;
765 case CREQ_FUNC_EVENT_EVENT_CFCM_ERROR:
766 break;
767 case CREQ_FUNC_EVENT_EVENT_TIM_ERROR:
768 break;
769 default:
770 return -EINVAL;
771 }
772 return 0;
773}
774
775static int bnxt_re_handle_qp_async_event(struct creq_qp_event *qp_event,
776 struct bnxt_re_qp *qp)
777{
778 struct ib_event event;
779 unsigned int flags;
780
781 if (qp->qplib_qp.state == CMDQ_MODIFY_QP_NEW_STATE_ERR) {
782 flags = bnxt_re_lock_cqs(qp);
783 bnxt_qplib_add_flush_qp(&qp->qplib_qp);
784 bnxt_re_unlock_cqs(qp, flags);
785 }
786
787 memset(&event, 0, sizeof(event));
788 if (qp->qplib_qp.srq) {
789 event.device = &qp->rdev->ibdev;
790 event.element.qp = &qp->ib_qp;
791 event.event = IB_EVENT_QP_LAST_WQE_REACHED;
792 }
793
794 if (event.device && qp->ib_qp.event_handler)
795 qp->ib_qp.event_handler(&event, qp->ib_qp.qp_context);
796
797 return 0;
798}
799
800static int bnxt_re_handle_affi_async_event(struct creq_qp_event *affi_async,
801 void *obj)
802{
803 int rc = 0;
804 u8 event;
805
806 if (!obj)
807 return rc;
808
809 event = affi_async->event;
810 if (event == CREQ_QP_EVENT_EVENT_QP_ERROR_NOTIFICATION) {
811 struct bnxt_qplib_qp *lib_qp = obj;
812 struct bnxt_re_qp *qp = container_of(lib_qp, struct bnxt_re_qp,
813 qplib_qp);
814 rc = bnxt_re_handle_qp_async_event(affi_async, qp);
815 }
816 return rc;
817}
818
819static int bnxt_re_aeq_handler(struct bnxt_qplib_rcfw *rcfw,
820 void *aeqe, void *obj)
821{
822 struct creq_qp_event *affi_async;
823 struct creq_func_event *unaffi_async;
824 u8 type;
825 int rc;
826
827 type = ((struct creq_base *)aeqe)->type;
828 if (type == CREQ_BASE_TYPE_FUNC_EVENT) {
829 unaffi_async = aeqe;
830 rc = bnxt_re_handle_unaffi_async_event(unaffi_async);
831 } else {
832 affi_async = aeqe;
833 rc = bnxt_re_handle_affi_async_event(affi_async, obj);
834 }
835
836 return rc;
837}
838
839static int bnxt_re_srqn_handler(struct bnxt_qplib_nq *nq,
840 struct bnxt_qplib_srq *handle, u8 event)
841{
842 struct bnxt_re_srq *srq = container_of(handle, struct bnxt_re_srq,
843 qplib_srq);
844 struct ib_event ib_event;
845 int rc = 0;
846
847 if (!srq) {
848 dev_err(NULL, "%s: SRQ is NULL, SRQN not handled",
849 ROCE_DRV_MODULE_NAME);
850 rc = -EINVAL;
851 goto done;
852 }
853 ib_event.device = &srq->rdev->ibdev;
854 ib_event.element.srq = &srq->ib_srq;
855 if (event == NQ_SRQ_EVENT_EVENT_SRQ_THRESHOLD_EVENT)
856 ib_event.event = IB_EVENT_SRQ_LIMIT_REACHED;
857 else
858 ib_event.event = IB_EVENT_SRQ_ERR;
859
860 if (srq->ib_srq.event_handler) {
861
862 (*srq->ib_srq.event_handler)(&ib_event,
863 srq->ib_srq.srq_context);
864 }
865done:
866 return rc;
867}
868
869static int bnxt_re_cqn_handler(struct bnxt_qplib_nq *nq,
870 struct bnxt_qplib_cq *handle)
871{
872 struct bnxt_re_cq *cq = container_of(handle, struct bnxt_re_cq,
873 qplib_cq);
874
875 if (!cq) {
876 dev_err(NULL, "%s: CQ is NULL, CQN not handled",
877 ROCE_DRV_MODULE_NAME);
878 return -EINVAL;
879 }
880 if (cq->ib_cq.comp_handler) {
881
882 (*cq->ib_cq.comp_handler)(&cq->ib_cq, cq->ib_cq.cq_context);
883 }
884
885 return 0;
886}
887
888static u32 bnxt_re_get_nqdb_offset(struct bnxt_re_dev *rdev, u16 indx)
889{
890 return bnxt_qplib_is_chip_gen_p5(&rdev->chip_ctx) ?
891 0x10000 : rdev->msix_entries[indx].db_offset;
892}
893
894static void bnxt_re_cleanup_res(struct bnxt_re_dev *rdev)
895{
896 int i;
897
898 for (i = 1; i < rdev->num_msix; i++)
899 bnxt_qplib_disable_nq(&rdev->nq[i - 1]);
900
901 if (rdev->qplib_res.rcfw)
902 bnxt_qplib_cleanup_res(&rdev->qplib_res);
903}
904
905static int bnxt_re_init_res(struct bnxt_re_dev *rdev)
906{
907 int num_vec_enabled = 0;
908 int rc = 0, i;
909 u32 db_offt;
910
911 bnxt_qplib_init_res(&rdev->qplib_res);
912
913 for (i = 1; i < rdev->num_msix ; i++) {
914 db_offt = bnxt_re_get_nqdb_offset(rdev, i);
915 rc = bnxt_qplib_enable_nq(rdev->en_dev->pdev, &rdev->nq[i - 1],
916 i - 1, rdev->msix_entries[i].vector,
917 db_offt, &bnxt_re_cqn_handler,
918 &bnxt_re_srqn_handler);
919 if (rc) {
920 dev_err(rdev_to_dev(rdev),
921 "Failed to enable NQ with rc = 0x%x", rc);
922 goto fail;
923 }
924 num_vec_enabled++;
925 }
926 return 0;
927fail:
928 for (i = num_vec_enabled; i >= 0; i--)
929 bnxt_qplib_disable_nq(&rdev->nq[i]);
930 return rc;
931}
932
933static void bnxt_re_free_nq_res(struct bnxt_re_dev *rdev)
934{
935 u8 type;
936 int i;
937
938 for (i = 0; i < rdev->num_msix - 1; i++) {
939 type = bnxt_qplib_get_ring_type(&rdev->chip_ctx);
940 bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, type);
941 rdev->nq[i].res = NULL;
942 bnxt_qplib_free_nq(&rdev->nq[i]);
943 }
944}
945
946static void bnxt_re_free_res(struct bnxt_re_dev *rdev)
947{
948 bnxt_re_free_nq_res(rdev);
949
950 if (rdev->qplib_res.dpi_tbl.max) {
951 bnxt_qplib_dealloc_dpi(&rdev->qplib_res,
952 &rdev->qplib_res.dpi_tbl,
953 &rdev->dpi_privileged);
954 }
955 if (rdev->qplib_res.rcfw) {
956 bnxt_qplib_free_res(&rdev->qplib_res);
957 rdev->qplib_res.rcfw = NULL;
958 }
959}
960
961static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev)
962{
963 int num_vec_created = 0;
964 dma_addr_t *pg_map;
965 int rc = 0, i;
966 int pages;
967 u8 type;
968
969
970 rdev->qplib_res.rcfw = &rdev->rcfw;
971 rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr,
972 rdev->is_virtfn);
973 if (rc)
974 goto fail;
975
976 rc = bnxt_qplib_alloc_res(&rdev->qplib_res, rdev->en_dev->pdev,
977 rdev->netdev, &rdev->dev_attr);
978 if (rc)
979 goto fail;
980
981 rc = bnxt_qplib_alloc_dpi(&rdev->qplib_res.dpi_tbl,
982 &rdev->dpi_privileged,
983 rdev);
984 if (rc)
985 goto dealloc_res;
986
987 for (i = 0; i < rdev->num_msix - 1; i++) {
988 rdev->nq[i].res = &rdev->qplib_res;
989 rdev->nq[i].hwq.max_elements = BNXT_RE_MAX_CQ_COUNT +
990 BNXT_RE_MAX_SRQC_COUNT + 2;
991 rc = bnxt_qplib_alloc_nq(rdev->en_dev->pdev, &rdev->nq[i]);
992 if (rc) {
993 dev_err(rdev_to_dev(rdev), "Alloc Failed NQ%d rc:%#x",
994 i, rc);
995 goto free_nq;
996 }
997 type = bnxt_qplib_get_ring_type(&rdev->chip_ctx);
998 pg_map = rdev->nq[i].hwq.pbl[PBL_LVL_0].pg_map_arr;
999 pages = rdev->nq[i].hwq.pbl[rdev->nq[i].hwq.level].pg_count;
1000 rc = bnxt_re_net_ring_alloc(rdev, pg_map, pages, type,
1001 BNXT_QPLIB_NQE_MAX_CNT - 1,
1002 rdev->msix_entries[i + 1].ring_idx,
1003 &rdev->nq[i].ring_id);
1004 if (rc) {
1005 dev_err(rdev_to_dev(rdev),
1006 "Failed to allocate NQ fw id with rc = 0x%x",
1007 rc);
1008 bnxt_qplib_free_nq(&rdev->nq[i]);
1009 goto free_nq;
1010 }
1011 num_vec_created++;
1012 }
1013 return 0;
1014free_nq:
1015 for (i = num_vec_created; i >= 0; i--) {
1016 type = bnxt_qplib_get_ring_type(&rdev->chip_ctx);
1017 bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, type);
1018 bnxt_qplib_free_nq(&rdev->nq[i]);
1019 }
1020 bnxt_qplib_dealloc_dpi(&rdev->qplib_res,
1021 &rdev->qplib_res.dpi_tbl,
1022 &rdev->dpi_privileged);
1023dealloc_res:
1024 bnxt_qplib_free_res(&rdev->qplib_res);
1025
1026fail:
1027 rdev->qplib_res.rcfw = NULL;
1028 return rc;
1029}
1030
1031static void bnxt_re_dispatch_event(struct ib_device *ibdev, struct ib_qp *qp,
1032 u8 port_num, enum ib_event_type event)
1033{
1034 struct ib_event ib_event;
1035
1036 ib_event.device = ibdev;
1037 if (qp) {
1038 ib_event.element.qp = qp;
1039 ib_event.event = event;
1040 if (qp->event_handler)
1041 qp->event_handler(&ib_event, qp->qp_context);
1042
1043 } else {
1044 ib_event.element.port_num = port_num;
1045 ib_event.event = event;
1046 ib_dispatch_event(&ib_event);
1047 }
1048}
1049
1050#define HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN 0x02
1051static int bnxt_re_query_hwrm_pri2cos(struct bnxt_re_dev *rdev, u8 dir,
1052 u64 *cid_map)
1053{
1054 struct hwrm_queue_pri2cos_qcfg_input req = {0};
1055 struct bnxt *bp = netdev_priv(rdev->netdev);
1056 struct hwrm_queue_pri2cos_qcfg_output resp;
1057 struct bnxt_en_dev *en_dev = rdev->en_dev;
1058 struct bnxt_fw_msg fw_msg;
1059 u32 flags = 0;
1060 u8 *qcfgmap, *tmp_map;
1061 int rc = 0, i;
1062
1063 if (!cid_map)
1064 return -EINVAL;
1065
1066 memset(&fw_msg, 0, sizeof(fw_msg));
1067 bnxt_re_init_hwrm_hdr(rdev, (void *)&req,
1068 HWRM_QUEUE_PRI2COS_QCFG, -1, -1);
1069 flags |= (dir & 0x01);
1070 flags |= HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN;
1071 req.flags = cpu_to_le32(flags);
1072 req.port_id = bp->pf.port_id;
1073
1074 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
1075 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
1076 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
1077 if (rc)
1078 return rc;
1079
1080 if (resp.queue_cfg_info) {
1081 dev_warn(rdev_to_dev(rdev),
1082 "Asymmetric cos queue configuration detected");
1083 dev_warn(rdev_to_dev(rdev),
1084 " on device, QoS may not be fully functional\n");
1085 }
1086 qcfgmap = &resp.pri0_cos_queue_id;
1087 tmp_map = (u8 *)cid_map;
1088 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1089 tmp_map[i] = qcfgmap[i];
1090
1091 return rc;
1092}
1093
1094static bool bnxt_re_is_qp1_or_shadow_qp(struct bnxt_re_dev *rdev,
1095 struct bnxt_re_qp *qp)
1096{
1097 return (qp->ib_qp.qp_type == IB_QPT_GSI) || (qp == rdev->qp1_sqp);
1098}
1099
1100static void bnxt_re_dev_stop(struct bnxt_re_dev *rdev)
1101{
1102 int mask = IB_QP_STATE;
1103 struct ib_qp_attr qp_attr;
1104 struct bnxt_re_qp *qp;
1105
1106 qp_attr.qp_state = IB_QPS_ERR;
1107 mutex_lock(&rdev->qp_lock);
1108 list_for_each_entry(qp, &rdev->qp_list, list) {
1109
1110 if (!bnxt_re_is_qp1_or_shadow_qp(rdev, qp)) {
1111 if (qp->qplib_qp.state !=
1112 CMDQ_MODIFY_QP_NEW_STATE_RESET &&
1113 qp->qplib_qp.state !=
1114 CMDQ_MODIFY_QP_NEW_STATE_ERR) {
1115 bnxt_re_dispatch_event(&rdev->ibdev, &qp->ib_qp,
1116 1, IB_EVENT_QP_FATAL);
1117 bnxt_re_modify_qp(&qp->ib_qp, &qp_attr, mask,
1118 NULL);
1119 }
1120 }
1121 }
1122 mutex_unlock(&rdev->qp_lock);
1123}
1124
1125static int bnxt_re_update_gid(struct bnxt_re_dev *rdev)
1126{
1127 struct bnxt_qplib_sgid_tbl *sgid_tbl = &rdev->qplib_res.sgid_tbl;
1128 struct bnxt_qplib_gid gid;
1129 u16 gid_idx, index;
1130 int rc = 0;
1131
1132 if (!test_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags))
1133 return 0;
1134
1135 if (!sgid_tbl) {
1136 dev_err(rdev_to_dev(rdev), "QPLIB: SGID table not allocated");
1137 return -EINVAL;
1138 }
1139
1140 for (index = 0; index < sgid_tbl->active; index++) {
1141 gid_idx = sgid_tbl->hw_id[index];
1142
1143 if (!memcmp(&sgid_tbl->tbl[index], &bnxt_qplib_gid_zero,
1144 sizeof(bnxt_qplib_gid_zero)))
1145 continue;
1146
1147
1148
1149 if (sgid_tbl->vlan[index])
1150 continue;
1151
1152 memcpy(&gid, &sgid_tbl->tbl[index], sizeof(gid));
1153
1154 rc = bnxt_qplib_update_sgid(sgid_tbl, &gid, gid_idx,
1155 rdev->qplib_res.netdev->dev_addr);
1156 }
1157
1158 return rc;
1159}
1160
1161static u32 bnxt_re_get_priority_mask(struct bnxt_re_dev *rdev)
1162{
1163 u32 prio_map = 0, tmp_map = 0;
1164 struct net_device *netdev;
1165 struct dcb_app app;
1166
1167 netdev = rdev->netdev;
1168
1169 memset(&app, 0, sizeof(app));
1170 app.selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE;
1171 app.protocol = ETH_P_IBOE;
1172 tmp_map = dcb_ieee_getapp_mask(netdev, &app);
1173 prio_map = tmp_map;
1174
1175 app.selector = IEEE_8021QAZ_APP_SEL_DGRAM;
1176 app.protocol = ROCE_V2_UDP_DPORT;
1177 tmp_map = dcb_ieee_getapp_mask(netdev, &app);
1178 prio_map |= tmp_map;
1179
1180 return prio_map;
1181}
1182
1183static void bnxt_re_parse_cid_map(u8 prio_map, u8 *cid_map, u16 *cosq)
1184{
1185 u16 prio;
1186 u8 id;
1187
1188 for (prio = 0, id = 0; prio < 8; prio++) {
1189 if (prio_map & (1 << prio)) {
1190 cosq[id] = cid_map[prio];
1191 id++;
1192 if (id == 2)
1193 break;
1194 }
1195 }
1196}
1197
1198static int bnxt_re_setup_qos(struct bnxt_re_dev *rdev)
1199{
1200 u8 prio_map = 0;
1201 u64 cid_map;
1202 int rc;
1203
1204
1205 prio_map = bnxt_re_get_priority_mask(rdev);
1206
1207 if (prio_map == rdev->cur_prio_map)
1208 return 0;
1209 rdev->cur_prio_map = prio_map;
1210
1211 rc = bnxt_re_query_hwrm_pri2cos(rdev, 0, &cid_map);
1212 if (rc) {
1213 dev_warn(rdev_to_dev(rdev), "no cos for p_mask %x\n", prio_map);
1214 return rc;
1215 }
1216
1217 bnxt_re_parse_cid_map(prio_map, (u8 *)&cid_map, rdev->cosq);
1218
1219
1220 rc = bnxt_qplib_map_tc2cos(&rdev->qplib_res, rdev->cosq);
1221 if (rc) {
1222 dev_warn(rdev_to_dev(rdev), "no tc for cos{%x, %x}\n",
1223 rdev->cosq[0], rdev->cosq[1]);
1224 return rc;
1225 }
1226
1227
1228
1229
1230 if ((prio_map == 0 && rdev->qplib_res.prio) ||
1231 (prio_map != 0 && !rdev->qplib_res.prio)) {
1232 rdev->qplib_res.prio = prio_map ? true : false;
1233
1234 bnxt_re_update_gid(rdev);
1235 }
1236
1237 return 0;
1238}
1239
1240static void bnxt_re_query_hwrm_intf_version(struct bnxt_re_dev *rdev)
1241{
1242 struct bnxt_en_dev *en_dev = rdev->en_dev;
1243 struct hwrm_ver_get_output resp = {0};
1244 struct hwrm_ver_get_input req = {0};
1245 struct bnxt_fw_msg fw_msg;
1246 int rc = 0;
1247
1248 memset(&fw_msg, 0, sizeof(fw_msg));
1249 bnxt_re_init_hwrm_hdr(rdev, (void *)&req,
1250 HWRM_VER_GET, -1, -1);
1251 req.hwrm_intf_maj = HWRM_VERSION_MAJOR;
1252 req.hwrm_intf_min = HWRM_VERSION_MINOR;
1253 req.hwrm_intf_upd = HWRM_VERSION_UPDATE;
1254 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
1255 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
1256 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
1257 if (rc) {
1258 dev_err(rdev_to_dev(rdev),
1259 "Failed to query HW version, rc = 0x%x", rc);
1260 return;
1261 }
1262 rdev->qplib_ctx.hwrm_intf_ver =
1263 (u64)resp.hwrm_intf_major << 48 |
1264 (u64)resp.hwrm_intf_minor << 32 |
1265 (u64)resp.hwrm_intf_build << 16 |
1266 resp.hwrm_intf_patch;
1267}
1268
1269static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev)
1270{
1271 u8 type;
1272 int rc;
1273
1274 if (test_and_clear_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags)) {
1275
1276 bnxt_re_unregister_ib(rdev);
1277 }
1278 if (test_and_clear_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags))
1279 cancel_delayed_work_sync(&rdev->worker);
1280
1281 if (test_and_clear_bit(BNXT_RE_FLAG_RESOURCES_INITIALIZED,
1282 &rdev->flags))
1283 bnxt_re_cleanup_res(rdev);
1284 if (test_and_clear_bit(BNXT_RE_FLAG_RESOURCES_ALLOCATED, &rdev->flags))
1285 bnxt_re_free_res(rdev);
1286
1287 if (test_and_clear_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags)) {
1288 rc = bnxt_qplib_deinit_rcfw(&rdev->rcfw);
1289 if (rc)
1290 dev_warn(rdev_to_dev(rdev),
1291 "Failed to deinitialize RCFW: %#x", rc);
1292 bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id);
1293 bnxt_qplib_free_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx);
1294 bnxt_qplib_disable_rcfw_channel(&rdev->rcfw);
1295 type = bnxt_qplib_get_ring_type(&rdev->chip_ctx);
1296 bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id, type);
1297 bnxt_qplib_free_rcfw_channel(&rdev->rcfw);
1298 }
1299 if (test_and_clear_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags)) {
1300 rc = bnxt_re_free_msix(rdev);
1301 if (rc)
1302 dev_warn(rdev_to_dev(rdev),
1303 "Failed to free MSI-X vectors: %#x", rc);
1304 }
1305
1306 bnxt_re_destroy_chip_ctx(rdev);
1307 if (test_and_clear_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags)) {
1308 rc = bnxt_re_unregister_netdev(rdev);
1309 if (rc)
1310 dev_warn(rdev_to_dev(rdev),
1311 "Failed to unregister with netdev: %#x", rc);
1312 }
1313}
1314
1315
1316static void bnxt_re_worker(struct work_struct *work)
1317{
1318 struct bnxt_re_dev *rdev = container_of(work, struct bnxt_re_dev,
1319 worker.work);
1320
1321 bnxt_re_setup_qos(rdev);
1322 schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000));
1323}
1324
1325static int bnxt_re_ib_reg(struct bnxt_re_dev *rdev)
1326{
1327 dma_addr_t *pg_map;
1328 u32 db_offt, ridx;
1329 int pages, vid;
1330 bool locked;
1331 u8 type;
1332 int rc;
1333
1334
1335 rtnl_lock();
1336 locked = true;
1337
1338
1339 rc = bnxt_re_register_netdev(rdev);
1340 if (rc) {
1341 rtnl_unlock();
1342 pr_err("Failed to register with netedev: %#x\n", rc);
1343 return -EINVAL;
1344 }
1345 set_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags);
1346
1347 rc = bnxt_re_setup_chip_ctx(rdev);
1348 if (rc) {
1349 dev_err(rdev_to_dev(rdev), "Failed to get chip context\n");
1350 return -EINVAL;
1351 }
1352
1353
1354 bnxt_re_get_sriov_func_type(rdev);
1355
1356 rc = bnxt_re_request_msix(rdev);
1357 if (rc) {
1358 pr_err("Failed to get MSI-X vectors: %#x\n", rc);
1359 rc = -EINVAL;
1360 goto fail;
1361 }
1362 set_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags);
1363
1364 bnxt_re_query_hwrm_intf_version(rdev);
1365
1366
1367
1368
1369 rc = bnxt_qplib_alloc_rcfw_channel(rdev->en_dev->pdev, &rdev->rcfw,
1370 &rdev->qplib_ctx,
1371 BNXT_RE_MAX_QPC_COUNT);
1372 if (rc) {
1373 pr_err("Failed to allocate RCFW Channel: %#x\n", rc);
1374 goto fail;
1375 }
1376 type = bnxt_qplib_get_ring_type(&rdev->chip_ctx);
1377 pg_map = rdev->rcfw.creq.pbl[PBL_LVL_0].pg_map_arr;
1378 pages = rdev->rcfw.creq.pbl[rdev->rcfw.creq.level].pg_count;
1379 ridx = rdev->msix_entries[BNXT_RE_AEQ_IDX].ring_idx;
1380 rc = bnxt_re_net_ring_alloc(rdev, pg_map, pages, type,
1381 BNXT_QPLIB_CREQE_MAX_CNT - 1,
1382 ridx, &rdev->rcfw.creq_ring_id);
1383 if (rc) {
1384 pr_err("Failed to allocate CREQ: %#x\n", rc);
1385 goto free_rcfw;
1386 }
1387 db_offt = bnxt_re_get_nqdb_offset(rdev, BNXT_RE_AEQ_IDX);
1388 vid = rdev->msix_entries[BNXT_RE_AEQ_IDX].vector;
1389 rc = bnxt_qplib_enable_rcfw_channel(rdev->en_dev->pdev, &rdev->rcfw,
1390 vid, db_offt, rdev->is_virtfn,
1391 &bnxt_re_aeq_handler);
1392 if (rc) {
1393 pr_err("Failed to enable RCFW channel: %#x\n", rc);
1394 goto free_ring;
1395 }
1396
1397 rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr,
1398 rdev->is_virtfn);
1399 if (rc)
1400 goto disable_rcfw;
1401 if (!rdev->is_virtfn)
1402 bnxt_re_set_resource_limits(rdev);
1403
1404 rc = bnxt_qplib_alloc_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx, 0,
1405 bnxt_qplib_is_chip_gen_p5(&rdev->chip_ctx));
1406 if (rc) {
1407 pr_err("Failed to allocate QPLIB context: %#x\n", rc);
1408 goto disable_rcfw;
1409 }
1410 rc = bnxt_re_net_stats_ctx_alloc(rdev,
1411 rdev->qplib_ctx.stats.dma_map,
1412 &rdev->qplib_ctx.stats.fw_id);
1413 if (rc) {
1414 pr_err("Failed to allocate stats context: %#x\n", rc);
1415 goto free_ctx;
1416 }
1417
1418 rc = bnxt_qplib_init_rcfw(&rdev->rcfw, &rdev->qplib_ctx,
1419 rdev->is_virtfn);
1420 if (rc) {
1421 pr_err("Failed to initialize RCFW: %#x\n", rc);
1422 goto free_sctx;
1423 }
1424 set_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags);
1425
1426
1427 rc = bnxt_re_alloc_res(rdev);
1428 if (rc) {
1429 pr_err("Failed to allocate resources: %#x\n", rc);
1430 goto fail;
1431 }
1432 set_bit(BNXT_RE_FLAG_RESOURCES_ALLOCATED, &rdev->flags);
1433 rc = bnxt_re_init_res(rdev);
1434 if (rc) {
1435 pr_err("Failed to initialize resources: %#x\n", rc);
1436 goto fail;
1437 }
1438
1439 set_bit(BNXT_RE_FLAG_RESOURCES_INITIALIZED, &rdev->flags);
1440
1441 if (!rdev->is_virtfn) {
1442 rc = bnxt_re_setup_qos(rdev);
1443 if (rc)
1444 pr_info("RoCE priority not yet configured\n");
1445
1446 INIT_DELAYED_WORK(&rdev->worker, bnxt_re_worker);
1447 set_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags);
1448 schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000));
1449 }
1450
1451 rtnl_unlock();
1452 locked = false;
1453
1454
1455 rc = bnxt_re_register_ib(rdev);
1456 if (rc) {
1457 pr_err("Failed to register with IB: %#x\n", rc);
1458 goto fail;
1459 }
1460 set_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags);
1461 dev_info(rdev_to_dev(rdev), "Device registered successfully");
1462 ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed,
1463 &rdev->active_width);
1464 set_bit(BNXT_RE_FLAG_ISSUE_ROCE_STATS, &rdev->flags);
1465 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, IB_EVENT_PORT_ACTIVE);
1466 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, IB_EVENT_GID_CHANGE);
1467
1468 return 0;
1469free_sctx:
1470 bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id);
1471free_ctx:
1472 bnxt_qplib_free_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx);
1473disable_rcfw:
1474 bnxt_qplib_disable_rcfw_channel(&rdev->rcfw);
1475free_ring:
1476 type = bnxt_qplib_get_ring_type(&rdev->chip_ctx);
1477 bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id, type);
1478free_rcfw:
1479 bnxt_qplib_free_rcfw_channel(&rdev->rcfw);
1480fail:
1481 if (!locked)
1482 rtnl_lock();
1483 bnxt_re_ib_unreg(rdev);
1484 rtnl_unlock();
1485
1486 return rc;
1487}
1488
1489static void bnxt_re_dev_unreg(struct bnxt_re_dev *rdev)
1490{
1491 struct bnxt_en_dev *en_dev = rdev->en_dev;
1492 struct net_device *netdev = rdev->netdev;
1493
1494 bnxt_re_dev_remove(rdev);
1495
1496 if (netdev)
1497 bnxt_re_dev_unprobe(netdev, en_dev);
1498}
1499
1500static int bnxt_re_dev_reg(struct bnxt_re_dev **rdev, struct net_device *netdev)
1501{
1502 struct bnxt_en_dev *en_dev;
1503 int rc = 0;
1504
1505 if (!is_bnxt_re_dev(netdev))
1506 return -ENODEV;
1507
1508 en_dev = bnxt_re_dev_probe(netdev);
1509 if (IS_ERR(en_dev)) {
1510 if (en_dev != ERR_PTR(-ENODEV))
1511 pr_err("%s: Failed to probe\n", ROCE_DRV_MODULE_NAME);
1512 rc = PTR_ERR(en_dev);
1513 goto exit;
1514 }
1515 *rdev = bnxt_re_dev_add(netdev, en_dev);
1516 if (!*rdev) {
1517 rc = -ENOMEM;
1518 bnxt_re_dev_unprobe(netdev, en_dev);
1519 goto exit;
1520 }
1521exit:
1522 return rc;
1523}
1524
1525static void bnxt_re_remove_one(struct bnxt_re_dev *rdev)
1526{
1527 pci_dev_put(rdev->en_dev->pdev);
1528}
1529
1530
1531static void bnxt_re_task(struct work_struct *work)
1532{
1533 struct bnxt_re_work *re_work;
1534 struct bnxt_re_dev *rdev;
1535 int rc = 0;
1536
1537 re_work = container_of(work, struct bnxt_re_work, work);
1538 rdev = re_work->rdev;
1539
1540 if (re_work->event != NETDEV_REGISTER &&
1541 !test_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags))
1542 return;
1543
1544 switch (re_work->event) {
1545 case NETDEV_REGISTER:
1546 rc = bnxt_re_ib_reg(rdev);
1547 if (rc) {
1548 dev_err(rdev_to_dev(rdev),
1549 "Failed to register with IB: %#x", rc);
1550 bnxt_re_remove_one(rdev);
1551 bnxt_re_dev_unreg(rdev);
1552 goto exit;
1553 }
1554 break;
1555 case NETDEV_UP:
1556 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1,
1557 IB_EVENT_PORT_ACTIVE);
1558 break;
1559 case NETDEV_DOWN:
1560 bnxt_re_dev_stop(rdev);
1561 break;
1562 case NETDEV_CHANGE:
1563 if (!netif_carrier_ok(rdev->netdev))
1564 bnxt_re_dev_stop(rdev);
1565 else if (netif_carrier_ok(rdev->netdev))
1566 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1,
1567 IB_EVENT_PORT_ACTIVE);
1568 ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed,
1569 &rdev->active_width);
1570 break;
1571 default:
1572 break;
1573 }
1574 smp_mb__before_atomic();
1575 atomic_dec(&rdev->sched_count);
1576exit:
1577 kfree(re_work);
1578}
1579
1580static void bnxt_re_init_one(struct bnxt_re_dev *rdev)
1581{
1582 pci_dev_get(rdev->en_dev->pdev);
1583}
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599static int bnxt_re_netdev_event(struct notifier_block *notifier,
1600 unsigned long event, void *ptr)
1601{
1602 struct net_device *real_dev, *netdev = netdev_notifier_info_to_dev(ptr);
1603 struct bnxt_re_work *re_work;
1604 struct bnxt_re_dev *rdev;
1605 int rc = 0;
1606 bool sch_work = false;
1607
1608 real_dev = rdma_vlan_dev_real_dev(netdev);
1609 if (!real_dev)
1610 real_dev = netdev;
1611
1612 rdev = bnxt_re_from_netdev(real_dev);
1613 if (!rdev && event != NETDEV_REGISTER)
1614 goto exit;
1615 if (real_dev != netdev)
1616 goto exit;
1617
1618 switch (event) {
1619 case NETDEV_REGISTER:
1620 if (rdev)
1621 break;
1622 rc = bnxt_re_dev_reg(&rdev, real_dev);
1623 if (rc == -ENODEV)
1624 break;
1625 if (rc) {
1626 pr_err("Failed to register with the device %s: %#x\n",
1627 real_dev->name, rc);
1628 break;
1629 }
1630 bnxt_re_init_one(rdev);
1631 sch_work = true;
1632 break;
1633
1634 case NETDEV_UNREGISTER:
1635
1636
1637
1638 if (atomic_read(&rdev->sched_count) > 0)
1639 goto exit;
1640 bnxt_re_ib_unreg(rdev);
1641 bnxt_re_remove_one(rdev);
1642 bnxt_re_dev_unreg(rdev);
1643 break;
1644
1645 default:
1646 sch_work = true;
1647 break;
1648 }
1649 if (sch_work) {
1650
1651 re_work = kzalloc(sizeof(*re_work), GFP_ATOMIC);
1652 if (re_work) {
1653 re_work->rdev = rdev;
1654 re_work->event = event;
1655 re_work->vlan_dev = (real_dev == netdev ?
1656 NULL : netdev);
1657 INIT_WORK(&re_work->work, bnxt_re_task);
1658 atomic_inc(&rdev->sched_count);
1659 queue_work(bnxt_re_wq, &re_work->work);
1660 }
1661 }
1662
1663exit:
1664 return NOTIFY_DONE;
1665}
1666
1667static struct notifier_block bnxt_re_netdev_notifier = {
1668 .notifier_call = bnxt_re_netdev_event
1669};
1670
1671static int __init bnxt_re_mod_init(void)
1672{
1673 int rc = 0;
1674
1675 pr_info("%s: %s", ROCE_DRV_MODULE_NAME, version);
1676
1677 bnxt_re_wq = create_singlethread_workqueue("bnxt_re");
1678 if (!bnxt_re_wq)
1679 return -ENOMEM;
1680
1681 INIT_LIST_HEAD(&bnxt_re_dev_list);
1682
1683 rc = register_netdevice_notifier(&bnxt_re_netdev_notifier);
1684 if (rc) {
1685 pr_err("%s: Cannot register to netdevice_notifier",
1686 ROCE_DRV_MODULE_NAME);
1687 goto err_netdev;
1688 }
1689 return 0;
1690
1691err_netdev:
1692 destroy_workqueue(bnxt_re_wq);
1693
1694 return rc;
1695}
1696
1697static void __exit bnxt_re_mod_exit(void)
1698{
1699 struct bnxt_re_dev *rdev, *next;
1700 LIST_HEAD(to_be_deleted);
1701
1702 mutex_lock(&bnxt_re_dev_lock);
1703
1704 if (!list_empty(&bnxt_re_dev_list))
1705 list_splice_init(&bnxt_re_dev_list, &to_be_deleted);
1706 mutex_unlock(&bnxt_re_dev_lock);
1707
1708
1709
1710
1711 list_for_each_entry_safe_reverse(rdev, next, &to_be_deleted, list) {
1712 dev_info(rdev_to_dev(rdev), "Unregistering Device");
1713
1714
1715
1716
1717 flush_workqueue(bnxt_re_wq);
1718 bnxt_re_dev_stop(rdev);
1719
1720 rtnl_lock();
1721 bnxt_re_ib_unreg(rdev);
1722 rtnl_unlock();
1723 bnxt_re_remove_one(rdev);
1724 bnxt_re_dev_unreg(rdev);
1725 }
1726 unregister_netdevice_notifier(&bnxt_re_netdev_notifier);
1727 if (bnxt_re_wq)
1728 destroy_workqueue(bnxt_re_wq);
1729}
1730
1731module_init(bnxt_re_mod_init);
1732module_exit(bnxt_re_mod_exit);
1733