1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19#ifndef _ASM_X86_AMD_IOMMU_PROTO_H
20#define _ASM_X86_AMD_IOMMU_PROTO_H
21
22#include "amd_iommu_types.h"
23
24extern int amd_iommu_get_num_iommus(void);
25extern int amd_iommu_init_dma_ops(void);
26extern int amd_iommu_init_passthrough(void);
27extern irqreturn_t amd_iommu_int_thread(int irq, void *data);
28extern irqreturn_t amd_iommu_int_handler(int irq, void *data);
29extern void amd_iommu_apply_erratum_63(u16 devid);
30extern void amd_iommu_reset_cmd_buffer(struct amd_iommu *iommu);
31extern int amd_iommu_init_devices(void);
32extern void amd_iommu_uninit_devices(void);
33extern void amd_iommu_init_notifier(void);
34extern int amd_iommu_init_api(void);
35
36
37extern int amd_iommu_prepare(void);
38extern int amd_iommu_enable(void);
39extern void amd_iommu_disable(void);
40extern int amd_iommu_reenable(int);
41extern int amd_iommu_enable_faulting(void);
42extern int amd_iommu_guest_ir;
43
44
45struct iommu_domain;
46
47extern bool amd_iommu_v2_supported(void);
48extern int amd_iommu_register_ppr_notifier(struct notifier_block *nb);
49extern int amd_iommu_unregister_ppr_notifier(struct notifier_block *nb);
50extern void amd_iommu_domain_direct_map(struct iommu_domain *dom);
51extern int amd_iommu_domain_enable_v2(struct iommu_domain *dom, int pasids);
52extern int amd_iommu_flush_page(struct iommu_domain *dom, int pasid,
53 u64 address);
54extern int amd_iommu_flush_tlb(struct iommu_domain *dom, int pasid);
55extern int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, int pasid,
56 unsigned long cr3);
57extern int amd_iommu_domain_clear_gcr3(struct iommu_domain *dom, int pasid);
58extern struct iommu_domain *amd_iommu_get_v2_domain(struct pci_dev *pdev);
59
60#ifdef CONFIG_IRQ_REMAP
61extern int amd_iommu_create_irq_domain(struct amd_iommu *iommu);
62#else
63static inline int amd_iommu_create_irq_domain(struct amd_iommu *iommu)
64{
65 return 0;
66}
67#endif
68
69#define PPR_SUCCESS 0x0
70#define PPR_INVALID 0x1
71#define PPR_FAILURE 0xf
72
73extern int amd_iommu_complete_ppr(struct pci_dev *pdev, int pasid,
74 int status, int tag);
75
76static inline bool is_rd890_iommu(struct pci_dev *pdev)
77{
78 return (pdev->vendor == PCI_VENDOR_ID_ATI) &&
79 (pdev->device == PCI_DEVICE_ID_RD890_IOMMU);
80}
81
82static inline bool iommu_feature(struct amd_iommu *iommu, u64 f)
83{
84 if (!(iommu->cap & (1 << IOMMU_CAP_EFR)))
85 return false;
86
87 return !!(iommu->features & f);
88}
89
90static inline u64 iommu_virt_to_phys(void *vaddr)
91{
92 return (u64)__sme_set(virt_to_phys(vaddr));
93}
94
95static inline void *iommu_phys_to_virt(unsigned long paddr)
96{
97 return phys_to_virt(__sme_clr(paddr));
98}
99
100extern bool translation_pre_enabled(struct amd_iommu *iommu);
101extern struct iommu_dev_data *get_dev_data(struct device *dev);
102#endif
103