linux/drivers/net/ethernet/intel/e1000e/netdev.c
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   1// SPDX-License-Identifier: GPL-2.0
   2/* Copyright(c) 1999 - 2018 Intel Corporation. */
   3
   4#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
   5
   6#include <linux/module.h>
   7#include <linux/types.h>
   8#include <linux/init.h>
   9#include <linux/pci.h>
  10#include <linux/vmalloc.h>
  11#include <linux/pagemap.h>
  12#include <linux/delay.h>
  13#include <linux/netdevice.h>
  14#include <linux/interrupt.h>
  15#include <linux/tcp.h>
  16#include <linux/ipv6.h>
  17#include <linux/slab.h>
  18#include <net/checksum.h>
  19#include <net/ip6_checksum.h>
  20#include <linux/ethtool.h>
  21#include <linux/if_vlan.h>
  22#include <linux/cpu.h>
  23#include <linux/smp.h>
  24#include <linux/pm_qos.h>
  25#include <linux/pm_runtime.h>
  26#include <linux/aer.h>
  27#include <linux/prefetch.h>
  28
  29#include "e1000.h"
  30
  31#define DRV_EXTRAVERSION "-k"
  32
  33#define DRV_VERSION "3.2.6" DRV_EXTRAVERSION
  34char e1000e_driver_name[] = "e1000e";
  35const char e1000e_driver_version[] = DRV_VERSION;
  36
  37#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
  38static int debug = -1;
  39module_param(debug, int, 0);
  40MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  41
  42static const struct e1000_info *e1000_info_tbl[] = {
  43        [board_82571]           = &e1000_82571_info,
  44        [board_82572]           = &e1000_82572_info,
  45        [board_82573]           = &e1000_82573_info,
  46        [board_82574]           = &e1000_82574_info,
  47        [board_82583]           = &e1000_82583_info,
  48        [board_80003es2lan]     = &e1000_es2_info,
  49        [board_ich8lan]         = &e1000_ich8_info,
  50        [board_ich9lan]         = &e1000_ich9_info,
  51        [board_ich10lan]        = &e1000_ich10_info,
  52        [board_pchlan]          = &e1000_pch_info,
  53        [board_pch2lan]         = &e1000_pch2_info,
  54        [board_pch_lpt]         = &e1000_pch_lpt_info,
  55        [board_pch_spt]         = &e1000_pch_spt_info,
  56        [board_pch_cnp]         = &e1000_pch_cnp_info,
  57};
  58
  59struct e1000_reg_info {
  60        u32 ofs;
  61        char *name;
  62};
  63
  64static const struct e1000_reg_info e1000_reg_info_tbl[] = {
  65        /* General Registers */
  66        {E1000_CTRL, "CTRL"},
  67        {E1000_STATUS, "STATUS"},
  68        {E1000_CTRL_EXT, "CTRL_EXT"},
  69
  70        /* Interrupt Registers */
  71        {E1000_ICR, "ICR"},
  72
  73        /* Rx Registers */
  74        {E1000_RCTL, "RCTL"},
  75        {E1000_RDLEN(0), "RDLEN"},
  76        {E1000_RDH(0), "RDH"},
  77        {E1000_RDT(0), "RDT"},
  78        {E1000_RDTR, "RDTR"},
  79        {E1000_RXDCTL(0), "RXDCTL"},
  80        {E1000_ERT, "ERT"},
  81        {E1000_RDBAL(0), "RDBAL"},
  82        {E1000_RDBAH(0), "RDBAH"},
  83        {E1000_RDFH, "RDFH"},
  84        {E1000_RDFT, "RDFT"},
  85        {E1000_RDFHS, "RDFHS"},
  86        {E1000_RDFTS, "RDFTS"},
  87        {E1000_RDFPC, "RDFPC"},
  88
  89        /* Tx Registers */
  90        {E1000_TCTL, "TCTL"},
  91        {E1000_TDBAL(0), "TDBAL"},
  92        {E1000_TDBAH(0), "TDBAH"},
  93        {E1000_TDLEN(0), "TDLEN"},
  94        {E1000_TDH(0), "TDH"},
  95        {E1000_TDT(0), "TDT"},
  96        {E1000_TIDV, "TIDV"},
  97        {E1000_TXDCTL(0), "TXDCTL"},
  98        {E1000_TADV, "TADV"},
  99        {E1000_TARC(0), "TARC"},
 100        {E1000_TDFH, "TDFH"},
 101        {E1000_TDFT, "TDFT"},
 102        {E1000_TDFHS, "TDFHS"},
 103        {E1000_TDFTS, "TDFTS"},
 104        {E1000_TDFPC, "TDFPC"},
 105
 106        /* List Terminator */
 107        {0, NULL}
 108};
 109
 110/**
 111 * __ew32_prepare - prepare to write to MAC CSR register on certain parts
 112 * @hw: pointer to the HW structure
 113 *
 114 * When updating the MAC CSR registers, the Manageability Engine (ME) could
 115 * be accessing the registers at the same time.  Normally, this is handled in
 116 * h/w by an arbiter but on some parts there is a bug that acknowledges Host
 117 * accesses later than it should which could result in the register to have
 118 * an incorrect value.  Workaround this by checking the FWSM register which
 119 * has bit 24 set while ME is accessing MAC CSR registers, wait if it is set
 120 * and try again a number of times.
 121 **/
 122s32 __ew32_prepare(struct e1000_hw *hw)
 123{
 124        s32 i = E1000_ICH_FWSM_PCIM2PCI_COUNT;
 125
 126        while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i)
 127                udelay(50);
 128
 129        return i;
 130}
 131
 132void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
 133{
 134        if (hw->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 135                __ew32_prepare(hw);
 136
 137        writel(val, hw->hw_addr + reg);
 138}
 139
 140/**
 141 * e1000_regdump - register printout routine
 142 * @hw: pointer to the HW structure
 143 * @reginfo: pointer to the register info table
 144 **/
 145static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
 146{
 147        int n = 0;
 148        char rname[16];
 149        u32 regs[8];
 150
 151        switch (reginfo->ofs) {
 152        case E1000_RXDCTL(0):
 153                for (n = 0; n < 2; n++)
 154                        regs[n] = __er32(hw, E1000_RXDCTL(n));
 155                break;
 156        case E1000_TXDCTL(0):
 157                for (n = 0; n < 2; n++)
 158                        regs[n] = __er32(hw, E1000_TXDCTL(n));
 159                break;
 160        case E1000_TARC(0):
 161                for (n = 0; n < 2; n++)
 162                        regs[n] = __er32(hw, E1000_TARC(n));
 163                break;
 164        default:
 165                pr_info("%-15s %08x\n",
 166                        reginfo->name, __er32(hw, reginfo->ofs));
 167                return;
 168        }
 169
 170        snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
 171        pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);
 172}
 173
 174static void e1000e_dump_ps_pages(struct e1000_adapter *adapter,
 175                                 struct e1000_buffer *bi)
 176{
 177        int i;
 178        struct e1000_ps_page *ps_page;
 179
 180        for (i = 0; i < adapter->rx_ps_pages; i++) {
 181                ps_page = &bi->ps_pages[i];
 182
 183                if (ps_page->page) {
 184                        pr_info("packet dump for ps_page %d:\n", i);
 185                        print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
 186                                       16, 1, page_address(ps_page->page),
 187                                       PAGE_SIZE, true);
 188                }
 189        }
 190}
 191
 192/**
 193 * e1000e_dump - Print registers, Tx-ring and Rx-ring
 194 * @adapter: board private structure
 195 **/
 196static void e1000e_dump(struct e1000_adapter *adapter)
 197{
 198        struct net_device *netdev = adapter->netdev;
 199        struct e1000_hw *hw = &adapter->hw;
 200        struct e1000_reg_info *reginfo;
 201        struct e1000_ring *tx_ring = adapter->tx_ring;
 202        struct e1000_tx_desc *tx_desc;
 203        struct my_u0 {
 204                __le64 a;
 205                __le64 b;
 206        } *u0;
 207        struct e1000_buffer *buffer_info;
 208        struct e1000_ring *rx_ring = adapter->rx_ring;
 209        union e1000_rx_desc_packet_split *rx_desc_ps;
 210        union e1000_rx_desc_extended *rx_desc;
 211        struct my_u1 {
 212                __le64 a;
 213                __le64 b;
 214                __le64 c;
 215                __le64 d;
 216        } *u1;
 217        u32 staterr;
 218        int i = 0;
 219
 220        if (!netif_msg_hw(adapter))
 221                return;
 222
 223        /* Print netdevice Info */
 224        if (netdev) {
 225                dev_info(&adapter->pdev->dev, "Net device Info\n");
 226                pr_info("Device Name     state            trans_start\n");
 227                pr_info("%-15s %016lX %016lX\n", netdev->name,
 228                        netdev->state, dev_trans_start(netdev));
 229        }
 230
 231        /* Print Registers */
 232        dev_info(&adapter->pdev->dev, "Register Dump\n");
 233        pr_info(" Register Name   Value\n");
 234        for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
 235             reginfo->name; reginfo++) {
 236                e1000_regdump(hw, reginfo);
 237        }
 238
 239        /* Print Tx Ring Summary */
 240        if (!netdev || !netif_running(netdev))
 241                return;
 242
 243        dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
 244        pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 245        buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
 246        pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
 247                0, tx_ring->next_to_use, tx_ring->next_to_clean,
 248                (unsigned long long)buffer_info->dma,
 249                buffer_info->length,
 250                buffer_info->next_to_watch,
 251                (unsigned long long)buffer_info->time_stamp);
 252
 253        /* Print Tx Ring */
 254        if (!netif_msg_tx_done(adapter))
 255                goto rx_ring_summary;
 256
 257        dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
 258
 259        /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
 260         *
 261         * Legacy Transmit Descriptor
 262         *   +--------------------------------------------------------------+
 263         * 0 |         Buffer Address [63:0] (Reserved on Write Back)       |
 264         *   +--------------------------------------------------------------+
 265         * 8 | Special  |    CSS     | Status |  CMD    |  CSO   |  Length  |
 266         *   +--------------------------------------------------------------+
 267         *   63       48 47        36 35    32 31     24 23    16 15        0
 268         *
 269         * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
 270         *   63      48 47    40 39       32 31             16 15    8 7      0
 271         *   +----------------------------------------------------------------+
 272         * 0 |  TUCSE  | TUCS0  |   TUCSS   |     IPCSE       | IPCS0 | IPCSS |
 273         *   +----------------------------------------------------------------+
 274         * 8 |   MSS   | HDRLEN | RSV | STA | TUCMD | DTYP |      PAYLEN      |
 275         *   +----------------------------------------------------------------+
 276         *   63      48 47    40 39 36 35 32 31   24 23  20 19                0
 277         *
 278         * Extended Data Descriptor (DTYP=0x1)
 279         *   +----------------------------------------------------------------+
 280         * 0 |                     Buffer Address [63:0]                      |
 281         *   +----------------------------------------------------------------+
 282         * 8 | VLAN tag |  POPTS  | Rsvd | Status | Command | DTYP |  DTALEN  |
 283         *   +----------------------------------------------------------------+
 284         *   63       48 47     40 39  36 35    32 31     24 23  20 19        0
 285         */
 286        pr_info("Tl[desc]     [address 63:0  ] [SpeCssSCmCsLen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Legacy format\n");
 287        pr_info("Tc[desc]     [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Context format\n");
 288        pr_info("Td[desc]     [address 63:0  ] [VlaPoRSCm1Dlen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Data format\n");
 289        for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 290                const char *next_desc;
 291                tx_desc = E1000_TX_DESC(*tx_ring, i);
 292                buffer_info = &tx_ring->buffer_info[i];
 293                u0 = (struct my_u0 *)tx_desc;
 294                if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
 295                        next_desc = " NTC/U";
 296                else if (i == tx_ring->next_to_use)
 297                        next_desc = " NTU";
 298                else if (i == tx_ring->next_to_clean)
 299                        next_desc = " NTC";
 300                else
 301                        next_desc = "";
 302                pr_info("T%c[0x%03X]    %016llX %016llX %016llX %04X  %3X %016llX %p%s\n",
 303                        (!(le64_to_cpu(u0->b) & BIT(29)) ? 'l' :
 304                         ((le64_to_cpu(u0->b) & BIT(20)) ? 'd' : 'c')),
 305                        i,
 306                        (unsigned long long)le64_to_cpu(u0->a),
 307                        (unsigned long long)le64_to_cpu(u0->b),
 308                        (unsigned long long)buffer_info->dma,
 309                        buffer_info->length, buffer_info->next_to_watch,
 310                        (unsigned long long)buffer_info->time_stamp,
 311                        buffer_info->skb, next_desc);
 312
 313                if (netif_msg_pktdata(adapter) && buffer_info->skb)
 314                        print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
 315                                       16, 1, buffer_info->skb->data,
 316                                       buffer_info->skb->len, true);
 317        }
 318
 319        /* Print Rx Ring Summary */
 320rx_ring_summary:
 321        dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
 322        pr_info("Queue [NTU] [NTC]\n");
 323        pr_info(" %5d %5X %5X\n",
 324                0, rx_ring->next_to_use, rx_ring->next_to_clean);
 325
 326        /* Print Rx Ring */
 327        if (!netif_msg_rx_status(adapter))
 328                return;
 329
 330        dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
 331        switch (adapter->rx_ps_pages) {
 332        case 1:
 333        case 2:
 334        case 3:
 335                /* [Extended] Packet Split Receive Descriptor Format
 336                 *
 337                 *    +-----------------------------------------------------+
 338                 *  0 |                Buffer Address 0 [63:0]              |
 339                 *    +-----------------------------------------------------+
 340                 *  8 |                Buffer Address 1 [63:0]              |
 341                 *    +-----------------------------------------------------+
 342                 * 16 |                Buffer Address 2 [63:0]              |
 343                 *    +-----------------------------------------------------+
 344                 * 24 |                Buffer Address 3 [63:0]              |
 345                 *    +-----------------------------------------------------+
 346                 */
 347                pr_info("R  [desc]      [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma       ] [bi->skb] <-- Ext Pkt Split format\n");
 348                /* [Extended] Receive Descriptor (Write-Back) Format
 349                 *
 350                 *   63       48 47    32 31     13 12    8 7    4 3        0
 351                 *   +------------------------------------------------------+
 352                 * 0 | Packet   | IP     |  Rsvd   | MRQ   | Rsvd | MRQ RSS |
 353                 *   | Checksum | Ident  |         | Queue |      |  Type   |
 354                 *   +------------------------------------------------------+
 355                 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 356                 *   +------------------------------------------------------+
 357                 *   63       48 47    32 31            20 19               0
 358                 */
 359                pr_info("RWB[desc]      [ck ipid mrqhsh] [vl   l0 ee  es] [ l3  l2  l1 hs] [reserved      ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
 360                for (i = 0; i < rx_ring->count; i++) {
 361                        const char *next_desc;
 362                        buffer_info = &rx_ring->buffer_info[i];
 363                        rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
 364                        u1 = (struct my_u1 *)rx_desc_ps;
 365                        staterr =
 366                            le32_to_cpu(rx_desc_ps->wb.middle.status_error);
 367
 368                        if (i == rx_ring->next_to_use)
 369                                next_desc = " NTU";
 370                        else if (i == rx_ring->next_to_clean)
 371                                next_desc = " NTC";
 372                        else
 373                                next_desc = "";
 374
 375                        if (staterr & E1000_RXD_STAT_DD) {
 376                                /* Descriptor Done */
 377                                pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX ---------------- %p%s\n",
 378                                        "RWB", i,
 379                                        (unsigned long long)le64_to_cpu(u1->a),
 380                                        (unsigned long long)le64_to_cpu(u1->b),
 381                                        (unsigned long long)le64_to_cpu(u1->c),
 382                                        (unsigned long long)le64_to_cpu(u1->d),
 383                                        buffer_info->skb, next_desc);
 384                        } else {
 385                                pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX %016llX %p%s\n",
 386                                        "R  ", i,
 387                                        (unsigned long long)le64_to_cpu(u1->a),
 388                                        (unsigned long long)le64_to_cpu(u1->b),
 389                                        (unsigned long long)le64_to_cpu(u1->c),
 390                                        (unsigned long long)le64_to_cpu(u1->d),
 391                                        (unsigned long long)buffer_info->dma,
 392                                        buffer_info->skb, next_desc);
 393
 394                                if (netif_msg_pktdata(adapter))
 395                                        e1000e_dump_ps_pages(adapter,
 396                                                             buffer_info);
 397                        }
 398                }
 399                break;
 400        default:
 401        case 0:
 402                /* Extended Receive Descriptor (Read) Format
 403                 *
 404                 *   +-----------------------------------------------------+
 405                 * 0 |                Buffer Address [63:0]                |
 406                 *   +-----------------------------------------------------+
 407                 * 8 |                      Reserved                       |
 408                 *   +-----------------------------------------------------+
 409                 */
 410                pr_info("R  [desc]      [buf addr 63:0 ] [reserved 63:0 ] [bi->dma       ] [bi->skb] <-- Ext (Read) format\n");
 411                /* Extended Receive Descriptor (Write-Back) Format
 412                 *
 413                 *   63       48 47    32 31    24 23            4 3        0
 414                 *   +------------------------------------------------------+
 415                 *   |     RSS Hash      |        |               |         |
 416                 * 0 +-------------------+  Rsvd  |   Reserved    | MRQ RSS |
 417                 *   | Packet   | IP     |        |               |  Type   |
 418                 *   | Checksum | Ident  |        |               |         |
 419                 *   +------------------------------------------------------+
 420                 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 421                 *   +------------------------------------------------------+
 422                 *   63       48 47    32 31            20 19               0
 423                 */
 424                pr_info("RWB[desc]      [cs ipid    mrq] [vt   ln xe  xs] [bi->skb] <-- Ext (Write-Back) format\n");
 425
 426                for (i = 0; i < rx_ring->count; i++) {
 427                        const char *next_desc;
 428
 429                        buffer_info = &rx_ring->buffer_info[i];
 430                        rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 431                        u1 = (struct my_u1 *)rx_desc;
 432                        staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 433
 434                        if (i == rx_ring->next_to_use)
 435                                next_desc = " NTU";
 436                        else if (i == rx_ring->next_to_clean)
 437                                next_desc = " NTC";
 438                        else
 439                                next_desc = "";
 440
 441                        if (staterr & E1000_RXD_STAT_DD) {
 442                                /* Descriptor Done */
 443                                pr_info("%s[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 444                                        "RWB", i,
 445                                        (unsigned long long)le64_to_cpu(u1->a),
 446                                        (unsigned long long)le64_to_cpu(u1->b),
 447                                        buffer_info->skb, next_desc);
 448                        } else {
 449                                pr_info("%s[0x%03X]     %016llX %016llX %016llX %p%s\n",
 450                                        "R  ", i,
 451                                        (unsigned long long)le64_to_cpu(u1->a),
 452                                        (unsigned long long)le64_to_cpu(u1->b),
 453                                        (unsigned long long)buffer_info->dma,
 454                                        buffer_info->skb, next_desc);
 455
 456                                if (netif_msg_pktdata(adapter) &&
 457                                    buffer_info->skb)
 458                                        print_hex_dump(KERN_INFO, "",
 459                                                       DUMP_PREFIX_ADDRESS, 16,
 460                                                       1,
 461                                                       buffer_info->skb->data,
 462                                                       adapter->rx_buffer_len,
 463                                                       true);
 464                        }
 465                }
 466        }
 467}
 468
 469/**
 470 * e1000_desc_unused - calculate if we have unused descriptors
 471 **/
 472static int e1000_desc_unused(struct e1000_ring *ring)
 473{
 474        if (ring->next_to_clean > ring->next_to_use)
 475                return ring->next_to_clean - ring->next_to_use - 1;
 476
 477        return ring->count + ring->next_to_clean - ring->next_to_use - 1;
 478}
 479
 480/**
 481 * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp
 482 * @adapter: board private structure
 483 * @hwtstamps: time stamp structure to update
 484 * @systim: unsigned 64bit system time value.
 485 *
 486 * Convert the system time value stored in the RX/TXSTMP registers into a
 487 * hwtstamp which can be used by the upper level time stamping functions.
 488 *
 489 * The 'systim_lock' spinlock is used to protect the consistency of the
 490 * system time value. This is needed because reading the 64 bit time
 491 * value involves reading two 32 bit registers. The first read latches the
 492 * value.
 493 **/
 494static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter,
 495                                      struct skb_shared_hwtstamps *hwtstamps,
 496                                      u64 systim)
 497{
 498        u64 ns;
 499        unsigned long flags;
 500
 501        spin_lock_irqsave(&adapter->systim_lock, flags);
 502        ns = timecounter_cyc2time(&adapter->tc, systim);
 503        spin_unlock_irqrestore(&adapter->systim_lock, flags);
 504
 505        memset(hwtstamps, 0, sizeof(*hwtstamps));
 506        hwtstamps->hwtstamp = ns_to_ktime(ns);
 507}
 508
 509/**
 510 * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp
 511 * @adapter: board private structure
 512 * @status: descriptor extended error and status field
 513 * @skb: particular skb to include time stamp
 514 *
 515 * If the time stamp is valid, convert it into the timecounter ns value
 516 * and store that result into the shhwtstamps structure which is passed
 517 * up the network stack.
 518 **/
 519static void e1000e_rx_hwtstamp(struct e1000_adapter *adapter, u32 status,
 520                               struct sk_buff *skb)
 521{
 522        struct e1000_hw *hw = &adapter->hw;
 523        u64 rxstmp;
 524
 525        if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP) ||
 526            !(status & E1000_RXDEXT_STATERR_TST) ||
 527            !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
 528                return;
 529
 530        /* The Rx time stamp registers contain the time stamp.  No other
 531         * received packet will be time stamped until the Rx time stamp
 532         * registers are read.  Because only one packet can be time stamped
 533         * at a time, the register values must belong to this packet and
 534         * therefore none of the other additional attributes need to be
 535         * compared.
 536         */
 537        rxstmp = (u64)er32(RXSTMPL);
 538        rxstmp |= (u64)er32(RXSTMPH) << 32;
 539        e1000e_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), rxstmp);
 540
 541        adapter->flags2 &= ~FLAG2_CHECK_RX_HWTSTAMP;
 542}
 543
 544/**
 545 * e1000_receive_skb - helper function to handle Rx indications
 546 * @adapter: board private structure
 547 * @staterr: descriptor extended error and status field as written by hardware
 548 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
 549 * @skb: pointer to sk_buff to be indicated to stack
 550 **/
 551static void e1000_receive_skb(struct e1000_adapter *adapter,
 552                              struct net_device *netdev, struct sk_buff *skb,
 553                              u32 staterr, __le16 vlan)
 554{
 555        u16 tag = le16_to_cpu(vlan);
 556
 557        e1000e_rx_hwtstamp(adapter, staterr, skb);
 558
 559        skb->protocol = eth_type_trans(skb, netdev);
 560
 561        if (staterr & E1000_RXD_STAT_VP)
 562                __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
 563
 564        napi_gro_receive(&adapter->napi, skb);
 565}
 566
 567/**
 568 * e1000_rx_checksum - Receive Checksum Offload
 569 * @adapter: board private structure
 570 * @status_err: receive descriptor status and error fields
 571 * @csum: receive descriptor csum field
 572 * @sk_buff: socket buffer with received data
 573 **/
 574static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
 575                              struct sk_buff *skb)
 576{
 577        u16 status = (u16)status_err;
 578        u8 errors = (u8)(status_err >> 24);
 579
 580        skb_checksum_none_assert(skb);
 581
 582        /* Rx checksum disabled */
 583        if (!(adapter->netdev->features & NETIF_F_RXCSUM))
 584                return;
 585
 586        /* Ignore Checksum bit is set */
 587        if (status & E1000_RXD_STAT_IXSM)
 588                return;
 589
 590        /* TCP/UDP checksum error bit or IP checksum error bit is set */
 591        if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) {
 592                /* let the stack verify checksum errors */
 593                adapter->hw_csum_err++;
 594                return;
 595        }
 596
 597        /* TCP/UDP Checksum has not been calculated */
 598        if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
 599                return;
 600
 601        /* It must be a TCP or UDP packet with a valid checksum */
 602        skb->ip_summed = CHECKSUM_UNNECESSARY;
 603        adapter->hw_csum_good++;
 604}
 605
 606static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
 607{
 608        struct e1000_adapter *adapter = rx_ring->adapter;
 609        struct e1000_hw *hw = &adapter->hw;
 610        s32 ret_val = __ew32_prepare(hw);
 611
 612        writel(i, rx_ring->tail);
 613
 614        if (unlikely(!ret_val && (i != readl(rx_ring->tail)))) {
 615                u32 rctl = er32(RCTL);
 616
 617                ew32(RCTL, rctl & ~E1000_RCTL_EN);
 618                e_err("ME firmware caused invalid RDT - resetting\n");
 619                schedule_work(&adapter->reset_task);
 620        }
 621}
 622
 623static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
 624{
 625        struct e1000_adapter *adapter = tx_ring->adapter;
 626        struct e1000_hw *hw = &adapter->hw;
 627        s32 ret_val = __ew32_prepare(hw);
 628
 629        writel(i, tx_ring->tail);
 630
 631        if (unlikely(!ret_val && (i != readl(tx_ring->tail)))) {
 632                u32 tctl = er32(TCTL);
 633
 634                ew32(TCTL, tctl & ~E1000_TCTL_EN);
 635                e_err("ME firmware caused invalid TDT - resetting\n");
 636                schedule_work(&adapter->reset_task);
 637        }
 638}
 639
 640/**
 641 * e1000_alloc_rx_buffers - Replace used receive buffers
 642 * @rx_ring: Rx descriptor ring
 643 **/
 644static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring,
 645                                   int cleaned_count, gfp_t gfp)
 646{
 647        struct e1000_adapter *adapter = rx_ring->adapter;
 648        struct net_device *netdev = adapter->netdev;
 649        struct pci_dev *pdev = adapter->pdev;
 650        union e1000_rx_desc_extended *rx_desc;
 651        struct e1000_buffer *buffer_info;
 652        struct sk_buff *skb;
 653        unsigned int i;
 654        unsigned int bufsz = adapter->rx_buffer_len;
 655
 656        i = rx_ring->next_to_use;
 657        buffer_info = &rx_ring->buffer_info[i];
 658
 659        while (cleaned_count--) {
 660                skb = buffer_info->skb;
 661                if (skb) {
 662                        skb_trim(skb, 0);
 663                        goto map_skb;
 664                }
 665
 666                skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
 667                if (!skb) {
 668                        /* Better luck next round */
 669                        adapter->alloc_rx_buff_failed++;
 670                        break;
 671                }
 672
 673                buffer_info->skb = skb;
 674map_skb:
 675                buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
 676                                                  adapter->rx_buffer_len,
 677                                                  DMA_FROM_DEVICE);
 678                if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 679                        dev_err(&pdev->dev, "Rx DMA map failed\n");
 680                        adapter->rx_dma_failed++;
 681                        break;
 682                }
 683
 684                rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 685                rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
 686
 687                if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
 688                        /* Force memory writes to complete before letting h/w
 689                         * know there are new descriptors to fetch.  (Only
 690                         * applicable for weak-ordered memory model archs,
 691                         * such as IA-64).
 692                         */
 693                        wmb();
 694                        if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 695                                e1000e_update_rdt_wa(rx_ring, i);
 696                        else
 697                                writel(i, rx_ring->tail);
 698                }
 699                i++;
 700                if (i == rx_ring->count)
 701                        i = 0;
 702                buffer_info = &rx_ring->buffer_info[i];
 703        }
 704
 705        rx_ring->next_to_use = i;
 706}
 707
 708/**
 709 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
 710 * @rx_ring: Rx descriptor ring
 711 **/
 712static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring,
 713                                      int cleaned_count, gfp_t gfp)
 714{
 715        struct e1000_adapter *adapter = rx_ring->adapter;
 716        struct net_device *netdev = adapter->netdev;
 717        struct pci_dev *pdev = adapter->pdev;
 718        union e1000_rx_desc_packet_split *rx_desc;
 719        struct e1000_buffer *buffer_info;
 720        struct e1000_ps_page *ps_page;
 721        struct sk_buff *skb;
 722        unsigned int i, j;
 723
 724        i = rx_ring->next_to_use;
 725        buffer_info = &rx_ring->buffer_info[i];
 726
 727        while (cleaned_count--) {
 728                rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
 729
 730                for (j = 0; j < PS_PAGE_BUFFERS; j++) {
 731                        ps_page = &buffer_info->ps_pages[j];
 732                        if (j >= adapter->rx_ps_pages) {
 733                                /* all unused desc entries get hw null ptr */
 734                                rx_desc->read.buffer_addr[j + 1] =
 735                                    ~cpu_to_le64(0);
 736                                continue;
 737                        }
 738                        if (!ps_page->page) {
 739                                ps_page->page = alloc_page(gfp);
 740                                if (!ps_page->page) {
 741                                        adapter->alloc_rx_buff_failed++;
 742                                        goto no_buffers;
 743                                }
 744                                ps_page->dma = dma_map_page(&pdev->dev,
 745                                                            ps_page->page,
 746                                                            0, PAGE_SIZE,
 747                                                            DMA_FROM_DEVICE);
 748                                if (dma_mapping_error(&pdev->dev,
 749                                                      ps_page->dma)) {
 750                                        dev_err(&adapter->pdev->dev,
 751                                                "Rx DMA page map failed\n");
 752                                        adapter->rx_dma_failed++;
 753                                        goto no_buffers;
 754                                }
 755                        }
 756                        /* Refresh the desc even if buffer_addrs
 757                         * didn't change because each write-back
 758                         * erases this info.
 759                         */
 760                        rx_desc->read.buffer_addr[j + 1] =
 761                            cpu_to_le64(ps_page->dma);
 762                }
 763
 764                skb = __netdev_alloc_skb_ip_align(netdev, adapter->rx_ps_bsize0,
 765                                                  gfp);
 766
 767                if (!skb) {
 768                        adapter->alloc_rx_buff_failed++;
 769                        break;
 770                }
 771
 772                buffer_info->skb = skb;
 773                buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
 774                                                  adapter->rx_ps_bsize0,
 775                                                  DMA_FROM_DEVICE);
 776                if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 777                        dev_err(&pdev->dev, "Rx DMA map failed\n");
 778                        adapter->rx_dma_failed++;
 779                        /* cleanup skb */
 780                        dev_kfree_skb_any(skb);
 781                        buffer_info->skb = NULL;
 782                        break;
 783                }
 784
 785                rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
 786
 787                if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
 788                        /* Force memory writes to complete before letting h/w
 789                         * know there are new descriptors to fetch.  (Only
 790                         * applicable for weak-ordered memory model archs,
 791                         * such as IA-64).
 792                         */
 793                        wmb();
 794                        if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 795                                e1000e_update_rdt_wa(rx_ring, i << 1);
 796                        else
 797                                writel(i << 1, rx_ring->tail);
 798                }
 799
 800                i++;
 801                if (i == rx_ring->count)
 802                        i = 0;
 803                buffer_info = &rx_ring->buffer_info[i];
 804        }
 805
 806no_buffers:
 807        rx_ring->next_to_use = i;
 808}
 809
 810/**
 811 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
 812 * @rx_ring: Rx descriptor ring
 813 * @cleaned_count: number of buffers to allocate this pass
 814 **/
 815
 816static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring,
 817                                         int cleaned_count, gfp_t gfp)
 818{
 819        struct e1000_adapter *adapter = rx_ring->adapter;
 820        struct net_device *netdev = adapter->netdev;
 821        struct pci_dev *pdev = adapter->pdev;
 822        union e1000_rx_desc_extended *rx_desc;
 823        struct e1000_buffer *buffer_info;
 824        struct sk_buff *skb;
 825        unsigned int i;
 826        unsigned int bufsz = 256 - 16;  /* for skb_reserve */
 827
 828        i = rx_ring->next_to_use;
 829        buffer_info = &rx_ring->buffer_info[i];
 830
 831        while (cleaned_count--) {
 832                skb = buffer_info->skb;
 833                if (skb) {
 834                        skb_trim(skb, 0);
 835                        goto check_page;
 836                }
 837
 838                skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
 839                if (unlikely(!skb)) {
 840                        /* Better luck next round */
 841                        adapter->alloc_rx_buff_failed++;
 842                        break;
 843                }
 844
 845                buffer_info->skb = skb;
 846check_page:
 847                /* allocate a new page if necessary */
 848                if (!buffer_info->page) {
 849                        buffer_info->page = alloc_page(gfp);
 850                        if (unlikely(!buffer_info->page)) {
 851                                adapter->alloc_rx_buff_failed++;
 852                                break;
 853                        }
 854                }
 855
 856                if (!buffer_info->dma) {
 857                        buffer_info->dma = dma_map_page(&pdev->dev,
 858                                                        buffer_info->page, 0,
 859                                                        PAGE_SIZE,
 860                                                        DMA_FROM_DEVICE);
 861                        if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 862                                adapter->alloc_rx_buff_failed++;
 863                                break;
 864                        }
 865                }
 866
 867                rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 868                rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
 869
 870                if (unlikely(++i == rx_ring->count))
 871                        i = 0;
 872                buffer_info = &rx_ring->buffer_info[i];
 873        }
 874
 875        if (likely(rx_ring->next_to_use != i)) {
 876                rx_ring->next_to_use = i;
 877                if (unlikely(i-- == 0))
 878                        i = (rx_ring->count - 1);
 879
 880                /* Force memory writes to complete before letting h/w
 881                 * know there are new descriptors to fetch.  (Only
 882                 * applicable for weak-ordered memory model archs,
 883                 * such as IA-64).
 884                 */
 885                wmb();
 886                if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 887                        e1000e_update_rdt_wa(rx_ring, i);
 888                else
 889                        writel(i, rx_ring->tail);
 890        }
 891}
 892
 893static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss,
 894                                 struct sk_buff *skb)
 895{
 896        if (netdev->features & NETIF_F_RXHASH)
 897                skb_set_hash(skb, le32_to_cpu(rss), PKT_HASH_TYPE_L3);
 898}
 899
 900/**
 901 * e1000_clean_rx_irq - Send received data up the network stack
 902 * @rx_ring: Rx descriptor ring
 903 *
 904 * the return value indicates whether actual cleaning was done, there
 905 * is no guarantee that everything was cleaned
 906 **/
 907static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done,
 908                               int work_to_do)
 909{
 910        struct e1000_adapter *adapter = rx_ring->adapter;
 911        struct net_device *netdev = adapter->netdev;
 912        struct pci_dev *pdev = adapter->pdev;
 913        struct e1000_hw *hw = &adapter->hw;
 914        union e1000_rx_desc_extended *rx_desc, *next_rxd;
 915        struct e1000_buffer *buffer_info, *next_buffer;
 916        u32 length, staterr;
 917        unsigned int i;
 918        int cleaned_count = 0;
 919        bool cleaned = false;
 920        unsigned int total_rx_bytes = 0, total_rx_packets = 0;
 921
 922        i = rx_ring->next_to_clean;
 923        rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 924        staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 925        buffer_info = &rx_ring->buffer_info[i];
 926
 927        while (staterr & E1000_RXD_STAT_DD) {
 928                struct sk_buff *skb;
 929
 930                if (*work_done >= work_to_do)
 931                        break;
 932                (*work_done)++;
 933                dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
 934
 935                skb = buffer_info->skb;
 936                buffer_info->skb = NULL;
 937
 938                prefetch(skb->data - NET_IP_ALIGN);
 939
 940                i++;
 941                if (i == rx_ring->count)
 942                        i = 0;
 943                next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
 944                prefetch(next_rxd);
 945
 946                next_buffer = &rx_ring->buffer_info[i];
 947
 948                cleaned = true;
 949                cleaned_count++;
 950                dma_unmap_single(&pdev->dev, buffer_info->dma,
 951                                 adapter->rx_buffer_len, DMA_FROM_DEVICE);
 952                buffer_info->dma = 0;
 953
 954                length = le16_to_cpu(rx_desc->wb.upper.length);
 955
 956                /* !EOP means multiple descriptors were used to store a single
 957                 * packet, if that's the case we need to toss it.  In fact, we
 958                 * need to toss every packet with the EOP bit clear and the
 959                 * next frame that _does_ have the EOP bit set, as it is by
 960                 * definition only a frame fragment
 961                 */
 962                if (unlikely(!(staterr & E1000_RXD_STAT_EOP)))
 963                        adapter->flags2 |= FLAG2_IS_DISCARDING;
 964
 965                if (adapter->flags2 & FLAG2_IS_DISCARDING) {
 966                        /* All receives must fit into a single buffer */
 967                        e_dbg("Receive packet consumed multiple buffers\n");
 968                        /* recycle */
 969                        buffer_info->skb = skb;
 970                        if (staterr & E1000_RXD_STAT_EOP)
 971                                adapter->flags2 &= ~FLAG2_IS_DISCARDING;
 972                        goto next_desc;
 973                }
 974
 975                if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
 976                             !(netdev->features & NETIF_F_RXALL))) {
 977                        /* recycle */
 978                        buffer_info->skb = skb;
 979                        goto next_desc;
 980                }
 981
 982                /* adjust length to remove Ethernet CRC */
 983                if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
 984                        /* If configured to store CRC, don't subtract FCS,
 985                         * but keep the FCS bytes out of the total_rx_bytes
 986                         * counter
 987                         */
 988                        if (netdev->features & NETIF_F_RXFCS)
 989                                total_rx_bytes -= 4;
 990                        else
 991                                length -= 4;
 992                }
 993
 994                total_rx_bytes += length;
 995                total_rx_packets++;
 996
 997                /* code added for copybreak, this should improve
 998                 * performance for small packets with large amounts
 999                 * of reassembly being done in the stack
1000                 */
1001                if (length < copybreak) {
1002                        struct sk_buff *new_skb =
1003                                napi_alloc_skb(&adapter->napi, length);
1004                        if (new_skb) {
1005                                skb_copy_to_linear_data_offset(new_skb,
1006                                                               -NET_IP_ALIGN,
1007                                                               (skb->data -
1008                                                                NET_IP_ALIGN),
1009                                                               (length +
1010                                                                NET_IP_ALIGN));
1011                                /* save the skb in buffer_info as good */
1012                                buffer_info->skb = skb;
1013                                skb = new_skb;
1014                        }
1015                        /* else just continue with the old one */
1016                }
1017                /* end copybreak code */
1018                skb_put(skb, length);
1019
1020                /* Receive Checksum Offload */
1021                e1000_rx_checksum(adapter, staterr, skb);
1022
1023                e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1024
1025                e1000_receive_skb(adapter, netdev, skb, staterr,
1026                                  rx_desc->wb.upper.vlan);
1027
1028next_desc:
1029                rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1030
1031                /* return some buffers to hardware, one at a time is too slow */
1032                if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1033                        adapter->alloc_rx_buf(rx_ring, cleaned_count,
1034                                              GFP_ATOMIC);
1035                        cleaned_count = 0;
1036                }
1037
1038                /* use prefetched values */
1039                rx_desc = next_rxd;
1040                buffer_info = next_buffer;
1041
1042                staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1043        }
1044        rx_ring->next_to_clean = i;
1045
1046        cleaned_count = e1000_desc_unused(rx_ring);
1047        if (cleaned_count)
1048                adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1049
1050        adapter->total_rx_bytes += total_rx_bytes;
1051        adapter->total_rx_packets += total_rx_packets;
1052        return cleaned;
1053}
1054
1055static void e1000_put_txbuf(struct e1000_ring *tx_ring,
1056                            struct e1000_buffer *buffer_info,
1057                            bool drop)
1058{
1059        struct e1000_adapter *adapter = tx_ring->adapter;
1060
1061        if (buffer_info->dma) {
1062                if (buffer_info->mapped_as_page)
1063                        dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1064                                       buffer_info->length, DMA_TO_DEVICE);
1065                else
1066                        dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
1067                                         buffer_info->length, DMA_TO_DEVICE);
1068                buffer_info->dma = 0;
1069        }
1070        if (buffer_info->skb) {
1071                if (drop)
1072                        dev_kfree_skb_any(buffer_info->skb);
1073                else
1074                        dev_consume_skb_any(buffer_info->skb);
1075                buffer_info->skb = NULL;
1076        }
1077        buffer_info->time_stamp = 0;
1078}
1079
1080static void e1000_print_hw_hang(struct work_struct *work)
1081{
1082        struct e1000_adapter *adapter = container_of(work,
1083                                                     struct e1000_adapter,
1084                                                     print_hang_task);
1085        struct net_device *netdev = adapter->netdev;
1086        struct e1000_ring *tx_ring = adapter->tx_ring;
1087        unsigned int i = tx_ring->next_to_clean;
1088        unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
1089        struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
1090        struct e1000_hw *hw = &adapter->hw;
1091        u16 phy_status, phy_1000t_status, phy_ext_status;
1092        u16 pci_status;
1093
1094        if (test_bit(__E1000_DOWN, &adapter->state))
1095                return;
1096
1097        if (!adapter->tx_hang_recheck && (adapter->flags2 & FLAG2_DMA_BURST)) {
1098                /* May be block on write-back, flush and detect again
1099                 * flush pending descriptor writebacks to memory
1100                 */
1101                ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1102                /* execute the writes immediately */
1103                e1e_flush();
1104                /* Due to rare timing issues, write to TIDV again to ensure
1105                 * the write is successful
1106                 */
1107                ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1108                /* execute the writes immediately */
1109                e1e_flush();
1110                adapter->tx_hang_recheck = true;
1111                return;
1112        }
1113        adapter->tx_hang_recheck = false;
1114
1115        if (er32(TDH(0)) == er32(TDT(0))) {
1116                e_dbg("false hang detected, ignoring\n");
1117                return;
1118        }
1119
1120        /* Real hang detected */
1121        netif_stop_queue(netdev);
1122
1123        e1e_rphy(hw, MII_BMSR, &phy_status);
1124        e1e_rphy(hw, MII_STAT1000, &phy_1000t_status);
1125        e1e_rphy(hw, MII_ESTATUS, &phy_ext_status);
1126
1127        pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
1128
1129        /* detected Hardware unit hang */
1130        e_err("Detected Hardware Unit Hang:\n"
1131              "  TDH                  <%x>\n"
1132              "  TDT                  <%x>\n"
1133              "  next_to_use          <%x>\n"
1134              "  next_to_clean        <%x>\n"
1135              "buffer_info[next_to_clean]:\n"
1136              "  time_stamp           <%lx>\n"
1137              "  next_to_watch        <%x>\n"
1138              "  jiffies              <%lx>\n"
1139              "  next_to_watch.status <%x>\n"
1140              "MAC Status             <%x>\n"
1141              "PHY Status             <%x>\n"
1142              "PHY 1000BASE-T Status  <%x>\n"
1143              "PHY Extended Status    <%x>\n"
1144              "PCI Status             <%x>\n",
1145              readl(tx_ring->head), readl(tx_ring->tail), tx_ring->next_to_use,
1146              tx_ring->next_to_clean, tx_ring->buffer_info[eop].time_stamp,
1147              eop, jiffies, eop_desc->upper.fields.status, er32(STATUS),
1148              phy_status, phy_1000t_status, phy_ext_status, pci_status);
1149
1150        e1000e_dump(adapter);
1151
1152        /* Suggest workaround for known h/w issue */
1153        if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE))
1154                e_err("Try turning off Tx pause (flow control) via ethtool\n");
1155}
1156
1157/**
1158 * e1000e_tx_hwtstamp_work - check for Tx time stamp
1159 * @work: pointer to work struct
1160 *
1161 * This work function polls the TSYNCTXCTL valid bit to determine when a
1162 * timestamp has been taken for the current stored skb.  The timestamp must
1163 * be for this skb because only one such packet is allowed in the queue.
1164 */
1165static void e1000e_tx_hwtstamp_work(struct work_struct *work)
1166{
1167        struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
1168                                                     tx_hwtstamp_work);
1169        struct e1000_hw *hw = &adapter->hw;
1170
1171        if (er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID) {
1172                struct sk_buff *skb = adapter->tx_hwtstamp_skb;
1173                struct skb_shared_hwtstamps shhwtstamps;
1174                u64 txstmp;
1175
1176                txstmp = er32(TXSTMPL);
1177                txstmp |= (u64)er32(TXSTMPH) << 32;
1178
1179                e1000e_systim_to_hwtstamp(adapter, &shhwtstamps, txstmp);
1180
1181                /* Clear the global tx_hwtstamp_skb pointer and force writes
1182                 * prior to notifying the stack of a Tx timestamp.
1183                 */
1184                adapter->tx_hwtstamp_skb = NULL;
1185                wmb(); /* force write prior to skb_tstamp_tx */
1186
1187                skb_tstamp_tx(skb, &shhwtstamps);
1188                dev_consume_skb_any(skb);
1189        } else if (time_after(jiffies, adapter->tx_hwtstamp_start
1190                              + adapter->tx_timeout_factor * HZ)) {
1191                dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1192                adapter->tx_hwtstamp_skb = NULL;
1193                adapter->tx_hwtstamp_timeouts++;
1194                e_warn("clearing Tx timestamp hang\n");
1195        } else {
1196                /* reschedule to check later */
1197                schedule_work(&adapter->tx_hwtstamp_work);
1198        }
1199}
1200
1201/**
1202 * e1000_clean_tx_irq - Reclaim resources after transmit completes
1203 * @tx_ring: Tx descriptor ring
1204 *
1205 * the return value indicates whether actual cleaning was done, there
1206 * is no guarantee that everything was cleaned
1207 **/
1208static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
1209{
1210        struct e1000_adapter *adapter = tx_ring->adapter;
1211        struct net_device *netdev = adapter->netdev;
1212        struct e1000_hw *hw = &adapter->hw;
1213        struct e1000_tx_desc *tx_desc, *eop_desc;
1214        struct e1000_buffer *buffer_info;
1215        unsigned int i, eop;
1216        unsigned int count = 0;
1217        unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1218        unsigned int bytes_compl = 0, pkts_compl = 0;
1219
1220        i = tx_ring->next_to_clean;
1221        eop = tx_ring->buffer_info[i].next_to_watch;
1222        eop_desc = E1000_TX_DESC(*tx_ring, eop);
1223
1224        while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1225               (count < tx_ring->count)) {
1226                bool cleaned = false;
1227
1228                dma_rmb();              /* read buffer_info after eop_desc */
1229                for (; !cleaned; count++) {
1230                        tx_desc = E1000_TX_DESC(*tx_ring, i);
1231                        buffer_info = &tx_ring->buffer_info[i];
1232                        cleaned = (i == eop);
1233
1234                        if (cleaned) {
1235                                total_tx_packets += buffer_info->segs;
1236                                total_tx_bytes += buffer_info->bytecount;
1237                                if (buffer_info->skb) {
1238                                        bytes_compl += buffer_info->skb->len;
1239                                        pkts_compl++;
1240                                }
1241                        }
1242
1243                        e1000_put_txbuf(tx_ring, buffer_info, false);
1244                        tx_desc->upper.data = 0;
1245
1246                        i++;
1247                        if (i == tx_ring->count)
1248                                i = 0;
1249                }
1250
1251                if (i == tx_ring->next_to_use)
1252                        break;
1253                eop = tx_ring->buffer_info[i].next_to_watch;
1254                eop_desc = E1000_TX_DESC(*tx_ring, eop);
1255        }
1256
1257        tx_ring->next_to_clean = i;
1258
1259        netdev_completed_queue(netdev, pkts_compl, bytes_compl);
1260
1261#define TX_WAKE_THRESHOLD 32
1262        if (count && netif_carrier_ok(netdev) &&
1263            e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1264                /* Make sure that anybody stopping the queue after this
1265                 * sees the new next_to_clean.
1266                 */
1267                smp_mb();
1268
1269                if (netif_queue_stopped(netdev) &&
1270                    !(test_bit(__E1000_DOWN, &adapter->state))) {
1271                        netif_wake_queue(netdev);
1272                        ++adapter->restart_queue;
1273                }
1274        }
1275
1276        if (adapter->detect_tx_hung) {
1277                /* Detect a transmit hang in hardware, this serializes the
1278                 * check with the clearing of time_stamp and movement of i
1279                 */
1280                adapter->detect_tx_hung = false;
1281                if (tx_ring->buffer_info[i].time_stamp &&
1282                    time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1283                               + (adapter->tx_timeout_factor * HZ)) &&
1284                    !(er32(STATUS) & E1000_STATUS_TXOFF))
1285                        schedule_work(&adapter->print_hang_task);
1286                else
1287                        adapter->tx_hang_recheck = false;
1288        }
1289        adapter->total_tx_bytes += total_tx_bytes;
1290        adapter->total_tx_packets += total_tx_packets;
1291        return count < tx_ring->count;
1292}
1293
1294/**
1295 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1296 * @rx_ring: Rx descriptor ring
1297 *
1298 * the return value indicates whether actual cleaning was done, there
1299 * is no guarantee that everything was cleaned
1300 **/
1301static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done,
1302                                  int work_to_do)
1303{
1304        struct e1000_adapter *adapter = rx_ring->adapter;
1305        struct e1000_hw *hw = &adapter->hw;
1306        union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1307        struct net_device *netdev = adapter->netdev;
1308        struct pci_dev *pdev = adapter->pdev;
1309        struct e1000_buffer *buffer_info, *next_buffer;
1310        struct e1000_ps_page *ps_page;
1311        struct sk_buff *skb;
1312        unsigned int i, j;
1313        u32 length, staterr;
1314        int cleaned_count = 0;
1315        bool cleaned = false;
1316        unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1317
1318        i = rx_ring->next_to_clean;
1319        rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1320        staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1321        buffer_info = &rx_ring->buffer_info[i];
1322
1323        while (staterr & E1000_RXD_STAT_DD) {
1324                if (*work_done >= work_to_do)
1325                        break;
1326                (*work_done)++;
1327                skb = buffer_info->skb;
1328                dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
1329
1330                /* in the packet split case this is header only */
1331                prefetch(skb->data - NET_IP_ALIGN);
1332
1333                i++;
1334                if (i == rx_ring->count)
1335                        i = 0;
1336                next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1337                prefetch(next_rxd);
1338
1339                next_buffer = &rx_ring->buffer_info[i];
1340
1341                cleaned = true;
1342                cleaned_count++;
1343                dma_unmap_single(&pdev->dev, buffer_info->dma,
1344                                 adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1345                buffer_info->dma = 0;
1346
1347                /* see !EOP comment in other Rx routine */
1348                if (!(staterr & E1000_RXD_STAT_EOP))
1349                        adapter->flags2 |= FLAG2_IS_DISCARDING;
1350
1351                if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1352                        e_dbg("Packet Split buffers didn't pick up the full packet\n");
1353                        dev_kfree_skb_irq(skb);
1354                        if (staterr & E1000_RXD_STAT_EOP)
1355                                adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1356                        goto next_desc;
1357                }
1358
1359                if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1360                             !(netdev->features & NETIF_F_RXALL))) {
1361                        dev_kfree_skb_irq(skb);
1362                        goto next_desc;
1363                }
1364
1365                length = le16_to_cpu(rx_desc->wb.middle.length0);
1366
1367                if (!length) {
1368                        e_dbg("Last part of the packet spanning multiple descriptors\n");
1369                        dev_kfree_skb_irq(skb);
1370                        goto next_desc;
1371                }
1372
1373                /* Good Receive */
1374                skb_put(skb, length);
1375
1376                {
1377                        /* this looks ugly, but it seems compiler issues make
1378                         * it more efficient than reusing j
1379                         */
1380                        int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1381
1382                        /* page alloc/put takes too long and effects small
1383                         * packet throughput, so unsplit small packets and
1384                         * save the alloc/put only valid in softirq (napi)
1385                         * context to call kmap_*
1386                         */
1387                        if (l1 && (l1 <= copybreak) &&
1388                            ((length + l1) <= adapter->rx_ps_bsize0)) {
1389                                u8 *vaddr;
1390
1391                                ps_page = &buffer_info->ps_pages[0];
1392
1393                                /* there is no documentation about how to call
1394                                 * kmap_atomic, so we can't hold the mapping
1395                                 * very long
1396                                 */
1397                                dma_sync_single_for_cpu(&pdev->dev,
1398                                                        ps_page->dma,
1399                                                        PAGE_SIZE,
1400                                                        DMA_FROM_DEVICE);
1401                                vaddr = kmap_atomic(ps_page->page);
1402                                memcpy(skb_tail_pointer(skb), vaddr, l1);
1403                                kunmap_atomic(vaddr);
1404                                dma_sync_single_for_device(&pdev->dev,
1405                                                           ps_page->dma,
1406                                                           PAGE_SIZE,
1407                                                           DMA_FROM_DEVICE);
1408
1409                                /* remove the CRC */
1410                                if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1411                                        if (!(netdev->features & NETIF_F_RXFCS))
1412                                                l1 -= 4;
1413                                }
1414
1415                                skb_put(skb, l1);
1416                                goto copydone;
1417                        }       /* if */
1418                }
1419
1420                for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1421                        length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1422                        if (!length)
1423                                break;
1424
1425                        ps_page = &buffer_info->ps_pages[j];
1426                        dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1427                                       DMA_FROM_DEVICE);
1428                        ps_page->dma = 0;
1429                        skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1430                        ps_page->page = NULL;
1431                        skb->len += length;
1432                        skb->data_len += length;
1433                        skb->truesize += PAGE_SIZE;
1434                }
1435
1436                /* strip the ethernet crc, problem is we're using pages now so
1437                 * this whole operation can get a little cpu intensive
1438                 */
1439                if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1440                        if (!(netdev->features & NETIF_F_RXFCS))
1441                                pskb_trim(skb, skb->len - 4);
1442                }
1443
1444copydone:
1445                total_rx_bytes += skb->len;
1446                total_rx_packets++;
1447
1448                e1000_rx_checksum(adapter, staterr, skb);
1449
1450                e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1451
1452                if (rx_desc->wb.upper.header_status &
1453                    cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1454                        adapter->rx_hdr_split++;
1455
1456                e1000_receive_skb(adapter, netdev, skb, staterr,
1457                                  rx_desc->wb.middle.vlan);
1458
1459next_desc:
1460                rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1461                buffer_info->skb = NULL;
1462
1463                /* return some buffers to hardware, one at a time is too slow */
1464                if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1465                        adapter->alloc_rx_buf(rx_ring, cleaned_count,
1466                                              GFP_ATOMIC);
1467                        cleaned_count = 0;
1468                }
1469
1470                /* use prefetched values */
1471                rx_desc = next_rxd;
1472                buffer_info = next_buffer;
1473
1474                staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1475        }
1476        rx_ring->next_to_clean = i;
1477
1478        cleaned_count = e1000_desc_unused(rx_ring);
1479        if (cleaned_count)
1480                adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1481
1482        adapter->total_rx_bytes += total_rx_bytes;
1483        adapter->total_rx_packets += total_rx_packets;
1484        return cleaned;
1485}
1486
1487/**
1488 * e1000_consume_page - helper function
1489 **/
1490static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1491                               u16 length)
1492{
1493        bi->page = NULL;
1494        skb->len += length;
1495        skb->data_len += length;
1496        skb->truesize += PAGE_SIZE;
1497}
1498
1499/**
1500 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1501 * @adapter: board private structure
1502 *
1503 * the return value indicates whether actual cleaning was done, there
1504 * is no guarantee that everything was cleaned
1505 **/
1506static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
1507                                     int work_to_do)
1508{
1509        struct e1000_adapter *adapter = rx_ring->adapter;
1510        struct net_device *netdev = adapter->netdev;
1511        struct pci_dev *pdev = adapter->pdev;
1512        union e1000_rx_desc_extended *rx_desc, *next_rxd;
1513        struct e1000_buffer *buffer_info, *next_buffer;
1514        u32 length, staterr;
1515        unsigned int i;
1516        int cleaned_count = 0;
1517        bool cleaned = false;
1518        unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1519        struct skb_shared_info *shinfo;
1520
1521        i = rx_ring->next_to_clean;
1522        rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1523        staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1524        buffer_info = &rx_ring->buffer_info[i];
1525
1526        while (staterr & E1000_RXD_STAT_DD) {
1527                struct sk_buff *skb;
1528
1529                if (*work_done >= work_to_do)
1530                        break;
1531                (*work_done)++;
1532                dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
1533
1534                skb = buffer_info->skb;
1535                buffer_info->skb = NULL;
1536
1537                ++i;
1538                if (i == rx_ring->count)
1539                        i = 0;
1540                next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
1541                prefetch(next_rxd);
1542
1543                next_buffer = &rx_ring->buffer_info[i];
1544
1545                cleaned = true;
1546                cleaned_count++;
1547                dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1548                               DMA_FROM_DEVICE);
1549                buffer_info->dma = 0;
1550
1551                length = le16_to_cpu(rx_desc->wb.upper.length);
1552
1553                /* errors is only valid for DD + EOP descriptors */
1554                if (unlikely((staterr & E1000_RXD_STAT_EOP) &&
1555                             ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1556                              !(netdev->features & NETIF_F_RXALL)))) {
1557                        /* recycle both page and skb */
1558                        buffer_info->skb = skb;
1559                        /* an error means any chain goes out the window too */
1560                        if (rx_ring->rx_skb_top)
1561                                dev_kfree_skb_irq(rx_ring->rx_skb_top);
1562                        rx_ring->rx_skb_top = NULL;
1563                        goto next_desc;
1564                }
1565#define rxtop (rx_ring->rx_skb_top)
1566                if (!(staterr & E1000_RXD_STAT_EOP)) {
1567                        /* this descriptor is only the beginning (or middle) */
1568                        if (!rxtop) {
1569                                /* this is the beginning of a chain */
1570                                rxtop = skb;
1571                                skb_fill_page_desc(rxtop, 0, buffer_info->page,
1572                                                   0, length);
1573                        } else {
1574                                /* this is the middle of a chain */
1575                                shinfo = skb_shinfo(rxtop);
1576                                skb_fill_page_desc(rxtop, shinfo->nr_frags,
1577                                                   buffer_info->page, 0,
1578                                                   length);
1579                                /* re-use the skb, only consumed the page */
1580                                buffer_info->skb = skb;
1581                        }
1582                        e1000_consume_page(buffer_info, rxtop, length);
1583                        goto next_desc;
1584                } else {
1585                        if (rxtop) {
1586                                /* end of the chain */
1587                                shinfo = skb_shinfo(rxtop);
1588                                skb_fill_page_desc(rxtop, shinfo->nr_frags,
1589                                                   buffer_info->page, 0,
1590                                                   length);
1591                                /* re-use the current skb, we only consumed the
1592                                 * page
1593                                 */
1594                                buffer_info->skb = skb;
1595                                skb = rxtop;
1596                                rxtop = NULL;
1597                                e1000_consume_page(buffer_info, skb, length);
1598                        } else {
1599                                /* no chain, got EOP, this buf is the packet
1600                                 * copybreak to save the put_page/alloc_page
1601                                 */
1602                                if (length <= copybreak &&
1603                                    skb_tailroom(skb) >= length) {
1604                                        u8 *vaddr;
1605                                        vaddr = kmap_atomic(buffer_info->page);
1606                                        memcpy(skb_tail_pointer(skb), vaddr,
1607                                               length);
1608                                        kunmap_atomic(vaddr);
1609                                        /* re-use the page, so don't erase
1610                                         * buffer_info->page
1611                                         */
1612                                        skb_put(skb, length);
1613                                } else {
1614                                        skb_fill_page_desc(skb, 0,
1615                                                           buffer_info->page, 0,
1616                                                           length);
1617                                        e1000_consume_page(buffer_info, skb,
1618                                                           length);
1619                                }
1620                        }
1621                }
1622
1623                /* Receive Checksum Offload */
1624                e1000_rx_checksum(adapter, staterr, skb);
1625
1626                e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1627
1628                /* probably a little skewed due to removing CRC */
1629                total_rx_bytes += skb->len;
1630                total_rx_packets++;
1631
1632                /* eth type trans needs skb->data to point to something */
1633                if (!pskb_may_pull(skb, ETH_HLEN)) {
1634                        e_err("pskb_may_pull failed.\n");
1635                        dev_kfree_skb_irq(skb);
1636                        goto next_desc;
1637                }
1638
1639                e1000_receive_skb(adapter, netdev, skb, staterr,
1640                                  rx_desc->wb.upper.vlan);
1641
1642next_desc:
1643                rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1644
1645                /* return some buffers to hardware, one at a time is too slow */
1646                if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1647                        adapter->alloc_rx_buf(rx_ring, cleaned_count,
1648                                              GFP_ATOMIC);
1649                        cleaned_count = 0;
1650                }
1651
1652                /* use prefetched values */
1653                rx_desc = next_rxd;
1654                buffer_info = next_buffer;
1655
1656                staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1657        }
1658        rx_ring->next_to_clean = i;
1659
1660        cleaned_count = e1000_desc_unused(rx_ring);
1661        if (cleaned_count)
1662                adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1663
1664        adapter->total_rx_bytes += total_rx_bytes;
1665        adapter->total_rx_packets += total_rx_packets;
1666        return cleaned;
1667}
1668
1669/**
1670 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1671 * @rx_ring: Rx descriptor ring
1672 **/
1673static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)
1674{
1675        struct e1000_adapter *adapter = rx_ring->adapter;
1676        struct e1000_buffer *buffer_info;
1677        struct e1000_ps_page *ps_page;
1678        struct pci_dev *pdev = adapter->pdev;
1679        unsigned int i, j;
1680
1681        /* Free all the Rx ring sk_buffs */
1682        for (i = 0; i < rx_ring->count; i++) {
1683                buffer_info = &rx_ring->buffer_info[i];
1684                if (buffer_info->dma) {
1685                        if (adapter->clean_rx == e1000_clean_rx_irq)
1686                                dma_unmap_single(&pdev->dev, buffer_info->dma,
1687                                                 adapter->rx_buffer_len,
1688                                                 DMA_FROM_DEVICE);
1689                        else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1690                                dma_unmap_page(&pdev->dev, buffer_info->dma,
1691                                               PAGE_SIZE, DMA_FROM_DEVICE);
1692                        else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1693                                dma_unmap_single(&pdev->dev, buffer_info->dma,
1694                                                 adapter->rx_ps_bsize0,
1695                                                 DMA_FROM_DEVICE);
1696                        buffer_info->dma = 0;
1697                }
1698
1699                if (buffer_info->page) {
1700                        put_page(buffer_info->page);
1701                        buffer_info->page = NULL;
1702                }
1703
1704                if (buffer_info->skb) {
1705                        dev_kfree_skb(buffer_info->skb);
1706                        buffer_info->skb = NULL;
1707                }
1708
1709                for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1710                        ps_page = &buffer_info->ps_pages[j];
1711                        if (!ps_page->page)
1712                                break;
1713                        dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1714                                       DMA_FROM_DEVICE);
1715                        ps_page->dma = 0;
1716                        put_page(ps_page->page);
1717                        ps_page->page = NULL;
1718                }
1719        }
1720
1721        /* there also may be some cached data from a chained receive */
1722        if (rx_ring->rx_skb_top) {
1723                dev_kfree_skb(rx_ring->rx_skb_top);
1724                rx_ring->rx_skb_top = NULL;
1725        }
1726
1727        /* Zero out the descriptor ring */
1728        memset(rx_ring->desc, 0, rx_ring->size);
1729
1730        rx_ring->next_to_clean = 0;
1731        rx_ring->next_to_use = 0;
1732        adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1733}
1734
1735static void e1000e_downshift_workaround(struct work_struct *work)
1736{
1737        struct e1000_adapter *adapter = container_of(work,
1738                                                     struct e1000_adapter,
1739                                                     downshift_task);
1740
1741        if (test_bit(__E1000_DOWN, &adapter->state))
1742                return;
1743
1744        e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1745}
1746
1747/**
1748 * e1000_intr_msi - Interrupt Handler
1749 * @irq: interrupt number
1750 * @data: pointer to a network interface device structure
1751 **/
1752static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data)
1753{
1754        struct net_device *netdev = data;
1755        struct e1000_adapter *adapter = netdev_priv(netdev);
1756        struct e1000_hw *hw = &adapter->hw;
1757        u32 icr = er32(ICR);
1758
1759        /* read ICR disables interrupts using IAM */
1760        if (icr & E1000_ICR_LSC) {
1761                hw->mac.get_link_status = true;
1762                /* ICH8 workaround-- Call gig speed drop workaround on cable
1763                 * disconnect (LSC) before accessing any PHY registers
1764                 */
1765                if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1766                    (!(er32(STATUS) & E1000_STATUS_LU)))
1767                        schedule_work(&adapter->downshift_task);
1768
1769                /* 80003ES2LAN workaround-- For packet buffer work-around on
1770                 * link down event; disable receives here in the ISR and reset
1771                 * adapter in watchdog
1772                 */
1773                if (netif_carrier_ok(netdev) &&
1774                    adapter->flags & FLAG_RX_NEEDS_RESTART) {
1775                        /* disable receives */
1776                        u32 rctl = er32(RCTL);
1777
1778                        ew32(RCTL, rctl & ~E1000_RCTL_EN);
1779                        adapter->flags |= FLAG_RESTART_NOW;
1780                }
1781                /* guard against interrupt when we're going down */
1782                if (!test_bit(__E1000_DOWN, &adapter->state))
1783                        mod_timer(&adapter->watchdog_timer, jiffies + 1);
1784        }
1785
1786        /* Reset on uncorrectable ECC error */
1787        if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) {
1788                u32 pbeccsts = er32(PBECCSTS);
1789
1790                adapter->corr_errors +=
1791                    pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1792                adapter->uncorr_errors +=
1793                    (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1794                    E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1795
1796                /* Do the reset outside of interrupt context */
1797                schedule_work(&adapter->reset_task);
1798
1799                /* return immediately since reset is imminent */
1800                return IRQ_HANDLED;
1801        }
1802
1803        if (napi_schedule_prep(&adapter->napi)) {
1804                adapter->total_tx_bytes = 0;
1805                adapter->total_tx_packets = 0;
1806                adapter->total_rx_bytes = 0;
1807                adapter->total_rx_packets = 0;
1808                __napi_schedule(&adapter->napi);
1809        }
1810
1811        return IRQ_HANDLED;
1812}
1813
1814/**
1815 * e1000_intr - Interrupt Handler
1816 * @irq: interrupt number
1817 * @data: pointer to a network interface device structure
1818 **/
1819static irqreturn_t e1000_intr(int __always_unused irq, void *data)
1820{
1821        struct net_device *netdev = data;
1822        struct e1000_adapter *adapter = netdev_priv(netdev);
1823        struct e1000_hw *hw = &adapter->hw;
1824        u32 rctl, icr = er32(ICR);
1825
1826        if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1827                return IRQ_NONE;        /* Not our interrupt */
1828
1829        /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1830         * not set, then the adapter didn't send an interrupt
1831         */
1832        if (!(icr & E1000_ICR_INT_ASSERTED))
1833                return IRQ_NONE;
1834
1835        /* Interrupt Auto-Mask...upon reading ICR,
1836         * interrupts are masked.  No need for the
1837         * IMC write
1838         */
1839
1840        if (icr & E1000_ICR_LSC) {
1841                hw->mac.get_link_status = true;
1842                /* ICH8 workaround-- Call gig speed drop workaround on cable
1843                 * disconnect (LSC) before accessing any PHY registers
1844                 */
1845                if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1846                    (!(er32(STATUS) & E1000_STATUS_LU)))
1847                        schedule_work(&adapter->downshift_task);
1848
1849                /* 80003ES2LAN workaround--
1850                 * For packet buffer work-around on link down event;
1851                 * disable receives here in the ISR and
1852                 * reset adapter in watchdog
1853                 */
1854                if (netif_carrier_ok(netdev) &&
1855                    (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1856                        /* disable receives */
1857                        rctl = er32(RCTL);
1858                        ew32(RCTL, rctl & ~E1000_RCTL_EN);
1859                        adapter->flags |= FLAG_RESTART_NOW;
1860                }
1861                /* guard against interrupt when we're going down */
1862                if (!test_bit(__E1000_DOWN, &adapter->state))
1863                        mod_timer(&adapter->watchdog_timer, jiffies + 1);
1864        }
1865
1866        /* Reset on uncorrectable ECC error */
1867        if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) {
1868                u32 pbeccsts = er32(PBECCSTS);
1869
1870                adapter->corr_errors +=
1871                    pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1872                adapter->uncorr_errors +=
1873                    (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1874                    E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1875
1876                /* Do the reset outside of interrupt context */
1877                schedule_work(&adapter->reset_task);
1878
1879                /* return immediately since reset is imminent */
1880                return IRQ_HANDLED;
1881        }
1882
1883        if (napi_schedule_prep(&adapter->napi)) {
1884                adapter->total_tx_bytes = 0;
1885                adapter->total_tx_packets = 0;
1886                adapter->total_rx_bytes = 0;
1887                adapter->total_rx_packets = 0;
1888                __napi_schedule(&adapter->napi);
1889        }
1890
1891        return IRQ_HANDLED;
1892}
1893
1894static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)
1895{
1896        struct net_device *netdev = data;
1897        struct e1000_adapter *adapter = netdev_priv(netdev);
1898        struct e1000_hw *hw = &adapter->hw;
1899        u32 icr = er32(ICR);
1900
1901        if (icr & adapter->eiac_mask)
1902                ew32(ICS, (icr & adapter->eiac_mask));
1903
1904        if (icr & E1000_ICR_LSC) {
1905                hw->mac.get_link_status = true;
1906                /* guard against interrupt when we're going down */
1907                if (!test_bit(__E1000_DOWN, &adapter->state))
1908                        mod_timer(&adapter->watchdog_timer, jiffies + 1);
1909        }
1910
1911        if (!test_bit(__E1000_DOWN, &adapter->state))
1912                ew32(IMS, E1000_IMS_OTHER | IMS_OTHER_MASK);
1913
1914        return IRQ_HANDLED;
1915}
1916
1917static irqreturn_t e1000_intr_msix_tx(int __always_unused irq, void *data)
1918{
1919        struct net_device *netdev = data;
1920        struct e1000_adapter *adapter = netdev_priv(netdev);
1921        struct e1000_hw *hw = &adapter->hw;
1922        struct e1000_ring *tx_ring = adapter->tx_ring;
1923
1924        adapter->total_tx_bytes = 0;
1925        adapter->total_tx_packets = 0;
1926
1927        if (!e1000_clean_tx_irq(tx_ring))
1928                /* Ring was not completely cleaned, so fire another interrupt */
1929                ew32(ICS, tx_ring->ims_val);
1930
1931        if (!test_bit(__E1000_DOWN, &adapter->state))
1932                ew32(IMS, adapter->tx_ring->ims_val);
1933
1934        return IRQ_HANDLED;
1935}
1936
1937static irqreturn_t e1000_intr_msix_rx(int __always_unused irq, void *data)
1938{
1939        struct net_device *netdev = data;
1940        struct e1000_adapter *adapter = netdev_priv(netdev);
1941        struct e1000_ring *rx_ring = adapter->rx_ring;
1942
1943        /* Write the ITR value calculated at the end of the
1944         * previous interrupt.
1945         */
1946        if (rx_ring->set_itr) {
1947                u32 itr = rx_ring->itr_val ?
1948                          1000000000 / (rx_ring->itr_val * 256) : 0;
1949
1950                writel(itr, rx_ring->itr_register);
1951                rx_ring->set_itr = 0;
1952        }
1953
1954        if (napi_schedule_prep(&adapter->napi)) {
1955                adapter->total_rx_bytes = 0;
1956                adapter->total_rx_packets = 0;
1957                __napi_schedule(&adapter->napi);
1958        }
1959        return IRQ_HANDLED;
1960}
1961
1962/**
1963 * e1000_configure_msix - Configure MSI-X hardware
1964 *
1965 * e1000_configure_msix sets up the hardware to properly
1966 * generate MSI-X interrupts.
1967 **/
1968static void e1000_configure_msix(struct e1000_adapter *adapter)
1969{
1970        struct e1000_hw *hw = &adapter->hw;
1971        struct e1000_ring *rx_ring = adapter->rx_ring;
1972        struct e1000_ring *tx_ring = adapter->tx_ring;
1973        int vector = 0;
1974        u32 ctrl_ext, ivar = 0;
1975
1976        adapter->eiac_mask = 0;
1977
1978        /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1979        if (hw->mac.type == e1000_82574) {
1980                u32 rfctl = er32(RFCTL);
1981
1982                rfctl |= E1000_RFCTL_ACK_DIS;
1983                ew32(RFCTL, rfctl);
1984        }
1985
1986        /* Configure Rx vector */
1987        rx_ring->ims_val = E1000_IMS_RXQ0;
1988        adapter->eiac_mask |= rx_ring->ims_val;
1989        if (rx_ring->itr_val)
1990                writel(1000000000 / (rx_ring->itr_val * 256),
1991                       rx_ring->itr_register);
1992        else
1993                writel(1, rx_ring->itr_register);
1994        ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1995
1996        /* Configure Tx vector */
1997        tx_ring->ims_val = E1000_IMS_TXQ0;
1998        vector++;
1999        if (tx_ring->itr_val)
2000                writel(1000000000 / (tx_ring->itr_val * 256),
2001                       tx_ring->itr_register);
2002        else
2003                writel(1, tx_ring->itr_register);
2004        adapter->eiac_mask |= tx_ring->ims_val;
2005        ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
2006
2007        /* set vector for Other Causes, e.g. link changes */
2008        vector++;
2009        ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
2010        if (rx_ring->itr_val)
2011                writel(1000000000 / (rx_ring->itr_val * 256),
2012                       hw->hw_addr + E1000_EITR_82574(vector));
2013        else
2014                writel(1, hw->hw_addr + E1000_EITR_82574(vector));
2015
2016        /* Cause Tx interrupts on every write back */
2017        ivar |= BIT(31);
2018
2019        ew32(IVAR, ivar);
2020
2021        /* enable MSI-X PBA support */
2022        ctrl_ext = er32(CTRL_EXT) & ~E1000_CTRL_EXT_IAME;
2023        ctrl_ext |= E1000_CTRL_EXT_PBA_CLR | E1000_CTRL_EXT_EIAME;
2024        ew32(CTRL_EXT, ctrl_ext);
2025        e1e_flush();
2026}
2027
2028void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
2029{
2030        if (adapter->msix_entries) {
2031                pci_disable_msix(adapter->pdev);
2032                kfree(adapter->msix_entries);
2033                adapter->msix_entries = NULL;
2034        } else if (adapter->flags & FLAG_MSI_ENABLED) {
2035                pci_disable_msi(adapter->pdev);
2036                adapter->flags &= ~FLAG_MSI_ENABLED;
2037        }
2038}
2039
2040/**
2041 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
2042 *
2043 * Attempt to configure interrupts using the best available
2044 * capabilities of the hardware and kernel.
2045 **/
2046void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
2047{
2048        int err;
2049        int i;
2050
2051        switch (adapter->int_mode) {
2052        case E1000E_INT_MODE_MSIX:
2053                if (adapter->flags & FLAG_HAS_MSIX) {
2054                        adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
2055                        adapter->msix_entries = kcalloc(adapter->num_vectors,
2056                                                        sizeof(struct
2057                                                               msix_entry),
2058                                                        GFP_KERNEL);
2059                        if (adapter->msix_entries) {
2060                                struct e1000_adapter *a = adapter;
2061
2062                                for (i = 0; i < adapter->num_vectors; i++)
2063                                        adapter->msix_entries[i].entry = i;
2064
2065                                err = pci_enable_msix_range(a->pdev,
2066                                                            a->msix_entries,
2067                                                            a->num_vectors,
2068                                                            a->num_vectors);
2069                                if (err > 0)
2070                                        return;
2071                        }
2072                        /* MSI-X failed, so fall through and try MSI */
2073                        e_err("Failed to initialize MSI-X interrupts.  Falling back to MSI interrupts.\n");
2074                        e1000e_reset_interrupt_capability(adapter);
2075                }
2076                adapter->int_mode = E1000E_INT_MODE_MSI;
2077                /* Fall through */
2078        case E1000E_INT_MODE_MSI:
2079                if (!pci_enable_msi(adapter->pdev)) {
2080                        adapter->flags |= FLAG_MSI_ENABLED;
2081                } else {
2082                        adapter->int_mode = E1000E_INT_MODE_LEGACY;
2083                        e_err("Failed to initialize MSI interrupts.  Falling back to legacy interrupts.\n");
2084                }
2085                /* Fall through */
2086        case E1000E_INT_MODE_LEGACY:
2087                /* Don't do anything; this is the system default */
2088                break;
2089        }
2090
2091        /* store the number of vectors being used */
2092        adapter->num_vectors = 1;
2093}
2094
2095/**
2096 * e1000_request_msix - Initialize MSI-X interrupts
2097 *
2098 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
2099 * kernel.
2100 **/
2101static int e1000_request_msix(struct e1000_adapter *adapter)
2102{
2103        struct net_device *netdev = adapter->netdev;
2104        int err = 0, vector = 0;
2105
2106        if (strlen(netdev->name) < (IFNAMSIZ - 5))
2107                snprintf(adapter->rx_ring->name,
2108                         sizeof(adapter->rx_ring->name) - 1,
2109                         "%.14s-rx-0", netdev->name);
2110        else
2111                memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
2112        err = request_irq(adapter->msix_entries[vector].vector,
2113                          e1000_intr_msix_rx, 0, adapter->rx_ring->name,
2114                          netdev);
2115        if (err)
2116                return err;
2117        adapter->rx_ring->itr_register = adapter->hw.hw_addr +
2118            E1000_EITR_82574(vector);
2119        adapter->rx_ring->itr_val = adapter->itr;
2120        vector++;
2121
2122        if (strlen(netdev->name) < (IFNAMSIZ - 5))
2123                snprintf(adapter->tx_ring->name,
2124                         sizeof(adapter->tx_ring->name) - 1,
2125                         "%.14s-tx-0", netdev->name);
2126        else
2127                memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
2128        err = request_irq(adapter->msix_entries[vector].vector,
2129                          e1000_intr_msix_tx, 0, adapter->tx_ring->name,
2130                          netdev);
2131        if (err)
2132                return err;
2133        adapter->tx_ring->itr_register = adapter->hw.hw_addr +
2134            E1000_EITR_82574(vector);
2135        adapter->tx_ring->itr_val = adapter->itr;
2136        vector++;
2137
2138        err = request_irq(adapter->msix_entries[vector].vector,
2139                          e1000_msix_other, 0, netdev->name, netdev);
2140        if (err)
2141                return err;
2142
2143        e1000_configure_msix(adapter);
2144
2145        return 0;
2146}
2147
2148/**
2149 * e1000_request_irq - initialize interrupts
2150 *
2151 * Attempts to configure interrupts using the best available
2152 * capabilities of the hardware and kernel.
2153 **/
2154static int e1000_request_irq(struct e1000_adapter *adapter)
2155{
2156        struct net_device *netdev = adapter->netdev;
2157        int err;
2158
2159        if (adapter->msix_entries) {
2160                err = e1000_request_msix(adapter);
2161                if (!err)
2162                        return err;
2163                /* fall back to MSI */
2164                e1000e_reset_interrupt_capability(adapter);
2165                adapter->int_mode = E1000E_INT_MODE_MSI;
2166                e1000e_set_interrupt_capability(adapter);
2167        }
2168        if (adapter->flags & FLAG_MSI_ENABLED) {
2169                err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
2170                                  netdev->name, netdev);
2171                if (!err)
2172                        return err;
2173
2174                /* fall back to legacy interrupt */
2175                e1000e_reset_interrupt_capability(adapter);
2176                adapter->int_mode = E1000E_INT_MODE_LEGACY;
2177        }
2178
2179        err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
2180                          netdev->name, netdev);
2181        if (err)
2182                e_err("Unable to allocate interrupt, Error: %d\n", err);
2183
2184        return err;
2185}
2186
2187static void e1000_free_irq(struct e1000_adapter *adapter)
2188{
2189        struct net_device *netdev = adapter->netdev;
2190
2191        if (adapter->msix_entries) {
2192                int vector = 0;
2193
2194                free_irq(adapter->msix_entries[vector].vector, netdev);
2195                vector++;
2196
2197                free_irq(adapter->msix_entries[vector].vector, netdev);
2198                vector++;
2199
2200                /* Other Causes interrupt vector */
2201                free_irq(adapter->msix_entries[vector].vector, netdev);
2202                return;
2203        }
2204
2205        free_irq(adapter->pdev->irq, netdev);
2206}
2207
2208/**
2209 * e1000_irq_disable - Mask off interrupt generation on the NIC
2210 **/
2211static void e1000_irq_disable(struct e1000_adapter *adapter)
2212{
2213        struct e1000_hw *hw = &adapter->hw;
2214
2215        ew32(IMC, ~0);
2216        if (adapter->msix_entries)
2217                ew32(EIAC_82574, 0);
2218        e1e_flush();
2219
2220        if (adapter->msix_entries) {
2221                int i;
2222
2223                for (i = 0; i < adapter->num_vectors; i++)
2224                        synchronize_irq(adapter->msix_entries[i].vector);
2225        } else {
2226                synchronize_irq(adapter->pdev->irq);
2227        }
2228}
2229
2230/**
2231 * e1000_irq_enable - Enable default interrupt generation settings
2232 **/
2233static void e1000_irq_enable(struct e1000_adapter *adapter)
2234{
2235        struct e1000_hw *hw = &adapter->hw;
2236
2237        if (adapter->msix_entries) {
2238                ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2239                ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER |
2240                     IMS_OTHER_MASK);
2241        } else if (hw->mac.type >= e1000_pch_lpt) {
2242                ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);
2243        } else {
2244                ew32(IMS, IMS_ENABLE_MASK);
2245        }
2246        e1e_flush();
2247}
2248
2249/**
2250 * e1000e_get_hw_control - get control of the h/w from f/w
2251 * @adapter: address of board private structure
2252 *
2253 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2254 * For ASF and Pass Through versions of f/w this means that
2255 * the driver is loaded. For AMT version (only with 82573)
2256 * of the f/w this means that the network i/f is open.
2257 **/
2258void e1000e_get_hw_control(struct e1000_adapter *adapter)
2259{
2260        struct e1000_hw *hw = &adapter->hw;
2261        u32 ctrl_ext;
2262        u32 swsm;
2263
2264        /* Let firmware know the driver has taken over */
2265        if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2266                swsm = er32(SWSM);
2267                ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2268        } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2269                ctrl_ext = er32(CTRL_EXT);
2270                ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2271        }
2272}
2273
2274/**
2275 * e1000e_release_hw_control - release control of the h/w to f/w
2276 * @adapter: address of board private structure
2277 *
2278 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2279 * For ASF and Pass Through versions of f/w this means that the
2280 * driver is no longer loaded. For AMT version (only with 82573) i
2281 * of the f/w this means that the network i/f is closed.
2282 *
2283 **/
2284void e1000e_release_hw_control(struct e1000_adapter *adapter)
2285{
2286        struct e1000_hw *hw = &adapter->hw;
2287        u32 ctrl_ext;
2288        u32 swsm;
2289
2290        /* Let firmware taken over control of h/w */
2291        if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2292                swsm = er32(SWSM);
2293                ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2294        } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2295                ctrl_ext = er32(CTRL_EXT);
2296                ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2297        }
2298}
2299
2300/**
2301 * e1000_alloc_ring_dma - allocate memory for a ring structure
2302 **/
2303static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2304                                struct e1000_ring *ring)
2305{
2306        struct pci_dev *pdev = adapter->pdev;
2307
2308        ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2309                                        GFP_KERNEL);
2310        if (!ring->desc)
2311                return -ENOMEM;
2312
2313        return 0;
2314}
2315
2316/**
2317 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2318 * @tx_ring: Tx descriptor ring
2319 *
2320 * Return 0 on success, negative on failure
2321 **/
2322int e1000e_setup_tx_resources(struct e1000_ring *tx_ring)
2323{
2324        struct e1000_adapter *adapter = tx_ring->adapter;
2325        int err = -ENOMEM, size;
2326
2327        size = sizeof(struct e1000_buffer) * tx_ring->count;
2328        tx_ring->buffer_info = vzalloc(size);
2329        if (!tx_ring->buffer_info)
2330                goto err;
2331
2332        /* round up to nearest 4K */
2333        tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2334        tx_ring->size = ALIGN(tx_ring->size, 4096);
2335
2336        err = e1000_alloc_ring_dma(adapter, tx_ring);
2337        if (err)
2338                goto err;
2339
2340        tx_ring->next_to_use = 0;
2341        tx_ring->next_to_clean = 0;
2342
2343        return 0;
2344err:
2345        vfree(tx_ring->buffer_info);
2346        e_err("Unable to allocate memory for the transmit descriptor ring\n");
2347        return err;
2348}
2349
2350/**
2351 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2352 * @rx_ring: Rx descriptor ring
2353 *
2354 * Returns 0 on success, negative on failure
2355 **/
2356int e1000e_setup_rx_resources(struct e1000_ring *rx_ring)
2357{
2358        struct e1000_adapter *adapter = rx_ring->adapter;
2359        struct e1000_buffer *buffer_info;
2360        int i, size, desc_len, err = -ENOMEM;
2361
2362        size = sizeof(struct e1000_buffer) * rx_ring->count;
2363        rx_ring->buffer_info = vzalloc(size);
2364        if (!rx_ring->buffer_info)
2365                goto err;
2366
2367        for (i = 0; i < rx_ring->count; i++) {
2368                buffer_info = &rx_ring->buffer_info[i];
2369                buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2370                                                sizeof(struct e1000_ps_page),
2371                                                GFP_KERNEL);
2372                if (!buffer_info->ps_pages)
2373                        goto err_pages;
2374        }
2375
2376        desc_len = sizeof(union e1000_rx_desc_packet_split);
2377
2378        /* Round up to nearest 4K */
2379        rx_ring->size = rx_ring->count * desc_len;
2380        rx_ring->size = ALIGN(rx_ring->size, 4096);
2381
2382        err = e1000_alloc_ring_dma(adapter, rx_ring);
2383        if (err)
2384                goto err_pages;
2385
2386        rx_ring->next_to_clean = 0;
2387        rx_ring->next_to_use = 0;
2388        rx_ring->rx_skb_top = NULL;
2389
2390        return 0;
2391
2392err_pages:
2393        for (i = 0; i < rx_ring->count; i++) {
2394                buffer_info = &rx_ring->buffer_info[i];
2395                kfree(buffer_info->ps_pages);
2396        }
2397err:
2398        vfree(rx_ring->buffer_info);
2399        e_err("Unable to allocate memory for the receive descriptor ring\n");
2400        return err;
2401}
2402
2403/**
2404 * e1000_clean_tx_ring - Free Tx Buffers
2405 * @tx_ring: Tx descriptor ring
2406 **/
2407static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)
2408{
2409        struct e1000_adapter *adapter = tx_ring->adapter;
2410        struct e1000_buffer *buffer_info;
2411        unsigned long size;
2412        unsigned int i;
2413
2414        for (i = 0; i < tx_ring->count; i++) {
2415                buffer_info = &tx_ring->buffer_info[i];
2416                e1000_put_txbuf(tx_ring, buffer_info, false);
2417        }
2418
2419        netdev_reset_queue(adapter->netdev);
2420        size = sizeof(struct e1000_buffer) * tx_ring->count;
2421        memset(tx_ring->buffer_info, 0, size);
2422
2423        memset(tx_ring->desc, 0, tx_ring->size);
2424
2425        tx_ring->next_to_use = 0;
2426        tx_ring->next_to_clean = 0;
2427}
2428
2429/**
2430 * e1000e_free_tx_resources - Free Tx Resources per Queue
2431 * @tx_ring: Tx descriptor ring
2432 *
2433 * Free all transmit software resources
2434 **/
2435void e1000e_free_tx_resources(struct e1000_ring *tx_ring)
2436{
2437        struct e1000_adapter *adapter = tx_ring->adapter;
2438        struct pci_dev *pdev = adapter->pdev;
2439
2440        e1000_clean_tx_ring(tx_ring);
2441
2442        vfree(tx_ring->buffer_info);
2443        tx_ring->buffer_info = NULL;
2444
2445        dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2446                          tx_ring->dma);
2447        tx_ring->desc = NULL;
2448}
2449
2450/**
2451 * e1000e_free_rx_resources - Free Rx Resources
2452 * @rx_ring: Rx descriptor ring
2453 *
2454 * Free all receive software resources
2455 **/
2456void e1000e_free_rx_resources(struct e1000_ring *rx_ring)
2457{
2458        struct e1000_adapter *adapter = rx_ring->adapter;
2459        struct pci_dev *pdev = adapter->pdev;
2460        int i;
2461
2462        e1000_clean_rx_ring(rx_ring);
2463
2464        for (i = 0; i < rx_ring->count; i++)
2465                kfree(rx_ring->buffer_info[i].ps_pages);
2466
2467        vfree(rx_ring->buffer_info);
2468        rx_ring->buffer_info = NULL;
2469
2470        dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2471                          rx_ring->dma);
2472        rx_ring->desc = NULL;
2473}
2474
2475/**
2476 * e1000_update_itr - update the dynamic ITR value based on statistics
2477 * @adapter: pointer to adapter
2478 * @itr_setting: current adapter->itr
2479 * @packets: the number of packets during this measurement interval
2480 * @bytes: the number of bytes during this measurement interval
2481 *
2482 *      Stores a new ITR value based on packets and byte
2483 *      counts during the last interrupt.  The advantage of per interrupt
2484 *      computation is faster updates and more accurate ITR for the current
2485 *      traffic pattern.  Constants in this function were computed
2486 *      based on theoretical maximum wire speed and thresholds were set based
2487 *      on testing data as well as attempting to minimize response time
2488 *      while increasing bulk throughput.  This functionality is controlled
2489 *      by the InterruptThrottleRate module parameter.
2490 **/
2491static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes)
2492{
2493        unsigned int retval = itr_setting;
2494
2495        if (packets == 0)
2496                return itr_setting;
2497
2498        switch (itr_setting) {
2499        case lowest_latency:
2500                /* handle TSO and jumbo frames */
2501                if (bytes / packets > 8000)
2502                        retval = bulk_latency;
2503                else if ((packets < 5) && (bytes > 512))
2504                        retval = low_latency;
2505                break;
2506        case low_latency:       /* 50 usec aka 20000 ints/s */
2507                if (bytes > 10000) {
2508                        /* this if handles the TSO accounting */
2509                        if (bytes / packets > 8000)
2510                                retval = bulk_latency;
2511                        else if ((packets < 10) || ((bytes / packets) > 1200))
2512                                retval = bulk_latency;
2513                        else if ((packets > 35))
2514                                retval = lowest_latency;
2515                } else if (bytes / packets > 2000) {
2516                        retval = bulk_latency;
2517                } else if (packets <= 2 && bytes < 512) {
2518                        retval = lowest_latency;
2519                }
2520                break;
2521        case bulk_latency:      /* 250 usec aka 4000 ints/s */
2522                if (bytes > 25000) {
2523                        if (packets > 35)
2524                                retval = low_latency;
2525                } else if (bytes < 6000) {
2526                        retval = low_latency;
2527                }
2528                break;
2529        }
2530
2531        return retval;
2532}
2533
2534static void e1000_set_itr(struct e1000_adapter *adapter)
2535{
2536        u16 current_itr;
2537        u32 new_itr = adapter->itr;
2538
2539        /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2540        if (adapter->link_speed != SPEED_1000) {
2541                current_itr = 0;
2542                new_itr = 4000;
2543                goto set_itr_now;
2544        }
2545
2546        if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2547                new_itr = 0;
2548                goto set_itr_now;
2549        }
2550
2551        adapter->tx_itr = e1000_update_itr(adapter->tx_itr,
2552                                           adapter->total_tx_packets,
2553                                           adapter->total_tx_bytes);
2554        /* conservative mode (itr 3) eliminates the lowest_latency setting */
2555        if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2556                adapter->tx_itr = low_latency;
2557
2558        adapter->rx_itr = e1000_update_itr(adapter->rx_itr,
2559                                           adapter->total_rx_packets,
2560                                           adapter->total_rx_bytes);
2561        /* conservative mode (itr 3) eliminates the lowest_latency setting */
2562        if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2563                adapter->rx_itr = low_latency;
2564
2565        current_itr = max(adapter->rx_itr, adapter->tx_itr);
2566
2567        /* counts and packets in update_itr are dependent on these numbers */
2568        switch (current_itr) {
2569        case lowest_latency:
2570                new_itr = 70000;
2571                break;
2572        case low_latency:
2573                new_itr = 20000;        /* aka hwitr = ~200 */
2574                break;
2575        case bulk_latency:
2576                new_itr = 4000;
2577                break;
2578        default:
2579                break;
2580        }
2581
2582set_itr_now:
2583        if (new_itr != adapter->itr) {
2584                /* this attempts to bias the interrupt rate towards Bulk
2585                 * by adding intermediate steps when interrupt rate is
2586                 * increasing
2587                 */
2588                new_itr = new_itr > adapter->itr ?
2589                    min(adapter->itr + (new_itr >> 2), new_itr) : new_itr;
2590                adapter->itr = new_itr;
2591                adapter->rx_ring->itr_val = new_itr;
2592                if (adapter->msix_entries)
2593                        adapter->rx_ring->set_itr = 1;
2594                else
2595                        e1000e_write_itr(adapter, new_itr);
2596        }
2597}
2598
2599/**
2600 * e1000e_write_itr - write the ITR value to the appropriate registers
2601 * @adapter: address of board private structure
2602 * @itr: new ITR value to program
2603 *
2604 * e1000e_write_itr determines if the adapter is in MSI-X mode
2605 * and, if so, writes the EITR registers with the ITR value.
2606 * Otherwise, it writes the ITR value into the ITR register.
2607 **/
2608void e1000e_write_itr(struct e1000_adapter *adapter, u32 itr)
2609{
2610        struct e1000_hw *hw = &adapter->hw;
2611        u32 new_itr = itr ? 1000000000 / (itr * 256) : 0;
2612
2613        if (adapter->msix_entries) {
2614                int vector;
2615
2616                for (vector = 0; vector < adapter->num_vectors; vector++)
2617                        writel(new_itr, hw->hw_addr + E1000_EITR_82574(vector));
2618        } else {
2619                ew32(ITR, new_itr);
2620        }
2621}
2622
2623/**
2624 * e1000_alloc_queues - Allocate memory for all rings
2625 * @adapter: board private structure to initialize
2626 **/
2627static int e1000_alloc_queues(struct e1000_adapter *adapter)
2628{
2629        int size = sizeof(struct e1000_ring);
2630
2631        adapter->tx_ring = kzalloc(size, GFP_KERNEL);
2632        if (!adapter->tx_ring)
2633                goto err;
2634        adapter->tx_ring->count = adapter->tx_ring_count;
2635        adapter->tx_ring->adapter = adapter;
2636
2637        adapter->rx_ring = kzalloc(size, GFP_KERNEL);
2638        if (!adapter->rx_ring)
2639                goto err;
2640        adapter->rx_ring->count = adapter->rx_ring_count;
2641        adapter->rx_ring->adapter = adapter;
2642
2643        return 0;
2644err:
2645        e_err("Unable to allocate memory for queues\n");
2646        kfree(adapter->rx_ring);
2647        kfree(adapter->tx_ring);
2648        return -ENOMEM;
2649}
2650
2651/**
2652 * e1000e_poll - NAPI Rx polling callback
2653 * @napi: struct associated with this polling callback
2654 * @budget: number of packets driver is allowed to process this poll
2655 **/
2656static int e1000e_poll(struct napi_struct *napi, int budget)
2657{
2658        struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
2659                                                     napi);
2660        struct e1000_hw *hw = &adapter->hw;
2661        struct net_device *poll_dev = adapter->netdev;
2662        int tx_cleaned = 1, work_done = 0;
2663
2664        adapter = netdev_priv(poll_dev);
2665
2666        if (!adapter->msix_entries ||
2667            (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2668                tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
2669
2670        adapter->clean_rx(adapter->rx_ring, &work_done, budget);
2671
2672        if (!tx_cleaned || work_done == budget)
2673                return budget;
2674
2675        /* Exit the polling mode, but don't re-enable interrupts if stack might
2676         * poll us due to busy-polling
2677         */
2678        if (likely(napi_complete_done(napi, work_done))) {
2679                if (adapter->itr_setting & 3)
2680                        e1000_set_itr(adapter);
2681                if (!test_bit(__E1000_DOWN, &adapter->state)) {
2682                        if (adapter->msix_entries)
2683                                ew32(IMS, adapter->rx_ring->ims_val);
2684                        else
2685                                e1000_irq_enable(adapter);
2686                }
2687        }
2688
2689        return work_done;
2690}
2691
2692static int e1000_vlan_rx_add_vid(struct net_device *netdev,
2693                                 __always_unused __be16 proto, u16 vid)
2694{
2695        struct e1000_adapter *adapter = netdev_priv(netdev);
2696        struct e1000_hw *hw = &adapter->hw;
2697        u32 vfta, index;
2698
2699        /* don't update vlan cookie if already programmed */
2700        if ((adapter->hw.mng_cookie.status &
2701             E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2702            (vid == adapter->mng_vlan_id))
2703                return 0;
2704
2705        /* add VID to filter table */
2706        if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2707                index = (vid >> 5) & 0x7F;
2708                vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2709                vfta |= BIT((vid & 0x1F));
2710                hw->mac.ops.write_vfta(hw, index, vfta);
2711        }
2712
2713        set_bit(vid, adapter->active_vlans);
2714
2715        return 0;
2716}
2717
2718static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
2719                                  __always_unused __be16 proto, u16 vid)
2720{
2721        struct e1000_adapter *adapter = netdev_priv(netdev);
2722        struct e1000_hw *hw = &adapter->hw;
2723        u32 vfta, index;
2724
2725        if ((adapter->hw.mng_cookie.status &
2726             E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2727            (vid == adapter->mng_vlan_id)) {
2728                /* release control to f/w */
2729                e1000e_release_hw_control(adapter);
2730                return 0;
2731        }
2732
2733        /* remove VID from filter table */
2734        if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2735                index = (vid >> 5) & 0x7F;
2736                vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2737                vfta &= ~BIT((vid & 0x1F));
2738                hw->mac.ops.write_vfta(hw, index, vfta);
2739        }
2740
2741        clear_bit(vid, adapter->active_vlans);
2742
2743        return 0;
2744}
2745
2746/**
2747 * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2748 * @adapter: board private structure to initialize
2749 **/
2750static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
2751{
2752        struct net_device *netdev = adapter->netdev;
2753        struct e1000_hw *hw = &adapter->hw;
2754        u32 rctl;
2755
2756        if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2757                /* disable VLAN receive filtering */
2758                rctl = er32(RCTL);
2759                rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2760                ew32(RCTL, rctl);
2761
2762                if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2763                        e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
2764                                               adapter->mng_vlan_id);
2765                        adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2766                }
2767        }
2768}
2769
2770/**
2771 * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2772 * @adapter: board private structure to initialize
2773 **/
2774static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2775{
2776        struct e1000_hw *hw = &adapter->hw;
2777        u32 rctl;
2778
2779        if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2780                /* enable VLAN receive filtering */
2781                rctl = er32(RCTL);
2782                rctl |= E1000_RCTL_VFE;
2783                rctl &= ~E1000_RCTL_CFIEN;
2784                ew32(RCTL, rctl);
2785        }
2786}
2787
2788/**
2789 * e1000e_vlan_strip_disable - helper to disable HW VLAN stripping
2790 * @adapter: board private structure to initialize
2791 **/
2792static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
2793{
2794        struct e1000_hw *hw = &adapter->hw;
2795        u32 ctrl;
2796
2797        /* disable VLAN tag insert/strip */
2798        ctrl = er32(CTRL);
2799        ctrl &= ~E1000_CTRL_VME;
2800        ew32(CTRL, ctrl);
2801}
2802
2803/**
2804 * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2805 * @adapter: board private structure to initialize
2806 **/
2807static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2808{
2809        struct e1000_hw *hw = &adapter->hw;
2810        u32 ctrl;
2811
2812        /* enable VLAN tag insert/strip */
2813        ctrl = er32(CTRL);
2814        ctrl |= E1000_CTRL_VME;
2815        ew32(CTRL, ctrl);
2816}
2817
2818static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2819{
2820        struct net_device *netdev = adapter->netdev;
2821        u16 vid = adapter->hw.mng_cookie.vlan_id;
2822        u16 old_vid = adapter->mng_vlan_id;
2823
2824        if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2825                e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
2826                adapter->mng_vlan_id = vid;
2827        }
2828
2829        if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2830                e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), old_vid);
2831}
2832
2833static void e1000_restore_vlan(struct e1000_adapter *adapter)
2834{
2835        u16 vid;
2836
2837        e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
2838
2839        for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2840            e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
2841}
2842
2843static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2844{
2845        struct e1000_hw *hw = &adapter->hw;
2846        u32 manc, manc2h, mdef, i, j;
2847
2848        if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2849                return;
2850
2851        manc = er32(MANC);
2852
2853        /* enable receiving management packets to the host. this will probably
2854         * generate destination unreachable messages from the host OS, but
2855         * the packets will be handled on SMBUS
2856         */
2857        manc |= E1000_MANC_EN_MNG2HOST;
2858        manc2h = er32(MANC2H);
2859
2860        switch (hw->mac.type) {
2861        default:
2862                manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2863                break;
2864        case e1000_82574:
2865        case e1000_82583:
2866                /* Check if IPMI pass-through decision filter already exists;
2867                 * if so, enable it.
2868                 */
2869                for (i = 0, j = 0; i < 8; i++) {
2870                        mdef = er32(MDEF(i));
2871
2872                        /* Ignore filters with anything other than IPMI ports */
2873                        if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2874                                continue;
2875
2876                        /* Enable this decision filter in MANC2H */
2877                        if (mdef)
2878                                manc2h |= BIT(i);
2879
2880                        j |= mdef;
2881                }
2882
2883                if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2884                        break;
2885
2886                /* Create new decision filter in an empty filter */
2887                for (i = 0, j = 0; i < 8; i++)
2888                        if (er32(MDEF(i)) == 0) {
2889                                ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2890                                               E1000_MDEF_PORT_664));
2891                                manc2h |= BIT(1);
2892                                j++;
2893                                break;
2894                        }
2895
2896                if (!j)
2897                        e_warn("Unable to create IPMI pass-through filter\n");
2898                break;
2899        }
2900
2901        ew32(MANC2H, manc2h);
2902        ew32(MANC, manc);
2903}
2904
2905/**
2906 * e1000_configure_tx - Configure Transmit Unit after Reset
2907 * @adapter: board private structure
2908 *
2909 * Configure the Tx unit of the MAC after a reset.
2910 **/
2911static void e1000_configure_tx(struct e1000_adapter *adapter)
2912{
2913        struct e1000_hw *hw = &adapter->hw;
2914        struct e1000_ring *tx_ring = adapter->tx_ring;
2915        u64 tdba;
2916        u32 tdlen, tctl, tarc;
2917
2918        /* Setup the HW Tx Head and Tail descriptor pointers */
2919        tdba = tx_ring->dma;
2920        tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2921        ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
2922        ew32(TDBAH(0), (tdba >> 32));
2923        ew32(TDLEN(0), tdlen);
2924        ew32(TDH(0), 0);
2925        ew32(TDT(0), 0);
2926        tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0);
2927        tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0);
2928
2929        writel(0, tx_ring->head);
2930        if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
2931                e1000e_update_tdt_wa(tx_ring, 0);
2932        else
2933                writel(0, tx_ring->tail);
2934
2935        /* Set the Tx Interrupt Delay register */
2936        ew32(TIDV, adapter->tx_int_delay);
2937        /* Tx irq moderation */
2938        ew32(TADV, adapter->tx_abs_int_delay);
2939
2940        if (adapter->flags2 & FLAG2_DMA_BURST) {
2941                u32 txdctl = er32(TXDCTL(0));
2942
2943                txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2944                            E1000_TXDCTL_WTHRESH);
2945                /* set up some performance related parameters to encourage the
2946                 * hardware to use the bus more efficiently in bursts, depends
2947                 * on the tx_int_delay to be enabled,
2948                 * wthresh = 1 ==> burst write is disabled to avoid Tx stalls
2949                 * hthresh = 1 ==> prefetch when one or more available
2950                 * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2951                 * BEWARE: this seems to work but should be considered first if
2952                 * there are Tx hangs or other Tx related bugs
2953                 */
2954                txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2955                ew32(TXDCTL(0), txdctl);
2956        }
2957        /* erratum work around: set txdctl the same for both queues */
2958        ew32(TXDCTL(1), er32(TXDCTL(0)));
2959
2960        /* Program the Transmit Control Register */
2961        tctl = er32(TCTL);
2962        tctl &= ~E1000_TCTL_CT;
2963        tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2964                (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2965
2966        if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2967                tarc = er32(TARC(0));
2968                /* set the speed mode bit, we'll clear it if we're not at
2969                 * gigabit link later
2970                 */
2971#define SPEED_MODE_BIT BIT(21)
2972                tarc |= SPEED_MODE_BIT;
2973                ew32(TARC(0), tarc);
2974        }
2975
2976        /* errata: program both queues to unweighted RR */
2977        if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
2978                tarc = er32(TARC(0));
2979                tarc |= 1;
2980                ew32(TARC(0), tarc);
2981                tarc = er32(TARC(1));
2982                tarc |= 1;
2983                ew32(TARC(1), tarc);
2984        }
2985
2986        /* Setup Transmit Descriptor Settings for eop descriptor */
2987        adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2988
2989        /* only set IDE if we are delaying interrupts using the timers */
2990        if (adapter->tx_int_delay)
2991                adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2992
2993        /* enable Report Status bit */
2994        adapter->txd_cmd |= E1000_TXD_CMD_RS;
2995
2996        ew32(TCTL, tctl);
2997
2998        hw->mac.ops.config_collision_dist(hw);
2999
3000        /* SPT and KBL Si errata workaround to avoid data corruption */
3001        if (hw->mac.type == e1000_pch_spt) {
3002                u32 reg_val;
3003
3004                reg_val = er32(IOSFPC);
3005                reg_val |= E1000_RCTL_RDMTS_HEX;
3006                ew32(IOSFPC, reg_val);
3007
3008                reg_val = er32(TARC(0));
3009                /* SPT and KBL Si errata workaround to avoid Tx hang.
3010                 * Dropping the number of outstanding requests from
3011                 * 3 to 2 in order to avoid a buffer overrun.
3012                 */
3013                reg_val &= ~E1000_TARC0_CB_MULTIQ_3_REQ;
3014                reg_val |= E1000_TARC0_CB_MULTIQ_2_REQ;
3015                ew32(TARC(0), reg_val);
3016        }
3017}
3018
3019/**
3020 * e1000_setup_rctl - configure the receive control registers
3021 * @adapter: Board private structure
3022 **/
3023#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
3024                           (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
3025static void e1000_setup_rctl(struct e1000_adapter *adapter)
3026{
3027        struct e1000_hw *hw = &adapter->hw;
3028        u32 rctl, rfctl;
3029        u32 pages = 0;
3030
3031        /* Workaround Si errata on PCHx - configure jumbo frame flow.
3032         * If jumbo frames not set, program related MAC/PHY registers
3033         * to h/w defaults
3034         */
3035        if (hw->mac.type >= e1000_pch2lan) {
3036                s32 ret_val;
3037
3038                if (adapter->netdev->mtu > ETH_DATA_LEN)
3039                        ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
3040                else
3041                        ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
3042
3043                if (ret_val)
3044                        e_dbg("failed to enable|disable jumbo frame workaround mode\n");
3045        }
3046
3047        /* Program MC offset vector base */
3048        rctl = er32(RCTL);
3049        rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3050        rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
3051            E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
3052            (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3053
3054        /* Do not Store bad packets */
3055        rctl &= ~E1000_RCTL_SBP;
3056
3057        /* Enable Long Packet receive */
3058        if (adapter->netdev->mtu <= ETH_DATA_LEN)
3059                rctl &= ~E1000_RCTL_LPE;
3060        else
3061                rctl |= E1000_RCTL_LPE;
3062
3063        /* Some systems expect that the CRC is included in SMBUS traffic. The
3064         * hardware strips the CRC before sending to both SMBUS (BMC) and to
3065         * host memory when this is enabled
3066         */
3067        if (adapter->flags2 & FLAG2_CRC_STRIPPING)
3068                rctl |= E1000_RCTL_SECRC;
3069
3070        /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
3071        if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
3072                u16 phy_data;
3073
3074                e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
3075                phy_data &= 0xfff8;
3076                phy_data |= BIT(2);
3077                e1e_wphy(hw, PHY_REG(770, 26), phy_data);
3078
3079                e1e_rphy(hw, 22, &phy_data);
3080                phy_data &= 0x0fff;
3081                phy_data |= BIT(14);
3082                e1e_wphy(hw, 0x10, 0x2823);
3083                e1e_wphy(hw, 0x11, 0x0003);
3084                e1e_wphy(hw, 22, phy_data);
3085        }
3086
3087        /* Setup buffer sizes */
3088        rctl &= ~E1000_RCTL_SZ_4096;
3089        rctl |= E1000_RCTL_BSEX;
3090        switch (adapter->rx_buffer_len) {
3091        case 2048:
3092        default:
3093                rctl |= E1000_RCTL_SZ_2048;
3094                rctl &= ~E1000_RCTL_BSEX;
3095                break;
3096        case 4096:
3097                rctl |= E1000_RCTL_SZ_4096;
3098                break;
3099        case 8192:
3100                rctl |= E1000_RCTL_SZ_8192;
3101                break;
3102        case 16384:
3103                rctl |= E1000_RCTL_SZ_16384;
3104                break;
3105        }
3106
3107        /* Enable Extended Status in all Receive Descriptors */
3108        rfctl = er32(RFCTL);
3109        rfctl |= E1000_RFCTL_EXTEN;
3110        ew32(RFCTL, rfctl);
3111
3112        /* 82571 and greater support packet-split where the protocol
3113         * header is placed in skb->data and the packet data is
3114         * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
3115         * In the case of a non-split, skb->data is linearly filled,
3116         * followed by the page buffers.  Therefore, skb->data is
3117         * sized to hold the largest protocol header.
3118         *
3119         * allocations using alloc_page take too long for regular MTU
3120         * so only enable packet split for jumbo frames
3121         *
3122         * Using pages when the page size is greater than 16k wastes
3123         * a lot of memory, since we allocate 3 pages at all times
3124         * per packet.
3125         */
3126        pages = PAGE_USE_COUNT(adapter->netdev->mtu);
3127        if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
3128                adapter->rx_ps_pages = pages;
3129        else
3130                adapter->rx_ps_pages = 0;
3131
3132        if (adapter->rx_ps_pages) {
3133                u32 psrctl = 0;
3134
3135                /* Enable Packet split descriptors */
3136                rctl |= E1000_RCTL_DTYP_PS;
3137
3138                psrctl |= adapter->rx_ps_bsize0 >> E1000_PSRCTL_BSIZE0_SHIFT;
3139
3140                switch (adapter->rx_ps_pages) {
3141                case 3:
3142                        psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE3_SHIFT;
3143                        /* fall-through */
3144                case 2:
3145                        psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE2_SHIFT;
3146                        /* fall-through */
3147                case 1:
3148                        psrctl |= PAGE_SIZE >> E1000_PSRCTL_BSIZE1_SHIFT;
3149                        break;
3150                }
3151
3152                ew32(PSRCTL, psrctl);
3153        }
3154
3155        /* This is useful for sniffing bad packets. */
3156        if (adapter->netdev->features & NETIF_F_RXALL) {
3157                /* UPE and MPE will be handled by normal PROMISC logic
3158                 * in e1000e_set_rx_mode
3159                 */
3160                rctl |= (E1000_RCTL_SBP |       /* Receive bad packets */
3161                         E1000_RCTL_BAM |       /* RX All Bcast Pkts */
3162                         E1000_RCTL_PMCF);      /* RX All MAC Ctrl Pkts */
3163
3164                rctl &= ~(E1000_RCTL_VFE |      /* Disable VLAN filter */
3165                          E1000_RCTL_DPF |      /* Allow filtered pause */
3166                          E1000_RCTL_CFIEN);    /* Dis VLAN CFIEN Filter */
3167                /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3168                 * and that breaks VLANs.
3169                 */
3170        }
3171
3172        ew32(RCTL, rctl);
3173        /* just started the receive unit, no need to restart */
3174        adapter->flags &= ~FLAG_RESTART_NOW;
3175}
3176
3177/**
3178 * e1000_configure_rx - Configure Receive Unit after Reset
3179 * @adapter: board private structure
3180 *
3181 * Configure the Rx unit of the MAC after a reset.
3182 **/
3183static void e1000_configure_rx(struct e1000_adapter *adapter)
3184{
3185        struct e1000_hw *hw = &adapter->hw;
3186        struct e1000_ring *rx_ring = adapter->rx_ring;
3187        u64 rdba;
3188        u32 rdlen, rctl, rxcsum, ctrl_ext;
3189
3190        if (adapter->rx_ps_pages) {
3191                /* this is a 32 byte descriptor */
3192                rdlen = rx_ring->count *
3193                    sizeof(union e1000_rx_desc_packet_split);
3194                adapter->clean_rx = e1000_clean_rx_irq_ps;
3195                adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
3196        } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
3197                rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3198                adapter->clean_rx = e1000_clean_jumbo_rx_irq;
3199                adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
3200        } else {
3201                rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3202                adapter->clean_rx = e1000_clean_rx_irq;
3203                adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
3204        }
3205
3206        /* disable receives while setting up the descriptors */
3207        rctl = er32(RCTL);
3208        if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3209                ew32(RCTL, rctl & ~E1000_RCTL_EN);
3210        e1e_flush();
3211        usleep_range(10000, 20000);
3212
3213        if (adapter->flags2 & FLAG2_DMA_BURST) {
3214                /* set the writeback threshold (only takes effect if the RDTR
3215                 * is set). set GRAN=1 and write back up to 0x4 worth, and
3216                 * enable prefetching of 0x20 Rx descriptors
3217                 * granularity = 01
3218                 * wthresh = 04,
3219                 * hthresh = 04,
3220                 * pthresh = 0x20
3221                 */
3222                ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
3223                ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
3224        }
3225
3226        /* set the Receive Delay Timer Register */
3227        ew32(RDTR, adapter->rx_int_delay);
3228
3229        /* irq moderation */
3230        ew32(RADV, adapter->rx_abs_int_delay);
3231        if ((adapter->itr_setting != 0) && (adapter->itr != 0))
3232                e1000e_write_itr(adapter, adapter->itr);
3233
3234        ctrl_ext = er32(CTRL_EXT);
3235        /* Auto-Mask interrupts upon ICR access */
3236        ctrl_ext |= E1000_CTRL_EXT_IAME;
3237        ew32(IAM, 0xffffffff);
3238        ew32(CTRL_EXT, ctrl_ext);
3239        e1e_flush();
3240
3241        /* Setup the HW Rx Head and Tail Descriptor Pointers and
3242         * the Base and Length of the Rx Descriptor Ring
3243         */
3244        rdba = rx_ring->dma;
3245        ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
3246        ew32(RDBAH(0), (rdba >> 32));
3247        ew32(RDLEN(0), rdlen);
3248        ew32(RDH(0), 0);
3249        ew32(RDT(0), 0);
3250        rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0);
3251        rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0);
3252
3253        writel(0, rx_ring->head);
3254        if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
3255                e1000e_update_rdt_wa(rx_ring, 0);
3256        else
3257                writel(0, rx_ring->tail);
3258
3259        /* Enable Receive Checksum Offload for TCP and UDP */
3260        rxcsum = er32(RXCSUM);
3261        if (adapter->netdev->features & NETIF_F_RXCSUM)
3262                rxcsum |= E1000_RXCSUM_TUOFL;
3263        else
3264                rxcsum &= ~E1000_RXCSUM_TUOFL;
3265        ew32(RXCSUM, rxcsum);
3266
3267        /* With jumbo frames, excessive C-state transition latencies result
3268         * in dropped transactions.
3269         */
3270        if (adapter->netdev->mtu > ETH_DATA_LEN) {
3271                u32 lat =
3272                    ((er32(PBA) & E1000_PBA_RXA_MASK) * 1024 -
3273                     adapter->max_frame_size) * 8 / 1000;
3274
3275                if (adapter->flags & FLAG_IS_ICH) {
3276                        u32 rxdctl = er32(RXDCTL(0));
3277
3278                        ew32(RXDCTL(0), rxdctl | 0x3 | BIT(8));
3279                }
3280
3281                dev_info(&adapter->pdev->dev,
3282                         "Some CPU C-states have been disabled in order to enable jumbo frames\n");
3283                pm_qos_update_request(&adapter->pm_qos_req, lat);
3284        } else {
3285                pm_qos_update_request(&adapter->pm_qos_req,
3286                                      PM_QOS_DEFAULT_VALUE);
3287        }
3288
3289        /* Enable Receives */
3290        ew32(RCTL, rctl);
3291}
3292
3293/**
3294 * e1000e_write_mc_addr_list - write multicast addresses to MTA
3295 * @netdev: network interface device structure
3296 *
3297 * Writes multicast address list to the MTA hash table.
3298 * Returns: -ENOMEM on failure
3299 *                0 on no addresses written
3300 *                X on writing X addresses to MTA
3301 */
3302static int e1000e_write_mc_addr_list(struct net_device *netdev)
3303{
3304        struct e1000_adapter *adapter = netdev_priv(netdev);
3305        struct e1000_hw *hw = &adapter->hw;
3306        struct netdev_hw_addr *ha;
3307        u8 *mta_list;
3308        int i;
3309
3310        if (netdev_mc_empty(netdev)) {
3311                /* nothing to program, so clear mc list */
3312                hw->mac.ops.update_mc_addr_list(hw, NULL, 0);
3313                return 0;
3314        }
3315
3316        mta_list = kcalloc(netdev_mc_count(netdev), ETH_ALEN, GFP_ATOMIC);
3317        if (!mta_list)
3318                return -ENOMEM;
3319
3320        /* update_mc_addr_list expects a packed array of only addresses. */
3321        i = 0;
3322        netdev_for_each_mc_addr(ha, netdev)
3323            memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3324
3325        hw->mac.ops.update_mc_addr_list(hw, mta_list, i);
3326        kfree(mta_list);
3327
3328        return netdev_mc_count(netdev);
3329}
3330
3331/**
3332 * e1000e_write_uc_addr_list - write unicast addresses to RAR table
3333 * @netdev: network interface device structure
3334 *
3335 * Writes unicast address list to the RAR table.
3336 * Returns: -ENOMEM on failure/insufficient address space
3337 *                0 on no addresses written
3338 *                X on writing X addresses to the RAR table
3339 **/
3340static int e1000e_write_uc_addr_list(struct net_device *netdev)
3341{
3342        struct e1000_adapter *adapter = netdev_priv(netdev);
3343        struct e1000_hw *hw = &adapter->hw;
3344        unsigned int rar_entries;
3345        int count = 0;
3346
3347        rar_entries = hw->mac.ops.rar_get_count(hw);
3348
3349        /* save a rar entry for our hardware address */
3350        rar_entries--;
3351
3352        /* save a rar entry for the LAA workaround */
3353        if (adapter->flags & FLAG_RESET_OVERWRITES_LAA)
3354                rar_entries--;
3355
3356        /* return ENOMEM indicating insufficient memory for addresses */
3357        if (netdev_uc_count(netdev) > rar_entries)
3358                return -ENOMEM;
3359
3360        if (!netdev_uc_empty(netdev) && rar_entries) {
3361                struct netdev_hw_addr *ha;
3362
3363                /* write the addresses in reverse order to avoid write
3364                 * combining
3365                 */
3366                netdev_for_each_uc_addr(ha, netdev) {
3367                        int ret_val;
3368
3369                        if (!rar_entries)
3370                                break;
3371                        ret_val = hw->mac.ops.rar_set(hw, ha->addr, rar_entries--);
3372                        if (ret_val < 0)
3373                                return -ENOMEM;
3374                        count++;
3375                }
3376        }
3377
3378        /* zero out the remaining RAR entries not used above */
3379        for (; rar_entries > 0; rar_entries--) {
3380                ew32(RAH(rar_entries), 0);
3381                ew32(RAL(rar_entries), 0);
3382        }
3383        e1e_flush();
3384
3385        return count;
3386}
3387
3388/**
3389 * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
3390 * @netdev: network interface device structure
3391 *
3392 * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
3393 * address list or the network interface flags are updated.  This routine is
3394 * responsible for configuring the hardware for proper unicast, multicast,
3395 * promiscuous mode, and all-multi behavior.
3396 **/
3397static void e1000e_set_rx_mode(struct net_device *netdev)
3398{
3399        struct e1000_adapter *adapter = netdev_priv(netdev);
3400        struct e1000_hw *hw = &adapter->hw;
3401        u32 rctl;
3402
3403        if (pm_runtime_suspended(netdev->dev.parent))
3404                return;
3405
3406        /* Check for Promiscuous and All Multicast modes */
3407        rctl = er32(RCTL);
3408
3409        /* clear the affected bits */
3410        rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3411
3412        if (netdev->flags & IFF_PROMISC) {
3413                rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3414                /* Do not hardware filter VLANs in promisc mode */
3415                e1000e_vlan_filter_disable(adapter);
3416        } else {
3417                int count;
3418
3419                if (netdev->flags & IFF_ALLMULTI) {
3420                        rctl |= E1000_RCTL_MPE;
3421                } else {
3422                        /* Write addresses to the MTA, if the attempt fails
3423                         * then we should just turn on promiscuous mode so
3424                         * that we can at least receive multicast traffic
3425                         */
3426                        count = e1000e_write_mc_addr_list(netdev);
3427                        if (count < 0)
3428                                rctl |= E1000_RCTL_MPE;
3429                }
3430                e1000e_vlan_filter_enable(adapter);
3431                /* Write addresses to available RAR registers, if there is not
3432                 * sufficient space to store all the addresses then enable
3433                 * unicast promiscuous mode
3434                 */
3435                count = e1000e_write_uc_addr_list(netdev);
3436                if (count < 0)
3437                        rctl |= E1000_RCTL_UPE;
3438        }
3439
3440        ew32(RCTL, rctl);
3441
3442        if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3443                e1000e_vlan_strip_enable(adapter);
3444        else
3445                e1000e_vlan_strip_disable(adapter);
3446}
3447
3448static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3449{
3450        struct e1000_hw *hw = &adapter->hw;
3451        u32 mrqc, rxcsum;
3452        u32 rss_key[10];
3453        int i;
3454
3455        netdev_rss_key_fill(rss_key, sizeof(rss_key));
3456        for (i = 0; i < 10; i++)
3457                ew32(RSSRK(i), rss_key[i]);
3458
3459        /* Direct all traffic to queue 0 */
3460        for (i = 0; i < 32; i++)
3461                ew32(RETA(i), 0);
3462
3463        /* Disable raw packet checksumming so that RSS hash is placed in
3464         * descriptor on writeback.
3465         */
3466        rxcsum = er32(RXCSUM);
3467        rxcsum |= E1000_RXCSUM_PCSD;
3468
3469        ew32(RXCSUM, rxcsum);
3470
3471        mrqc = (E1000_MRQC_RSS_FIELD_IPV4 |
3472                E1000_MRQC_RSS_FIELD_IPV4_TCP |
3473                E1000_MRQC_RSS_FIELD_IPV6 |
3474                E1000_MRQC_RSS_FIELD_IPV6_TCP |
3475                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
3476
3477        ew32(MRQC, mrqc);
3478}
3479
3480/**
3481 * e1000e_get_base_timinca - get default SYSTIM time increment attributes
3482 * @adapter: board private structure
3483 * @timinca: pointer to returned time increment attributes
3484 *
3485 * Get attributes for incrementing the System Time Register SYSTIML/H at
3486 * the default base frequency, and set the cyclecounter shift value.
3487 **/
3488s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
3489{
3490        struct e1000_hw *hw = &adapter->hw;
3491        u32 incvalue, incperiod, shift;
3492
3493        /* Make sure clock is enabled on I217/I218/I219  before checking
3494         * the frequency
3495         */
3496        if ((hw->mac.type >= e1000_pch_lpt) &&
3497            !(er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) &&
3498            !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_ENABLED)) {
3499                u32 fextnvm7 = er32(FEXTNVM7);
3500
3501                if (!(fextnvm7 & BIT(0))) {
3502                        ew32(FEXTNVM7, fextnvm7 | BIT(0));
3503                        e1e_flush();
3504                }
3505        }
3506
3507        switch (hw->mac.type) {
3508        case e1000_pch2lan:
3509                /* Stable 96MHz frequency */
3510                incperiod = INCPERIOD_96MHZ;
3511                incvalue = INCVALUE_96MHZ;
3512                shift = INCVALUE_SHIFT_96MHZ;
3513                adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
3514                break;
3515        case e1000_pch_lpt:
3516                if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3517                        /* Stable 96MHz frequency */
3518                        incperiod = INCPERIOD_96MHZ;
3519                        incvalue = INCVALUE_96MHZ;
3520                        shift = INCVALUE_SHIFT_96MHZ;
3521                        adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
3522                } else {
3523                        /* Stable 25MHz frequency */
3524                        incperiod = INCPERIOD_25MHZ;
3525                        incvalue = INCVALUE_25MHZ;
3526                        shift = INCVALUE_SHIFT_25MHZ;
3527                        adapter->cc.shift = shift;
3528                }
3529                break;
3530        case e1000_pch_spt:
3531                /* Stable 24MHz frequency */
3532                incperiod = INCPERIOD_24MHZ;
3533                incvalue = INCVALUE_24MHZ;
3534                shift = INCVALUE_SHIFT_24MHZ;
3535                adapter->cc.shift = shift;
3536                break;
3537        case e1000_pch_cnp:
3538                if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3539                        /* Stable 24MHz frequency */
3540                        incperiod = INCPERIOD_24MHZ;
3541                        incvalue = INCVALUE_24MHZ;
3542                        shift = INCVALUE_SHIFT_24MHZ;
3543                        adapter->cc.shift = shift;
3544                } else {
3545                        /* Stable 38400KHz frequency */
3546                        incperiod = INCPERIOD_38400KHZ;
3547                        incvalue = INCVALUE_38400KHZ;
3548                        shift = INCVALUE_SHIFT_38400KHZ;
3549                        adapter->cc.shift = shift;
3550                }
3551                break;
3552        case e1000_82574:
3553        case e1000_82583:
3554                /* Stable 25MHz frequency */
3555                incperiod = INCPERIOD_25MHZ;
3556                incvalue = INCVALUE_25MHZ;
3557                shift = INCVALUE_SHIFT_25MHZ;
3558                adapter->cc.shift = shift;
3559                break;
3560        default:
3561                return -EINVAL;
3562        }
3563
3564        *timinca = ((incperiod << E1000_TIMINCA_INCPERIOD_SHIFT) |
3565                    ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK));
3566
3567        return 0;
3568}
3569
3570/**
3571 * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable
3572 * @adapter: board private structure
3573 *
3574 * Outgoing time stamping can be enabled and disabled. Play nice and
3575 * disable it when requested, although it shouldn't cause any overhead
3576 * when no packet needs it. At most one packet in the queue may be
3577 * marked for time stamping, otherwise it would be impossible to tell
3578 * for sure to which packet the hardware time stamp belongs.
3579 *
3580 * Incoming time stamping has to be configured via the hardware filters.
3581 * Not all combinations are supported, in particular event type has to be
3582 * specified. Matching the kind of event packet is not supported, with the
3583 * exception of "all V2 events regardless of level 2 or 4".
3584 **/
3585static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,
3586                                  struct hwtstamp_config *config)
3587{
3588        struct e1000_hw *hw = &adapter->hw;
3589        u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
3590        u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
3591        u32 rxmtrl = 0;
3592        u16 rxudp = 0;
3593        bool is_l4 = false;
3594        bool is_l2 = false;
3595        u32 regval;
3596
3597        if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3598                return -EINVAL;
3599
3600        /* flags reserved for future extensions - must be zero */
3601        if (config->flags)
3602                return -EINVAL;
3603
3604        switch (config->tx_type) {
3605        case HWTSTAMP_TX_OFF:
3606                tsync_tx_ctl = 0;
3607                break;
3608        case HWTSTAMP_TX_ON:
3609                break;
3610        default:
3611                return -ERANGE;
3612        }
3613
3614        switch (config->rx_filter) {
3615        case HWTSTAMP_FILTER_NONE:
3616                tsync_rx_ctl = 0;
3617                break;
3618        case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3619                tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3620                rxmtrl = E1000_RXMTRL_PTP_V1_SYNC_MESSAGE;
3621                is_l4 = true;
3622                break;
3623        case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3624                tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3625                rxmtrl = E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE;
3626                is_l4 = true;
3627                break;
3628        case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3629                /* Also time stamps V2 L2 Path Delay Request/Response */
3630                tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3631                rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3632                is_l2 = true;
3633                break;
3634        case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3635                /* Also time stamps V2 L2 Path Delay Request/Response. */
3636                tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3637                rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3638                is_l2 = true;
3639                break;
3640        case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3641                /* Hardware cannot filter just V2 L4 Sync messages;
3642                 * fall-through to V2 (both L2 and L4) Sync.
3643                 */
3644        case HWTSTAMP_FILTER_PTP_V2_SYNC:
3645                /* Also time stamps V2 Path Delay Request/Response. */
3646                tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3647                rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3648                is_l2 = true;
3649                is_l4 = true;
3650                break;
3651        case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3652                /* Hardware cannot filter just V2 L4 Delay Request messages;
3653                 * fall-through to V2 (both L2 and L4) Delay Request.
3654                 */
3655        case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3656                /* Also time stamps V2 Path Delay Request/Response. */
3657                tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3658                rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3659                is_l2 = true;
3660                is_l4 = true;
3661                break;
3662        case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3663        case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3664                /* Hardware cannot filter just V2 L4 or L2 Event messages;
3665                 * fall-through to all V2 (both L2 and L4) Events.
3666                 */
3667        case HWTSTAMP_FILTER_PTP_V2_EVENT:
3668                tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
3669                config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
3670                is_l2 = true;
3671                is_l4 = true;
3672                break;
3673        case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3674                /* For V1, the hardware can only filter Sync messages or
3675                 * Delay Request messages but not both so fall-through to
3676                 * time stamp all packets.
3677                 */
3678        case HWTSTAMP_FILTER_NTP_ALL:
3679        case HWTSTAMP_FILTER_ALL:
3680                is_l2 = true;
3681                is_l4 = true;
3682                tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
3683                config->rx_filter = HWTSTAMP_FILTER_ALL;
3684                break;
3685        default:
3686                return -ERANGE;
3687        }
3688
3689        adapter->hwtstamp_config = *config;
3690
3691        /* enable/disable Tx h/w time stamping */
3692        regval = er32(TSYNCTXCTL);
3693        regval &= ~E1000_TSYNCTXCTL_ENABLED;
3694        regval |= tsync_tx_ctl;
3695        ew32(TSYNCTXCTL, regval);
3696        if ((er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) !=
3697            (regval & E1000_TSYNCTXCTL_ENABLED)) {
3698                e_err("Timesync Tx Control register not set as expected\n");
3699                return -EAGAIN;
3700        }
3701
3702        /* enable/disable Rx h/w time stamping */
3703        regval = er32(TSYNCRXCTL);
3704        regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
3705        regval |= tsync_rx_ctl;
3706        ew32(TSYNCRXCTL, regval);
3707        if ((er32(TSYNCRXCTL) & (E1000_TSYNCRXCTL_ENABLED |
3708                                 E1000_TSYNCRXCTL_TYPE_MASK)) !=
3709            (regval & (E1000_TSYNCRXCTL_ENABLED |
3710                       E1000_TSYNCRXCTL_TYPE_MASK))) {
3711                e_err("Timesync Rx Control register not set as expected\n");
3712                return -EAGAIN;
3713        }
3714
3715        /* L2: define ethertype filter for time stamped packets */
3716        if (is_l2)
3717                rxmtrl |= ETH_P_1588;
3718
3719        /* define which PTP packets get time stamped */
3720        ew32(RXMTRL, rxmtrl);
3721
3722        /* Filter by destination port */
3723        if (is_l4) {
3724                rxudp = PTP_EV_PORT;
3725                cpu_to_be16s(&rxudp);
3726        }
3727        ew32(RXUDP, rxudp);
3728
3729        e1e_flush();
3730
3731        /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */
3732        er32(RXSTMPH);
3733        er32(TXSTMPH);
3734
3735        return 0;
3736}
3737
3738/**
3739 * e1000_configure - configure the hardware for Rx and Tx
3740 * @adapter: private board structure
3741 **/
3742static void e1000_configure(struct e1000_adapter *adapter)
3743{
3744        struct e1000_ring *rx_ring = adapter->rx_ring;
3745
3746        e1000e_set_rx_mode(adapter->netdev);
3747
3748        e1000_restore_vlan(adapter);
3749        e1000_init_manageability_pt(adapter);
3750
3751        e1000_configure_tx(adapter);
3752
3753        if (adapter->netdev->features & NETIF_F_RXHASH)
3754                e1000e_setup_rss_hash(adapter);
3755        e1000_setup_rctl(adapter);
3756        e1000_configure_rx(adapter);
3757        adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL);
3758}
3759
3760/**
3761 * e1000e_power_up_phy - restore link in case the phy was powered down
3762 * @adapter: address of board private structure
3763 *
3764 * The phy may be powered down to save power and turn off link when the
3765 * driver is unloaded and wake on lan is not enabled (among others)
3766 * *** this routine MUST be followed by a call to e1000e_reset ***
3767 **/
3768void e1000e_power_up_phy(struct e1000_adapter *adapter)
3769{
3770        if (adapter->hw.phy.ops.power_up)
3771                adapter->hw.phy.ops.power_up(&adapter->hw);
3772
3773        adapter->hw.mac.ops.setup_link(&adapter->hw);
3774}
3775
3776/**
3777 * e1000_power_down_phy - Power down the PHY
3778 *
3779 * Power down the PHY so no link is implied when interface is down.
3780 * The PHY cannot be powered down if management or WoL is active.
3781 */
3782static void e1000_power_down_phy(struct e1000_adapter *adapter)
3783{
3784        if (adapter->hw.phy.ops.power_down)
3785                adapter->hw.phy.ops.power_down(&adapter->hw);
3786}
3787
3788/**
3789 * e1000_flush_tx_ring - remove all descriptors from the tx_ring
3790 *
3791 * We want to clear all pending descriptors from the TX ring.
3792 * zeroing happens when the HW reads the regs. We  assign the ring itself as
3793 * the data of the next descriptor. We don't care about the data we are about
3794 * to reset the HW.
3795 */
3796static void e1000_flush_tx_ring(struct e1000_adapter *adapter)
3797{
3798        struct e1000_hw *hw = &adapter->hw;
3799        struct e1000_ring *tx_ring = adapter->tx_ring;
3800        struct e1000_tx_desc *tx_desc = NULL;
3801        u32 tdt, tctl, txd_lower = E1000_TXD_CMD_IFCS;
3802        u16 size = 512;
3803
3804        tctl = er32(TCTL);
3805        ew32(TCTL, tctl | E1000_TCTL_EN);
3806        tdt = er32(TDT(0));
3807        BUG_ON(tdt != tx_ring->next_to_use);
3808        tx_desc =  E1000_TX_DESC(*tx_ring, tx_ring->next_to_use);
3809        tx_desc->buffer_addr = tx_ring->dma;
3810
3811        tx_desc->lower.data = cpu_to_le32(txd_lower | size);
3812        tx_desc->upper.data = 0;
3813        /* flush descriptors to memory before notifying the HW */
3814        wmb();
3815        tx_ring->next_to_use++;
3816        if (tx_ring->next_to_use == tx_ring->count)
3817                tx_ring->next_to_use = 0;
3818        ew32(TDT(0), tx_ring->next_to_use);
3819        mmiowb();
3820        usleep_range(200, 250);
3821}
3822
3823/**
3824 * e1000_flush_rx_ring - remove all descriptors from the rx_ring
3825 *
3826 * Mark all descriptors in the RX ring as consumed and disable the rx ring
3827 */
3828static void e1000_flush_rx_ring(struct e1000_adapter *adapter)
3829{
3830        u32 rctl, rxdctl;
3831        struct e1000_hw *hw = &adapter->hw;
3832
3833        rctl = er32(RCTL);
3834        ew32(RCTL, rctl & ~E1000_RCTL_EN);
3835        e1e_flush();
3836        usleep_range(100, 150);
3837
3838        rxdctl = er32(RXDCTL(0));
3839        /* zero the lower 14 bits (prefetch and host thresholds) */
3840        rxdctl &= 0xffffc000;
3841
3842        /* update thresholds: prefetch threshold to 31, host threshold to 1
3843         * and make sure the granularity is "descriptors" and not "cache lines"
3844         */
3845        rxdctl |= (0x1F | BIT(8) | E1000_RXDCTL_THRESH_UNIT_DESC);
3846
3847        ew32(RXDCTL(0), rxdctl);
3848        /* momentarily enable the RX ring for the changes to take effect */
3849        ew32(RCTL, rctl | E1000_RCTL_EN);
3850        e1e_flush();
3851        usleep_range(100, 150);
3852        ew32(RCTL, rctl & ~E1000_RCTL_EN);
3853}
3854
3855/**
3856 * e1000_flush_desc_rings - remove all descriptors from the descriptor rings
3857 *
3858 * In i219, the descriptor rings must be emptied before resetting the HW
3859 * or before changing the device state to D3 during runtime (runtime PM).
3860 *
3861 * Failure to do this will cause the HW to enter a unit hang state which can
3862 * only be released by PCI reset on the device
3863 *
3864 */
3865
3866static void e1000_flush_desc_rings(struct e1000_adapter *adapter)
3867{
3868        u16 hang_state;
3869        u32 fext_nvm11, tdlen;
3870        struct e1000_hw *hw = &adapter->hw;
3871
3872        /* First, disable MULR fix in FEXTNVM11 */
3873        fext_nvm11 = er32(FEXTNVM11);
3874        fext_nvm11 |= E1000_FEXTNVM11_DISABLE_MULR_FIX;
3875        ew32(FEXTNVM11, fext_nvm11);
3876        /* do nothing if we're not in faulty state, or if the queue is empty */
3877        tdlen = er32(TDLEN(0));
3878        pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3879                             &hang_state);
3880        if (!(hang_state & FLUSH_DESC_REQUIRED) || !tdlen)
3881                return;
3882        e1000_flush_tx_ring(adapter);
3883        /* recheck, maybe the fault is caused by the rx ring */
3884        pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3885                             &hang_state);
3886        if (hang_state & FLUSH_DESC_REQUIRED)
3887                e1000_flush_rx_ring(adapter);
3888}
3889
3890/**
3891 * e1000e_systim_reset - reset the timesync registers after a hardware reset
3892 * @adapter: board private structure
3893 *
3894 * When the MAC is reset, all hardware bits for timesync will be reset to the
3895 * default values. This function will restore the settings last in place.
3896 * Since the clock SYSTIME registers are reset, we will simply restore the
3897 * cyclecounter to the kernel real clock time.
3898 **/
3899static void e1000e_systim_reset(struct e1000_adapter *adapter)
3900{
3901        struct ptp_clock_info *info = &adapter->ptp_clock_info;
3902        struct e1000_hw *hw = &adapter->hw;
3903        unsigned long flags;
3904        u32 timinca;
3905        s32 ret_val;
3906
3907        if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3908                return;
3909
3910        if (info->adjfreq) {
3911                /* restore the previous ptp frequency delta */
3912                ret_val = info->adjfreq(info, adapter->ptp_delta);
3913        } else {
3914                /* set the default base frequency if no adjustment possible */
3915                ret_val = e1000e_get_base_timinca(adapter, &timinca);
3916                if (!ret_val)
3917                        ew32(TIMINCA, timinca);
3918        }
3919
3920        if (ret_val) {
3921                dev_warn(&adapter->pdev->dev,
3922                         "Failed to restore TIMINCA clock rate delta: %d\n",
3923                         ret_val);
3924                return;
3925        }
3926
3927        /* reset the systim ns time counter */
3928        spin_lock_irqsave(&adapter->systim_lock, flags);
3929        timecounter_init(&adapter->tc, &adapter->cc,
3930                         ktime_to_ns(ktime_get_real()));
3931        spin_unlock_irqrestore(&adapter->systim_lock, flags);
3932
3933        /* restore the previous hwtstamp configuration settings */
3934        e1000e_config_hwtstamp(adapter, &adapter->hwtstamp_config);
3935}
3936
3937/**
3938 * e1000e_reset - bring the hardware into a known good state
3939 *
3940 * This function boots the hardware and enables some settings that
3941 * require a configuration cycle of the hardware - those cannot be
3942 * set/changed during runtime. After reset the device needs to be
3943 * properly configured for Rx, Tx etc.
3944 */
3945void e1000e_reset(struct e1000_adapter *adapter)
3946{
3947        struct e1000_mac_info *mac = &adapter->hw.mac;
3948        struct e1000_fc_info *fc = &adapter->hw.fc;
3949        struct e1000_hw *hw = &adapter->hw;
3950        u32 tx_space, min_tx_space, min_rx_space;
3951        u32 pba = adapter->pba;
3952        u16 hwm;
3953
3954        /* reset Packet Buffer Allocation to default */
3955        ew32(PBA, pba);
3956
3957        if (adapter->max_frame_size > (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)) {
3958                /* To maintain wire speed transmits, the Tx FIFO should be
3959                 * large enough to accommodate two full transmit packets,
3960                 * rounded up to the next 1KB and expressed in KB.  Likewise,
3961                 * the Rx FIFO should be large enough to accommodate at least
3962                 * one full receive packet and is similarly rounded up and
3963                 * expressed in KB.
3964                 */
3965                pba = er32(PBA);
3966                /* upper 16 bits has Tx packet buffer allocation size in KB */
3967                tx_space = pba >> 16;
3968                /* lower 16 bits has Rx packet buffer allocation size in KB */
3969                pba &= 0xffff;
3970                /* the Tx fifo also stores 16 bytes of information about the Tx
3971                 * but don't include ethernet FCS because hardware appends it
3972                 */
3973                min_tx_space = (adapter->max_frame_size +
3974                                sizeof(struct e1000_tx_desc) - ETH_FCS_LEN) * 2;
3975                min_tx_space = ALIGN(min_tx_space, 1024);
3976                min_tx_space >>= 10;
3977                /* software strips receive CRC, so leave room for it */
3978                min_rx_space = adapter->max_frame_size;
3979                min_rx_space = ALIGN(min_rx_space, 1024);
3980                min_rx_space >>= 10;
3981
3982                /* If current Tx allocation is less than the min Tx FIFO size,
3983                 * and the min Tx FIFO size is less than the current Rx FIFO
3984                 * allocation, take space away from current Rx allocation
3985                 */
3986                if ((tx_space < min_tx_space) &&
3987                    ((min_tx_space - tx_space) < pba)) {
3988                        pba -= min_tx_space - tx_space;
3989
3990                        /* if short on Rx space, Rx wins and must trump Tx
3991                         * adjustment
3992                         */
3993                        if (pba < min_rx_space)
3994                                pba = min_rx_space;
3995                }
3996
3997                ew32(PBA, pba);
3998        }
3999
4000        /* flow control settings
4001         *
4002         * The high water mark must be low enough to fit one full frame
4003         * (or the size used for early receive) above it in the Rx FIFO.
4004         * Set it to the lower of:
4005         * - 90% of the Rx FIFO size, and
4006         * - the full Rx FIFO size minus one full frame
4007         */
4008        if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
4009                fc->pause_time = 0xFFFF;
4010        else
4011                fc->pause_time = E1000_FC_PAUSE_TIME;
4012        fc->send_xon = true;
4013        fc->current_mode = fc->requested_mode;
4014
4015        switch (hw->mac.type) {
4016        case e1000_ich9lan:
4017        case e1000_ich10lan:
4018                if (adapter->netdev->mtu > ETH_DATA_LEN) {
4019                        pba = 14;
4020                        ew32(PBA, pba);
4021                        fc->high_water = 0x2800;
4022                        fc->low_water = fc->high_water - 8;
4023                        break;
4024                }
4025                /* fall-through */
4026        default:
4027                hwm = min(((pba << 10) * 9 / 10),
4028                          ((pba << 10) - adapter->max_frame_size));
4029
4030                fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
4031                fc->low_water = fc->high_water - 8;
4032                break;
4033        case e1000_pchlan:
4034                /* Workaround PCH LOM adapter hangs with certain network
4035                 * loads.  If hangs persist, try disabling Tx flow control.
4036                 */
4037                if (adapter->netdev->mtu > ETH_DATA_LEN) {
4038                        fc->high_water = 0x3500;
4039                        fc->low_water = 0x1500;
4040                } else {
4041                        fc->high_water = 0x5000;
4042                        fc->low_water = 0x3000;
4043                }
4044                fc->refresh_time = 0x1000;
4045                break;
4046        case e1000_pch2lan:
4047        case e1000_pch_lpt:
4048        case e1000_pch_spt:
4049        case e1000_pch_cnp:
4050                fc->refresh_time = 0x0400;
4051
4052                if (adapter->netdev->mtu <= ETH_DATA_LEN) {
4053                        fc->high_water = 0x05C20;
4054                        fc->low_water = 0x05048;
4055                        fc->pause_time = 0x0650;
4056                        break;
4057                }
4058
4059                pba = 14;
4060                ew32(PBA, pba);
4061                fc->high_water = ((pba << 10) * 9 / 10) & E1000_FCRTH_RTH;
4062                fc->low_water = ((pba << 10) * 8 / 10) & E1000_FCRTL_RTL;
4063                break;
4064        }
4065
4066        /* Alignment of Tx data is on an arbitrary byte boundary with the
4067         * maximum size per Tx descriptor limited only to the transmit
4068         * allocation of the packet buffer minus 96 bytes with an upper
4069         * limit of 24KB due to receive synchronization limitations.
4070         */
4071        adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,
4072                                       24 << 10);
4073
4074        /* Disable Adaptive Interrupt Moderation if 2 full packets cannot
4075         * fit in receive buffer.
4076         */
4077        if (adapter->itr_setting & 0x3) {
4078                if ((adapter->max_frame_size * 2) > (pba << 10)) {
4079                        if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
4080                                dev_info(&adapter->pdev->dev,
4081                                         "Interrupt Throttle Rate off\n");
4082                                adapter->flags2 |= FLAG2_DISABLE_AIM;
4083                                e1000e_write_itr(adapter, 0);
4084                        }
4085                } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
4086                        dev_info(&adapter->pdev->dev,
4087                                 "Interrupt Throttle Rate on\n");
4088                        adapter->flags2 &= ~FLAG2_DISABLE_AIM;
4089                        adapter->itr = 20000;
4090                        e1000e_write_itr(adapter, adapter->itr);
4091                }
4092        }
4093
4094        if (hw->mac.type >= e1000_pch_spt)
4095                e1000_flush_desc_rings(adapter);
4096        /* Allow time for pending master requests to run */
4097        mac->ops.reset_hw(hw);
4098
4099        /* For parts with AMT enabled, let the firmware know
4100         * that the network interface is in control
4101         */
4102        if (adapter->flags & FLAG_HAS_AMT)
4103                e1000e_get_hw_control(adapter);
4104
4105        ew32(WUC, 0);
4106
4107        if (mac->ops.init_hw(hw))
4108                e_err("Hardware Error\n");
4109
4110        e1000_update_mng_vlan(adapter);
4111
4112        /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
4113        ew32(VET, ETH_P_8021Q);
4114
4115        e1000e_reset_adaptive(hw);
4116
4117        /* restore systim and hwtstamp settings */
4118        e1000e_systim_reset(adapter);
4119
4120        /* Set EEE advertisement as appropriate */
4121        if (adapter->flags2 & FLAG2_HAS_EEE) {
4122                s32 ret_val;
4123                u16 adv_addr;
4124
4125                switch (hw->phy.type) {
4126                case e1000_phy_82579:
4127                        adv_addr = I82579_EEE_ADVERTISEMENT;
4128                        break;
4129                case e1000_phy_i217:
4130                        adv_addr = I217_EEE_ADVERTISEMENT;
4131                        break;
4132                default:
4133                        dev_err(&adapter->pdev->dev,
4134                                "Invalid PHY type setting EEE advertisement\n");
4135                        return;
4136                }
4137
4138                ret_val = hw->phy.ops.acquire(hw);
4139                if (ret_val) {
4140                        dev_err(&adapter->pdev->dev,
4141                                "EEE advertisement - unable to acquire PHY\n");
4142                        return;
4143                }
4144
4145                e1000_write_emi_reg_locked(hw, adv_addr,
4146                                           hw->dev_spec.ich8lan.eee_disable ?
4147                                           0 : adapter->eee_advert);
4148
4149                hw->phy.ops.release(hw);
4150        }
4151
4152        if (!netif_running(adapter->netdev) &&
4153            !test_bit(__E1000_TESTING, &adapter->state))
4154                e1000_power_down_phy(adapter);
4155
4156        e1000_get_phy_info(hw);
4157
4158        if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
4159            !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
4160                u16 phy_data = 0;
4161                /* speed up time to link by disabling smart power down, ignore
4162                 * the return value of this function because there is nothing
4163                 * different we would do if it failed
4164                 */
4165                e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
4166                phy_data &= ~IGP02E1000_PM_SPD;
4167                e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
4168        }
4169        if (hw->mac.type >= e1000_pch_spt && adapter->int_mode == 0) {
4170                u32 reg;
4171
4172                /* Fextnvm7 @ 0xe4[2] = 1 */
4173                reg = er32(FEXTNVM7);
4174                reg |= E1000_FEXTNVM7_SIDE_CLK_UNGATE;
4175                ew32(FEXTNVM7, reg);
4176                /* Fextnvm9 @ 0x5bb4[13:12] = 11 */
4177                reg = er32(FEXTNVM9);
4178                reg |= E1000_FEXTNVM9_IOSFSB_CLKGATE_DIS |
4179                       E1000_FEXTNVM9_IOSFSB_CLKREQ_DIS;
4180                ew32(FEXTNVM9, reg);
4181        }
4182
4183}
4184
4185/**
4186 * e1000e_trigger_lsc - trigger an LSC interrupt
4187 * @adapter: 
4188 *
4189 * Fire a link status change interrupt to start the watchdog.
4190 **/
4191static void e1000e_trigger_lsc(struct e1000_adapter *adapter)
4192{
4193        struct e1000_hw *hw = &adapter->hw;
4194
4195        if (adapter->msix_entries)
4196                ew32(ICS, E1000_ICS_LSC | E1000_ICS_OTHER);
4197        else
4198                ew32(ICS, E1000_ICS_LSC);
4199}
4200
4201void e1000e_up(struct e1000_adapter *adapter)
4202{
4203        /* hardware has been reset, we need to reload some things */
4204        e1000_configure(adapter);
4205
4206        clear_bit(__E1000_DOWN, &adapter->state);
4207
4208        if (adapter->msix_entries)
4209                e1000_configure_msix(adapter);
4210        e1000_irq_enable(adapter);
4211
4212        netif_start_queue(adapter->netdev);
4213
4214        e1000e_trigger_lsc(adapter);
4215}
4216
4217static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
4218{
4219        struct e1000_hw *hw = &adapter->hw;
4220
4221        if (!(adapter->flags2 & FLAG2_DMA_BURST))
4222                return;
4223
4224        /* flush pending descriptor writebacks to memory */
4225        ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4226        ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4227
4228        /* execute the writes immediately */
4229        e1e_flush();
4230
4231        /* due to rare timing issues, write to TIDV/RDTR again to ensure the
4232         * write is successful
4233         */
4234        ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4235        ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4236
4237        /* execute the writes immediately */
4238        e1e_flush();
4239}
4240
4241static void e1000e_update_stats(struct e1000_adapter *adapter);
4242
4243/**
4244 * e1000e_down - quiesce the device and optionally reset the hardware
4245 * @adapter: board private structure
4246 * @reset: boolean flag to reset the hardware or not
4247 */
4248void e1000e_down(struct e1000_adapter *adapter, bool reset)
4249{
4250        struct net_device *netdev = adapter->netdev;
4251        struct e1000_hw *hw = &adapter->hw;
4252        u32 tctl, rctl;
4253
4254        /* signal that we're down so the interrupt handler does not
4255         * reschedule our watchdog timer
4256         */
4257        set_bit(__E1000_DOWN, &adapter->state);
4258
4259        netif_carrier_off(netdev);
4260
4261        /* disable receives in the hardware */
4262        rctl = er32(RCTL);
4263        if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
4264                ew32(RCTL, rctl & ~E1000_RCTL_EN);
4265        /* flush and sleep below */
4266
4267        netif_stop_queue(netdev);
4268
4269        /* disable transmits in the hardware */
4270        tctl = er32(TCTL);
4271        tctl &= ~E1000_TCTL_EN;
4272        ew32(TCTL, tctl);
4273
4274        /* flush both disables and wait for them to finish */
4275        e1e_flush();
4276        usleep_range(10000, 20000);
4277
4278        e1000_irq_disable(adapter);
4279
4280        napi_synchronize(&adapter->napi);
4281
4282        del_timer_sync(&adapter->watchdog_timer);
4283        del_timer_sync(&adapter->phy_info_timer);
4284
4285        spin_lock(&adapter->stats64_lock);
4286        e1000e_update_stats(adapter);
4287        spin_unlock(&adapter->stats64_lock);
4288
4289        e1000e_flush_descriptors(adapter);
4290
4291        adapter->link_speed = 0;
4292        adapter->link_duplex = 0;
4293
4294        /* Disable Si errata workaround on PCHx for jumbo frame flow */
4295        if ((hw->mac.type >= e1000_pch2lan) &&
4296            (adapter->netdev->mtu > ETH_DATA_LEN) &&
4297            e1000_lv_jumbo_workaround_ich8lan(hw, false))
4298                e_dbg("failed to disable jumbo frame workaround mode\n");
4299
4300        if (!pci_channel_offline(adapter->pdev)) {
4301                if (reset)
4302                        e1000e_reset(adapter);
4303                else if (hw->mac.type >= e1000_pch_spt)
4304                        e1000_flush_desc_rings(adapter);
4305        }
4306        e1000_clean_tx_ring(adapter->tx_ring);
4307        e1000_clean_rx_ring(adapter->rx_ring);
4308}
4309
4310void e1000e_reinit_locked(struct e1000_adapter *adapter)
4311{
4312        might_sleep();
4313        while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4314                usleep_range(1000, 2000);
4315        e1000e_down(adapter, true);
4316        e1000e_up(adapter);
4317        clear_bit(__E1000_RESETTING, &adapter->state);
4318}
4319
4320/**
4321 * e1000e_sanitize_systim - sanitize raw cycle counter reads
4322 * @hw: pointer to the HW structure
4323 * @systim: PHC time value read, sanitized and returned
4324 * @sts: structure to hold system time before and after reading SYSTIML,
4325 * may be NULL
4326 *
4327 * Errata for 82574/82583 possible bad bits read from SYSTIMH/L:
4328 * check to see that the time is incrementing at a reasonable
4329 * rate and is a multiple of incvalue.
4330 **/
4331static u64 e1000e_sanitize_systim(struct e1000_hw *hw, u64 systim,
4332                                  struct ptp_system_timestamp *sts)
4333{
4334        u64 time_delta, rem, temp;
4335        u64 systim_next;
4336        u32 incvalue;
4337        int i;
4338
4339        incvalue = er32(TIMINCA) & E1000_TIMINCA_INCVALUE_MASK;
4340        for (i = 0; i < E1000_MAX_82574_SYSTIM_REREADS; i++) {
4341                /* latch SYSTIMH on read of SYSTIML */
4342                ptp_read_system_prets(sts);
4343                systim_next = (u64)er32(SYSTIML);
4344                ptp_read_system_postts(sts);
4345                systim_next |= (u64)er32(SYSTIMH) << 32;
4346
4347                time_delta = systim_next - systim;
4348                temp = time_delta;
4349                /* VMWare users have seen incvalue of zero, don't div / 0 */
4350                rem = incvalue ? do_div(temp, incvalue) : (time_delta != 0);
4351
4352                systim = systim_next;
4353
4354                if ((time_delta < E1000_82574_SYSTIM_EPSILON) && (rem == 0))
4355                        break;
4356        }
4357
4358        return systim;
4359}
4360
4361/**
4362 * e1000e_read_systim - read SYSTIM register
4363 * @adapter: board private structure
4364 * @sts: structure which will contain system time before and after reading
4365 * SYSTIML, may be NULL
4366 **/
4367u64 e1000e_read_systim(struct e1000_adapter *adapter,
4368                       struct ptp_system_timestamp *sts)
4369{
4370        struct e1000_hw *hw = &adapter->hw;
4371        u32 systimel, systimel_2, systimeh;
4372        u64 systim;
4373        /* SYSTIMH latching upon SYSTIML read does not work well.
4374         * This means that if SYSTIML overflows after we read it but before
4375         * we read SYSTIMH, the value of SYSTIMH has been incremented and we
4376         * will experience a huge non linear increment in the systime value
4377         * to fix that we test for overflow and if true, we re-read systime.
4378         */
4379        ptp_read_system_prets(sts);
4380        systimel = er32(SYSTIML);
4381        ptp_read_system_postts(sts);
4382        systimeh = er32(SYSTIMH);
4383        /* Is systimel is so large that overflow is possible? */
4384        if (systimel >= (u32)0xffffffff - E1000_TIMINCA_INCVALUE_MASK) {
4385                ptp_read_system_prets(sts);
4386                systimel_2 = er32(SYSTIML);
4387                ptp_read_system_postts(sts);
4388                if (systimel > systimel_2) {
4389                        /* There was an overflow, read again SYSTIMH, and use
4390                         * systimel_2
4391                         */
4392                        systimeh = er32(SYSTIMH);
4393                        systimel = systimel_2;
4394                }
4395        }
4396        systim = (u64)systimel;
4397        systim |= (u64)systimeh << 32;
4398
4399        if (adapter->flags2 & FLAG2_CHECK_SYSTIM_OVERFLOW)
4400                systim = e1000e_sanitize_systim(hw, systim, sts);
4401
4402        return systim;
4403}
4404
4405/**
4406 * e1000e_cyclecounter_read - read raw cycle counter (used by time counter)
4407 * @cc: cyclecounter structure
4408 **/
4409static u64 e1000e_cyclecounter_read(const struct cyclecounter *cc)
4410{
4411        struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,
4412                                                     cc);
4413
4414        return e1000e_read_systim(adapter, NULL);
4415}
4416
4417/**
4418 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
4419 * @adapter: board private structure to initialize
4420 *
4421 * e1000_sw_init initializes the Adapter private data structure.
4422 * Fields are initialized based on PCI device information and
4423 * OS network device settings (MTU size).
4424 **/
4425static int e1000_sw_init(struct e1000_adapter *adapter)
4426{
4427        struct net_device *netdev = adapter->netdev;
4428
4429        adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
4430        adapter->rx_ps_bsize0 = 128;
4431        adapter->max_frame_size = netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
4432        adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
4433        adapter->tx_ring_count = E1000_DEFAULT_TXD;
4434        adapter->rx_ring_count = E1000_DEFAULT_RXD;
4435
4436        spin_lock_init(&adapter->stats64_lock);
4437
4438        e1000e_set_interrupt_capability(adapter);
4439
4440        if (e1000_alloc_queues(adapter))
4441                return -ENOMEM;
4442
4443        /* Setup hardware time stamping cyclecounter */
4444        if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
4445                adapter->cc.read = e1000e_cyclecounter_read;
4446                adapter->cc.mask = CYCLECOUNTER_MASK(64);
4447                adapter->cc.mult = 1;
4448                /* cc.shift set in e1000e_get_base_tininca() */
4449
4450                spin_lock_init(&adapter->systim_lock);
4451                INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work);
4452        }
4453
4454        /* Explicitly disable IRQ since the NIC can be in any state. */
4455        e1000_irq_disable(adapter);
4456
4457        set_bit(__E1000_DOWN, &adapter->state);
4458        return 0;
4459}
4460
4461/**
4462 * e1000_intr_msi_test - Interrupt Handler
4463 * @irq: interrupt number
4464 * @data: pointer to a network interface device structure
4465 **/
4466static irqreturn_t e1000_intr_msi_test(int __always_unused irq, void *data)
4467{
4468        struct net_device *netdev = data;
4469        struct e1000_adapter *adapter = netdev_priv(netdev);
4470        struct e1000_hw *hw = &adapter->hw;
4471        u32 icr = er32(ICR);
4472
4473        e_dbg("icr is %08X\n", icr);
4474        if (icr & E1000_ICR_RXSEQ) {
4475                adapter->flags &= ~FLAG_MSI_TEST_FAILED;
4476                /* Force memory writes to complete before acknowledging the
4477                 * interrupt is handled.
4478                 */
4479                wmb();
4480        }
4481
4482        return IRQ_HANDLED;
4483}
4484
4485/**
4486 * e1000_test_msi_interrupt - Returns 0 for successful test
4487 * @adapter: board private struct
4488 *
4489 * code flow taken from tg3.c
4490 **/
4491static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
4492{
4493        struct net_device *netdev = adapter->netdev;
4494        struct e1000_hw *hw = &adapter->hw;
4495        int err;
4496
4497        /* poll_enable hasn't been called yet, so don't need disable */
4498        /* clear any pending events */
4499        er32(ICR);
4500
4501        /* free the real vector and request a test handler */
4502        e1000_free_irq(adapter);
4503        e1000e_reset_interrupt_capability(adapter);
4504
4505        /* Assume that the test fails, if it succeeds then the test
4506         * MSI irq handler will unset this flag
4507         */
4508        adapter->flags |= FLAG_MSI_TEST_FAILED;
4509
4510        err = pci_enable_msi(adapter->pdev);
4511        if (err)
4512                goto msi_test_failed;
4513
4514        err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
4515                          netdev->name, netdev);
4516        if (err) {
4517                pci_disable_msi(adapter->pdev);
4518                goto msi_test_failed;
4519        }
4520
4521        /* Force memory writes to complete before enabling and firing an
4522         * interrupt.
4523         */
4524        wmb();
4525
4526        e1000_irq_enable(adapter);
4527
4528        /* fire an unusual interrupt on the test handler */
4529        ew32(ICS, E1000_ICS_RXSEQ);
4530        e1e_flush();
4531        msleep(100);
4532
4533        e1000_irq_disable(adapter);
4534
4535        rmb();                  /* read flags after interrupt has been fired */
4536
4537        if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4538                adapter->int_mode = E1000E_INT_MODE_LEGACY;
4539                e_info("MSI interrupt test failed, using legacy interrupt.\n");
4540        } else {
4541                e_dbg("MSI interrupt test succeeded!\n");
4542        }
4543
4544        free_irq(adapter->pdev->irq, netdev);
4545        pci_disable_msi(adapter->pdev);
4546
4547msi_test_failed:
4548        e1000e_set_interrupt_capability(adapter);
4549        return e1000_request_irq(adapter);
4550}
4551
4552/**
4553 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
4554 * @adapter: board private struct
4555 *
4556 * code flow taken from tg3.c, called with e1000 interrupts disabled.
4557 **/
4558static int e1000_test_msi(struct e1000_adapter *adapter)
4559{
4560        int err;
4561        u16 pci_cmd;
4562
4563        if (!(adapter->flags & FLAG_MSI_ENABLED))
4564                return 0;
4565
4566        /* disable SERR in case the MSI write causes a master abort */
4567        pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4568        if (pci_cmd & PCI_COMMAND_SERR)
4569                pci_write_config_word(adapter->pdev, PCI_COMMAND,
4570                                      pci_cmd & ~PCI_COMMAND_SERR);
4571
4572        err = e1000_test_msi_interrupt(adapter);
4573
4574        /* re-enable SERR */
4575        if (pci_cmd & PCI_COMMAND_SERR) {
4576                pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4577                pci_cmd |= PCI_COMMAND_SERR;
4578                pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
4579        }
4580
4581        return err;
4582}
4583
4584/**
4585 * e1000e_open - Called when a network interface is made active
4586 * @netdev: network interface device structure
4587 *
4588 * Returns 0 on success, negative value on failure
4589 *
4590 * The open entry point is called when a network interface is made
4591 * active by the system (IFF_UP).  At this point all resources needed
4592 * for transmit and receive operations are allocated, the interrupt
4593 * handler is registered with the OS, the watchdog timer is started,
4594 * and the stack is notified that the interface is ready.
4595 **/
4596int e1000e_open(struct net_device *netdev)
4597{
4598        struct e1000_adapter *adapter = netdev_priv(netdev);
4599        struct e1000_hw *hw = &adapter->hw;
4600        struct pci_dev *pdev = adapter->pdev;
4601        int err;
4602
4603        /* disallow open during test */
4604        if (test_bit(__E1000_TESTING, &adapter->state))
4605                return -EBUSY;
4606
4607        pm_runtime_get_sync(&pdev->dev);
4608
4609        netif_carrier_off(netdev);
4610
4611        /* allocate transmit descriptors */
4612        err = e1000e_setup_tx_resources(adapter->tx_ring);
4613        if (err)
4614                goto err_setup_tx;
4615
4616        /* allocate receive descriptors */
4617        err = e1000e_setup_rx_resources(adapter->rx_ring);
4618        if (err)
4619                goto err_setup_rx;
4620
4621        /* If AMT is enabled, let the firmware know that the network
4622         * interface is now open and reset the part to a known state.
4623         */
4624        if (adapter->flags & FLAG_HAS_AMT) {
4625                e1000e_get_hw_control(adapter);
4626                e1000e_reset(adapter);
4627        }
4628
4629        e1000e_power_up_phy(adapter);
4630
4631        adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4632        if ((adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
4633                e1000_update_mng_vlan(adapter);
4634
4635        /* DMA latency requirement to workaround jumbo issue */
4636        pm_qos_add_request(&adapter->pm_qos_req, PM_QOS_CPU_DMA_LATENCY,
4637                           PM_QOS_DEFAULT_VALUE);
4638
4639        /* before we allocate an interrupt, we must be ready to handle it.
4640         * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4641         * as soon as we call pci_request_irq, so we have to setup our
4642         * clean_rx handler before we do so.
4643         */
4644        e1000_configure(adapter);
4645
4646        err = e1000_request_irq(adapter);
4647        if (err)
4648                goto err_req_irq;
4649
4650        /* Work around PCIe errata with MSI interrupts causing some chipsets to
4651         * ignore e1000e MSI messages, which means we need to test our MSI
4652         * interrupt now
4653         */
4654        if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
4655                err = e1000_test_msi(adapter);
4656                if (err) {
4657                        e_err("Interrupt allocation failed\n");
4658                        goto err_req_irq;
4659                }
4660        }
4661
4662        /* From here on the code is the same as e1000e_up() */
4663        clear_bit(__E1000_DOWN, &adapter->state);
4664
4665        napi_enable(&adapter->napi);
4666
4667        e1000_irq_enable(adapter);
4668
4669        adapter->tx_hang_recheck = false;
4670        netif_start_queue(netdev);
4671
4672        hw->mac.get_link_status = true;
4673        pm_runtime_put(&pdev->dev);
4674
4675        e1000e_trigger_lsc(adapter);
4676
4677        return 0;
4678
4679err_req_irq:
4680        pm_qos_remove_request(&adapter->pm_qos_req);
4681        e1000e_release_hw_control(adapter);
4682        e1000_power_down_phy(adapter);
4683        e1000e_free_rx_resources(adapter->rx_ring);
4684err_setup_rx:
4685        e1000e_free_tx_resources(adapter->tx_ring);
4686err_setup_tx:
4687        e1000e_reset(adapter);
4688        pm_runtime_put_sync(&pdev->dev);
4689
4690        return err;
4691}
4692
4693/**
4694 * e1000e_close - Disables a network interface
4695 * @netdev: network interface device structure
4696 *
4697 * Returns 0, this is not allowed to fail
4698 *
4699 * The close entry point is called when an interface is de-activated
4700 * by the OS.  The hardware is still under the drivers control, but
4701 * needs to be disabled.  A global MAC reset is issued to stop the
4702 * hardware, and all transmit and receive resources are freed.
4703 **/
4704int e1000e_close(struct net_device *netdev)
4705{
4706        struct e1000_adapter *adapter = netdev_priv(netdev);
4707        struct pci_dev *pdev = adapter->pdev;
4708        int count = E1000_CHECK_RESET_COUNT;
4709
4710        while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
4711                usleep_range(10000, 20000);
4712
4713        WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4714
4715        pm_runtime_get_sync(&pdev->dev);
4716
4717        if (!test_bit(__E1000_DOWN, &adapter->state)) {
4718                e1000e_down(adapter, true);
4719                e1000_free_irq(adapter);
4720
4721                /* Link status message must follow this format */
4722                pr_info("%s NIC Link is Down\n", adapter->netdev->name);
4723        }
4724
4725        napi_disable(&adapter->napi);
4726
4727        e1000e_free_tx_resources(adapter->tx_ring);
4728        e1000e_free_rx_resources(adapter->rx_ring);
4729
4730        /* kill manageability vlan ID if supported, but not if a vlan with
4731         * the same ID is registered on the host OS (let 8021q kill it)
4732         */
4733        if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
4734                e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
4735                                       adapter->mng_vlan_id);
4736
4737        /* If AMT is enabled, let the firmware know that the network
4738         * interface is now closed
4739         */
4740        if ((adapter->flags & FLAG_HAS_AMT) &&
4741            !test_bit(__E1000_TESTING, &adapter->state))
4742                e1000e_release_hw_control(adapter);
4743
4744        pm_qos_remove_request(&adapter->pm_qos_req);
4745
4746        pm_runtime_put_sync(&pdev->dev);
4747
4748        return 0;
4749}
4750
4751/**
4752 * e1000_set_mac - Change the Ethernet Address of the NIC
4753 * @netdev: network interface device structure
4754 * @p: pointer to an address structure
4755 *
4756 * Returns 0 on success, negative on failure
4757 **/
4758static int e1000_set_mac(struct net_device *netdev, void *p)
4759{
4760        struct e1000_adapter *adapter = netdev_priv(netdev);
4761        struct e1000_hw *hw = &adapter->hw;
4762        struct sockaddr *addr = p;
4763
4764        if (!is_valid_ether_addr(addr->sa_data))
4765                return -EADDRNOTAVAIL;
4766
4767        memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4768        memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
4769
4770        hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
4771
4772        if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
4773                /* activate the work around */
4774                e1000e_set_laa_state_82571(&adapter->hw, 1);
4775
4776                /* Hold a copy of the LAA in RAR[14] This is done so that
4777                 * between the time RAR[0] gets clobbered  and the time it
4778                 * gets fixed (in e1000_watchdog), the actual LAA is in one
4779                 * of the RARs and no incoming packets directed to this port
4780                 * are dropped. Eventually the LAA will be in RAR[0] and
4781                 * RAR[14]
4782                 */
4783                hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr,
4784                                    adapter->hw.mac.rar_entry_count - 1);
4785        }
4786
4787        return 0;
4788}
4789
4790/**
4791 * e1000e_update_phy_task - work thread to update phy
4792 * @work: pointer to our work struct
4793 *
4794 * this worker thread exists because we must acquire a
4795 * semaphore to read the phy, which we could msleep while
4796 * waiting for it, and we can't msleep in a timer.
4797 **/
4798static void e1000e_update_phy_task(struct work_struct *work)
4799{
4800        struct e1000_adapter *adapter = container_of(work,
4801                                                     struct e1000_adapter,
4802                                                     update_phy_task);
4803        struct e1000_hw *hw = &adapter->hw;
4804
4805        if (test_bit(__E1000_DOWN, &adapter->state))
4806                return;
4807
4808        e1000_get_phy_info(hw);
4809
4810        /* Enable EEE on 82579 after link up */
4811        if (hw->phy.type >= e1000_phy_82579)
4812                e1000_set_eee_pchlan(hw);
4813}
4814
4815/**
4816 * e1000_update_phy_info - timre call-back to update PHY info
4817 * @data: pointer to adapter cast into an unsigned long
4818 *
4819 * Need to wait a few seconds after link up to get diagnostic information from
4820 * the phy
4821 **/
4822static void e1000_update_phy_info(struct timer_list *t)
4823{
4824        struct e1000_adapter *adapter = from_timer(adapter, t, phy_info_timer);
4825
4826        if (test_bit(__E1000_DOWN, &adapter->state))
4827                return;
4828
4829        schedule_work(&adapter->update_phy_task);
4830}
4831
4832/**
4833 * e1000e_update_phy_stats - Update the PHY statistics counters
4834 * @adapter: board private structure
4835 *
4836 * Read/clear the upper 16-bit PHY registers and read/accumulate lower
4837 **/
4838static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
4839{
4840        struct e1000_hw *hw = &adapter->hw;
4841        s32 ret_val;
4842        u16 phy_data;
4843
4844        ret_val = hw->phy.ops.acquire(hw);
4845        if (ret_val)
4846                return;
4847
4848        /* A page set is expensive so check if already on desired page.
4849         * If not, set to the page with the PHY status registers.
4850         */
4851        hw->phy.addr = 1;
4852        ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4853                                           &phy_data);
4854        if (ret_val)
4855                goto release;
4856        if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
4857                ret_val = hw->phy.ops.set_page(hw,
4858                                               HV_STATS_PAGE << IGP_PAGE_SHIFT);
4859                if (ret_val)
4860                        goto release;
4861        }
4862
4863        /* Single Collision Count */
4864        hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
4865        ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
4866        if (!ret_val)
4867                adapter->stats.scc += phy_data;
4868
4869        /* Excessive Collision Count */
4870        hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
4871        ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
4872        if (!ret_val)
4873                adapter->stats.ecol += phy_data;
4874
4875        /* Multiple Collision Count */
4876        hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
4877        ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
4878        if (!ret_val)
4879                adapter->stats.mcc += phy_data;
4880
4881        /* Late Collision Count */
4882        hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
4883        ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
4884        if (!ret_val)
4885                adapter->stats.latecol += phy_data;
4886
4887        /* Collision Count - also used for adaptive IFS */
4888        hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
4889        ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
4890        if (!ret_val)
4891                hw->mac.collision_delta = phy_data;
4892
4893        /* Defer Count */
4894        hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
4895        ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
4896        if (!ret_val)
4897                adapter->stats.dc += phy_data;
4898
4899        /* Transmit with no CRS */
4900        hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
4901        ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
4902        if (!ret_val)
4903                adapter->stats.tncrs += phy_data;
4904
4905release:
4906        hw->phy.ops.release(hw);
4907}
4908
4909/**
4910 * e1000e_update_stats - Update the board statistics counters
4911 * @adapter: board private structure
4912 **/
4913static void e1000e_update_stats(struct e1000_adapter *adapter)
4914{
4915        struct net_device *netdev = adapter->netdev;
4916        struct e1000_hw *hw = &adapter->hw;
4917        struct pci_dev *pdev = adapter->pdev;
4918
4919        /* Prevent stats update while adapter is being reset, or if the pci
4920         * connection is down.
4921         */
4922        if (adapter->link_speed == 0)
4923                return;
4924        if (pci_channel_offline(pdev))
4925                return;
4926
4927        adapter->stats.crcerrs += er32(CRCERRS);
4928        adapter->stats.gprc += er32(GPRC);
4929        adapter->stats.gorc += er32(GORCL);
4930        er32(GORCH);            /* Clear gorc */
4931        adapter->stats.bprc += er32(BPRC);
4932        adapter->stats.mprc += er32(MPRC);
4933        adapter->stats.roc += er32(ROC);
4934
4935        adapter->stats.mpc += er32(MPC);
4936
4937        /* Half-duplex statistics */
4938        if (adapter->link_duplex == HALF_DUPLEX) {
4939                if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
4940                        e1000e_update_phy_stats(adapter);
4941                } else {
4942                        adapter->stats.scc += er32(SCC);
4943                        adapter->stats.ecol += er32(ECOL);
4944                        adapter->stats.mcc += er32(MCC);
4945                        adapter->stats.latecol += er32(LATECOL);
4946                        adapter->stats.dc += er32(DC);
4947
4948                        hw->mac.collision_delta = er32(COLC);
4949
4950                        if ((hw->mac.type != e1000_82574) &&
4951                            (hw->mac.type != e1000_82583))
4952                                adapter->stats.tncrs += er32(TNCRS);
4953                }
4954                adapter->stats.colc += hw->mac.collision_delta;
4955        }
4956
4957        adapter->stats.xonrxc += er32(XONRXC);
4958        adapter->stats.xontxc += er32(XONTXC);
4959        adapter->stats.xoffrxc += er32(XOFFRXC);
4960        adapter->stats.xofftxc += er32(XOFFTXC);
4961        adapter->stats.gptc += er32(GPTC);
4962        adapter->stats.gotc += er32(GOTCL);
4963        er32(GOTCH);            /* Clear gotc */
4964        adapter->stats.rnbc += er32(RNBC);
4965        adapter->stats.ruc += er32(RUC);
4966
4967        adapter->stats.mptc += er32(MPTC);
4968        adapter->stats.bptc += er32(BPTC);
4969
4970        /* used for adaptive IFS */
4971
4972        hw->mac.tx_packet_delta = er32(TPT);
4973        adapter->stats.tpt += hw->mac.tx_packet_delta;
4974
4975        adapter->stats.algnerrc += er32(ALGNERRC);
4976        adapter->stats.rxerrc += er32(RXERRC);
4977        adapter->stats.cexterr += er32(CEXTERR);
4978        adapter->stats.tsctc += er32(TSCTC);
4979        adapter->stats.tsctfc += er32(TSCTFC);
4980
4981        /* Fill out the OS statistics structure */
4982        netdev->stats.multicast = adapter->stats.mprc;
4983        netdev->stats.collisions = adapter->stats.colc;
4984
4985        /* Rx Errors */
4986
4987        /* RLEC on some newer hardware can be incorrect so build
4988         * our own version based on RUC and ROC
4989         */
4990        netdev->stats.rx_errors = adapter->stats.rxerrc +
4991            adapter->stats.crcerrs + adapter->stats.algnerrc +
4992            adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
4993        netdev->stats.rx_length_errors = adapter->stats.ruc +
4994            adapter->stats.roc;
4995        netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
4996        netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
4997        netdev->stats.rx_missed_errors = adapter->stats.mpc;
4998
4999        /* Tx Errors */
5000        netdev->stats.tx_errors = adapter->stats.ecol + adapter->stats.latecol;
5001        netdev->stats.tx_aborted_errors = adapter->stats.ecol;
5002        netdev->stats.tx_window_errors = adapter->stats.latecol;
5003        netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
5004
5005        /* Tx Dropped needs to be maintained elsewhere */
5006
5007        /* Management Stats */
5008        adapter->stats.mgptc += er32(MGTPTC);
5009        adapter->stats.mgprc += er32(MGTPRC);
5010        adapter->stats.mgpdc += er32(MGTPDC);
5011
5012        /* Correctable ECC Errors */
5013        if (hw->mac.type >= e1000_pch_lpt) {
5014                u32 pbeccsts = er32(PBECCSTS);
5015
5016                adapter->corr_errors +=
5017                    pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
5018                adapter->uncorr_errors +=
5019                    (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
5020                    E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
5021        }
5022}
5023
5024/**
5025 * e1000_phy_read_status - Update the PHY register status snapshot
5026 * @adapter: board private structure
5027 **/
5028static void e1000_phy_read_status(struct e1000_adapter *adapter)
5029{
5030        struct e1000_hw *hw = &adapter->hw;
5031        struct e1000_phy_regs *phy = &adapter->phy_regs;
5032
5033        if (!pm_runtime_suspended((&adapter->pdev->dev)->parent) &&
5034            (er32(STATUS) & E1000_STATUS_LU) &&
5035            (adapter->hw.phy.media_type == e1000_media_type_copper)) {
5036                int ret_val;
5037
5038                ret_val = e1e_rphy(hw, MII_BMCR, &phy->bmcr);
5039                ret_val |= e1e_rphy(hw, MII_BMSR, &phy->bmsr);
5040                ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise);
5041                ret_val |= e1e_rphy(hw, MII_LPA, &phy->lpa);
5042                ret_val |= e1e_rphy(hw, MII_EXPANSION, &phy->expansion);
5043                ret_val |= e1e_rphy(hw, MII_CTRL1000, &phy->ctrl1000);
5044                ret_val |= e1e_rphy(hw, MII_STAT1000, &phy->stat1000);
5045                ret_val |= e1e_rphy(hw, MII_ESTATUS, &phy->estatus);
5046                if (ret_val)
5047                        e_warn("Error reading PHY register\n");
5048        } else {
5049                /* Do not read PHY registers if link is not up
5050                 * Set values to typical power-on defaults
5051                 */
5052                phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
5053                phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
5054                             BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
5055                             BMSR_ERCAP);
5056                phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
5057                                  ADVERTISE_ALL | ADVERTISE_CSMA);
5058                phy->lpa = 0;
5059                phy->expansion = EXPANSION_ENABLENPAGE;
5060                phy->ctrl1000 = ADVERTISE_1000FULL;
5061                phy->stat1000 = 0;
5062                phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
5063        }
5064}
5065
5066static void e1000_print_link_info(struct e1000_adapter *adapter)
5067{
5068        struct e1000_hw *hw = &adapter->hw;
5069        u32 ctrl = er32(CTRL);
5070
5071        /* Link status message must follow this format for user tools */
5072        pr_info("%s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
5073                adapter->netdev->name, adapter->link_speed,
5074                adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half",
5075                (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" :
5076                (ctrl & E1000_CTRL_RFCE) ? "Rx" :
5077                (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None");
5078}
5079
5080static bool e1000e_has_link(struct e1000_adapter *adapter)
5081{
5082        struct e1000_hw *hw = &adapter->hw;
5083        bool link_active = false;
5084        s32 ret_val = 0;
5085
5086        /* get_link_status is set on LSC (link status) interrupt or
5087         * Rx sequence error interrupt.  get_link_status will stay
5088         * true until the check_for_link establishes link
5089         * for copper adapters ONLY
5090         */
5091        switch (hw->phy.media_type) {
5092        case e1000_media_type_copper:
5093                if (hw->mac.get_link_status) {
5094                        ret_val = hw->mac.ops.check_for_link(hw);
5095                        link_active = !hw->mac.get_link_status;
5096                } else {
5097                        link_active = true;
5098                }
5099                break;
5100        case e1000_media_type_fiber:
5101                ret_val = hw->mac.ops.check_for_link(hw);
5102                link_active = !!(er32(STATUS) & E1000_STATUS_LU);
5103                break;
5104        case e1000_media_type_internal_serdes:
5105                ret_val = hw->mac.ops.check_for_link(hw);
5106                link_active = hw->mac.serdes_has_link;
5107                break;
5108        default:
5109        case e1000_media_type_unknown:
5110                break;
5111        }
5112
5113        if ((ret_val == -E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
5114            (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
5115                /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
5116                e_info("Gigabit has been disabled, downgrading speed\n");
5117        }
5118
5119        return link_active;
5120}
5121
5122static void e1000e_enable_receives(struct e1000_adapter *adapter)
5123{
5124        /* make sure the receive unit is started */
5125        if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
5126            (adapter->flags & FLAG_RESTART_NOW)) {
5127                struct e1000_hw *hw = &adapter->hw;
5128                u32 rctl = er32(RCTL);
5129
5130                ew32(RCTL, rctl | E1000_RCTL_EN);
5131                adapter->flags &= ~FLAG_RESTART_NOW;
5132        }
5133}
5134
5135static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
5136{
5137        struct e1000_hw *hw = &adapter->hw;
5138
5139        /* With 82574 controllers, PHY needs to be checked periodically
5140         * for hung state and reset, if two calls return true
5141         */
5142        if (e1000_check_phy_82574(hw))
5143                adapter->phy_hang_count++;
5144        else
5145                adapter->phy_hang_count = 0;
5146
5147        if (adapter->phy_hang_count > 1) {
5148                adapter->phy_hang_count = 0;
5149                e_dbg("PHY appears hung - resetting\n");
5150                schedule_work(&adapter->reset_task);
5151        }
5152}
5153
5154/**
5155 * e1000_watchdog - Timer Call-back
5156 * @data: pointer to adapter cast into an unsigned long
5157 **/
5158static void e1000_watchdog(struct timer_list *t)
5159{
5160        struct e1000_adapter *adapter = from_timer(adapter, t, watchdog_timer);
5161
5162        /* Do the rest outside of interrupt context */
5163        schedule_work(&adapter->watchdog_task);
5164
5165        /* TODO: make this use queue_delayed_work() */
5166}
5167
5168static void e1000_watchdog_task(struct work_struct *work)
5169{
5170        struct e1000_adapter *adapter = container_of(work,
5171                                                     struct e1000_adapter,
5172                                                     watchdog_task);
5173        struct net_device *netdev = adapter->netdev;
5174        struct e1000_mac_info *mac = &adapter->hw.mac;
5175        struct e1000_phy_info *phy = &adapter->hw.phy;
5176        struct e1000_ring *tx_ring = adapter->tx_ring;
5177        struct e1000_hw *hw = &adapter->hw;
5178        u32 link, tctl;
5179
5180        if (test_bit(__E1000_DOWN, &adapter->state))
5181                return;
5182
5183        link = e1000e_has_link(adapter);
5184        if ((netif_carrier_ok(netdev)) && link) {
5185                /* Cancel scheduled suspend requests. */
5186                pm_runtime_resume(netdev->dev.parent);
5187
5188                e1000e_enable_receives(adapter);
5189                goto link_up;
5190        }
5191
5192        if ((e1000e_enable_tx_pkt_filtering(hw)) &&
5193            (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
5194                e1000_update_mng_vlan(adapter);
5195
5196        if (link) {
5197                if (!netif_carrier_ok(netdev)) {
5198                        bool txb2b = true;
5199
5200                        /* Cancel scheduled suspend requests. */
5201                        pm_runtime_resume(netdev->dev.parent);
5202
5203                        /* update snapshot of PHY registers on LSC */
5204                        e1000_phy_read_status(adapter);
5205                        mac->ops.get_link_up_info(&adapter->hw,
5206                                                  &adapter->link_speed,
5207                                                  &adapter->link_duplex);
5208                        e1000_print_link_info(adapter);
5209
5210                        /* check if SmartSpeed worked */
5211                        e1000e_check_downshift(hw);
5212                        if (phy->speed_downgraded)
5213                                netdev_warn(netdev,
5214                                            "Link Speed was downgraded by SmartSpeed\n");
5215
5216                        /* On supported PHYs, check for duplex mismatch only
5217                         * if link has autonegotiated at 10/100 half
5218                         */
5219                        if ((hw->phy.type == e1000_phy_igp_3 ||
5220                             hw->phy.type == e1000_phy_bm) &&
5221                            hw->mac.autoneg &&
5222                            (adapter->link_speed == SPEED_10 ||
5223                             adapter->link_speed == SPEED_100) &&
5224                            (adapter->link_duplex == HALF_DUPLEX)) {
5225                                u16 autoneg_exp;
5226
5227                                e1e_rphy(hw, MII_EXPANSION, &autoneg_exp);
5228
5229                                if (!(autoneg_exp & EXPANSION_NWAY))
5230                                        e_info("Autonegotiated half duplex but link partner cannot autoneg.  Try forcing full duplex if link gets many collisions.\n");
5231                        }
5232
5233                        /* adjust timeout factor according to speed/duplex */
5234                        adapter->tx_timeout_factor = 1;
5235                        switch (adapter->link_speed) {
5236                        case SPEED_10:
5237                                txb2b = false;
5238                                adapter->tx_timeout_factor = 16;
5239                                break;
5240                        case SPEED_100:
5241                                txb2b = false;
5242                                adapter->tx_timeout_factor = 10;
5243                                break;
5244                        }
5245
5246                        /* workaround: re-program speed mode bit after
5247                         * link-up event
5248                         */
5249                        if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
5250                            !txb2b) {
5251                                u32 tarc0;
5252
5253                                tarc0 = er32(TARC(0));
5254                                tarc0 &= ~SPEED_MODE_BIT;
5255                                ew32(TARC(0), tarc0);
5256                        }
5257
5258                        /* disable TSO for pcie and 10/100 speeds, to avoid
5259                         * some hardware issues
5260                         */
5261                        if (!(adapter->flags & FLAG_TSO_FORCE)) {
5262                                switch (adapter->link_speed) {
5263                                case SPEED_10:
5264                                case SPEED_100:
5265                                        e_info("10/100 speed: disabling TSO\n");
5266                                        netdev->features &= ~NETIF_F_TSO;
5267                                        netdev->features &= ~NETIF_F_TSO6;
5268                                        break;
5269                                case SPEED_1000:
5270                                        netdev->features |= NETIF_F_TSO;
5271                                        netdev->features |= NETIF_F_TSO6;
5272                                        break;
5273                                default:
5274                                        /* oops */
5275                                        break;
5276                                }
5277                        }
5278
5279                        /* enable transmits in the hardware, need to do this
5280                         * after setting TARC(0)
5281                         */
5282                        tctl = er32(TCTL);
5283                        tctl |= E1000_TCTL_EN;
5284                        ew32(TCTL, tctl);
5285
5286                        /* Perform any post-link-up configuration before
5287                         * reporting link up.
5288                         */
5289                        if (phy->ops.cfg_on_link_up)
5290                                phy->ops.cfg_on_link_up(hw);
5291
5292                        netif_carrier_on(netdev);
5293
5294                        if (!test_bit(__E1000_DOWN, &adapter->state))
5295                                mod_timer(&adapter->phy_info_timer,
5296                                          round_jiffies(jiffies + 2 * HZ));
5297                }
5298        } else {
5299                if (netif_carrier_ok(netdev)) {
5300                        adapter->link_speed = 0;
5301                        adapter->link_duplex = 0;
5302                        /* Link status message must follow this format */
5303                        pr_info("%s NIC Link is Down\n", adapter->netdev->name);
5304                        netif_carrier_off(netdev);
5305                        if (!test_bit(__E1000_DOWN, &adapter->state))
5306                                mod_timer(&adapter->phy_info_timer,
5307                                          round_jiffies(jiffies + 2 * HZ));
5308
5309                        /* 8000ES2LAN requires a Rx packet buffer work-around
5310                         * on link down event; reset the controller to flush
5311                         * the Rx packet buffer.
5312                         *
5313                         * If the link is lost the controller stops DMA, but
5314                         * if there is queued Tx work it cannot be done.  So
5315                         * reset the controller to flush the Tx packet buffers.
5316                         */
5317                        if ((adapter->flags & FLAG_RX_NEEDS_RESTART) ||
5318                            e1000_desc_unused(tx_ring) + 1 < tx_ring->count)
5319                                adapter->flags |= FLAG_RESTART_NOW;
5320                        else
5321                                pm_schedule_suspend(netdev->dev.parent,
5322                                                    LINK_TIMEOUT);
5323                }
5324        }
5325
5326link_up:
5327        spin_lock(&adapter->stats64_lock);
5328        e1000e_update_stats(adapter);
5329
5330        mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
5331        adapter->tpt_old = adapter->stats.tpt;
5332        mac->collision_delta = adapter->stats.colc - adapter->colc_old;
5333        adapter->colc_old = adapter->stats.colc;
5334
5335        adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
5336        adapter->gorc_old = adapter->stats.gorc;
5337        adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
5338        adapter->gotc_old = adapter->stats.gotc;
5339        spin_unlock(&adapter->stats64_lock);
5340
5341        /* If reset is necessary, do it outside of interrupt context. */
5342        if (adapter->flags & FLAG_RESTART_NOW) {
5343                schedule_work(&adapter->reset_task);
5344                /* return immediately since reset is imminent */
5345                return;
5346        }
5347
5348        e1000e_update_adaptive(&adapter->hw);
5349
5350        /* Simple mode for Interrupt Throttle Rate (ITR) */
5351        if (adapter->itr_setting == 4) {
5352                /* Symmetric Tx/Rx gets a reduced ITR=2000;
5353                 * Total asymmetrical Tx or Rx gets ITR=8000;
5354                 * everyone else is between 2000-8000.
5355                 */
5356                u32 goc = (adapter->gotc + adapter->gorc) / 10000;
5357                u32 dif = (adapter->gotc > adapter->gorc ?
5358                           adapter->gotc - adapter->gorc :
5359                           adapter->gorc - adapter->gotc) / 10000;
5360                u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
5361
5362                e1000e_write_itr(adapter, itr);
5363        }
5364
5365        /* Cause software interrupt to ensure Rx ring is cleaned */
5366        if (adapter->msix_entries)
5367                ew32(ICS, adapter->rx_ring->ims_val);
5368        else
5369                ew32(ICS, E1000_ICS_RXDMT0);
5370
5371        /* flush pending descriptors to memory before detecting Tx hang */
5372        e1000e_flush_descriptors(adapter);
5373
5374        /* Force detection of hung controller every watchdog period */
5375        adapter->detect_tx_hung = true;
5376
5377        /* With 82571 controllers, LAA may be overwritten due to controller
5378         * reset from the other port. Set the appropriate LAA in RAR[0]
5379         */
5380        if (e1000e_get_laa_state_82571(hw))
5381                hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0);
5382
5383        if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
5384                e1000e_check_82574_phy_workaround(adapter);
5385
5386        /* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */
5387        if (adapter->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) {
5388                if ((adapter->flags2 & FLAG2_CHECK_RX_HWTSTAMP) &&
5389                    (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) {
5390                        er32(RXSTMPH);
5391                        adapter->rx_hwtstamp_cleared++;
5392                } else {
5393                        adapter->flags2 |= FLAG2_CHECK_RX_HWTSTAMP;
5394                }
5395        }
5396
5397        /* Reset the timer */
5398        if (!test_bit(__E1000_DOWN, &adapter->state))
5399                mod_timer(&adapter->watchdog_timer,
5400                          round_jiffies(jiffies + 2 * HZ));
5401}
5402
5403#define E1000_TX_FLAGS_CSUM             0x00000001
5404#define E1000_TX_FLAGS_VLAN             0x00000002
5405#define E1000_TX_FLAGS_TSO              0x00000004
5406#define E1000_TX_FLAGS_IPV4             0x00000008
5407#define E1000_TX_FLAGS_NO_FCS           0x00000010
5408#define E1000_TX_FLAGS_HWTSTAMP         0x00000020
5409#define E1000_TX_FLAGS_VLAN_MASK        0xffff0000
5410#define E1000_TX_FLAGS_VLAN_SHIFT       16
5411
5412static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb,
5413                     __be16 protocol)
5414{
5415        struct e1000_context_desc *context_desc;
5416        struct e1000_buffer *buffer_info;
5417        unsigned int i;
5418        u32 cmd_length = 0;
5419        u16 ipcse = 0, mss;
5420        u8 ipcss, ipcso, tucss, tucso, hdr_len;
5421        int err;
5422
5423        if (!skb_is_gso(skb))
5424                return 0;
5425
5426        err = skb_cow_head(skb, 0);
5427        if (err < 0)
5428                return err;
5429
5430        hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5431        mss = skb_shinfo(skb)->gso_size;
5432        if (protocol == htons(ETH_P_IP)) {
5433                struct iphdr *iph = ip_hdr(skb);
5434                iph->tot_len = 0;
5435                iph->check = 0;
5436                tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
5437                                                         0, IPPROTO_TCP, 0);
5438                cmd_length = E1000_TXD_CMD_IP;
5439                ipcse = skb_transport_offset(skb) - 1;
5440        } else if (skb_is_gso_v6(skb)) {
5441                ipv6_hdr(skb)->payload_len = 0;
5442                tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5443                                                       &ipv6_hdr(skb)->daddr,
5444                                                       0, IPPROTO_TCP, 0);
5445                ipcse = 0;
5446        }
5447        ipcss = skb_network_offset(skb);
5448        ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
5449        tucss = skb_transport_offset(skb);
5450        tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
5451
5452        cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
5453                       E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
5454
5455        i = tx_ring->next_to_use;
5456        context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5457        buffer_info = &tx_ring->buffer_info[i];
5458
5459        context_desc->lower_setup.ip_fields.ipcss = ipcss;
5460        context_desc->lower_setup.ip_fields.ipcso = ipcso;
5461        context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
5462        context_desc->upper_setup.tcp_fields.tucss = tucss;
5463        context_desc->upper_setup.tcp_fields.tucso = tucso;
5464        context_desc->upper_setup.tcp_fields.tucse = 0;
5465        context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
5466        context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
5467        context_desc->cmd_and_length = cpu_to_le32(cmd_length);
5468
5469        buffer_info->time_stamp = jiffies;
5470        buffer_info->next_to_watch = i;
5471
5472        i++;
5473        if (i == tx_ring->count)
5474                i = 0;
5475        tx_ring->next_to_use = i;
5476
5477        return 1;
5478}
5479
5480static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb,
5481                          __be16 protocol)
5482{
5483        struct e1000_adapter *adapter = tx_ring->adapter;
5484        struct e1000_context_desc *context_desc;
5485        struct e1000_buffer *buffer_info;
5486        unsigned int i;
5487        u8 css;
5488        u32 cmd_len = E1000_TXD_CMD_DEXT;
5489
5490        if (skb->ip_summed != CHECKSUM_PARTIAL)
5491                return false;
5492
5493        switch (protocol) {
5494        case cpu_to_be16(ETH_P_IP):
5495                if (ip_hdr(skb)->protocol == IPPROTO_TCP)
5496                        cmd_len |= E1000_TXD_CMD_TCP;
5497                break;
5498        case cpu_to_be16(ETH_P_IPV6):
5499                /* XXX not handling all IPV6 headers */
5500                if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
5501                        cmd_len |= E1000_TXD_CMD_TCP;
5502                break;
5503        default:
5504                if (unlikely(net_ratelimit()))
5505                        e_warn("checksum_partial proto=%x!\n",
5506                               be16_to_cpu(protocol));
5507                break;
5508        }
5509
5510        css = skb_checksum_start_offset(skb);
5511
5512        i = tx_ring->next_to_use;
5513        buffer_info = &tx_ring->buffer_info[i];
5514        context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5515
5516        context_desc->lower_setup.ip_config = 0;
5517        context_desc->upper_setup.tcp_fields.tucss = css;
5518        context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
5519        context_desc->upper_setup.tcp_fields.tucse = 0;
5520        context_desc->tcp_seg_setup.data = 0;
5521        context_desc->cmd_and_length = cpu_to_le32(cmd_len);
5522
5523        buffer_info->time_stamp = jiffies;
5524        buffer_info->next_to_watch = i;
5525
5526        i++;
5527        if (i == tx_ring->count)
5528                i = 0;
5529        tx_ring->next_to_use = i;
5530
5531        return true;
5532}
5533
5534static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
5535                        unsigned int first, unsigned int max_per_txd,
5536                        unsigned int nr_frags)
5537{
5538        struct e1000_adapter *adapter = tx_ring->adapter;
5539        struct pci_dev *pdev = adapter->pdev;
5540        struct e1000_buffer *buffer_info;
5541        unsigned int len = skb_headlen(skb);
5542        unsigned int offset = 0, size, count = 0, i;
5543        unsigned int f, bytecount, segs;
5544
5545        i = tx_ring->next_to_use;
5546
5547        while (len) {
5548                buffer_info = &tx_ring->buffer_info[i];
5549                size = min(len, max_per_txd);
5550
5551                buffer_info->length = size;
5552                buffer_info->time_stamp = jiffies;
5553                buffer_info->next_to_watch = i;
5554                buffer_info->dma = dma_map_single(&pdev->dev,
5555                                                  skb->data + offset,
5556                                                  size, DMA_TO_DEVICE);
5557                buffer_info->mapped_as_page = false;
5558                if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5559                        goto dma_error;
5560
5561                len -= size;
5562                offset += size;
5563                count++;
5564
5565                if (len) {
5566                        i++;
5567                        if (i == tx_ring->count)
5568                                i = 0;
5569                }
5570        }
5571
5572        for (f = 0; f < nr_frags; f++) {
5573                const struct skb_frag_struct *frag;
5574
5575                frag = &skb_shinfo(skb)->frags[f];
5576                len = skb_frag_size(frag);
5577                offset = 0;
5578
5579                while (len) {
5580                        i++;
5581                        if (i == tx_ring->count)
5582                                i = 0;
5583
5584                        buffer_info = &tx_ring->buffer_info[i];
5585                        size = min(len, max_per_txd);
5586
5587                        buffer_info->length = size;
5588                        buffer_info->time_stamp = jiffies;
5589                        buffer_info->next_to_watch = i;
5590                        buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
5591                                                            offset, size,
5592                                                            DMA_TO_DEVICE);
5593                        buffer_info->mapped_as_page = true;
5594                        if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5595                                goto dma_error;
5596
5597                        len -= size;
5598                        offset += size;
5599                        count++;
5600                }
5601        }
5602
5603        segs = skb_shinfo(skb)->gso_segs ? : 1;
5604        /* multiply data chunks by size of headers */
5605        bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
5606
5607        tx_ring->buffer_info[i].skb = skb;
5608        tx_ring->buffer_info[i].segs = segs;
5609        tx_ring->buffer_info[i].bytecount = bytecount;
5610        tx_ring->buffer_info[first].next_to_watch = i;
5611
5612        return count;
5613
5614dma_error:
5615        dev_err(&pdev->dev, "Tx DMA map failed\n");
5616        buffer_info->dma = 0;
5617        if (count)
5618                count--;
5619
5620        while (count--) {
5621                if (i == 0)
5622                        i += tx_ring->count;
5623                i--;
5624                buffer_info = &tx_ring->buffer_info[i];
5625                e1000_put_txbuf(tx_ring, buffer_info, true);
5626        }
5627
5628        return 0;
5629}
5630
5631static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
5632{
5633        struct e1000_adapter *adapter = tx_ring->adapter;
5634        struct e1000_tx_desc *tx_desc = NULL;
5635        struct e1000_buffer *buffer_info;
5636        u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
5637        unsigned int i;
5638
5639        if (tx_flags & E1000_TX_FLAGS_TSO) {
5640                txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
5641                    E1000_TXD_CMD_TSE;
5642                txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5643
5644                if (tx_flags & E1000_TX_FLAGS_IPV4)
5645                        txd_upper |= E1000_TXD_POPTS_IXSM << 8;
5646        }
5647
5648        if (tx_flags & E1000_TX_FLAGS_CSUM) {
5649                txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5650                txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5651        }
5652
5653        if (tx_flags & E1000_TX_FLAGS_VLAN) {
5654                txd_lower |= E1000_TXD_CMD_VLE;
5655                txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
5656        }
5657
5658        if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5659                txd_lower &= ~(E1000_TXD_CMD_IFCS);
5660
5661        if (unlikely(tx_flags & E1000_TX_FLAGS_HWTSTAMP)) {
5662                txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5663                txd_upper |= E1000_TXD_EXTCMD_TSTAMP;
5664        }
5665
5666        i = tx_ring->next_to_use;
5667
5668        do {
5669                buffer_info = &tx_ring->buffer_info[i];
5670                tx_desc = E1000_TX_DESC(*tx_ring, i);
5671                tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
5672                tx_desc->lower.data = cpu_to_le32(txd_lower |
5673                                                  buffer_info->length);
5674                tx_desc->upper.data = cpu_to_le32(txd_upper);
5675
5676                i++;
5677                if (i == tx_ring->count)
5678                        i = 0;
5679        } while (--count > 0);
5680
5681        tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
5682
5683        /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
5684        if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5685                tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
5686
5687        /* Force memory writes to complete before letting h/w
5688         * know there are new descriptors to fetch.  (Only
5689         * applicable for weak-ordered memory model archs,
5690         * such as IA-64).
5691         */
5692        wmb();
5693
5694        tx_ring->next_to_use = i;
5695}
5696
5697#define MINIMUM_DHCP_PACKET_SIZE 282
5698static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
5699                                    struct sk_buff *skb)
5700{
5701        struct e1000_hw *hw = &adapter->hw;
5702        u16 length, offset;
5703
5704        if (skb_vlan_tag_present(skb) &&
5705            !((skb_vlan_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
5706              (adapter->hw.mng_cookie.status &
5707               E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
5708                return 0;
5709
5710        if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
5711                return 0;
5712
5713        if (((struct ethhdr *)skb->data)->h_proto != htons(ETH_P_IP))
5714                return 0;
5715
5716        {
5717                const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data + 14);
5718                struct udphdr *udp;
5719
5720                if (ip->protocol != IPPROTO_UDP)
5721                        return 0;
5722
5723                udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
5724                if (ntohs(udp->dest) != 67)
5725                        return 0;
5726
5727                offset = (u8 *)udp + 8 - skb->data;
5728                length = skb->len - offset;
5729                return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
5730        }
5731
5732        return 0;
5733}
5734
5735static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5736{
5737        struct e1000_adapter *adapter = tx_ring->adapter;
5738
5739        netif_stop_queue(adapter->netdev);
5740        /* Herbert's original patch had:
5741         *  smp_mb__after_netif_stop_queue();
5742         * but since that doesn't exist yet, just open code it.
5743         */
5744        smp_mb();
5745
5746        /* We need to check again in a case another CPU has just
5747         * made room available.
5748         */
5749        if (e1000_desc_unused(tx_ring) < size)
5750                return -EBUSY;
5751
5752        /* A reprieve! */
5753        netif_start_queue(adapter->netdev);
5754        ++adapter->restart_queue;
5755        return 0;
5756}
5757
5758static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5759{
5760        BUG_ON(size > tx_ring->count);
5761
5762        if (e1000_desc_unused(tx_ring) >= size)
5763                return 0;
5764        return __e1000_maybe_stop_tx(tx_ring, size);
5765}
5766
5767static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5768                                    struct net_device *netdev)
5769{
5770        struct e1000_adapter *adapter = netdev_priv(netdev);
5771        struct e1000_ring *tx_ring = adapter->tx_ring;
5772        unsigned int first;
5773        unsigned int tx_flags = 0;
5774        unsigned int len = skb_headlen(skb);
5775        unsigned int nr_frags;
5776        unsigned int mss;
5777        int count = 0;
5778        int tso;
5779        unsigned int f;
5780        __be16 protocol = vlan_get_protocol(skb);
5781
5782        if (test_bit(__E1000_DOWN, &adapter->state)) {
5783                dev_kfree_skb_any(skb);
5784                return NETDEV_TX_OK;
5785        }
5786
5787        if (skb->len <= 0) {
5788                dev_kfree_skb_any(skb);
5789                return NETDEV_TX_OK;
5790        }
5791
5792        /* The minimum packet size with TCTL.PSP set is 17 bytes so
5793         * pad skb in order to meet this minimum size requirement
5794         */
5795        if (skb_put_padto(skb, 17))
5796                return NETDEV_TX_OK;
5797
5798        mss = skb_shinfo(skb)->gso_size;
5799        if (mss) {
5800                u8 hdr_len;
5801
5802                /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
5803                 * points to just header, pull a few bytes of payload from
5804                 * frags into skb->data
5805                 */
5806                hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5807                /* we do this workaround for ES2LAN, but it is un-necessary,
5808                 * avoiding it could save a lot of cycles
5809                 */
5810                if (skb->data_len && (hdr_len == len)) {
5811                        unsigned int pull_size;
5812
5813                        pull_size = min_t(unsigned int, 4, skb->data_len);
5814                        if (!__pskb_pull_tail(skb, pull_size)) {
5815                                e_err("__pskb_pull_tail failed.\n");
5816                                dev_kfree_skb_any(skb);
5817                                return NETDEV_TX_OK;
5818                        }
5819                        len = skb_headlen(skb);
5820                }
5821        }
5822
5823        /* reserve a descriptor for the offload context */
5824        if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
5825                count++;
5826        count++;
5827
5828        count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);
5829
5830        nr_frags = skb_shinfo(skb)->nr_frags;
5831        for (f = 0; f < nr_frags; f++)
5832                count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),
5833                                      adapter->tx_fifo_limit);
5834
5835        if (adapter->hw.mac.tx_pkt_filtering)
5836                e1000_transfer_dhcp_info(adapter, skb);
5837
5838        /* need: count + 2 desc gap to keep tail from touching
5839         * head, otherwise try next time
5840         */
5841        if (e1000_maybe_stop_tx(tx_ring, count + 2))
5842                return NETDEV_TX_BUSY;
5843
5844        if (skb_vlan_tag_present(skb)) {
5845                tx_flags |= E1000_TX_FLAGS_VLAN;
5846                tx_flags |= (skb_vlan_tag_get(skb) <<
5847                             E1000_TX_FLAGS_VLAN_SHIFT);
5848        }
5849
5850        first = tx_ring->next_to_use;
5851
5852        tso = e1000_tso(tx_ring, skb, protocol);
5853        if (tso < 0) {
5854                dev_kfree_skb_any(skb);
5855                return NETDEV_TX_OK;
5856        }
5857
5858        if (tso)
5859                tx_flags |= E1000_TX_FLAGS_TSO;
5860        else if (e1000_tx_csum(tx_ring, skb, protocol))
5861                tx_flags |= E1000_TX_FLAGS_CSUM;
5862
5863        /* Old method was to assume IPv4 packet by default if TSO was enabled.
5864         * 82571 hardware supports TSO capabilities for IPv6 as well...
5865         * no longer assume, we must.
5866         */
5867        if (protocol == htons(ETH_P_IP))
5868                tx_flags |= E1000_TX_FLAGS_IPV4;
5869
5870        if (unlikely(skb->no_fcs))
5871                tx_flags |= E1000_TX_FLAGS_NO_FCS;
5872
5873        /* if count is 0 then mapping error has occurred */
5874        count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
5875                             nr_frags);
5876        if (count) {
5877                if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
5878                    (adapter->flags & FLAG_HAS_HW_TIMESTAMP)) {
5879                        if (!adapter->tx_hwtstamp_skb) {
5880                                skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5881                                tx_flags |= E1000_TX_FLAGS_HWTSTAMP;
5882                                adapter->tx_hwtstamp_skb = skb_get(skb);
5883                                adapter->tx_hwtstamp_start = jiffies;
5884                                schedule_work(&adapter->tx_hwtstamp_work);
5885                        } else {
5886                                adapter->tx_hwtstamp_skipped++;
5887                        }
5888                }
5889
5890                skb_tx_timestamp(skb);
5891
5892                netdev_sent_queue(netdev, skb->len);
5893                e1000_tx_queue(tx_ring, tx_flags, count);
5894                /* Make sure there is space in the ring for the next send. */
5895                e1000_maybe_stop_tx(tx_ring,
5896                                    (MAX_SKB_FRAGS *
5897                                     DIV_ROUND_UP(PAGE_SIZE,
5898                                                  adapter->tx_fifo_limit) + 2));
5899
5900                if (!skb->xmit_more ||
5901                    netif_xmit_stopped(netdev_get_tx_queue(netdev, 0))) {
5902                        if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
5903                                e1000e_update_tdt_wa(tx_ring,
5904                                                     tx_ring->next_to_use);
5905                        else
5906                                writel(tx_ring->next_to_use, tx_ring->tail);
5907
5908                        /* we need this if more than one processor can write
5909                         * to our tail at a time, it synchronizes IO on
5910                         *IA64/Altix systems
5911                         */
5912                        mmiowb();
5913                }
5914        } else {
5915                dev_kfree_skb_any(skb);
5916                tx_ring->buffer_info[first].time_stamp = 0;
5917                tx_ring->next_to_use = first;
5918        }
5919
5920        return NETDEV_TX_OK;
5921}
5922
5923/**
5924 * e1000_tx_timeout - Respond to a Tx Hang
5925 * @netdev: network interface device structure
5926 **/
5927static void e1000_tx_timeout(struct net_device *netdev)
5928{
5929        struct e1000_adapter *adapter = netdev_priv(netdev);
5930
5931        /* Do the reset outside of interrupt context */
5932        adapter->tx_timeout_count++;
5933        schedule_work(&adapter->reset_task);
5934}
5935
5936static void e1000_reset_task(struct work_struct *work)
5937{
5938        struct e1000_adapter *adapter;
5939        adapter = container_of(work, struct e1000_adapter, reset_task);
5940
5941        /* don't run the task if already down */
5942        if (test_bit(__E1000_DOWN, &adapter->state))
5943                return;
5944
5945        if (!(adapter->flags & FLAG_RESTART_NOW)) {
5946                e1000e_dump(adapter);
5947                e_err("Reset adapter unexpectedly\n");
5948        }
5949        e1000e_reinit_locked(adapter);
5950}
5951
5952/**
5953 * e1000_get_stats64 - Get System Network Statistics
5954 * @netdev: network interface device structure
5955 * @stats: rtnl_link_stats64 pointer
5956 *
5957 * Returns the address of the device statistics structure.
5958 **/
5959void e1000e_get_stats64(struct net_device *netdev,
5960                        struct rtnl_link_stats64 *stats)
5961{
5962        struct e1000_adapter *adapter = netdev_priv(netdev);
5963
5964        spin_lock(&adapter->stats64_lock);
5965        e1000e_update_stats(adapter);
5966        /* Fill out the OS statistics structure */
5967        stats->rx_bytes = adapter->stats.gorc;
5968        stats->rx_packets = adapter->stats.gprc;
5969        stats->tx_bytes = adapter->stats.gotc;
5970        stats->tx_packets = adapter->stats.gptc;
5971        stats->multicast = adapter->stats.mprc;
5972        stats->collisions = adapter->stats.colc;
5973
5974        /* Rx Errors */
5975
5976        /* RLEC on some newer hardware can be incorrect so build
5977         * our own version based on RUC and ROC
5978         */
5979        stats->rx_errors = adapter->stats.rxerrc +
5980            adapter->stats.crcerrs + adapter->stats.algnerrc +
5981            adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
5982        stats->rx_length_errors = adapter->stats.ruc + adapter->stats.roc;
5983        stats->rx_crc_errors = adapter->stats.crcerrs;
5984        stats->rx_frame_errors = adapter->stats.algnerrc;
5985        stats->rx_missed_errors = adapter->stats.mpc;
5986
5987        /* Tx Errors */
5988        stats->tx_errors = adapter->stats.ecol + adapter->stats.latecol;
5989        stats->tx_aborted_errors = adapter->stats.ecol;
5990        stats->tx_window_errors = adapter->stats.latecol;
5991        stats->tx_carrier_errors = adapter->stats.tncrs;
5992
5993        /* Tx Dropped needs to be maintained elsewhere */
5994
5995        spin_unlock(&adapter->stats64_lock);
5996}
5997
5998/**
5999 * e1000_change_mtu - Change the Maximum Transfer Unit
6000 * @netdev: network interface device structure
6001 * @new_mtu: new value for maximum frame size
6002 *
6003 * Returns 0 on success, negative on failure
6004 **/
6005static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
6006{
6007        struct e1000_adapter *adapter = netdev_priv(netdev);
6008        int max_frame = new_mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
6009
6010        /* Jumbo frame support */
6011        if ((new_mtu > ETH_DATA_LEN) &&
6012            !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
6013                e_err("Jumbo Frames not supported.\n");
6014                return -EINVAL;
6015        }
6016
6017        /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
6018        if ((adapter->hw.mac.type >= e1000_pch2lan) &&
6019            !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
6020            (new_mtu > ETH_DATA_LEN)) {
6021                e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n");
6022                return -EINVAL;
6023        }
6024
6025        while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
6026                usleep_range(1000, 2000);
6027        /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
6028        adapter->max_frame_size = max_frame;
6029        e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6030        netdev->mtu = new_mtu;
6031
6032        pm_runtime_get_sync(netdev->dev.parent);
6033
6034        if (netif_running(netdev))
6035                e1000e_down(adapter, true);
6036
6037        /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
6038         * means we reserve 2 more, this pushes us to allocate from the next
6039         * larger slab size.
6040         * i.e. RXBUFFER_2048 --> size-4096 slab
6041         * However with the new *_jumbo_rx* routines, jumbo receives will use
6042         * fragmented skbs
6043         */
6044
6045        if (max_frame <= 2048)
6046                adapter->rx_buffer_len = 2048;
6047        else
6048                adapter->rx_buffer_len = 4096;
6049
6050        /* adjust allocation if LPE protects us, and we aren't using SBP */
6051        if (max_frame <= (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN))
6052                adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
6053
6054        if (netif_running(netdev))
6055                e1000e_up(adapter);
6056        else
6057                e1000e_reset(adapter);
6058
6059        pm_runtime_put_sync(netdev->dev.parent);
6060
6061        clear_bit(__E1000_RESETTING, &adapter->state);
6062
6063        return 0;
6064}
6065
6066static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
6067                           int cmd)
6068{
6069        struct e1000_adapter *adapter = netdev_priv(netdev);
6070        struct mii_ioctl_data *data = if_mii(ifr);
6071
6072        if (adapter->hw.phy.media_type != e1000_media_type_copper)
6073                return -EOPNOTSUPP;
6074
6075        switch (cmd) {
6076        case SIOCGMIIPHY:
6077                data->phy_id = adapter->hw.phy.addr;
6078                break;
6079        case SIOCGMIIREG:
6080                e1000_phy_read_status(adapter);
6081
6082                switch (data->reg_num & 0x1F) {
6083                case MII_BMCR:
6084                        data->val_out = adapter->phy_regs.bmcr;
6085                        break;
6086                case MII_BMSR:
6087                        data->val_out = adapter->phy_regs.bmsr;
6088                        break;
6089                case MII_PHYSID1:
6090                        data->val_out = (adapter->hw.phy.id >> 16);
6091                        break;
6092                case MII_PHYSID2:
6093                        data->val_out = (adapter->hw.phy.id & 0xFFFF);
6094                        break;
6095                case MII_ADVERTISE:
6096                        data->val_out = adapter->phy_regs.advertise;
6097                        break;
6098                case MII_LPA:
6099                        data->val_out = adapter->phy_regs.lpa;
6100                        break;
6101                case MII_EXPANSION:
6102                        data->val_out = adapter->phy_regs.expansion;
6103                        break;
6104                case MII_CTRL1000:
6105                        data->val_out = adapter->phy_regs.ctrl1000;
6106                        break;
6107                case MII_STAT1000:
6108                        data->val_out = adapter->phy_regs.stat1000;
6109                        break;
6110                case MII_ESTATUS:
6111                        data->val_out = adapter->phy_regs.estatus;
6112                        break;
6113                default:
6114                        return -EIO;
6115                }
6116                break;
6117        case SIOCSMIIREG:
6118        default:
6119                return -EOPNOTSUPP;
6120        }
6121        return 0;
6122}
6123
6124/**
6125 * e1000e_hwtstamp_ioctl - control hardware time stamping
6126 * @netdev: network interface device structure
6127 * @ifreq: interface request
6128 *
6129 * Outgoing time stamping can be enabled and disabled. Play nice and
6130 * disable it when requested, although it shouldn't cause any overhead
6131 * when no packet needs it. At most one packet in the queue may be
6132 * marked for time stamping, otherwise it would be impossible to tell
6133 * for sure to which packet the hardware time stamp belongs.
6134 *
6135 * Incoming time stamping has to be configured via the hardware filters.
6136 * Not all combinations are supported, in particular event type has to be
6137 * specified. Matching the kind of event packet is not supported, with the
6138 * exception of "all V2 events regardless of level 2 or 4".
6139 **/
6140static int e1000e_hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)
6141{
6142        struct e1000_adapter *adapter = netdev_priv(netdev);
6143        struct hwtstamp_config config;
6144        int ret_val;
6145
6146        if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
6147                return -EFAULT;
6148
6149        ret_val = e1000e_config_hwtstamp(adapter, &config);
6150        if (ret_val)
6151                return ret_val;
6152
6153        switch (config.rx_filter) {
6154        case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
6155        case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
6156        case HWTSTAMP_FILTER_PTP_V2_SYNC:
6157        case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
6158        case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
6159        case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
6160                /* With V2 type filters which specify a Sync or Delay Request,
6161                 * Path Delay Request/Response messages are also time stamped
6162                 * by hardware so notify the caller the requested packets plus
6163                 * some others are time stamped.
6164                 */
6165                config.rx_filter = HWTSTAMP_FILTER_SOME;
6166                break;
6167        default:
6168                break;
6169        }
6170
6171        return copy_to_user(ifr->ifr_data, &config,
6172                            sizeof(config)) ? -EFAULT : 0;
6173}
6174
6175static int e1000e_hwtstamp_get(struct net_device *netdev, struct ifreq *ifr)
6176{
6177        struct e1000_adapter *adapter = netdev_priv(netdev);
6178
6179        return copy_to_user(ifr->ifr_data, &adapter->hwtstamp_config,
6180                            sizeof(adapter->hwtstamp_config)) ? -EFAULT : 0;
6181}
6182
6183static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6184{
6185        switch (cmd) {
6186        case SIOCGMIIPHY:
6187        case SIOCGMIIREG:
6188        case SIOCSMIIREG:
6189                return e1000_mii_ioctl(netdev, ifr, cmd);
6190        case SIOCSHWTSTAMP:
6191                return e1000e_hwtstamp_set(netdev, ifr);
6192        case SIOCGHWTSTAMP:
6193                return e1000e_hwtstamp_get(netdev, ifr);
6194        default:
6195                return -EOPNOTSUPP;
6196        }
6197}
6198
6199static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
6200{
6201        struct e1000_hw *hw = &adapter->hw;
6202        u32 i, mac_reg, wuc;
6203        u16 phy_reg, wuc_enable;
6204        int retval;
6205
6206        /* copy MAC RARs to PHY RARs */
6207        e1000_copy_rx_addrs_to_phy_ich8lan(hw);
6208
6209        retval = hw->phy.ops.acquire(hw);
6210        if (retval) {
6211                e_err("Could not acquire PHY\n");
6212                return retval;
6213        }
6214
6215        /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
6216        retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6217        if (retval)
6218                goto release;
6219
6220        /* copy MAC MTA to PHY MTA - only needed for pchlan */
6221        for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
6222                mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
6223                hw->phy.ops.write_reg_page(hw, BM_MTA(i),
6224                                           (u16)(mac_reg & 0xFFFF));
6225                hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
6226                                           (u16)((mac_reg >> 16) & 0xFFFF));
6227        }
6228
6229        /* configure PHY Rx Control register */
6230        hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
6231        mac_reg = er32(RCTL);
6232        if (mac_reg & E1000_RCTL_UPE)
6233                phy_reg |= BM_RCTL_UPE;
6234        if (mac_reg & E1000_RCTL_MPE)
6235                phy_reg |= BM_RCTL_MPE;
6236        phy_reg &= ~(BM_RCTL_MO_MASK);
6237        if (mac_reg & E1000_RCTL_MO_3)
6238                phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
6239                            << BM_RCTL_MO_SHIFT);
6240        if (mac_reg & E1000_RCTL_BAM)
6241                phy_reg |= BM_RCTL_BAM;
6242        if (mac_reg & E1000_RCTL_PMCF)
6243                phy_reg |= BM_RCTL_PMCF;
6244        mac_reg = er32(CTRL);
6245        if (mac_reg & E1000_CTRL_RFCE)
6246                phy_reg |= BM_RCTL_RFCE;
6247        hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
6248
6249        wuc = E1000_WUC_PME_EN;
6250        if (wufc & (E1000_WUFC_MAG | E1000_WUFC_LNKC))
6251                wuc |= E1000_WUC_APME;
6252
6253        /* enable PHY wakeup in MAC register */
6254        ew32(WUFC, wufc);
6255        ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME |
6256                   E1000_WUC_PME_STATUS | wuc));
6257
6258        /* configure and enable PHY wakeup in PHY registers */
6259        hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
6260        hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, wuc);
6261
6262        /* activate PHY wakeup */
6263        wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
6264        retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6265        if (retval)
6266                e_err("Could not set PHY Host Wakeup bit\n");
6267release:
6268        hw->phy.ops.release(hw);
6269
6270        return retval;
6271}
6272
6273static void e1000e_flush_lpic(struct pci_dev *pdev)
6274{
6275        struct net_device *netdev = pci_get_drvdata(pdev);
6276        struct e1000_adapter *adapter = netdev_priv(netdev);
6277        struct e1000_hw *hw = &adapter->hw;
6278        u32 ret_val;
6279
6280        pm_runtime_get_sync(netdev->dev.parent);
6281
6282        ret_val = hw->phy.ops.acquire(hw);
6283        if (ret_val)
6284                goto fl_out;
6285
6286        pr_info("EEE TX LPI TIMER: %08X\n",
6287                er32(LPIC) >> E1000_LPIC_LPIET_SHIFT);
6288
6289        hw->phy.ops.release(hw);
6290
6291fl_out:
6292        pm_runtime_put_sync(netdev->dev.parent);
6293}
6294
6295static int e1000e_pm_freeze(struct device *dev)
6296{
6297        struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6298        struct e1000_adapter *adapter = netdev_priv(netdev);
6299
6300        netif_device_detach(netdev);
6301
6302        if (netif_running(netdev)) {
6303                int count = E1000_CHECK_RESET_COUNT;
6304
6305                while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6306                        usleep_range(10000, 20000);
6307
6308                WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6309
6310                /* Quiesce the device without resetting the hardware */
6311                e1000e_down(adapter, false);
6312                e1000_free_irq(adapter);
6313        }
6314        e1000e_reset_interrupt_capability(adapter);
6315
6316        /* Allow time for pending master requests to run */
6317        e1000e_disable_pcie_master(&adapter->hw);
6318
6319        return 0;
6320}
6321
6322static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
6323{
6324        struct net_device *netdev = pci_get_drvdata(pdev);
6325        struct e1000_adapter *adapter = netdev_priv(netdev);
6326        struct e1000_hw *hw = &adapter->hw;
6327        u32 ctrl, ctrl_ext, rctl, status;
6328        /* Runtime suspend should only enable wakeup for link changes */
6329        u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
6330        int retval = 0;
6331
6332        status = er32(STATUS);
6333        if (status & E1000_STATUS_LU)
6334                wufc &= ~E1000_WUFC_LNKC;
6335
6336        if (wufc) {
6337                e1000_setup_rctl(adapter);
6338                e1000e_set_rx_mode(netdev);
6339
6340                /* turn on all-multi mode if wake on multicast is enabled */
6341                if (wufc & E1000_WUFC_MC) {
6342                        rctl = er32(RCTL);
6343                        rctl |= E1000_RCTL_MPE;
6344                        ew32(RCTL, rctl);
6345                }
6346
6347                ctrl = er32(CTRL);
6348                ctrl |= E1000_CTRL_ADVD3WUC;
6349                if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
6350                        ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
6351                ew32(CTRL, ctrl);
6352
6353                if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
6354                    adapter->hw.phy.media_type ==
6355                    e1000_media_type_internal_serdes) {
6356                        /* keep the laser running in D3 */
6357                        ctrl_ext = er32(CTRL_EXT);
6358                        ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
6359                        ew32(CTRL_EXT, ctrl_ext);
6360                }
6361
6362                if (!runtime)
6363                        e1000e_power_up_phy(adapter);
6364
6365                if (adapter->flags & FLAG_IS_ICH)
6366                        e1000_suspend_workarounds_ich8lan(&adapter->hw);
6367
6368                if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6369                        /* enable wakeup by the PHY */
6370                        retval = e1000_init_phy_wakeup(adapter, wufc);
6371                        if (retval)
6372                                return retval;
6373                } else {
6374                        /* enable wakeup by the MAC */
6375                        ew32(WUFC, wufc);
6376                        ew32(WUC, E1000_WUC_PME_EN);
6377                }
6378        } else {
6379                ew32(WUC, 0);
6380                ew32(WUFC, 0);
6381
6382                e1000_power_down_phy(adapter);
6383        }
6384
6385        if (adapter->hw.phy.type == e1000_phy_igp_3) {
6386                e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
6387        } else if (hw->mac.type >= e1000_pch_lpt) {
6388                if (!(wufc & (E1000_WUFC_EX | E1000_WUFC_MC | E1000_WUFC_BC)))
6389                        /* ULP does not support wake from unicast, multicast
6390                         * or broadcast.
6391                         */
6392                        retval = e1000_enable_ulp_lpt_lp(hw, !runtime);
6393
6394                if (retval)
6395                        return retval;
6396        }
6397
6398        /* Ensure that the appropriate bits are set in LPI_CTRL
6399         * for EEE in Sx
6400         */
6401        if ((hw->phy.type >= e1000_phy_i217) &&
6402            adapter->eee_advert && hw->dev_spec.ich8lan.eee_lp_ability) {
6403                u16 lpi_ctrl = 0;
6404
6405                retval = hw->phy.ops.acquire(hw);
6406                if (!retval) {
6407                        retval = e1e_rphy_locked(hw, I82579_LPI_CTRL,
6408                                                 &lpi_ctrl);
6409                        if (!retval) {
6410                                if (adapter->eee_advert &
6411                                    hw->dev_spec.ich8lan.eee_lp_ability &
6412                                    I82579_EEE_100_SUPPORTED)
6413                                        lpi_ctrl |= I82579_LPI_CTRL_100_ENABLE;
6414                                if (adapter->eee_advert &
6415                                    hw->dev_spec.ich8lan.eee_lp_ability &
6416                                    I82579_EEE_1000_SUPPORTED)
6417                                        lpi_ctrl |= I82579_LPI_CTRL_1000_ENABLE;
6418
6419                                retval = e1e_wphy_locked(hw, I82579_LPI_CTRL,
6420                                                         lpi_ctrl);
6421                        }
6422                }
6423                hw->phy.ops.release(hw);
6424        }
6425
6426        /* Release control of h/w to f/w.  If f/w is AMT enabled, this
6427         * would have already happened in close and is redundant.
6428         */
6429        e1000e_release_hw_control(adapter);
6430
6431        pci_clear_master(pdev);
6432
6433        /* The pci-e switch on some quad port adapters will report a
6434         * correctable error when the MAC transitions from D0 to D3.  To
6435         * prevent this we need to mask off the correctable errors on the
6436         * downstream port of the pci-e switch.
6437         *
6438         * We don't have the associated upstream bridge while assigning
6439         * the PCI device into guest. For example, the KVM on power is
6440         * one of the cases.
6441         */
6442        if (adapter->flags & FLAG_IS_QUAD_PORT) {
6443                struct pci_dev *us_dev = pdev->bus->self;
6444                u16 devctl;
6445
6446                if (!us_dev)
6447                        return 0;
6448
6449                pcie_capability_read_word(us_dev, PCI_EXP_DEVCTL, &devctl);
6450                pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL,
6451                                           (devctl & ~PCI_EXP_DEVCTL_CERE));
6452
6453                pci_save_state(pdev);
6454                pci_prepare_to_sleep(pdev);
6455
6456                pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl);
6457        }
6458
6459        return 0;
6460}
6461
6462/**
6463 * __e1000e_disable_aspm - Disable ASPM states
6464 * @pdev: pointer to PCI device struct
6465 * @state: bit-mask of ASPM states to disable
6466 * @locked: indication if this context holds pci_bus_sem locked.
6467 *
6468 * Some devices *must* have certain ASPM states disabled per hardware errata.
6469 **/
6470static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state, int locked)
6471{
6472        struct pci_dev *parent = pdev->bus->self;
6473        u16 aspm_dis_mask = 0;
6474        u16 pdev_aspmc, parent_aspmc;
6475
6476        switch (state) {
6477        case PCIE_LINK_STATE_L0S:
6478        case PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1:
6479                aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L0S;
6480                /* fall-through - can't have L1 without L0s */
6481        case PCIE_LINK_STATE_L1:
6482                aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L1;
6483                break;
6484        default:
6485                return;
6486        }
6487
6488        pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6489        pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6490
6491        if (parent) {
6492                pcie_capability_read_word(parent, PCI_EXP_LNKCTL,
6493                                          &parent_aspmc);
6494                parent_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6495        }
6496
6497        /* Nothing to do if the ASPM states to be disabled already are */
6498        if (!(pdev_aspmc & aspm_dis_mask) &&
6499            (!parent || !(parent_aspmc & aspm_dis_mask)))
6500                return;
6501
6502        dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
6503                 (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L0S) ?
6504                 "L0s" : "",
6505                 (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L1) ?
6506                 "L1" : "");
6507
6508#ifdef CONFIG_PCIEASPM
6509        if (locked)
6510                pci_disable_link_state_locked(pdev, state);
6511        else
6512                pci_disable_link_state(pdev, state);
6513
6514        /* Double-check ASPM control.  If not disabled by the above, the
6515         * BIOS is preventing that from happening (or CONFIG_PCIEASPM is
6516         * not enabled); override by writing PCI config space directly.
6517         */
6518        pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6519        pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6520
6521        if (!(aspm_dis_mask & pdev_aspmc))
6522                return;
6523#endif
6524
6525        /* Both device and parent should have the same ASPM setting.
6526         * Disable ASPM in downstream component first and then upstream.
6527         */
6528        pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_dis_mask);
6529
6530        if (parent)
6531                pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
6532                                           aspm_dis_mask);
6533}
6534
6535/**
6536 * e1000e_disable_aspm - Disable ASPM states.
6537 * @pdev: pointer to PCI device struct
6538 * @state: bit-mask of ASPM states to disable
6539 *
6540 * This function acquires the pci_bus_sem!
6541 * Some devices *must* have certain ASPM states disabled per hardware errata.
6542 **/
6543static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
6544{
6545        __e1000e_disable_aspm(pdev, state, 0);
6546}
6547
6548/**
6549 * e1000e_disable_aspm_locked   Disable ASPM states.
6550 * @pdev: pointer to PCI device struct
6551 * @state: bit-mask of ASPM states to disable
6552 *
6553 * This function must be called with pci_bus_sem acquired!
6554 * Some devices *must* have certain ASPM states disabled per hardware errata.
6555 **/
6556static void e1000e_disable_aspm_locked(struct pci_dev *pdev, u16 state)
6557{
6558        __e1000e_disable_aspm(pdev, state, 1);
6559}
6560
6561#ifdef CONFIG_PM
6562static int __e1000_resume(struct pci_dev *pdev)
6563{
6564        struct net_device *netdev = pci_get_drvdata(pdev);
6565        struct e1000_adapter *adapter = netdev_priv(netdev);
6566        struct e1000_hw *hw = &adapter->hw;
6567        u16 aspm_disable_flag = 0;
6568
6569        if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6570                aspm_disable_flag = PCIE_LINK_STATE_L0S;
6571        if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6572                aspm_disable_flag |= PCIE_LINK_STATE_L1;
6573        if (aspm_disable_flag)
6574                e1000e_disable_aspm(pdev, aspm_disable_flag);
6575
6576        pci_set_master(pdev);
6577
6578        if (hw->mac.type >= e1000_pch2lan)
6579                e1000_resume_workarounds_pchlan(&adapter->hw);
6580
6581        e1000e_power_up_phy(adapter);
6582
6583        /* report the system wakeup cause from S3/S4 */
6584        if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6585                u16 phy_data;
6586
6587                e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
6588                if (phy_data) {
6589                        e_info("PHY Wakeup cause - %s\n",
6590                               phy_data & E1000_WUS_EX ? "Unicast Packet" :
6591                               phy_data & E1000_WUS_MC ? "Multicast Packet" :
6592                               phy_data & E1000_WUS_BC ? "Broadcast Packet" :
6593                               phy_data & E1000_WUS_MAG ? "Magic Packet" :
6594                               phy_data & E1000_WUS_LNKC ?
6595                               "Link Status Change" : "other");
6596                }
6597                e1e_wphy(&adapter->hw, BM_WUS, ~0);
6598        } else {
6599                u32 wus = er32(WUS);
6600
6601                if (wus) {
6602                        e_info("MAC Wakeup cause - %s\n",
6603                               wus & E1000_WUS_EX ? "Unicast Packet" :
6604                               wus & E1000_WUS_MC ? "Multicast Packet" :
6605                               wus & E1000_WUS_BC ? "Broadcast Packet" :
6606                               wus & E1000_WUS_MAG ? "Magic Packet" :
6607                               wus & E1000_WUS_LNKC ? "Link Status Change" :
6608                               "other");
6609                }
6610                ew32(WUS, ~0);
6611        }
6612
6613        e1000e_reset(adapter);
6614
6615        e1000_init_manageability_pt(adapter);
6616
6617        /* If the controller has AMT, do not set DRV_LOAD until the interface
6618         * is up.  For all other cases, let the f/w know that the h/w is now
6619         * under the control of the driver.
6620         */
6621        if (!(adapter->flags & FLAG_HAS_AMT))
6622                e1000e_get_hw_control(adapter);
6623
6624        return 0;
6625}
6626
6627#ifdef CONFIG_PM_SLEEP
6628static int e1000e_pm_thaw(struct device *dev)
6629{
6630        struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6631        struct e1000_adapter *adapter = netdev_priv(netdev);
6632
6633        e1000e_set_interrupt_capability(adapter);
6634        if (netif_running(netdev)) {
6635                u32 err = e1000_request_irq(adapter);
6636
6637                if (err)
6638                        return err;
6639
6640                e1000e_up(adapter);
6641        }
6642
6643        netif_device_attach(netdev);
6644
6645        return 0;
6646}
6647
6648static int e1000e_pm_suspend(struct device *dev)
6649{
6650        struct pci_dev *pdev = to_pci_dev(dev);
6651        int rc;
6652
6653        e1000e_flush_lpic(pdev);
6654
6655        e1000e_pm_freeze(dev);
6656
6657        rc = __e1000_shutdown(pdev, false);
6658        if (rc)
6659                e1000e_pm_thaw(dev);
6660
6661        return rc;
6662}
6663
6664static int e1000e_pm_resume(struct device *dev)
6665{
6666        struct pci_dev *pdev = to_pci_dev(dev);
6667        int rc;
6668
6669        rc = __e1000_resume(pdev);
6670        if (rc)
6671                return rc;
6672
6673        return e1000e_pm_thaw(dev);
6674}
6675#endif /* CONFIG_PM_SLEEP */
6676
6677static int e1000e_pm_runtime_idle(struct device *dev)
6678{
6679        struct pci_dev *pdev = to_pci_dev(dev);
6680        struct net_device *netdev = pci_get_drvdata(pdev);
6681        struct e1000_adapter *adapter = netdev_priv(netdev);
6682        u16 eee_lp;
6683
6684        eee_lp = adapter->hw.dev_spec.ich8lan.eee_lp_ability;
6685
6686        if (!e1000e_has_link(adapter)) {
6687                adapter->hw.dev_spec.ich8lan.eee_lp_ability = eee_lp;
6688                pm_schedule_suspend(dev, 5 * MSEC_PER_SEC);
6689        }
6690
6691        return -EBUSY;
6692}
6693
6694static int e1000e_pm_runtime_resume(struct device *dev)
6695{
6696        struct pci_dev *pdev = to_pci_dev(dev);
6697        struct net_device *netdev = pci_get_drvdata(pdev);
6698        struct e1000_adapter *adapter = netdev_priv(netdev);
6699        int rc;
6700
6701        rc = __e1000_resume(pdev);
6702        if (rc)
6703                return rc;
6704
6705        if (netdev->flags & IFF_UP)
6706                e1000e_up(adapter);
6707
6708        return rc;
6709}
6710
6711static int e1000e_pm_runtime_suspend(struct device *dev)
6712{
6713        struct pci_dev *pdev = to_pci_dev(dev);
6714        struct net_device *netdev = pci_get_drvdata(pdev);
6715        struct e1000_adapter *adapter = netdev_priv(netdev);
6716
6717        if (netdev->flags & IFF_UP) {
6718                int count = E1000_CHECK_RESET_COUNT;
6719
6720                while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6721                        usleep_range(10000, 20000);
6722
6723                WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6724
6725                /* Down the device without resetting the hardware */
6726                e1000e_down(adapter, false);
6727        }
6728
6729        if (__e1000_shutdown(pdev, true)) {
6730                e1000e_pm_runtime_resume(dev);
6731                return -EBUSY;
6732        }
6733
6734        return 0;
6735}
6736#endif /* CONFIG_PM */
6737
6738static void e1000_shutdown(struct pci_dev *pdev)
6739{
6740        e1000e_flush_lpic(pdev);
6741
6742        e1000e_pm_freeze(&pdev->dev);
6743
6744        __e1000_shutdown(pdev, false);
6745}
6746
6747#ifdef CONFIG_NET_POLL_CONTROLLER
6748
6749static irqreturn_t e1000_intr_msix(int __always_unused irq, void *data)
6750{
6751        struct net_device *netdev = data;
6752        struct e1000_adapter *adapter = netdev_priv(netdev);
6753
6754        if (adapter->msix_entries) {
6755                int vector, msix_irq;
6756
6757                vector = 0;
6758                msix_irq = adapter->msix_entries[vector].vector;
6759                if (disable_hardirq(msix_irq))
6760                        e1000_intr_msix_rx(msix_irq, netdev);
6761                enable_irq(msix_irq);
6762
6763                vector++;
6764                msix_irq = adapter->msix_entries[vector].vector;
6765                if (disable_hardirq(msix_irq))
6766                        e1000_intr_msix_tx(msix_irq, netdev);
6767                enable_irq(msix_irq);
6768
6769                vector++;
6770                msix_irq = adapter->msix_entries[vector].vector;
6771                if (disable_hardirq(msix_irq))
6772                        e1000_msix_other(msix_irq, netdev);
6773                enable_irq(msix_irq);
6774        }
6775
6776        return IRQ_HANDLED;
6777}
6778
6779/**
6780 * e1000_netpoll
6781 * @netdev: network interface device structure
6782 *
6783 * Polling 'interrupt' - used by things like netconsole to send skbs
6784 * without having to re-enable interrupts. It's not called while
6785 * the interrupt routine is executing.
6786 */
6787static void e1000_netpoll(struct net_device *netdev)
6788{
6789        struct e1000_adapter *adapter = netdev_priv(netdev);
6790
6791        switch (adapter->int_mode) {
6792        case E1000E_INT_MODE_MSIX:
6793                e1000_intr_msix(adapter->pdev->irq, netdev);
6794                break;
6795        case E1000E_INT_MODE_MSI:
6796                if (disable_hardirq(adapter->pdev->irq))
6797                        e1000_intr_msi(adapter->pdev->irq, netdev);
6798                enable_irq(adapter->pdev->irq);
6799                break;
6800        default:                /* E1000E_INT_MODE_LEGACY */
6801                if (disable_hardirq(adapter->pdev->irq))
6802                        e1000_intr(adapter->pdev->irq, netdev);
6803                enable_irq(adapter->pdev->irq);
6804                break;
6805        }
6806}
6807#endif
6808
6809/**
6810 * e1000_io_error_detected - called when PCI error is detected
6811 * @pdev: Pointer to PCI device
6812 * @state: The current pci connection state
6813 *
6814 * This function is called after a PCI bus error affecting
6815 * this device has been detected.
6816 */
6817static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
6818                                                pci_channel_state_t state)
6819{
6820        struct net_device *netdev = pci_get_drvdata(pdev);
6821        struct e1000_adapter *adapter = netdev_priv(netdev);
6822
6823        netif_device_detach(netdev);
6824
6825        if (state == pci_channel_io_perm_failure)
6826                return PCI_ERS_RESULT_DISCONNECT;
6827
6828        if (netif_running(netdev))
6829                e1000e_down(adapter, true);
6830        pci_disable_device(pdev);
6831
6832        /* Request a slot slot reset. */
6833        return PCI_ERS_RESULT_NEED_RESET;
6834}
6835
6836/**
6837 * e1000_io_slot_reset - called after the pci bus has been reset.
6838 * @pdev: Pointer to PCI device
6839 *
6840 * Restart the card from scratch, as if from a cold-boot. Implementation
6841 * resembles the first-half of the e1000e_pm_resume routine.
6842 */
6843static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
6844{
6845        struct net_device *netdev = pci_get_drvdata(pdev);
6846        struct e1000_adapter *adapter = netdev_priv(netdev);
6847        struct e1000_hw *hw = &adapter->hw;
6848        u16 aspm_disable_flag = 0;
6849        int err;
6850        pci_ers_result_t result;
6851
6852        if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6853                aspm_disable_flag = PCIE_LINK_STATE_L0S;
6854        if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6855                aspm_disable_flag |= PCIE_LINK_STATE_L1;
6856        if (aspm_disable_flag)
6857                e1000e_disable_aspm_locked(pdev, aspm_disable_flag);
6858
6859        err = pci_enable_device_mem(pdev);
6860        if (err) {
6861                dev_err(&pdev->dev,
6862                        "Cannot re-enable PCI device after reset.\n");
6863                result = PCI_ERS_RESULT_DISCONNECT;
6864        } else {
6865                pdev->state_saved = true;
6866                pci_restore_state(pdev);
6867                pci_set_master(pdev);
6868
6869                pci_enable_wake(pdev, PCI_D3hot, 0);
6870                pci_enable_wake(pdev, PCI_D3cold, 0);
6871
6872                e1000e_reset(adapter);
6873                ew32(WUS, ~0);
6874                result = PCI_ERS_RESULT_RECOVERED;
6875        }
6876
6877        return result;
6878}
6879
6880/**
6881 * e1000_io_resume - called when traffic can start flowing again.
6882 * @pdev: Pointer to PCI device
6883 *
6884 * This callback is called when the error recovery driver tells us that
6885 * its OK to resume normal operation. Implementation resembles the
6886 * second-half of the e1000e_pm_resume routine.
6887 */
6888static void e1000_io_resume(struct pci_dev *pdev)
6889{
6890        struct net_device *netdev = pci_get_drvdata(pdev);
6891        struct e1000_adapter *adapter = netdev_priv(netdev);
6892
6893        e1000_init_manageability_pt(adapter);
6894
6895        if (netif_running(netdev))
6896                e1000e_up(adapter);
6897
6898        netif_device_attach(netdev);
6899
6900        /* If the controller has AMT, do not set DRV_LOAD until the interface
6901         * is up.  For all other cases, let the f/w know that the h/w is now
6902         * under the control of the driver.
6903         */
6904        if (!(adapter->flags & FLAG_HAS_AMT))
6905                e1000e_get_hw_control(adapter);
6906}
6907
6908static void e1000_print_device_info(struct e1000_adapter *adapter)
6909{
6910        struct e1000_hw *hw = &adapter->hw;
6911        struct net_device *netdev = adapter->netdev;
6912        u32 ret_val;
6913        u8 pba_str[E1000_PBANUM_LENGTH];
6914
6915        /* print bus type/speed/width info */
6916        e_info("(PCI Express:2.5GT/s:%s) %pM\n",
6917               /* bus width */
6918               ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
6919                "Width x1"),
6920               /* MAC address */
6921               netdev->dev_addr);
6922        e_info("Intel(R) PRO/%s Network Connection\n",
6923               (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
6924        ret_val = e1000_read_pba_string_generic(hw, pba_str,
6925                                                E1000_PBANUM_LENGTH);
6926        if (ret_val)
6927                strlcpy((char *)pba_str, "Unknown", sizeof(pba_str));
6928        e_info("MAC: %d, PHY: %d, PBA No: %s\n",
6929               hw->mac.type, hw->phy.type, pba_str);
6930}
6931
6932static void e1000_eeprom_checks(struct e1000_adapter *adapter)
6933{
6934        struct e1000_hw *hw = &adapter->hw;
6935        int ret_val;
6936        u16 buf = 0;
6937
6938        if (hw->mac.type != e1000_82573)
6939                return;
6940
6941        ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
6942        le16_to_cpus(&buf);
6943        if (!ret_val && (!(buf & BIT(0)))) {
6944                /* Deep Smart Power Down (DSPD) */
6945                dev_warn(&adapter->pdev->dev,
6946                         "Warning: detected DSPD enabled in EEPROM\n");
6947        }
6948}
6949
6950static netdev_features_t e1000_fix_features(struct net_device *netdev,
6951                                            netdev_features_t features)
6952{
6953        struct e1000_adapter *adapter = netdev_priv(netdev);
6954        struct e1000_hw *hw = &adapter->hw;
6955
6956        /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
6957        if ((hw->mac.type >= e1000_pch2lan) && (netdev->mtu > ETH_DATA_LEN))
6958                features &= ~NETIF_F_RXFCS;
6959
6960        /* Since there is no support for separate Rx/Tx vlan accel
6961         * enable/disable make sure Tx flag is always in same state as Rx.
6962         */
6963        if (features & NETIF_F_HW_VLAN_CTAG_RX)
6964                features |= NETIF_F_HW_VLAN_CTAG_TX;
6965        else
6966                features &= ~NETIF_F_HW_VLAN_CTAG_TX;
6967
6968        return features;
6969}
6970
6971static int e1000_set_features(struct net_device *netdev,
6972                              netdev_features_t features)
6973{
6974        struct e1000_adapter *adapter = netdev_priv(netdev);
6975        netdev_features_t changed = features ^ netdev->features;
6976
6977        if (changed & (NETIF_F_TSO | NETIF_F_TSO6))
6978                adapter->flags |= FLAG_TSO_FORCE;
6979
6980        if (!(changed & (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX |
6981                         NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS |
6982                         NETIF_F_RXALL)))
6983                return 0;
6984
6985        if (changed & NETIF_F_RXFCS) {
6986                if (features & NETIF_F_RXFCS) {
6987                        adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6988                } else {
6989                        /* We need to take it back to defaults, which might mean
6990                         * stripping is still disabled at the adapter level.
6991                         */
6992                        if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING)
6993                                adapter->flags2 |= FLAG2_CRC_STRIPPING;
6994                        else
6995                                adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6996                }
6997        }
6998
6999        netdev->features = features;
7000
7001        if (netif_running(netdev))
7002                e1000e_reinit_locked(adapter);
7003        else
7004                e1000e_reset(adapter);
7005
7006        return 1;
7007}
7008
7009static const struct net_device_ops e1000e_netdev_ops = {
7010        .ndo_open               = e1000e_open,
7011        .ndo_stop               = e1000e_close,
7012        .ndo_start_xmit         = e1000_xmit_frame,
7013        .ndo_get_stats64        = e1000e_get_stats64,
7014        .ndo_set_rx_mode        = e1000e_set_rx_mode,
7015        .ndo_set_mac_address    = e1000_set_mac,
7016        .ndo_change_mtu         = e1000_change_mtu,
7017        .ndo_do_ioctl           = e1000_ioctl,
7018        .ndo_tx_timeout         = e1000_tx_timeout,
7019        .ndo_validate_addr      = eth_validate_addr,
7020
7021        .ndo_vlan_rx_add_vid    = e1000_vlan_rx_add_vid,
7022        .ndo_vlan_rx_kill_vid   = e1000_vlan_rx_kill_vid,
7023#ifdef CONFIG_NET_POLL_CONTROLLER
7024        .ndo_poll_controller    = e1000_netpoll,
7025#endif
7026        .ndo_set_features = e1000_set_features,
7027        .ndo_fix_features = e1000_fix_features,
7028        .ndo_features_check     = passthru_features_check,
7029};
7030
7031/**
7032 * e1000_probe - Device Initialization Routine
7033 * @pdev: PCI device information struct
7034 * @ent: entry in e1000_pci_tbl
7035 *
7036 * Returns 0 on success, negative on failure
7037 *
7038 * e1000_probe initializes an adapter identified by a pci_dev structure.
7039 * The OS initialization, configuring of the adapter private structure,
7040 * and a hardware reset occur.
7041 **/
7042static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7043{
7044        struct net_device *netdev;
7045        struct e1000_adapter *adapter;
7046        struct e1000_hw *hw;
7047        const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
7048        resource_size_t mmio_start, mmio_len;
7049        resource_size_t flash_start, flash_len;
7050        static int cards_found;
7051        u16 aspm_disable_flag = 0;
7052        int bars, i, err, pci_using_dac;
7053        u16 eeprom_data = 0;
7054        u16 eeprom_apme_mask = E1000_EEPROM_APME;
7055        s32 ret_val = 0;
7056
7057        if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
7058                aspm_disable_flag = PCIE_LINK_STATE_L0S;
7059        if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
7060                aspm_disable_flag |= PCIE_LINK_STATE_L1;
7061        if (aspm_disable_flag)
7062                e1000e_disable_aspm(pdev, aspm_disable_flag);
7063
7064        err = pci_enable_device_mem(pdev);
7065        if (err)
7066                return err;
7067
7068        pci_using_dac = 0;
7069        err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
7070        if (!err) {
7071                pci_using_dac = 1;
7072        } else {
7073                err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
7074                if (err) {
7075                        dev_err(&pdev->dev,
7076                                "No usable DMA configuration, aborting\n");
7077                        goto err_dma;
7078                }
7079        }
7080
7081        bars = pci_select_bars(pdev, IORESOURCE_MEM);
7082        err = pci_request_selected_regions_exclusive(pdev, bars,
7083                                                     e1000e_driver_name);
7084        if (err)
7085                goto err_pci_reg;
7086
7087        /* AER (Advanced Error Reporting) hooks */
7088        pci_enable_pcie_error_reporting(pdev);
7089
7090        pci_set_master(pdev);
7091        /* PCI config space info */
7092        err = pci_save_state(pdev);
7093        if (err)
7094                goto err_alloc_etherdev;
7095
7096        err = -ENOMEM;
7097        netdev = alloc_etherdev(sizeof(struct e1000_adapter));
7098        if (!netdev)
7099                goto err_alloc_etherdev;
7100
7101        SET_NETDEV_DEV(netdev, &pdev->dev);
7102
7103        netdev->irq = pdev->irq;
7104
7105        pci_set_drvdata(pdev, netdev);
7106        adapter = netdev_priv(netdev);
7107        hw = &adapter->hw;
7108        adapter->netdev = netdev;
7109        adapter->pdev = pdev;
7110        adapter->ei = ei;
7111        adapter->pba = ei->pba;
7112        adapter->flags = ei->flags;
7113        adapter->flags2 = ei->flags2;
7114        adapter->hw.adapter = adapter;
7115        adapter->hw.mac.type = ei->mac;
7116        adapter->max_hw_frame_size = ei->max_hw_frame_size;
7117        adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
7118
7119        mmio_start = pci_resource_start(pdev, 0);
7120        mmio_len = pci_resource_len(pdev, 0);
7121
7122        err = -EIO;
7123        adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
7124        if (!adapter->hw.hw_addr)
7125                goto err_ioremap;
7126
7127        if ((adapter->flags & FLAG_HAS_FLASH) &&
7128            (pci_resource_flags(pdev, 1) & IORESOURCE_MEM) &&
7129            (hw->mac.type < e1000_pch_spt)) {
7130                flash_start = pci_resource_start(pdev, 1);
7131                flash_len = pci_resource_len(pdev, 1);
7132                adapter->hw.flash_address = ioremap(flash_start, flash_len);
7133                if (!adapter->hw.flash_address)
7134                        goto err_flashmap;
7135        }
7136
7137        /* Set default EEE advertisement */
7138        if (adapter->flags2 & FLAG2_HAS_EEE)
7139                adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
7140
7141        /* construct the net_device struct */
7142        netdev->netdev_ops = &e1000e_netdev_ops;
7143        e1000e_set_ethtool_ops(netdev);
7144        netdev->watchdog_timeo = 5 * HZ;
7145        netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64);
7146        strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
7147
7148        netdev->mem_start = mmio_start;
7149        netdev->mem_end = mmio_start + mmio_len;
7150
7151        adapter->bd_number = cards_found++;
7152
7153        e1000e_check_options(adapter);
7154
7155        /* setup adapter struct */
7156        err = e1000_sw_init(adapter);
7157        if (err)
7158                goto err_sw_init;
7159
7160        memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
7161        memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
7162        memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
7163
7164        err = ei->get_variants(adapter);
7165        if (err)
7166                goto err_hw_init;
7167
7168        if ((adapter->flags & FLAG_IS_ICH) &&
7169            (adapter->flags & FLAG_READ_ONLY_NVM) &&
7170            (hw->mac.type < e1000_pch_spt))
7171                e1000e_write_protect_nvm_ich8lan(&adapter->hw);
7172
7173        hw->mac.ops.get_bus_info(&adapter->hw);
7174
7175        adapter->hw.phy.autoneg_wait_to_complete = 0;
7176
7177        /* Copper options */
7178        if (adapter->hw.phy.media_type == e1000_media_type_copper) {
7179                adapter->hw.phy.mdix = AUTO_ALL_MODES;
7180                adapter->hw.phy.disable_polarity_correction = 0;
7181                adapter->hw.phy.ms_type = e1000_ms_hw_default;
7182        }
7183
7184        if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
7185                dev_info(&pdev->dev,
7186                         "PHY reset is blocked due to SOL/IDER session.\n");
7187
7188        /* Set initial default active device features */
7189        netdev->features = (NETIF_F_SG |
7190                            NETIF_F_HW_VLAN_CTAG_RX |
7191                            NETIF_F_HW_VLAN_CTAG_TX |
7192                            NETIF_F_TSO |
7193                            NETIF_F_TSO6 |
7194                            NETIF_F_RXHASH |
7195                            NETIF_F_RXCSUM |
7196                            NETIF_F_HW_CSUM);
7197
7198        /* Set user-changeable features (subset of all device features) */
7199        netdev->hw_features = netdev->features;
7200        netdev->hw_features |= NETIF_F_RXFCS;
7201        netdev->priv_flags |= IFF_SUPP_NOFCS;
7202        netdev->hw_features |= NETIF_F_RXALL;
7203
7204        if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
7205                netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
7206
7207        netdev->vlan_features |= (NETIF_F_SG |
7208                                  NETIF_F_TSO |
7209                                  NETIF_F_TSO6 |
7210                                  NETIF_F_HW_CSUM);
7211
7212        netdev->priv_flags |= IFF_UNICAST_FLT;
7213
7214        if (pci_using_dac) {
7215                netdev->features |= NETIF_F_HIGHDMA;
7216                netdev->vlan_features |= NETIF_F_HIGHDMA;
7217        }
7218
7219        /* MTU range: 68 - max_hw_frame_size */
7220        netdev->min_mtu = ETH_MIN_MTU;
7221        netdev->max_mtu = adapter->max_hw_frame_size -
7222                          (VLAN_ETH_HLEN + ETH_FCS_LEN);
7223
7224        if (e1000e_enable_mng_pass_thru(&adapter->hw))
7225                adapter->flags |= FLAG_MNG_PT_ENABLED;
7226
7227        /* before reading the NVM, reset the controller to
7228         * put the device in a known good starting state
7229         */
7230        adapter->hw.mac.ops.reset_hw(&adapter->hw);
7231
7232        /* systems with ASPM and others may see the checksum fail on the first
7233         * attempt. Let's give it a few tries
7234         */
7235        for (i = 0;; i++) {
7236                if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
7237                        break;
7238                if (i == 2) {
7239                        dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
7240                        err = -EIO;
7241                        goto err_eeprom;
7242                }
7243        }
7244
7245        e1000_eeprom_checks(adapter);
7246
7247        /* copy the MAC address */
7248        if (e1000e_read_mac_addr(&adapter->hw))
7249                dev_err(&pdev->dev,
7250                        "NVM Read Error while reading MAC address\n");
7251
7252        memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
7253
7254        if (!is_valid_ether_addr(netdev->dev_addr)) {
7255                dev_err(&pdev->dev, "Invalid MAC Address: %pM\n",
7256                        netdev->dev_addr);
7257                err = -EIO;
7258                goto err_eeprom;
7259        }
7260
7261        timer_setup(&adapter->watchdog_timer, e1000_watchdog, 0);
7262        timer_setup(&adapter->phy_info_timer, e1000_update_phy_info, 0);
7263
7264        INIT_WORK(&adapter->reset_task, e1000_reset_task);
7265        INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
7266        INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
7267        INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
7268        INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
7269
7270        /* Initialize link parameters. User can change them with ethtool */
7271        adapter->hw.mac.autoneg = 1;
7272        adapter->fc_autoneg = true;
7273        adapter->hw.fc.requested_mode = e1000_fc_default;
7274        adapter->hw.fc.current_mode = e1000_fc_default;
7275        adapter->hw.phy.autoneg_advertised = 0x2f;
7276
7277        /* Initial Wake on LAN setting - If APM wake is enabled in
7278         * the EEPROM, enable the ACPI Magic Packet filter
7279         */
7280        if (adapter->flags & FLAG_APME_IN_WUC) {
7281                /* APME bit in EEPROM is mapped to WUC.APME */
7282                eeprom_data = er32(WUC);
7283                eeprom_apme_mask = E1000_WUC_APME;
7284                if ((hw->mac.type > e1000_ich10lan) &&
7285                    (eeprom_data & E1000_WUC_PHY_WAKE))
7286                        adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
7287        } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
7288                if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
7289                    (adapter->hw.bus.func == 1))
7290                        ret_val = e1000_read_nvm(&adapter->hw,
7291                                              NVM_INIT_CONTROL3_PORT_B,
7292                                              1, &eeprom_data);
7293                else
7294                        ret_val = e1000_read_nvm(&adapter->hw,
7295                                              NVM_INIT_CONTROL3_PORT_A,
7296                                              1, &eeprom_data);
7297        }
7298
7299        /* fetch WoL from EEPROM */
7300        if (ret_val)
7301                e_dbg("NVM read error getting WoL initial values: %d\n", ret_val);
7302        else if (eeprom_data & eeprom_apme_mask)
7303                adapter->eeprom_wol |= E1000_WUFC_MAG;
7304
7305        /* now that we have the eeprom settings, apply the special cases
7306         * where the eeprom may be wrong or the board simply won't support
7307         * wake on lan on a particular port
7308         */
7309        if (!(adapter->flags & FLAG_HAS_WOL))
7310                adapter->eeprom_wol = 0;
7311
7312        /* initialize the wol settings based on the eeprom settings */
7313        adapter->wol = adapter->eeprom_wol;
7314
7315        /* make sure adapter isn't asleep if manageability is enabled */
7316        if (adapter->wol || (adapter->flags & FLAG_MNG_PT_ENABLED) ||
7317            (hw->mac.ops.check_mng_mode(hw)))
7318                device_wakeup_enable(&pdev->dev);
7319
7320        /* save off EEPROM version number */
7321        ret_val = e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
7322
7323        if (ret_val) {
7324                e_dbg("NVM read error getting EEPROM version: %d\n", ret_val);
7325                adapter->eeprom_vers = 0;
7326        }
7327
7328        /* init PTP hardware clock */
7329        e1000e_ptp_init(adapter);
7330
7331        /* reset the hardware with the new settings */
7332        e1000e_reset(adapter);
7333
7334        /* If the controller has AMT, do not set DRV_LOAD until the interface
7335         * is up.  For all other cases, let the f/w know that the h/w is now
7336         * under the control of the driver.
7337         */
7338        if (!(adapter->flags & FLAG_HAS_AMT))
7339                e1000e_get_hw_control(adapter);
7340
7341        strlcpy(netdev->name, "eth%d", sizeof(netdev->name));
7342        err = register_netdev(netdev);
7343        if (err)
7344                goto err_register;
7345
7346        /* carrier off reporting is important to ethtool even BEFORE open */
7347        netif_carrier_off(netdev);
7348
7349        e1000_print_device_info(adapter);
7350
7351        dev_pm_set_driver_flags(&pdev->dev, DPM_FLAG_NEVER_SKIP);
7352
7353        if (pci_dev_run_wake(pdev) && hw->mac.type < e1000_pch_cnp)
7354                pm_runtime_put_noidle(&pdev->dev);
7355
7356        return 0;
7357
7358err_register:
7359        if (!(adapter->flags & FLAG_HAS_AMT))
7360                e1000e_release_hw_control(adapter);
7361err_eeprom:
7362        if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw))
7363                e1000_phy_hw_reset(&adapter->hw);
7364err_hw_init:
7365        kfree(adapter->tx_ring);
7366        kfree(adapter->rx_ring);
7367err_sw_init:
7368        if ((adapter->hw.flash_address) && (hw->mac.type < e1000_pch_spt))
7369                iounmap(adapter->hw.flash_address);
7370        e1000e_reset_interrupt_capability(adapter);
7371err_flashmap:
7372        iounmap(adapter->hw.hw_addr);
7373err_ioremap:
7374        free_netdev(netdev);
7375err_alloc_etherdev:
7376        pci_release_mem_regions(pdev);
7377err_pci_reg:
7378err_dma:
7379        pci_disable_device(pdev);
7380        return err;
7381}
7382
7383/**
7384 * e1000_remove - Device Removal Routine
7385 * @pdev: PCI device information struct
7386 *
7387 * e1000_remove is called by the PCI subsystem to alert the driver
7388 * that it should release a PCI device.  The could be caused by a
7389 * Hot-Plug event, or because the driver is going to be removed from
7390 * memory.
7391 **/
7392static void e1000_remove(struct pci_dev *pdev)
7393{
7394        struct net_device *netdev = pci_get_drvdata(pdev);
7395        struct e1000_adapter *adapter = netdev_priv(netdev);
7396        bool down = test_bit(__E1000_DOWN, &adapter->state);
7397
7398        e1000e_ptp_remove(adapter);
7399
7400        /* The timers may be rescheduled, so explicitly disable them
7401         * from being rescheduled.
7402         */
7403        if (!down)
7404                set_bit(__E1000_DOWN, &adapter->state);
7405        del_timer_sync(&adapter->watchdog_timer);
7406        del_timer_sync(&adapter->phy_info_timer);
7407
7408        cancel_work_sync(&adapter->reset_task);
7409        cancel_work_sync(&adapter->watchdog_task);
7410        cancel_work_sync(&adapter->downshift_task);
7411        cancel_work_sync(&adapter->update_phy_task);
7412        cancel_work_sync(&adapter->print_hang_task);
7413
7414        if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
7415                cancel_work_sync(&adapter->tx_hwtstamp_work);
7416                if (adapter->tx_hwtstamp_skb) {
7417                        dev_consume_skb_any(adapter->tx_hwtstamp_skb);
7418                        adapter->tx_hwtstamp_skb = NULL;
7419                }
7420        }
7421
7422        /* Don't lie to e1000_close() down the road. */
7423        if (!down)
7424                clear_bit(__E1000_DOWN, &adapter->state);
7425        unregister_netdev(netdev);
7426
7427        if (pci_dev_run_wake(pdev))
7428                pm_runtime_get_noresume(&pdev->dev);
7429
7430        /* Release control of h/w to f/w.  If f/w is AMT enabled, this
7431         * would have already happened in close and is redundant.
7432         */
7433        e1000e_release_hw_control(adapter);
7434
7435        e1000e_reset_interrupt_capability(adapter);
7436        kfree(adapter->tx_ring);
7437        kfree(adapter->rx_ring);
7438
7439        iounmap(adapter->hw.hw_addr);
7440        if ((adapter->hw.flash_address) &&
7441            (adapter->hw.mac.type < e1000_pch_spt))
7442                iounmap(adapter->hw.flash_address);
7443        pci_release_mem_regions(pdev);
7444
7445        free_netdev(netdev);
7446
7447        /* AER disable */
7448        pci_disable_pcie_error_reporting(pdev);
7449
7450        pci_disable_device(pdev);
7451}
7452
7453/* PCI Error Recovery (ERS) */
7454static const struct pci_error_handlers e1000_err_handler = {
7455        .error_detected = e1000_io_error_detected,
7456        .slot_reset = e1000_io_slot_reset,
7457        .resume = e1000_io_resume,
7458};
7459
7460static const struct pci_device_id e1000_pci_tbl[] = {
7461        { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
7462        { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
7463        { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
7464        { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP),
7465          board_82571 },
7466        { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
7467        { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
7468        { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
7469        { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
7470        { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
7471
7472        { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
7473        { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
7474        { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
7475        { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
7476
7477        { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
7478        { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
7479        { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
7480
7481        { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
7482        { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
7483        { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
7484
7485        { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
7486          board_80003es2lan },
7487        { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
7488          board_80003es2lan },
7489        { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
7490          board_80003es2lan },
7491        { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
7492          board_80003es2lan },
7493
7494        { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
7495        { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
7496        { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
7497        { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
7498        { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
7499        { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
7500        { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
7501        { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
7502
7503        { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
7504        { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
7505        { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
7506        { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
7507        { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
7508        { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
7509        { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
7510        { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
7511        { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
7512
7513        { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
7514        { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
7515        { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
7516
7517        { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
7518        { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
7519        { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
7520
7521        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
7522        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
7523        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
7524        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
7525
7526        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
7527        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
7528
7529        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
7530        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
7531        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt },
7532        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt },
7533        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM2), board_pch_lpt },
7534        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V2), board_pch_lpt },
7535        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM3), board_pch_lpt },
7536        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V3), board_pch_lpt },
7537        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM), board_pch_spt },
7538        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V), board_pch_spt },
7539        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM2), board_pch_spt },
7540        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V2), board_pch_spt },
7541        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LBG_I219_LM3), board_pch_spt },
7542        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM4), board_pch_spt },
7543        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V4), board_pch_spt },
7544        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM5), board_pch_spt },
7545        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V5), board_pch_spt },
7546        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM6), board_pch_cnp },
7547        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V6), board_pch_cnp },
7548        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM7), board_pch_cnp },
7549        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V7), board_pch_cnp },
7550        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM8), board_pch_cnp },
7551        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V8), board_pch_cnp },
7552        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM9), board_pch_cnp },
7553        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V9), board_pch_cnp },
7554
7555        { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
7556};
7557MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
7558
7559static const struct dev_pm_ops e1000_pm_ops = {
7560#ifdef CONFIG_PM_SLEEP
7561        .suspend        = e1000e_pm_suspend,
7562        .resume         = e1000e_pm_resume,
7563        .freeze         = e1000e_pm_freeze,
7564        .thaw           = e1000e_pm_thaw,
7565        .poweroff       = e1000e_pm_suspend,
7566        .restore        = e1000e_pm_resume,
7567#endif
7568        SET_RUNTIME_PM_OPS(e1000e_pm_runtime_suspend, e1000e_pm_runtime_resume,
7569                           e1000e_pm_runtime_idle)
7570};
7571
7572/* PCI Device API Driver */
7573static struct pci_driver e1000_driver = {
7574        .name     = e1000e_driver_name,
7575        .id_table = e1000_pci_tbl,
7576        .probe    = e1000_probe,
7577        .remove   = e1000_remove,
7578        .driver   = {
7579                .pm = &e1000_pm_ops,
7580        },
7581        .shutdown = e1000_shutdown,
7582        .err_handler = &e1000_err_handler
7583};
7584
7585/**
7586 * e1000_init_module - Driver Registration Routine
7587 *
7588 * e1000_init_module is the first routine called when the driver is
7589 * loaded. All it does is register with the PCI subsystem.
7590 **/
7591static int __init e1000_init_module(void)
7592{
7593        pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
7594                e1000e_driver_version);
7595        pr_info("Copyright(c) 1999 - 2015 Intel Corporation.\n");
7596
7597        return pci_register_driver(&e1000_driver);
7598}
7599module_init(e1000_init_module);
7600
7601/**
7602 * e1000_exit_module - Driver Exit Cleanup Routine
7603 *
7604 * e1000_exit_module is called just before the driver is removed
7605 * from memory.
7606 **/
7607static void __exit e1000_exit_module(void)
7608{
7609        pci_unregister_driver(&e1000_driver);
7610}
7611module_exit(e1000_exit_module);
7612
7613MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
7614MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
7615MODULE_LICENSE("GPL v2");
7616MODULE_VERSION(DRV_VERSION);
7617
7618/* netdev.c */
7619