1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
45
46#include <linux/bitops.h>
47#include <linux/if_vlan.h>
48#include <linux/interrupt.h>
49#include <linux/pci.h>
50#include <linux/slab.h>
51#include <linux/tcp.h>
52#include <net/ip.h>
53#include <linux/netdevice.h>
54#include <linux/etherdevice.h>
55#include <linux/firmware.h>
56#include <linux/net_tstamp.h>
57#include <linux/prefetch.h>
58#include <linux/module.h>
59#include "vxge-main.h"
60#include "vxge-reg.h"
61
62MODULE_LICENSE("Dual BSD/GPL");
63MODULE_DESCRIPTION("Neterion's X3100 Series 10GbE PCIe I/O"
64 "Virtualized Server Adapter");
65
66static const struct pci_device_id vxge_id_table[] = {
67 {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_WIN, PCI_ANY_ID,
68 PCI_ANY_ID},
69 {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_UNI, PCI_ANY_ID,
70 PCI_ANY_ID},
71 {0}
72};
73
74MODULE_DEVICE_TABLE(pci, vxge_id_table);
75
76VXGE_MODULE_PARAM_INT(vlan_tag_strip, VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE);
77VXGE_MODULE_PARAM_INT(addr_learn_en, VXGE_HW_MAC_ADDR_LEARN_DEFAULT);
78VXGE_MODULE_PARAM_INT(max_config_port, VXGE_MAX_CONFIG_PORT);
79VXGE_MODULE_PARAM_INT(max_config_vpath, VXGE_USE_DEFAULT);
80VXGE_MODULE_PARAM_INT(max_mac_vpath, VXGE_MAX_MAC_ADDR_COUNT);
81VXGE_MODULE_PARAM_INT(max_config_dev, VXGE_MAX_CONFIG_DEV);
82
83static u16 vpath_selector[VXGE_HW_MAX_VIRTUAL_PATHS] =
84 {0, 1, 3, 3, 7, 7, 7, 7, 15, 15, 15, 15, 15, 15, 15, 15, 31};
85static unsigned int bw_percentage[VXGE_HW_MAX_VIRTUAL_PATHS] =
86 {[0 ...(VXGE_HW_MAX_VIRTUAL_PATHS - 1)] = 0xFF};
87module_param_array(bw_percentage, uint, NULL, 0);
88
89static struct vxge_drv_config *driver_config;
90static enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev);
91
92static inline int is_vxge_card_up(struct vxgedev *vdev)
93{
94 return test_bit(__VXGE_STATE_CARD_UP, &vdev->state);
95}
96
97static inline void VXGE_COMPLETE_VPATH_TX(struct vxge_fifo *fifo)
98{
99 struct sk_buff **skb_ptr = NULL;
100 struct sk_buff **temp;
101#define NR_SKB_COMPLETED 128
102 struct sk_buff *completed[NR_SKB_COMPLETED];
103 int more;
104
105 do {
106 more = 0;
107 skb_ptr = completed;
108
109 if (__netif_tx_trylock(fifo->txq)) {
110 vxge_hw_vpath_poll_tx(fifo->handle, &skb_ptr,
111 NR_SKB_COMPLETED, &more);
112 __netif_tx_unlock(fifo->txq);
113 }
114
115
116 for (temp = completed; temp != skb_ptr; temp++)
117 dev_kfree_skb_irq(*temp);
118 } while (more);
119}
120
121static inline void VXGE_COMPLETE_ALL_TX(struct vxgedev *vdev)
122{
123 int i;
124
125
126 for (i = 0; i < vdev->no_of_vpath; i++)
127 VXGE_COMPLETE_VPATH_TX(&vdev->vpaths[i].fifo);
128}
129
130static inline void VXGE_COMPLETE_ALL_RX(struct vxgedev *vdev)
131{
132 int i;
133 struct vxge_ring *ring;
134
135
136 for (i = 0; i < vdev->no_of_vpath; i++) {
137 ring = &vdev->vpaths[i].ring;
138 vxge_hw_vpath_poll_rx(ring->handle);
139 }
140}
141
142
143
144
145
146
147
148static void vxge_callback_link_up(struct __vxge_hw_device *hldev)
149{
150 struct net_device *dev = hldev->ndev;
151 struct vxgedev *vdev = netdev_priv(dev);
152
153 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
154 vdev->ndev->name, __func__, __LINE__);
155 netdev_notice(vdev->ndev, "Link Up\n");
156 vdev->stats.link_up++;
157
158 netif_carrier_on(vdev->ndev);
159 netif_tx_wake_all_queues(vdev->ndev);
160
161 vxge_debug_entryexit(VXGE_TRACE,
162 "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
163}
164
165
166
167
168
169
170
171static void vxge_callback_link_down(struct __vxge_hw_device *hldev)
172{
173 struct net_device *dev = hldev->ndev;
174 struct vxgedev *vdev = netdev_priv(dev);
175
176 vxge_debug_entryexit(VXGE_TRACE,
177 "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
178 netdev_notice(vdev->ndev, "Link Down\n");
179
180 vdev->stats.link_down++;
181 netif_carrier_off(vdev->ndev);
182 netif_tx_stop_all_queues(vdev->ndev);
183
184 vxge_debug_entryexit(VXGE_TRACE,
185 "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
186}
187
188
189
190
191
192
193static struct sk_buff *
194vxge_rx_alloc(void *dtrh, struct vxge_ring *ring, const int skb_size)
195{
196 struct net_device *dev;
197 struct sk_buff *skb;
198 struct vxge_rx_priv *rx_priv;
199
200 dev = ring->ndev;
201 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
202 ring->ndev->name, __func__, __LINE__);
203
204 rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
205
206
207 skb = netdev_alloc_skb(dev, skb_size +
208 VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
209 if (skb == NULL) {
210 vxge_debug_mem(VXGE_ERR,
211 "%s: out of memory to allocate SKB", dev->name);
212 ring->stats.skb_alloc_fail++;
213 return NULL;
214 }
215
216 vxge_debug_mem(VXGE_TRACE,
217 "%s: %s:%d Skb : 0x%p", ring->ndev->name,
218 __func__, __LINE__, skb);
219
220 skb_reserve(skb, VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
221
222 rx_priv->skb = skb;
223 rx_priv->skb_data = NULL;
224 rx_priv->data_size = skb_size;
225 vxge_debug_entryexit(VXGE_TRACE,
226 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
227
228 return skb;
229}
230
231
232
233
234static int vxge_rx_map(void *dtrh, struct vxge_ring *ring)
235{
236 struct vxge_rx_priv *rx_priv;
237 dma_addr_t dma_addr;
238
239 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
240 ring->ndev->name, __func__, __LINE__);
241 rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
242
243 rx_priv->skb_data = rx_priv->skb->data;
244 dma_addr = pci_map_single(ring->pdev, rx_priv->skb_data,
245 rx_priv->data_size, PCI_DMA_FROMDEVICE);
246
247 if (unlikely(pci_dma_mapping_error(ring->pdev, dma_addr))) {
248 ring->stats.pci_map_fail++;
249 return -EIO;
250 }
251 vxge_debug_mem(VXGE_TRACE,
252 "%s: %s:%d 1 buffer mode dma_addr = 0x%llx",
253 ring->ndev->name, __func__, __LINE__,
254 (unsigned long long)dma_addr);
255 vxge_hw_ring_rxd_1b_set(dtrh, dma_addr, rx_priv->data_size);
256
257 rx_priv->data_dma = dma_addr;
258 vxge_debug_entryexit(VXGE_TRACE,
259 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
260
261 return 0;
262}
263
264
265
266
267
268static enum vxge_hw_status
269vxge_rx_initial_replenish(void *dtrh, void *userdata)
270{
271 struct vxge_ring *ring = (struct vxge_ring *)userdata;
272 struct vxge_rx_priv *rx_priv;
273
274 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
275 ring->ndev->name, __func__, __LINE__);
276 if (vxge_rx_alloc(dtrh, ring,
277 VXGE_LL_MAX_FRAME_SIZE(ring->ndev)) == NULL)
278 return VXGE_HW_FAIL;
279
280 if (vxge_rx_map(dtrh, ring)) {
281 rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
282 dev_kfree_skb(rx_priv->skb);
283
284 return VXGE_HW_FAIL;
285 }
286 vxge_debug_entryexit(VXGE_TRACE,
287 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
288
289 return VXGE_HW_OK;
290}
291
292static inline void
293vxge_rx_complete(struct vxge_ring *ring, struct sk_buff *skb, u16 vlan,
294 int pkt_length, struct vxge_hw_ring_rxd_info *ext_info)
295{
296
297 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
298 ring->ndev->name, __func__, __LINE__);
299 skb_record_rx_queue(skb, ring->driver_id);
300 skb->protocol = eth_type_trans(skb, ring->ndev);
301
302 u64_stats_update_begin(&ring->stats.syncp);
303 ring->stats.rx_frms++;
304 ring->stats.rx_bytes += pkt_length;
305
306 if (skb->pkt_type == PACKET_MULTICAST)
307 ring->stats.rx_mcast++;
308 u64_stats_update_end(&ring->stats.syncp);
309
310 vxge_debug_rx(VXGE_TRACE,
311 "%s: %s:%d skb protocol = %d",
312 ring->ndev->name, __func__, __LINE__, skb->protocol);
313
314 if (ext_info->vlan &&
315 ring->vlan_tag_strip == VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE)
316 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), ext_info->vlan);
317 napi_gro_receive(ring->napi_p, skb);
318
319 vxge_debug_entryexit(VXGE_TRACE,
320 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
321}
322
323static inline void vxge_re_pre_post(void *dtr, struct vxge_ring *ring,
324 struct vxge_rx_priv *rx_priv)
325{
326 pci_dma_sync_single_for_device(ring->pdev,
327 rx_priv->data_dma, rx_priv->data_size, PCI_DMA_FROMDEVICE);
328
329 vxge_hw_ring_rxd_1b_set(dtr, rx_priv->data_dma, rx_priv->data_size);
330 vxge_hw_ring_rxd_pre_post(ring->handle, dtr);
331}
332
333static inline void vxge_post(int *dtr_cnt, void **first_dtr,
334 void *post_dtr, struct __vxge_hw_ring *ringh)
335{
336 int dtr_count = *dtr_cnt;
337 if ((*dtr_cnt % VXGE_HW_RXSYNC_FREQ_CNT) == 0) {
338 if (*first_dtr)
339 vxge_hw_ring_rxd_post_post_wmb(ringh, *first_dtr);
340 *first_dtr = post_dtr;
341 } else
342 vxge_hw_ring_rxd_post_post(ringh, post_dtr);
343 dtr_count++;
344 *dtr_cnt = dtr_count;
345}
346
347
348
349
350
351
352
353static enum vxge_hw_status
354vxge_rx_1b_compl(struct __vxge_hw_ring *ringh, void *dtr,
355 u8 t_code, void *userdata)
356{
357 struct vxge_ring *ring = (struct vxge_ring *)userdata;
358 struct net_device *dev = ring->ndev;
359 unsigned int dma_sizes;
360 void *first_dtr = NULL;
361 int dtr_cnt = 0;
362 int data_size;
363 dma_addr_t data_dma;
364 int pkt_length;
365 struct sk_buff *skb;
366 struct vxge_rx_priv *rx_priv;
367 struct vxge_hw_ring_rxd_info ext_info;
368 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
369 ring->ndev->name, __func__, __LINE__);
370
371 if (ring->budget <= 0)
372 goto out;
373
374 do {
375 prefetch((char *)dtr + L1_CACHE_BYTES);
376 rx_priv = vxge_hw_ring_rxd_private_get(dtr);
377 skb = rx_priv->skb;
378 data_size = rx_priv->data_size;
379 data_dma = rx_priv->data_dma;
380 prefetch(rx_priv->skb_data);
381
382 vxge_debug_rx(VXGE_TRACE,
383 "%s: %s:%d skb = 0x%p",
384 ring->ndev->name, __func__, __LINE__, skb);
385
386 vxge_hw_ring_rxd_1b_get(ringh, dtr, &dma_sizes);
387 pkt_length = dma_sizes;
388
389 pkt_length -= ETH_FCS_LEN;
390
391 vxge_debug_rx(VXGE_TRACE,
392 "%s: %s:%d Packet Length = %d",
393 ring->ndev->name, __func__, __LINE__, pkt_length);
394
395 vxge_hw_ring_rxd_1b_info_get(ringh, dtr, &ext_info);
396
397
398 vxge_assert(skb);
399
400 prefetch((char *)skb + L1_CACHE_BYTES);
401 if (unlikely(t_code)) {
402 if (vxge_hw_ring_handle_tcode(ringh, dtr, t_code) !=
403 VXGE_HW_OK) {
404
405 ring->stats.rx_errors++;
406 vxge_debug_rx(VXGE_TRACE,
407 "%s: %s :%d Rx T_code is %d",
408 ring->ndev->name, __func__,
409 __LINE__, t_code);
410
411
412
413
414
415 vxge_re_pre_post(dtr, ring, rx_priv);
416
417 vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
418 ring->stats.rx_dropped++;
419 continue;
420 }
421 }
422
423 if (pkt_length > VXGE_LL_RX_COPY_THRESHOLD) {
424 if (vxge_rx_alloc(dtr, ring, data_size) != NULL) {
425 if (!vxge_rx_map(dtr, ring)) {
426 skb_put(skb, pkt_length);
427
428 pci_unmap_single(ring->pdev, data_dma,
429 data_size, PCI_DMA_FROMDEVICE);
430
431 vxge_hw_ring_rxd_pre_post(ringh, dtr);
432 vxge_post(&dtr_cnt, &first_dtr, dtr,
433 ringh);
434 } else {
435 dev_kfree_skb(rx_priv->skb);
436 rx_priv->skb = skb;
437 rx_priv->data_size = data_size;
438 vxge_re_pre_post(dtr, ring, rx_priv);
439
440 vxge_post(&dtr_cnt, &first_dtr, dtr,
441 ringh);
442 ring->stats.rx_dropped++;
443 break;
444 }
445 } else {
446 vxge_re_pre_post(dtr, ring, rx_priv);
447
448 vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
449 ring->stats.rx_dropped++;
450 break;
451 }
452 } else {
453 struct sk_buff *skb_up;
454
455 skb_up = netdev_alloc_skb(dev, pkt_length +
456 VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
457 if (skb_up != NULL) {
458 skb_reserve(skb_up,
459 VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
460
461 pci_dma_sync_single_for_cpu(ring->pdev,
462 data_dma, data_size,
463 PCI_DMA_FROMDEVICE);
464
465 vxge_debug_mem(VXGE_TRACE,
466 "%s: %s:%d skb_up = %p",
467 ring->ndev->name, __func__,
468 __LINE__, skb);
469 memcpy(skb_up->data, skb->data, pkt_length);
470
471 vxge_re_pre_post(dtr, ring, rx_priv);
472
473 vxge_post(&dtr_cnt, &first_dtr, dtr,
474 ringh);
475
476 skb = skb_up;
477 skb_put(skb, pkt_length);
478 } else {
479 vxge_re_pre_post(dtr, ring, rx_priv);
480
481 vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
482 vxge_debug_rx(VXGE_ERR,
483 "%s: vxge_rx_1b_compl: out of "
484 "memory", dev->name);
485 ring->stats.skb_alloc_fail++;
486 break;
487 }
488 }
489
490 if ((ext_info.proto & VXGE_HW_FRAME_PROTO_TCP_OR_UDP) &&
491 !(ext_info.proto & VXGE_HW_FRAME_PROTO_IP_FRAG) &&
492 (dev->features & NETIF_F_RXCSUM) &&
493 ext_info.l3_cksum == VXGE_HW_L3_CKSUM_OK &&
494 ext_info.l4_cksum == VXGE_HW_L4_CKSUM_OK)
495 skb->ip_summed = CHECKSUM_UNNECESSARY;
496 else
497 skb_checksum_none_assert(skb);
498
499
500 if (ring->rx_hwts) {
501 struct skb_shared_hwtstamps *skb_hwts;
502 u32 ns = *(u32 *)(skb->head + pkt_length);
503
504 skb_hwts = skb_hwtstamps(skb);
505 skb_hwts->hwtstamp = ns_to_ktime(ns);
506 }
507
508
509
510
511
512 if (ext_info.rth_value)
513 skb_set_hash(skb, ext_info.rth_value,
514 PKT_HASH_TYPE_L3);
515
516 vxge_rx_complete(ring, skb, ext_info.vlan,
517 pkt_length, &ext_info);
518
519 ring->budget--;
520 ring->pkts_processed++;
521 if (!ring->budget)
522 break;
523
524 } while (vxge_hw_ring_rxd_next_completed(ringh, &dtr,
525 &t_code) == VXGE_HW_OK);
526
527 if (first_dtr)
528 vxge_hw_ring_rxd_post_post_wmb(ringh, first_dtr);
529
530out:
531 vxge_debug_entryexit(VXGE_TRACE,
532 "%s:%d Exiting...",
533 __func__, __LINE__);
534 return VXGE_HW_OK;
535}
536
537
538
539
540
541
542
543
544
545static enum vxge_hw_status
546vxge_xmit_compl(struct __vxge_hw_fifo *fifo_hw, void *dtr,
547 enum vxge_hw_fifo_tcode t_code, void *userdata,
548 struct sk_buff ***skb_ptr, int nr_skb, int *more)
549{
550 struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
551 struct sk_buff *skb, **done_skb = *skb_ptr;
552 int pkt_cnt = 0;
553
554 vxge_debug_entryexit(VXGE_TRACE,
555 "%s:%d Entered....", __func__, __LINE__);
556
557 do {
558 int frg_cnt;
559 skb_frag_t *frag;
560 int i = 0, j;
561 struct vxge_tx_priv *txd_priv =
562 vxge_hw_fifo_txdl_private_get(dtr);
563
564 skb = txd_priv->skb;
565 frg_cnt = skb_shinfo(skb)->nr_frags;
566 frag = &skb_shinfo(skb)->frags[0];
567
568 vxge_debug_tx(VXGE_TRACE,
569 "%s: %s:%d fifo_hw = %p dtr = %p "
570 "tcode = 0x%x", fifo->ndev->name, __func__,
571 __LINE__, fifo_hw, dtr, t_code);
572
573 vxge_assert(skb);
574 vxge_debug_tx(VXGE_TRACE,
575 "%s: %s:%d skb = %p itxd_priv = %p frg_cnt = %d",
576 fifo->ndev->name, __func__, __LINE__,
577 skb, txd_priv, frg_cnt);
578 if (unlikely(t_code)) {
579 fifo->stats.tx_errors++;
580 vxge_debug_tx(VXGE_ERR,
581 "%s: tx: dtr %p completed due to "
582 "error t_code %01x", fifo->ndev->name,
583 dtr, t_code);
584 vxge_hw_fifo_handle_tcode(fifo_hw, dtr, t_code);
585 }
586
587
588 pci_unmap_single(fifo->pdev, txd_priv->dma_buffers[i++],
589 skb_headlen(skb), PCI_DMA_TODEVICE);
590
591 for (j = 0; j < frg_cnt; j++) {
592 pci_unmap_page(fifo->pdev,
593 txd_priv->dma_buffers[i++],
594 skb_frag_size(frag), PCI_DMA_TODEVICE);
595 frag += 1;
596 }
597
598 vxge_hw_fifo_txdl_free(fifo_hw, dtr);
599
600
601 u64_stats_update_begin(&fifo->stats.syncp);
602 fifo->stats.tx_frms++;
603 fifo->stats.tx_bytes += skb->len;
604 u64_stats_update_end(&fifo->stats.syncp);
605
606 *done_skb++ = skb;
607
608 if (--nr_skb <= 0) {
609 *more = 1;
610 break;
611 }
612
613 pkt_cnt++;
614 if (pkt_cnt > fifo->indicate_max_pkts)
615 break;
616
617 } while (vxge_hw_fifo_txdl_next_completed(fifo_hw,
618 &dtr, &t_code) == VXGE_HW_OK);
619
620 *skb_ptr = done_skb;
621 if (netif_tx_queue_stopped(fifo->txq))
622 netif_tx_wake_queue(fifo->txq);
623
624 vxge_debug_entryexit(VXGE_TRACE,
625 "%s: %s:%d Exiting...",
626 fifo->ndev->name, __func__, __LINE__);
627 return VXGE_HW_OK;
628}
629
630
631static u32 vxge_get_vpath_no(struct vxgedev *vdev, struct sk_buff *skb)
632{
633 u16 queue_len, counter = 0;
634 if (skb->protocol == htons(ETH_P_IP)) {
635 struct iphdr *ip;
636 struct tcphdr *th;
637
638 ip = ip_hdr(skb);
639
640 if (!ip_is_fragment(ip)) {
641 th = (struct tcphdr *)(((unsigned char *)ip) +
642 ip->ihl*4);
643
644 queue_len = vdev->no_of_vpath;
645 counter = (ntohs(th->source) +
646 ntohs(th->dest)) &
647 vdev->vpath_selector[queue_len - 1];
648 if (counter >= queue_len)
649 counter = queue_len - 1;
650 }
651 }
652 return counter;
653}
654
655static enum vxge_hw_status vxge_search_mac_addr_in_list(
656 struct vxge_vpath *vpath, u64 del_mac)
657{
658 struct list_head *entry, *next;
659 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
660 if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac)
661 return TRUE;
662 }
663 return FALSE;
664}
665
666static int vxge_mac_list_add(struct vxge_vpath *vpath, struct macInfo *mac)
667{
668 struct vxge_mac_addrs *new_mac_entry;
669 u8 *mac_address = NULL;
670
671 if (vpath->mac_addr_cnt >= VXGE_MAX_LEARN_MAC_ADDR_CNT)
672 return TRUE;
673
674 new_mac_entry = kzalloc(sizeof(struct vxge_mac_addrs), GFP_ATOMIC);
675 if (!new_mac_entry) {
676 vxge_debug_mem(VXGE_ERR,
677 "%s: memory allocation failed",
678 VXGE_DRIVER_NAME);
679 return FALSE;
680 }
681
682 list_add(&new_mac_entry->item, &vpath->mac_addr_list);
683
684
685 mac_address = (u8 *)&new_mac_entry->macaddr;
686 memcpy(mac_address, mac->macaddr, ETH_ALEN);
687
688 new_mac_entry->state = mac->state;
689 vpath->mac_addr_cnt++;
690
691 if (is_multicast_ether_addr(mac->macaddr))
692 vpath->mcast_addr_cnt++;
693
694 return TRUE;
695}
696
697
698static enum vxge_hw_status
699vxge_add_mac_addr(struct vxgedev *vdev, struct macInfo *mac)
700{
701 enum vxge_hw_status status = VXGE_HW_OK;
702 struct vxge_vpath *vpath;
703 enum vxge_hw_vpath_mac_addr_add_mode duplicate_mode;
704
705 if (is_multicast_ether_addr(mac->macaddr))
706 duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE;
707 else
708 duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_REPLACE_DUPLICATE;
709
710 vpath = &vdev->vpaths[mac->vpath_no];
711 status = vxge_hw_vpath_mac_addr_add(vpath->handle, mac->macaddr,
712 mac->macmask, duplicate_mode);
713 if (status != VXGE_HW_OK) {
714 vxge_debug_init(VXGE_ERR,
715 "DA config add entry failed for vpath:%d",
716 vpath->device_id);
717 } else
718 if (FALSE == vxge_mac_list_add(vpath, mac))
719 status = -EPERM;
720
721 return status;
722}
723
724static int vxge_learn_mac(struct vxgedev *vdev, u8 *mac_header)
725{
726 struct macInfo mac_info;
727 u8 *mac_address = NULL;
728 u64 mac_addr = 0, vpath_vector = 0;
729 int vpath_idx = 0;
730 enum vxge_hw_status status = VXGE_HW_OK;
731 struct vxge_vpath *vpath = NULL;
732
733 mac_address = (u8 *)&mac_addr;
734 memcpy(mac_address, mac_header, ETH_ALEN);
735
736
737 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
738 vpath = &vdev->vpaths[vpath_idx];
739 if (vxge_search_mac_addr_in_list(vpath, mac_addr))
740 return vpath_idx;
741 }
742
743 memset(&mac_info, 0, sizeof(struct macInfo));
744 memcpy(mac_info.macaddr, mac_header, ETH_ALEN);
745
746
747 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
748 vpath = &vdev->vpaths[vpath_idx];
749 if (vpath->mac_addr_cnt < vpath->max_mac_addr_cnt) {
750
751 mac_info.vpath_no = vpath_idx;
752 mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
753 status = vxge_add_mac_addr(vdev, &mac_info);
754 if (status != VXGE_HW_OK)
755 return -EPERM;
756 return vpath_idx;
757 }
758 }
759
760 mac_info.state = VXGE_LL_MAC_ADDR_IN_LIST;
761 vpath_idx = 0;
762 mac_info.vpath_no = vpath_idx;
763
764 vpath = &vdev->vpaths[vpath_idx];
765 if (vpath->mac_addr_cnt > vpath->max_mac_addr_cnt) {
766
767 if (FALSE == vxge_mac_list_add(vpath, &mac_info))
768 return -EPERM;
769 return vpath_idx;
770 }
771
772
773 vpath_vector = vxge_mBIT(vpath->device_id);
774 status = vxge_hw_mgmt_reg_write(vpath->vdev->devh,
775 vxge_hw_mgmt_reg_type_mrpcim,
776 0,
777 (ulong)offsetof(
778 struct vxge_hw_mrpcim_reg,
779 rts_mgr_cbasin_cfg),
780 vpath_vector);
781 if (status != VXGE_HW_OK) {
782 vxge_debug_tx(VXGE_ERR,
783 "%s: Unable to set the vpath-%d in catch-basin mode",
784 VXGE_DRIVER_NAME, vpath->device_id);
785 return -EPERM;
786 }
787
788 if (FALSE == vxge_mac_list_add(vpath, &mac_info))
789 return -EPERM;
790
791 return vpath_idx;
792}
793
794
795
796
797
798
799
800
801
802static netdev_tx_t
803vxge_xmit(struct sk_buff *skb, struct net_device *dev)
804{
805 struct vxge_fifo *fifo = NULL;
806 void *dtr_priv;
807 void *dtr = NULL;
808 struct vxgedev *vdev = NULL;
809 enum vxge_hw_status status;
810 int frg_cnt, first_frg_len;
811 skb_frag_t *frag;
812 int i = 0, j = 0, avail;
813 u64 dma_pointer;
814 struct vxge_tx_priv *txdl_priv = NULL;
815 struct __vxge_hw_fifo *fifo_hw;
816 int offload_type;
817 int vpath_no = 0;
818
819 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
820 dev->name, __func__, __LINE__);
821
822
823 if (unlikely(skb->len <= 0)) {
824 vxge_debug_tx(VXGE_ERR,
825 "%s: Buffer has no data..", dev->name);
826 dev_kfree_skb_any(skb);
827 return NETDEV_TX_OK;
828 }
829
830 vdev = netdev_priv(dev);
831
832 if (unlikely(!is_vxge_card_up(vdev))) {
833 vxge_debug_tx(VXGE_ERR,
834 "%s: vdev not initialized", dev->name);
835 dev_kfree_skb_any(skb);
836 return NETDEV_TX_OK;
837 }
838
839 if (vdev->config.addr_learn_en) {
840 vpath_no = vxge_learn_mac(vdev, skb->data + ETH_ALEN);
841 if (vpath_no == -EPERM) {
842 vxge_debug_tx(VXGE_ERR,
843 "%s: Failed to store the mac address",
844 dev->name);
845 dev_kfree_skb_any(skb);
846 return NETDEV_TX_OK;
847 }
848 }
849
850 if (vdev->config.tx_steering_type == TX_MULTIQ_STEERING)
851 vpath_no = skb_get_queue_mapping(skb);
852 else if (vdev->config.tx_steering_type == TX_PORT_STEERING)
853 vpath_no = vxge_get_vpath_no(vdev, skb);
854
855 vxge_debug_tx(VXGE_TRACE, "%s: vpath_no= %d", dev->name, vpath_no);
856
857 if (vpath_no >= vdev->no_of_vpath)
858 vpath_no = 0;
859
860 fifo = &vdev->vpaths[vpath_no].fifo;
861 fifo_hw = fifo->handle;
862
863 if (netif_tx_queue_stopped(fifo->txq))
864 return NETDEV_TX_BUSY;
865
866 avail = vxge_hw_fifo_free_txdl_count_get(fifo_hw);
867 if (avail == 0) {
868 vxge_debug_tx(VXGE_ERR,
869 "%s: No free TXDs available", dev->name);
870 fifo->stats.txd_not_free++;
871 goto _exit0;
872 }
873
874
875
876
877 if (avail == 1)
878 netif_tx_stop_queue(fifo->txq);
879
880 status = vxge_hw_fifo_txdl_reserve(fifo_hw, &dtr, &dtr_priv);
881 if (unlikely(status != VXGE_HW_OK)) {
882 vxge_debug_tx(VXGE_ERR,
883 "%s: Out of descriptors .", dev->name);
884 fifo->stats.txd_out_of_desc++;
885 goto _exit0;
886 }
887
888 vxge_debug_tx(VXGE_TRACE,
889 "%s: %s:%d fifo_hw = %p dtr = %p dtr_priv = %p",
890 dev->name, __func__, __LINE__,
891 fifo_hw, dtr, dtr_priv);
892
893 if (skb_vlan_tag_present(skb)) {
894 u16 vlan_tag = skb_vlan_tag_get(skb);
895 vxge_hw_fifo_txdl_vlan_set(dtr, vlan_tag);
896 }
897
898 first_frg_len = skb_headlen(skb);
899
900 dma_pointer = pci_map_single(fifo->pdev, skb->data, first_frg_len,
901 PCI_DMA_TODEVICE);
902
903 if (unlikely(pci_dma_mapping_error(fifo->pdev, dma_pointer))) {
904 vxge_hw_fifo_txdl_free(fifo_hw, dtr);
905 fifo->stats.pci_map_fail++;
906 goto _exit0;
907 }
908
909 txdl_priv = vxge_hw_fifo_txdl_private_get(dtr);
910 txdl_priv->skb = skb;
911 txdl_priv->dma_buffers[j] = dma_pointer;
912
913 frg_cnt = skb_shinfo(skb)->nr_frags;
914 vxge_debug_tx(VXGE_TRACE,
915 "%s: %s:%d skb = %p txdl_priv = %p "
916 "frag_cnt = %d dma_pointer = 0x%llx", dev->name,
917 __func__, __LINE__, skb, txdl_priv,
918 frg_cnt, (unsigned long long)dma_pointer);
919
920 vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
921 first_frg_len);
922
923 frag = &skb_shinfo(skb)->frags[0];
924 for (i = 0; i < frg_cnt; i++) {
925
926 if (!skb_frag_size(frag))
927 continue;
928
929 dma_pointer = (u64)skb_frag_dma_map(&fifo->pdev->dev, frag,
930 0, skb_frag_size(frag),
931 DMA_TO_DEVICE);
932
933 if (unlikely(dma_mapping_error(&fifo->pdev->dev, dma_pointer)))
934 goto _exit2;
935 vxge_debug_tx(VXGE_TRACE,
936 "%s: %s:%d frag = %d dma_pointer = 0x%llx",
937 dev->name, __func__, __LINE__, i,
938 (unsigned long long)dma_pointer);
939
940 txdl_priv->dma_buffers[j] = dma_pointer;
941 vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
942 skb_frag_size(frag));
943 frag += 1;
944 }
945
946 offload_type = vxge_offload_type(skb);
947
948 if (offload_type & (SKB_GSO_TCPV4 | SKB_GSO_TCPV6)) {
949 int mss = vxge_tcp_mss(skb);
950 if (mss) {
951 vxge_debug_tx(VXGE_TRACE, "%s: %s:%d mss = %d",
952 dev->name, __func__, __LINE__, mss);
953 vxge_hw_fifo_txdl_mss_set(dtr, mss);
954 } else {
955 vxge_assert(skb->len <=
956 dev->mtu + VXGE_HW_MAC_HEADER_MAX_SIZE);
957 vxge_assert(0);
958 goto _exit1;
959 }
960 }
961
962 if (skb->ip_summed == CHECKSUM_PARTIAL)
963 vxge_hw_fifo_txdl_cksum_set_bits(dtr,
964 VXGE_HW_FIFO_TXD_TX_CKO_IPV4_EN |
965 VXGE_HW_FIFO_TXD_TX_CKO_TCP_EN |
966 VXGE_HW_FIFO_TXD_TX_CKO_UDP_EN);
967
968 vxge_hw_fifo_txdl_post(fifo_hw, dtr);
969
970 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
971 dev->name, __func__, __LINE__);
972 return NETDEV_TX_OK;
973
974_exit2:
975 vxge_debug_tx(VXGE_TRACE, "%s: pci_map_page failed", dev->name);
976_exit1:
977 j = 0;
978 frag = &skb_shinfo(skb)->frags[0];
979
980 pci_unmap_single(fifo->pdev, txdl_priv->dma_buffers[j++],
981 skb_headlen(skb), PCI_DMA_TODEVICE);
982
983 for (; j < i; j++) {
984 pci_unmap_page(fifo->pdev, txdl_priv->dma_buffers[j],
985 skb_frag_size(frag), PCI_DMA_TODEVICE);
986 frag += 1;
987 }
988
989 vxge_hw_fifo_txdl_free(fifo_hw, dtr);
990_exit0:
991 netif_tx_stop_queue(fifo->txq);
992 dev_kfree_skb_any(skb);
993
994 return NETDEV_TX_OK;
995}
996
997
998
999
1000
1001
1002
1003static void
1004vxge_rx_term(void *dtrh, enum vxge_hw_rxd_state state, void *userdata)
1005{
1006 struct vxge_ring *ring = (struct vxge_ring *)userdata;
1007 struct vxge_rx_priv *rx_priv =
1008 vxge_hw_ring_rxd_private_get(dtrh);
1009
1010 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
1011 ring->ndev->name, __func__, __LINE__);
1012 if (state != VXGE_HW_RXD_STATE_POSTED)
1013 return;
1014
1015 pci_unmap_single(ring->pdev, rx_priv->data_dma,
1016 rx_priv->data_size, PCI_DMA_FROMDEVICE);
1017
1018 dev_kfree_skb(rx_priv->skb);
1019 rx_priv->skb_data = NULL;
1020
1021 vxge_debug_entryexit(VXGE_TRACE,
1022 "%s: %s:%d Exiting...",
1023 ring->ndev->name, __func__, __LINE__);
1024}
1025
1026
1027
1028
1029
1030
1031static void
1032vxge_tx_term(void *dtrh, enum vxge_hw_txdl_state state, void *userdata)
1033{
1034 struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
1035 skb_frag_t *frag;
1036 int i = 0, j, frg_cnt;
1037 struct vxge_tx_priv *txd_priv = vxge_hw_fifo_txdl_private_get(dtrh);
1038 struct sk_buff *skb = txd_priv->skb;
1039
1040 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1041
1042 if (state != VXGE_HW_TXDL_STATE_POSTED)
1043 return;
1044
1045
1046 vxge_assert(skb);
1047 frg_cnt = skb_shinfo(skb)->nr_frags;
1048 frag = &skb_shinfo(skb)->frags[0];
1049
1050
1051 pci_unmap_single(fifo->pdev, txd_priv->dma_buffers[i++],
1052 skb_headlen(skb), PCI_DMA_TODEVICE);
1053
1054 for (j = 0; j < frg_cnt; j++) {
1055 pci_unmap_page(fifo->pdev, txd_priv->dma_buffers[i++],
1056 skb_frag_size(frag), PCI_DMA_TODEVICE);
1057 frag += 1;
1058 }
1059
1060 dev_kfree_skb(skb);
1061
1062 vxge_debug_entryexit(VXGE_TRACE,
1063 "%s:%d Exiting...", __func__, __LINE__);
1064}
1065
1066static int vxge_mac_list_del(struct vxge_vpath *vpath, struct macInfo *mac)
1067{
1068 struct list_head *entry, *next;
1069 u64 del_mac = 0;
1070 u8 *mac_address = (u8 *) (&del_mac);
1071
1072
1073 memcpy(mac_address, mac->macaddr, ETH_ALEN);
1074
1075 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
1076 if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac) {
1077 list_del(entry);
1078 kfree((struct vxge_mac_addrs *)entry);
1079 vpath->mac_addr_cnt--;
1080
1081 if (is_multicast_ether_addr(mac->macaddr))
1082 vpath->mcast_addr_cnt--;
1083 return TRUE;
1084 }
1085 }
1086
1087 return FALSE;
1088}
1089
1090
1091static enum vxge_hw_status
1092vxge_del_mac_addr(struct vxgedev *vdev, struct macInfo *mac)
1093{
1094 enum vxge_hw_status status = VXGE_HW_OK;
1095 struct vxge_vpath *vpath;
1096
1097 vpath = &vdev->vpaths[mac->vpath_no];
1098 status = vxge_hw_vpath_mac_addr_delete(vpath->handle, mac->macaddr,
1099 mac->macmask);
1100 if (status != VXGE_HW_OK) {
1101 vxge_debug_init(VXGE_ERR,
1102 "DA config delete entry failed for vpath:%d",
1103 vpath->device_id);
1104 } else
1105 vxge_mac_list_del(vpath, mac);
1106 return status;
1107}
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120static void vxge_set_multicast(struct net_device *dev)
1121{
1122 struct netdev_hw_addr *ha;
1123 struct vxgedev *vdev;
1124 int i, mcast_cnt = 0;
1125 struct vxge_vpath *vpath;
1126 enum vxge_hw_status status = VXGE_HW_OK;
1127 struct macInfo mac_info;
1128 int vpath_idx = 0;
1129 struct vxge_mac_addrs *mac_entry;
1130 struct list_head *list_head;
1131 struct list_head *entry, *next;
1132 u8 *mac_address = NULL;
1133
1134 vxge_debug_entryexit(VXGE_TRACE,
1135 "%s:%d", __func__, __LINE__);
1136
1137 vdev = netdev_priv(dev);
1138
1139 if (unlikely(!is_vxge_card_up(vdev)))
1140 return;
1141
1142 if ((dev->flags & IFF_ALLMULTI) && (!vdev->all_multi_flg)) {
1143 for (i = 0; i < vdev->no_of_vpath; i++) {
1144 vpath = &vdev->vpaths[i];
1145 vxge_assert(vpath->is_open);
1146 status = vxge_hw_vpath_mcast_enable(vpath->handle);
1147 if (status != VXGE_HW_OK)
1148 vxge_debug_init(VXGE_ERR, "failed to enable "
1149 "multicast, status %d", status);
1150 vdev->all_multi_flg = 1;
1151 }
1152 } else if (!(dev->flags & IFF_ALLMULTI) && (vdev->all_multi_flg)) {
1153 for (i = 0; i < vdev->no_of_vpath; i++) {
1154 vpath = &vdev->vpaths[i];
1155 vxge_assert(vpath->is_open);
1156 status = vxge_hw_vpath_mcast_disable(vpath->handle);
1157 if (status != VXGE_HW_OK)
1158 vxge_debug_init(VXGE_ERR, "failed to disable "
1159 "multicast, status %d", status);
1160 vdev->all_multi_flg = 0;
1161 }
1162 }
1163
1164
1165 if (!vdev->config.addr_learn_en) {
1166 for (i = 0; i < vdev->no_of_vpath; i++) {
1167 vpath = &vdev->vpaths[i];
1168 vxge_assert(vpath->is_open);
1169
1170 if (dev->flags & IFF_PROMISC)
1171 status = vxge_hw_vpath_promisc_enable(
1172 vpath->handle);
1173 else
1174 status = vxge_hw_vpath_promisc_disable(
1175 vpath->handle);
1176 if (status != VXGE_HW_OK)
1177 vxge_debug_init(VXGE_ERR, "failed to %s promisc"
1178 ", status %d", dev->flags&IFF_PROMISC ?
1179 "enable" : "disable", status);
1180 }
1181 }
1182
1183 memset(&mac_info, 0, sizeof(struct macInfo));
1184
1185 if ((!vdev->all_multi_flg) && netdev_mc_count(dev)) {
1186 mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
1187 list_head = &vdev->vpaths[0].mac_addr_list;
1188 if ((netdev_mc_count(dev) +
1189 (vdev->vpaths[0].mac_addr_cnt - mcast_cnt)) >
1190 vdev->vpaths[0].max_mac_addr_cnt)
1191 goto _set_all_mcast;
1192
1193
1194 for (i = 0; i < mcast_cnt; i++) {
1195 list_for_each_safe(entry, next, list_head) {
1196 mac_entry = (struct vxge_mac_addrs *)entry;
1197
1198 mac_address = (u8 *)&mac_entry->macaddr;
1199 memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
1200
1201 if (is_multicast_ether_addr(mac_info.macaddr)) {
1202 for (vpath_idx = 0; vpath_idx <
1203 vdev->no_of_vpath;
1204 vpath_idx++) {
1205 mac_info.vpath_no = vpath_idx;
1206 status = vxge_del_mac_addr(
1207 vdev,
1208 &mac_info);
1209 }
1210 }
1211 }
1212 }
1213
1214
1215 netdev_for_each_mc_addr(ha, dev) {
1216 memcpy(mac_info.macaddr, ha->addr, ETH_ALEN);
1217 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
1218 vpath_idx++) {
1219 mac_info.vpath_no = vpath_idx;
1220 mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
1221 status = vxge_add_mac_addr(vdev, &mac_info);
1222 if (status != VXGE_HW_OK) {
1223 vxge_debug_init(VXGE_ERR,
1224 "%s:%d Setting individual"
1225 "multicast address failed",
1226 __func__, __LINE__);
1227 goto _set_all_mcast;
1228 }
1229 }
1230 }
1231
1232 return;
1233_set_all_mcast:
1234 mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
1235
1236 for (i = 0; i < mcast_cnt; i++) {
1237 list_for_each_safe(entry, next, list_head) {
1238 mac_entry = (struct vxge_mac_addrs *)entry;
1239
1240 mac_address = (u8 *)&mac_entry->macaddr;
1241 memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
1242
1243 if (is_multicast_ether_addr(mac_info.macaddr))
1244 break;
1245 }
1246
1247 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
1248 vpath_idx++) {
1249 mac_info.vpath_no = vpath_idx;
1250 status = vxge_del_mac_addr(vdev, &mac_info);
1251 }
1252 }
1253
1254
1255 for (i = 0; i < vdev->no_of_vpath; i++) {
1256 vpath = &vdev->vpaths[i];
1257 vxge_assert(vpath->is_open);
1258
1259 status = vxge_hw_vpath_mcast_enable(vpath->handle);
1260 if (status != VXGE_HW_OK) {
1261 vxge_debug_init(VXGE_ERR,
1262 "%s:%d Enabling all multicasts failed",
1263 __func__, __LINE__);
1264 }
1265 vdev->all_multi_flg = 1;
1266 }
1267 dev->flags |= IFF_ALLMULTI;
1268 }
1269
1270 vxge_debug_entryexit(VXGE_TRACE,
1271 "%s:%d Exiting...", __func__, __LINE__);
1272}
1273
1274
1275
1276
1277
1278
1279
1280static int vxge_set_mac_addr(struct net_device *dev, void *p)
1281{
1282 struct sockaddr *addr = p;
1283 struct vxgedev *vdev;
1284 enum vxge_hw_status status = VXGE_HW_OK;
1285 struct macInfo mac_info_new, mac_info_old;
1286 int vpath_idx = 0;
1287
1288 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1289
1290 vdev = netdev_priv(dev);
1291
1292 if (!is_valid_ether_addr(addr->sa_data))
1293 return -EINVAL;
1294
1295 memset(&mac_info_new, 0, sizeof(struct macInfo));
1296 memset(&mac_info_old, 0, sizeof(struct macInfo));
1297
1298 vxge_debug_entryexit(VXGE_TRACE, "%s:%d Exiting...",
1299 __func__, __LINE__);
1300
1301
1302 memcpy(mac_info_old.macaddr, dev->dev_addr, dev->addr_len);
1303
1304
1305 memcpy(mac_info_new.macaddr, addr->sa_data, dev->addr_len);
1306
1307
1308
1309 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
1310 struct vxge_vpath *vpath = &vdev->vpaths[vpath_idx];
1311 if (!vpath->is_open) {
1312
1313
1314
1315 vxge_mac_list_del(vpath, &mac_info_old);
1316
1317
1318
1319 vxge_mac_list_add(vpath, &mac_info_new);
1320
1321 continue;
1322 }
1323
1324 mac_info_old.vpath_no = vpath_idx;
1325 status = vxge_del_mac_addr(vdev, &mac_info_old);
1326 }
1327
1328 if (unlikely(!is_vxge_card_up(vdev))) {
1329 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1330 return VXGE_HW_OK;
1331 }
1332
1333
1334 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
1335 mac_info_new.vpath_no = vpath_idx;
1336 mac_info_new.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
1337 status = vxge_add_mac_addr(vdev, &mac_info_new);
1338 if (status != VXGE_HW_OK)
1339 return -EINVAL;
1340 }
1341
1342 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1343
1344 return status;
1345}
1346
1347
1348
1349
1350
1351
1352
1353
1354static void vxge_vpath_intr_enable(struct vxgedev *vdev, int vp_id)
1355{
1356 struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
1357 int msix_id = 0;
1358 int tim_msix_id[4] = {0, 1, 0, 0};
1359 int alarm_msix_id = VXGE_ALARM_MSIX_ID;
1360
1361 vxge_hw_vpath_intr_enable(vpath->handle);
1362
1363 if (vdev->config.intr_type == INTA)
1364 vxge_hw_vpath_inta_unmask_tx_rx(vpath->handle);
1365 else {
1366 vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id,
1367 alarm_msix_id);
1368
1369 msix_id = vpath->device_id * VXGE_HW_VPATH_MSIX_ACTIVE;
1370 vxge_hw_vpath_msix_unmask(vpath->handle, msix_id);
1371 vxge_hw_vpath_msix_unmask(vpath->handle, msix_id + 1);
1372
1373
1374 msix_id = (vpath->handle->vpath->hldev->first_vp_id *
1375 VXGE_HW_VPATH_MSIX_ACTIVE) + alarm_msix_id;
1376 vxge_hw_vpath_msix_unmask(vpath->handle, msix_id);
1377 }
1378}
1379
1380
1381
1382
1383
1384
1385
1386
1387static void vxge_vpath_intr_disable(struct vxgedev *vdev, int vp_id)
1388{
1389 struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
1390 struct __vxge_hw_device *hldev;
1391 int msix_id;
1392
1393 hldev = pci_get_drvdata(vdev->pdev);
1394
1395 vxge_hw_vpath_wait_receive_idle(hldev, vpath->device_id);
1396
1397 vxge_hw_vpath_intr_disable(vpath->handle);
1398
1399 if (vdev->config.intr_type == INTA)
1400 vxge_hw_vpath_inta_mask_tx_rx(vpath->handle);
1401 else {
1402 msix_id = vpath->device_id * VXGE_HW_VPATH_MSIX_ACTIVE;
1403 vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
1404 vxge_hw_vpath_msix_mask(vpath->handle, msix_id + 1);
1405
1406
1407 msix_id = (vpath->handle->vpath->hldev->first_vp_id *
1408 VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
1409 vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
1410 }
1411}
1412
1413
1414static enum vxge_hw_status
1415vxge_search_mac_addr_in_da_table(struct vxge_vpath *vpath, struct macInfo *mac)
1416{
1417 enum vxge_hw_status status = VXGE_HW_OK;
1418 unsigned char macmask[ETH_ALEN];
1419 unsigned char macaddr[ETH_ALEN];
1420
1421 status = vxge_hw_vpath_mac_addr_get(vpath->handle,
1422 macaddr, macmask);
1423 if (status != VXGE_HW_OK) {
1424 vxge_debug_init(VXGE_ERR,
1425 "DA config list entry failed for vpath:%d",
1426 vpath->device_id);
1427 return status;
1428 }
1429
1430 while (!ether_addr_equal(mac->macaddr, macaddr)) {
1431 status = vxge_hw_vpath_mac_addr_get_next(vpath->handle,
1432 macaddr, macmask);
1433 if (status != VXGE_HW_OK)
1434 break;
1435 }
1436
1437 return status;
1438}
1439
1440
1441static enum vxge_hw_status vxge_restore_vpath_mac_addr(struct vxge_vpath *vpath)
1442{
1443 enum vxge_hw_status status = VXGE_HW_OK;
1444 struct macInfo mac_info;
1445 u8 *mac_address = NULL;
1446 struct list_head *entry, *next;
1447
1448 memset(&mac_info, 0, sizeof(struct macInfo));
1449
1450 if (vpath->is_open) {
1451 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
1452 mac_address =
1453 (u8 *)&
1454 ((struct vxge_mac_addrs *)entry)->macaddr;
1455 memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
1456 ((struct vxge_mac_addrs *)entry)->state =
1457 VXGE_LL_MAC_ADDR_IN_DA_TABLE;
1458
1459 status = vxge_search_mac_addr_in_da_table(vpath,
1460 &mac_info);
1461 if (status != VXGE_HW_OK) {
1462
1463 status = vxge_hw_vpath_mac_addr_add(
1464 vpath->handle, mac_info.macaddr,
1465 mac_info.macmask,
1466 VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE);
1467 if (status != VXGE_HW_OK) {
1468 vxge_debug_init(VXGE_ERR,
1469 "DA add entry failed for vpath:%d",
1470 vpath->device_id);
1471 ((struct vxge_mac_addrs *)entry)->state
1472 = VXGE_LL_MAC_ADDR_IN_LIST;
1473 }
1474 }
1475 }
1476 }
1477
1478 return status;
1479}
1480
1481
1482static enum vxge_hw_status
1483vxge_restore_vpath_vid_table(struct vxge_vpath *vpath)
1484{
1485 enum vxge_hw_status status = VXGE_HW_OK;
1486 struct vxgedev *vdev = vpath->vdev;
1487 u16 vid;
1488
1489 if (!vpath->is_open)
1490 return status;
1491
1492 for_each_set_bit(vid, vdev->active_vlans, VLAN_N_VID)
1493 status = vxge_hw_vpath_vid_add(vpath->handle, vid);
1494
1495 return status;
1496}
1497
1498
1499
1500
1501
1502
1503
1504
1505static int vxge_reset_vpath(struct vxgedev *vdev, int vp_id)
1506{
1507 enum vxge_hw_status status = VXGE_HW_OK;
1508 struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
1509 int ret = 0;
1510
1511
1512 if (unlikely(!is_vxge_card_up(vdev)))
1513 return 0;
1514
1515
1516 if (test_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
1517 return 0;
1518
1519 if (vpath->handle) {
1520 if (vxge_hw_vpath_reset(vpath->handle) == VXGE_HW_OK) {
1521 if (is_vxge_card_up(vdev) &&
1522 vxge_hw_vpath_recover_from_reset(vpath->handle)
1523 != VXGE_HW_OK) {
1524 vxge_debug_init(VXGE_ERR,
1525 "vxge_hw_vpath_recover_from_reset"
1526 "failed for vpath:%d", vp_id);
1527 return status;
1528 }
1529 } else {
1530 vxge_debug_init(VXGE_ERR,
1531 "vxge_hw_vpath_reset failed for"
1532 "vpath:%d", vp_id);
1533 return status;
1534 }
1535 } else
1536 return VXGE_HW_FAIL;
1537
1538 vxge_restore_vpath_mac_addr(vpath);
1539 vxge_restore_vpath_vid_table(vpath);
1540
1541
1542 vxge_hw_vpath_bcast_enable(vpath->handle);
1543
1544
1545 if (vdev->all_multi_flg) {
1546 status = vxge_hw_vpath_mcast_enable(vpath->handle);
1547 if (status != VXGE_HW_OK)
1548 vxge_debug_init(VXGE_ERR,
1549 "%s:%d Enabling multicast failed",
1550 __func__, __LINE__);
1551 }
1552
1553
1554 vxge_vpath_intr_enable(vdev, vp_id);
1555
1556 smp_wmb();
1557
1558
1559 vxge_hw_vpath_enable(vpath->handle);
1560
1561 smp_wmb();
1562 vxge_hw_vpath_rx_doorbell_init(vpath->handle);
1563 vpath->ring.last_status = VXGE_HW_OK;
1564
1565
1566 clear_bit(vp_id, &vdev->vp_reset);
1567
1568
1569 if (netif_tx_queue_stopped(vpath->fifo.txq))
1570 netif_tx_wake_queue(vpath->fifo.txq);
1571
1572 return ret;
1573}
1574
1575
1576static void vxge_config_ci_for_tti_rti(struct vxgedev *vdev)
1577{
1578 int i = 0;
1579
1580
1581 if (vdev->config.intr_type == MSI_X) {
1582 for (i = 0; i < vdev->no_of_vpath; i++) {
1583 struct __vxge_hw_ring *hw_ring;
1584
1585 hw_ring = vdev->vpaths[i].ring.handle;
1586 vxge_hw_vpath_dynamic_rti_ci_set(hw_ring);
1587 }
1588 }
1589
1590
1591 for (i = 0; i < vdev->no_of_vpath; i++) {
1592 struct __vxge_hw_fifo *hw_fifo = vdev->vpaths[i].fifo.handle;
1593 vxge_hw_vpath_tti_ci_set(hw_fifo);
1594
1595
1596
1597
1598 if ((vdev->config.intr_type == INTA) && (i == 0))
1599 break;
1600 }
1601
1602 return;
1603}
1604
1605static int do_vxge_reset(struct vxgedev *vdev, int event)
1606{
1607 enum vxge_hw_status status;
1608 int ret = 0, vp_id, i;
1609
1610 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1611
1612 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET)) {
1613
1614 if (unlikely(!is_vxge_card_up(vdev)))
1615 return 0;
1616
1617
1618 if (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
1619 return 0;
1620 }
1621
1622 if (event == VXGE_LL_FULL_RESET) {
1623 netif_carrier_off(vdev->ndev);
1624
1625
1626 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
1627 while (test_bit(vp_id, &vdev->vp_reset))
1628 msleep(50);
1629 }
1630
1631 netif_carrier_on(vdev->ndev);
1632
1633
1634 if (unlikely(vdev->exec_mode)) {
1635 vxge_debug_init(VXGE_ERR,
1636 "%s: execution mode is debug, returning..",
1637 vdev->ndev->name);
1638 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
1639 netif_tx_stop_all_queues(vdev->ndev);
1640 return 0;
1641 }
1642 }
1643
1644 if (event == VXGE_LL_FULL_RESET) {
1645 vxge_hw_device_wait_receive_idle(vdev->devh);
1646 vxge_hw_device_intr_disable(vdev->devh);
1647
1648 switch (vdev->cric_err_event) {
1649 case VXGE_HW_EVENT_UNKNOWN:
1650 netif_tx_stop_all_queues(vdev->ndev);
1651 vxge_debug_init(VXGE_ERR,
1652 "fatal: %s: Disabling device due to"
1653 "unknown error",
1654 vdev->ndev->name);
1655 ret = -EPERM;
1656 goto out;
1657 case VXGE_HW_EVENT_RESET_START:
1658 break;
1659 case VXGE_HW_EVENT_RESET_COMPLETE:
1660 case VXGE_HW_EVENT_LINK_DOWN:
1661 case VXGE_HW_EVENT_LINK_UP:
1662 case VXGE_HW_EVENT_ALARM_CLEARED:
1663 case VXGE_HW_EVENT_ECCERR:
1664 case VXGE_HW_EVENT_MRPCIM_ECCERR:
1665 ret = -EPERM;
1666 goto out;
1667 case VXGE_HW_EVENT_FIFO_ERR:
1668 case VXGE_HW_EVENT_VPATH_ERR:
1669 break;
1670 case VXGE_HW_EVENT_CRITICAL_ERR:
1671 netif_tx_stop_all_queues(vdev->ndev);
1672 vxge_debug_init(VXGE_ERR,
1673 "fatal: %s: Disabling device due to"
1674 "serious error",
1675 vdev->ndev->name);
1676
1677
1678 ret = -EPERM;
1679 goto out;
1680 case VXGE_HW_EVENT_SERR:
1681 netif_tx_stop_all_queues(vdev->ndev);
1682 vxge_debug_init(VXGE_ERR,
1683 "fatal: %s: Disabling device due to"
1684 "serious error",
1685 vdev->ndev->name);
1686 ret = -EPERM;
1687 goto out;
1688 case VXGE_HW_EVENT_SRPCIM_SERR:
1689 case VXGE_HW_EVENT_MRPCIM_SERR:
1690 ret = -EPERM;
1691 goto out;
1692 case VXGE_HW_EVENT_SLOT_FREEZE:
1693 netif_tx_stop_all_queues(vdev->ndev);
1694 vxge_debug_init(VXGE_ERR,
1695 "fatal: %s: Disabling device due to"
1696 "slot freeze",
1697 vdev->ndev->name);
1698 ret = -EPERM;
1699 goto out;
1700 default:
1701 break;
1702
1703 }
1704 }
1705
1706 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET))
1707 netif_tx_stop_all_queues(vdev->ndev);
1708
1709 if (event == VXGE_LL_FULL_RESET) {
1710 status = vxge_reset_all_vpaths(vdev);
1711 if (status != VXGE_HW_OK) {
1712 vxge_debug_init(VXGE_ERR,
1713 "fatal: %s: can not reset vpaths",
1714 vdev->ndev->name);
1715 ret = -EPERM;
1716 goto out;
1717 }
1718 }
1719
1720 if (event == VXGE_LL_COMPL_RESET) {
1721 for (i = 0; i < vdev->no_of_vpath; i++)
1722 if (vdev->vpaths[i].handle) {
1723 if (vxge_hw_vpath_recover_from_reset(
1724 vdev->vpaths[i].handle)
1725 != VXGE_HW_OK) {
1726 vxge_debug_init(VXGE_ERR,
1727 "vxge_hw_vpath_recover_"
1728 "from_reset failed for vpath: "
1729 "%d", i);
1730 ret = -EPERM;
1731 goto out;
1732 }
1733 } else {
1734 vxge_debug_init(VXGE_ERR,
1735 "vxge_hw_vpath_reset failed for "
1736 "vpath:%d", i);
1737 ret = -EPERM;
1738 goto out;
1739 }
1740 }
1741
1742 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET)) {
1743
1744 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
1745 vxge_restore_vpath_mac_addr(&vdev->vpaths[vp_id]);
1746 vxge_restore_vpath_vid_table(&vdev->vpaths[vp_id]);
1747 }
1748
1749
1750 for (i = 0; i < vdev->no_of_vpath; i++)
1751 vxge_vpath_intr_enable(vdev, i);
1752
1753 vxge_hw_device_intr_enable(vdev->devh);
1754
1755 smp_wmb();
1756
1757
1758 set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
1759
1760
1761 for (i = 0; i < vdev->no_of_vpath; i++) {
1762 vxge_hw_vpath_enable(vdev->vpaths[i].handle);
1763 smp_wmb();
1764 vxge_hw_vpath_rx_doorbell_init(vdev->vpaths[i].handle);
1765 }
1766
1767 netif_tx_wake_all_queues(vdev->ndev);
1768 }
1769
1770
1771 vxge_config_ci_for_tti_rti(vdev);
1772
1773out:
1774 vxge_debug_entryexit(VXGE_TRACE,
1775 "%s:%d Exiting...", __func__, __LINE__);
1776
1777
1778 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET))
1779 clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
1780 return ret;
1781}
1782
1783
1784
1785
1786
1787
1788
1789static void vxge_reset(struct work_struct *work)
1790{
1791 struct vxgedev *vdev = container_of(work, struct vxgedev, reset_task);
1792
1793 if (!netif_running(vdev->ndev))
1794 return;
1795
1796 do_vxge_reset(vdev, VXGE_LL_FULL_RESET);
1797}
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811static int vxge_poll_msix(struct napi_struct *napi, int budget)
1812{
1813 struct vxge_ring *ring = container_of(napi, struct vxge_ring, napi);
1814 int pkts_processed;
1815 int budget_org = budget;
1816
1817 ring->budget = budget;
1818 ring->pkts_processed = 0;
1819 vxge_hw_vpath_poll_rx(ring->handle);
1820 pkts_processed = ring->pkts_processed;
1821
1822 if (pkts_processed < budget_org) {
1823 napi_complete_done(napi, pkts_processed);
1824
1825
1826 vxge_hw_channel_msix_unmask(
1827 (struct __vxge_hw_channel *)ring->handle,
1828 ring->rx_vector_no);
1829 mmiowb();
1830 }
1831
1832
1833
1834
1835 return pkts_processed;
1836}
1837
1838static int vxge_poll_inta(struct napi_struct *napi, int budget)
1839{
1840 struct vxgedev *vdev = container_of(napi, struct vxgedev, napi);
1841 int pkts_processed = 0;
1842 int i;
1843 int budget_org = budget;
1844 struct vxge_ring *ring;
1845
1846 struct __vxge_hw_device *hldev = pci_get_drvdata(vdev->pdev);
1847
1848 for (i = 0; i < vdev->no_of_vpath; i++) {
1849 ring = &vdev->vpaths[i].ring;
1850 ring->budget = budget;
1851 ring->pkts_processed = 0;
1852 vxge_hw_vpath_poll_rx(ring->handle);
1853 pkts_processed += ring->pkts_processed;
1854 budget -= ring->pkts_processed;
1855 if (budget <= 0)
1856 break;
1857 }
1858
1859 VXGE_COMPLETE_ALL_TX(vdev);
1860
1861 if (pkts_processed < budget_org) {
1862 napi_complete_done(napi, pkts_processed);
1863
1864 vxge_hw_device_unmask_all(hldev);
1865 vxge_hw_device_flush_io(hldev);
1866 }
1867
1868 return pkts_processed;
1869}
1870
1871#ifdef CONFIG_NET_POLL_CONTROLLER
1872
1873
1874
1875
1876
1877
1878
1879
1880
1881static void vxge_netpoll(struct net_device *dev)
1882{
1883 struct vxgedev *vdev = netdev_priv(dev);
1884 struct pci_dev *pdev = vdev->pdev;
1885 struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
1886 const int irq = pdev->irq;
1887
1888 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1889
1890 if (pci_channel_offline(pdev))
1891 return;
1892
1893 disable_irq(irq);
1894 vxge_hw_device_clear_tx_rx(hldev);
1895
1896 vxge_hw_device_clear_tx_rx(hldev);
1897 VXGE_COMPLETE_ALL_RX(vdev);
1898 VXGE_COMPLETE_ALL_TX(vdev);
1899
1900 enable_irq(irq);
1901
1902 vxge_debug_entryexit(VXGE_TRACE,
1903 "%s:%d Exiting...", __func__, __LINE__);
1904}
1905#endif
1906
1907
1908static enum vxge_hw_status vxge_rth_configure(struct vxgedev *vdev)
1909{
1910 enum vxge_hw_status status = VXGE_HW_OK;
1911 struct vxge_hw_rth_hash_types hash_types;
1912 u8 itable[256] = {0};
1913 u8 mtable[256] = {0};
1914 int index;
1915
1916
1917
1918
1919
1920
1921 for (index = 0; index < (1 << vdev->config.rth_bkt_sz); index++) {
1922 itable[index] = index;
1923 mtable[index] = index % vdev->no_of_vpath;
1924 }
1925
1926
1927 status = vxge_hw_vpath_rts_rth_itable_set(vdev->vp_handles,
1928 vdev->no_of_vpath,
1929 mtable, itable,
1930 vdev->config.rth_bkt_sz);
1931 if (status != VXGE_HW_OK) {
1932 vxge_debug_init(VXGE_ERR,
1933 "RTH indirection table configuration failed "
1934 "for vpath:%d", vdev->vpaths[0].device_id);
1935 return status;
1936 }
1937
1938
1939 hash_types.hash_type_tcpipv4_en = vdev->config.rth_hash_type_tcpipv4;
1940 hash_types.hash_type_ipv4_en = vdev->config.rth_hash_type_ipv4;
1941 hash_types.hash_type_tcpipv6_en = vdev->config.rth_hash_type_tcpipv6;
1942 hash_types.hash_type_ipv6_en = vdev->config.rth_hash_type_ipv6;
1943 hash_types.hash_type_tcpipv6ex_en =
1944 vdev->config.rth_hash_type_tcpipv6ex;
1945 hash_types.hash_type_ipv6ex_en = vdev->config.rth_hash_type_ipv6ex;
1946
1947
1948
1949
1950
1951
1952
1953 for (index = 0; index < vdev->no_of_vpath; index++) {
1954 status = vxge_hw_vpath_rts_rth_set(
1955 vdev->vpaths[index].handle,
1956 vdev->config.rth_algorithm,
1957 &hash_types,
1958 vdev->config.rth_bkt_sz);
1959 if (status != VXGE_HW_OK) {
1960 vxge_debug_init(VXGE_ERR,
1961 "RTH configuration failed for vpath:%d",
1962 vdev->vpaths[index].device_id);
1963 return status;
1964 }
1965 }
1966
1967 return status;
1968}
1969
1970
1971static enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev)
1972{
1973 enum vxge_hw_status status = VXGE_HW_OK;
1974 struct vxge_vpath *vpath;
1975 int i;
1976
1977 for (i = 0; i < vdev->no_of_vpath; i++) {
1978 vpath = &vdev->vpaths[i];
1979 if (vpath->handle) {
1980 if (vxge_hw_vpath_reset(vpath->handle) == VXGE_HW_OK) {
1981 if (is_vxge_card_up(vdev) &&
1982 vxge_hw_vpath_recover_from_reset(
1983 vpath->handle) != VXGE_HW_OK) {
1984 vxge_debug_init(VXGE_ERR,
1985 "vxge_hw_vpath_recover_"
1986 "from_reset failed for vpath: "
1987 "%d", i);
1988 return status;
1989 }
1990 } else {
1991 vxge_debug_init(VXGE_ERR,
1992 "vxge_hw_vpath_reset failed for "
1993 "vpath:%d", i);
1994 return status;
1995 }
1996 }
1997 }
1998
1999 return status;
2000}
2001
2002
2003static void vxge_close_vpaths(struct vxgedev *vdev, int index)
2004{
2005 struct vxge_vpath *vpath;
2006 int i;
2007
2008 for (i = index; i < vdev->no_of_vpath; i++) {
2009 vpath = &vdev->vpaths[i];
2010
2011 if (vpath->handle && vpath->is_open) {
2012 vxge_hw_vpath_close(vpath->handle);
2013 vdev->stats.vpaths_open--;
2014 }
2015 vpath->is_open = 0;
2016 vpath->handle = NULL;
2017 }
2018}
2019
2020
2021static int vxge_open_vpaths(struct vxgedev *vdev)
2022{
2023 struct vxge_hw_vpath_attr attr;
2024 enum vxge_hw_status status;
2025 struct vxge_vpath *vpath;
2026 u32 vp_id = 0;
2027 int i;
2028
2029 for (i = 0; i < vdev->no_of_vpath; i++) {
2030 vpath = &vdev->vpaths[i];
2031 vxge_assert(vpath->is_configured);
2032
2033 if (!vdev->titan1) {
2034 struct vxge_hw_vp_config *vcfg;
2035 vcfg = &vdev->devh->config.vp_config[vpath->device_id];
2036
2037 vcfg->rti.urange_a = RTI_T1A_RX_URANGE_A;
2038 vcfg->rti.urange_b = RTI_T1A_RX_URANGE_B;
2039 vcfg->rti.urange_c = RTI_T1A_RX_URANGE_C;
2040 vcfg->tti.uec_a = TTI_T1A_TX_UFC_A;
2041 vcfg->tti.uec_b = TTI_T1A_TX_UFC_B;
2042 vcfg->tti.uec_c = TTI_T1A_TX_UFC_C(vdev->mtu);
2043 vcfg->tti.uec_d = TTI_T1A_TX_UFC_D(vdev->mtu);
2044 vcfg->tti.ltimer_val = VXGE_T1A_TTI_LTIMER_VAL;
2045 vcfg->tti.rtimer_val = VXGE_T1A_TTI_RTIMER_VAL;
2046 }
2047
2048 attr.vp_id = vpath->device_id;
2049 attr.fifo_attr.callback = vxge_xmit_compl;
2050 attr.fifo_attr.txdl_term = vxge_tx_term;
2051 attr.fifo_attr.per_txdl_space = sizeof(struct vxge_tx_priv);
2052 attr.fifo_attr.userdata = &vpath->fifo;
2053
2054 attr.ring_attr.callback = vxge_rx_1b_compl;
2055 attr.ring_attr.rxd_init = vxge_rx_initial_replenish;
2056 attr.ring_attr.rxd_term = vxge_rx_term;
2057 attr.ring_attr.per_rxd_space = sizeof(struct vxge_rx_priv);
2058 attr.ring_attr.userdata = &vpath->ring;
2059
2060 vpath->ring.ndev = vdev->ndev;
2061 vpath->ring.pdev = vdev->pdev;
2062
2063 status = vxge_hw_vpath_open(vdev->devh, &attr, &vpath->handle);
2064 if (status == VXGE_HW_OK) {
2065 vpath->fifo.handle =
2066 (struct __vxge_hw_fifo *)attr.fifo_attr.userdata;
2067 vpath->ring.handle =
2068 (struct __vxge_hw_ring *)attr.ring_attr.userdata;
2069 vpath->fifo.tx_steering_type =
2070 vdev->config.tx_steering_type;
2071 vpath->fifo.ndev = vdev->ndev;
2072 vpath->fifo.pdev = vdev->pdev;
2073
2074 u64_stats_init(&vpath->fifo.stats.syncp);
2075 u64_stats_init(&vpath->ring.stats.syncp);
2076
2077 if (vdev->config.tx_steering_type)
2078 vpath->fifo.txq =
2079 netdev_get_tx_queue(vdev->ndev, i);
2080 else
2081 vpath->fifo.txq =
2082 netdev_get_tx_queue(vdev->ndev, 0);
2083 vpath->fifo.indicate_max_pkts =
2084 vdev->config.fifo_indicate_max_pkts;
2085 vpath->fifo.tx_vector_no = 0;
2086 vpath->ring.rx_vector_no = 0;
2087 vpath->ring.rx_hwts = vdev->rx_hwts;
2088 vpath->is_open = 1;
2089 vdev->vp_handles[i] = vpath->handle;
2090 vpath->ring.vlan_tag_strip = vdev->vlan_tag_strip;
2091 vdev->stats.vpaths_open++;
2092 } else {
2093 vdev->stats.vpath_open_fail++;
2094 vxge_debug_init(VXGE_ERR, "%s: vpath: %d failed to "
2095 "open with status: %d",
2096 vdev->ndev->name, vpath->device_id,
2097 status);
2098 vxge_close_vpaths(vdev, 0);
2099 return -EPERM;
2100 }
2101
2102 vp_id = vpath->handle->vpath->vp_id;
2103 vdev->vpaths_deployed |= vxge_mBIT(vp_id);
2104 }
2105
2106 return VXGE_HW_OK;
2107}
2108
2109
2110
2111
2112
2113
2114
2115
2116
2117static void adaptive_coalesce_tx_interrupts(struct vxge_fifo *fifo)
2118{
2119 fifo->interrupt_count++;
2120 if (time_before(fifo->jiffies + HZ / 100, jiffies)) {
2121 struct __vxge_hw_fifo *hw_fifo = fifo->handle;
2122
2123 fifo->jiffies = jiffies;
2124 if (fifo->interrupt_count > VXGE_T1A_MAX_TX_INTERRUPT_COUNT &&
2125 hw_fifo->rtimer != VXGE_TTI_RTIMER_ADAPT_VAL) {
2126 hw_fifo->rtimer = VXGE_TTI_RTIMER_ADAPT_VAL;
2127 vxge_hw_vpath_dynamic_tti_rtimer_set(hw_fifo);
2128 } else if (hw_fifo->rtimer != 0) {
2129 hw_fifo->rtimer = 0;
2130 vxge_hw_vpath_dynamic_tti_rtimer_set(hw_fifo);
2131 }
2132 fifo->interrupt_count = 0;
2133 }
2134}
2135
2136
2137
2138
2139
2140
2141
2142
2143
2144
2145static void adaptive_coalesce_rx_interrupts(struct vxge_ring *ring)
2146{
2147 ring->interrupt_count++;
2148 if (time_before(ring->jiffies + HZ / 100, jiffies)) {
2149 struct __vxge_hw_ring *hw_ring = ring->handle;
2150
2151 ring->jiffies = jiffies;
2152 if (ring->interrupt_count > VXGE_T1A_MAX_INTERRUPT_COUNT &&
2153 hw_ring->rtimer != VXGE_RTI_RTIMER_ADAPT_VAL) {
2154 hw_ring->rtimer = VXGE_RTI_RTIMER_ADAPT_VAL;
2155 vxge_hw_vpath_dynamic_rti_rtimer_set(hw_ring);
2156 } else if (hw_ring->rtimer != 0) {
2157 hw_ring->rtimer = 0;
2158 vxge_hw_vpath_dynamic_rti_rtimer_set(hw_ring);
2159 }
2160 ring->interrupt_count = 0;
2161 }
2162}
2163
2164
2165
2166
2167
2168
2169
2170
2171
2172
2173
2174static irqreturn_t vxge_isr_napi(int irq, void *dev_id)
2175{
2176 struct __vxge_hw_device *hldev;
2177 u64 reason;
2178 enum vxge_hw_status status;
2179 struct vxgedev *vdev = (struct vxgedev *)dev_id;
2180
2181 vxge_debug_intr(VXGE_TRACE, "%s:%d", __func__, __LINE__);
2182
2183 hldev = pci_get_drvdata(vdev->pdev);
2184
2185 if (pci_channel_offline(vdev->pdev))
2186 return IRQ_NONE;
2187
2188 if (unlikely(!is_vxge_card_up(vdev)))
2189 return IRQ_HANDLED;
2190
2191 status = vxge_hw_device_begin_irq(hldev, vdev->exec_mode, &reason);
2192 if (status == VXGE_HW_OK) {
2193 vxge_hw_device_mask_all(hldev);
2194
2195 if (reason &
2196 VXGE_HW_TITAN_GENERAL_INT_STATUS_VPATH_TRAFFIC_INT(
2197 vdev->vpaths_deployed >>
2198 (64 - VXGE_HW_MAX_VIRTUAL_PATHS))) {
2199
2200 vxge_hw_device_clear_tx_rx(hldev);
2201 napi_schedule(&vdev->napi);
2202 vxge_debug_intr(VXGE_TRACE,
2203 "%s:%d Exiting...", __func__, __LINE__);
2204 return IRQ_HANDLED;
2205 } else
2206 vxge_hw_device_unmask_all(hldev);
2207 } else if (unlikely((status == VXGE_HW_ERR_VPATH) ||
2208 (status == VXGE_HW_ERR_CRITICAL) ||
2209 (status == VXGE_HW_ERR_FIFO))) {
2210 vxge_hw_device_mask_all(hldev);
2211 vxge_hw_device_flush_io(hldev);
2212 return IRQ_HANDLED;
2213 } else if (unlikely(status == VXGE_HW_ERR_SLOT_FREEZE))
2214 return IRQ_HANDLED;
2215
2216 vxge_debug_intr(VXGE_TRACE, "%s:%d Exiting...", __func__, __LINE__);
2217 return IRQ_NONE;
2218}
2219
2220static irqreturn_t vxge_tx_msix_handle(int irq, void *dev_id)
2221{
2222 struct vxge_fifo *fifo = (struct vxge_fifo *)dev_id;
2223
2224 adaptive_coalesce_tx_interrupts(fifo);
2225
2226 vxge_hw_channel_msix_mask((struct __vxge_hw_channel *)fifo->handle,
2227 fifo->tx_vector_no);
2228
2229 vxge_hw_channel_msix_clear((struct __vxge_hw_channel *)fifo->handle,
2230 fifo->tx_vector_no);
2231
2232 VXGE_COMPLETE_VPATH_TX(fifo);
2233
2234 vxge_hw_channel_msix_unmask((struct __vxge_hw_channel *)fifo->handle,
2235 fifo->tx_vector_no);
2236
2237 mmiowb();
2238
2239 return IRQ_HANDLED;
2240}
2241
2242static irqreturn_t vxge_rx_msix_napi_handle(int irq, void *dev_id)
2243{
2244 struct vxge_ring *ring = (struct vxge_ring *)dev_id;
2245
2246 adaptive_coalesce_rx_interrupts(ring);
2247
2248 vxge_hw_channel_msix_mask((struct __vxge_hw_channel *)ring->handle,
2249 ring->rx_vector_no);
2250
2251 vxge_hw_channel_msix_clear((struct __vxge_hw_channel *)ring->handle,
2252 ring->rx_vector_no);
2253
2254 napi_schedule(&ring->napi);
2255 return IRQ_HANDLED;
2256}
2257
2258static irqreturn_t
2259vxge_alarm_msix_handle(int irq, void *dev_id)
2260{
2261 int i;
2262 enum vxge_hw_status status;
2263 struct vxge_vpath *vpath = (struct vxge_vpath *)dev_id;
2264 struct vxgedev *vdev = vpath->vdev;
2265 int msix_id = (vpath->handle->vpath->vp_id *
2266 VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
2267
2268 for (i = 0; i < vdev->no_of_vpath; i++) {
2269
2270
2271
2272
2273 vxge_hw_vpath_msix_mask(vdev->vpaths[i].handle, msix_id);
2274 vxge_hw_vpath_msix_clear(vdev->vpaths[i].handle, msix_id);
2275 mmiowb();
2276
2277 status = vxge_hw_vpath_alarm_process(vdev->vpaths[i].handle,
2278 vdev->exec_mode);
2279 if (status == VXGE_HW_OK) {
2280 vxge_hw_vpath_msix_unmask(vdev->vpaths[i].handle,
2281 msix_id);
2282 mmiowb();
2283 continue;
2284 }
2285 vxge_debug_intr(VXGE_ERR,
2286 "%s: vxge_hw_vpath_alarm_process failed %x ",
2287 VXGE_DRIVER_NAME, status);
2288 }
2289 return IRQ_HANDLED;
2290}
2291
2292static int vxge_alloc_msix(struct vxgedev *vdev)
2293{
2294 int j, i, ret = 0;
2295 int msix_intr_vect = 0, temp;
2296 vdev->intr_cnt = 0;
2297
2298start:
2299
2300 vdev->intr_cnt = vdev->no_of_vpath * 2;
2301
2302
2303 vdev->intr_cnt++;
2304
2305 vdev->entries = kcalloc(vdev->intr_cnt, sizeof(struct msix_entry),
2306 GFP_KERNEL);
2307 if (!vdev->entries) {
2308 vxge_debug_init(VXGE_ERR,
2309 "%s: memory allocation failed",
2310 VXGE_DRIVER_NAME);
2311 ret = -ENOMEM;
2312 goto alloc_entries_failed;
2313 }
2314
2315 vdev->vxge_entries = kcalloc(vdev->intr_cnt,
2316 sizeof(struct vxge_msix_entry),
2317 GFP_KERNEL);
2318 if (!vdev->vxge_entries) {
2319 vxge_debug_init(VXGE_ERR, "%s: memory allocation failed",
2320 VXGE_DRIVER_NAME);
2321 ret = -ENOMEM;
2322 goto alloc_vxge_entries_failed;
2323 }
2324
2325 for (i = 0, j = 0; i < vdev->no_of_vpath; i++) {
2326
2327 msix_intr_vect = i * VXGE_HW_VPATH_MSIX_ACTIVE;
2328
2329
2330 vdev->entries[j].entry = msix_intr_vect;
2331 vdev->vxge_entries[j].entry = msix_intr_vect;
2332 vdev->vxge_entries[j].in_use = 0;
2333 j++;
2334
2335
2336 vdev->entries[j].entry = msix_intr_vect + 1;
2337 vdev->vxge_entries[j].entry = msix_intr_vect + 1;
2338 vdev->vxge_entries[j].in_use = 0;
2339 j++;
2340 }
2341
2342
2343 vdev->entries[j].entry = VXGE_ALARM_MSIX_ID;
2344 vdev->vxge_entries[j].entry = VXGE_ALARM_MSIX_ID;
2345 vdev->vxge_entries[j].in_use = 0;
2346
2347 ret = pci_enable_msix_range(vdev->pdev,
2348 vdev->entries, 3, vdev->intr_cnt);
2349 if (ret < 0) {
2350 ret = -ENODEV;
2351 goto enable_msix_failed;
2352 } else if (ret < vdev->intr_cnt) {
2353 pci_disable_msix(vdev->pdev);
2354
2355 vxge_debug_init(VXGE_ERR,
2356 "%s: MSI-X enable failed for %d vectors, ret: %d",
2357 VXGE_DRIVER_NAME, vdev->intr_cnt, ret);
2358 if (max_config_vpath != VXGE_USE_DEFAULT) {
2359 ret = -ENODEV;
2360 goto enable_msix_failed;
2361 }
2362
2363 kfree(vdev->entries);
2364 kfree(vdev->vxge_entries);
2365 vdev->entries = NULL;
2366 vdev->vxge_entries = NULL;
2367
2368 temp = (ret - 1)/2;
2369 vxge_close_vpaths(vdev, temp);
2370 vdev->no_of_vpath = temp;
2371 goto start;
2372 }
2373 return 0;
2374
2375enable_msix_failed:
2376 kfree(vdev->vxge_entries);
2377alloc_vxge_entries_failed:
2378 kfree(vdev->entries);
2379alloc_entries_failed:
2380 return ret;
2381}
2382
2383static int vxge_enable_msix(struct vxgedev *vdev)
2384{
2385
2386 int i, ret = 0;
2387
2388 int tim_msix_id[4] = {0, 1, 0, 0};
2389
2390 vdev->intr_cnt = 0;
2391
2392
2393 ret = vxge_alloc_msix(vdev);
2394 if (!ret) {
2395 for (i = 0; i < vdev->no_of_vpath; i++) {
2396 struct vxge_vpath *vpath = &vdev->vpaths[i];
2397
2398
2399
2400
2401 vpath->ring.rx_vector_no = (vpath->device_id *
2402 VXGE_HW_VPATH_MSIX_ACTIVE) + 1;
2403
2404 vpath->fifo.tx_vector_no = (vpath->device_id *
2405 VXGE_HW_VPATH_MSIX_ACTIVE);
2406
2407 vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id,
2408 VXGE_ALARM_MSIX_ID);
2409 }
2410 }
2411
2412 return ret;
2413}
2414
2415static void vxge_rem_msix_isr(struct vxgedev *vdev)
2416{
2417 int intr_cnt;
2418
2419 for (intr_cnt = 0; intr_cnt < (vdev->no_of_vpath * 2 + 1);
2420 intr_cnt++) {
2421 if (vdev->vxge_entries[intr_cnt].in_use) {
2422 synchronize_irq(vdev->entries[intr_cnt].vector);
2423 free_irq(vdev->entries[intr_cnt].vector,
2424 vdev->vxge_entries[intr_cnt].arg);
2425 vdev->vxge_entries[intr_cnt].in_use = 0;
2426 }
2427 }
2428
2429 kfree(vdev->entries);
2430 kfree(vdev->vxge_entries);
2431 vdev->entries = NULL;
2432 vdev->vxge_entries = NULL;
2433
2434 if (vdev->config.intr_type == MSI_X)
2435 pci_disable_msix(vdev->pdev);
2436}
2437
2438static void vxge_rem_isr(struct vxgedev *vdev)
2439{
2440 if (IS_ENABLED(CONFIG_PCI_MSI) &&
2441 vdev->config.intr_type == MSI_X) {
2442 vxge_rem_msix_isr(vdev);
2443 } else if (vdev->config.intr_type == INTA) {
2444 synchronize_irq(vdev->pdev->irq);
2445 free_irq(vdev->pdev->irq, vdev);
2446 }
2447}
2448
2449static int vxge_add_isr(struct vxgedev *vdev)
2450{
2451 int ret = 0;
2452 int vp_idx = 0, intr_idx = 0, intr_cnt = 0, msix_idx = 0, irq_req = 0;
2453 int pci_fun = PCI_FUNC(vdev->pdev->devfn);
2454
2455 if (IS_ENABLED(CONFIG_PCI_MSI) && vdev->config.intr_type == MSI_X)
2456 ret = vxge_enable_msix(vdev);
2457
2458 if (ret) {
2459 vxge_debug_init(VXGE_ERR,
2460 "%s: Enabling MSI-X Failed", VXGE_DRIVER_NAME);
2461 vxge_debug_init(VXGE_ERR,
2462 "%s: Defaulting to INTA", VXGE_DRIVER_NAME);
2463 vdev->config.intr_type = INTA;
2464 }
2465
2466 if (IS_ENABLED(CONFIG_PCI_MSI) && vdev->config.intr_type == MSI_X) {
2467 for (intr_idx = 0;
2468 intr_idx < (vdev->no_of_vpath *
2469 VXGE_HW_VPATH_MSIX_ACTIVE); intr_idx++) {
2470
2471 msix_idx = intr_idx % VXGE_HW_VPATH_MSIX_ACTIVE;
2472 irq_req = 0;
2473
2474 switch (msix_idx) {
2475 case 0:
2476 snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
2477 "%s:vxge:MSI-X %d - Tx - fn:%d vpath:%d",
2478 vdev->ndev->name,
2479 vdev->entries[intr_cnt].entry,
2480 pci_fun, vp_idx);
2481 ret = request_irq(
2482 vdev->entries[intr_cnt].vector,
2483 vxge_tx_msix_handle, 0,
2484 vdev->desc[intr_cnt],
2485 &vdev->vpaths[vp_idx].fifo);
2486 vdev->vxge_entries[intr_cnt].arg =
2487 &vdev->vpaths[vp_idx].fifo;
2488 irq_req = 1;
2489 break;
2490 case 1:
2491 snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
2492 "%s:vxge:MSI-X %d - Rx - fn:%d vpath:%d",
2493 vdev->ndev->name,
2494 vdev->entries[intr_cnt].entry,
2495 pci_fun, vp_idx);
2496 ret = request_irq(
2497 vdev->entries[intr_cnt].vector,
2498 vxge_rx_msix_napi_handle, 0,
2499 vdev->desc[intr_cnt],
2500 &vdev->vpaths[vp_idx].ring);
2501 vdev->vxge_entries[intr_cnt].arg =
2502 &vdev->vpaths[vp_idx].ring;
2503 irq_req = 1;
2504 break;
2505 }
2506
2507 if (ret) {
2508 vxge_debug_init(VXGE_ERR,
2509 "%s: MSIX - %d Registration failed",
2510 vdev->ndev->name, intr_cnt);
2511 vxge_rem_msix_isr(vdev);
2512 vdev->config.intr_type = INTA;
2513 vxge_debug_init(VXGE_ERR,
2514 "%s: Defaulting to INTA",
2515 vdev->ndev->name);
2516 goto INTA_MODE;
2517 }
2518
2519 if (irq_req) {
2520
2521 vdev->vxge_entries[intr_cnt].in_use = 1;
2522 msix_idx += vdev->vpaths[vp_idx].device_id *
2523 VXGE_HW_VPATH_MSIX_ACTIVE;
2524 vxge_hw_vpath_msix_unmask(
2525 vdev->vpaths[vp_idx].handle,
2526 msix_idx);
2527 intr_cnt++;
2528 }
2529
2530
2531 if (((intr_idx + 1) % VXGE_HW_VPATH_MSIX_ACTIVE == 0) &&
2532 (vp_idx < (vdev->no_of_vpath - 1)))
2533 vp_idx++;
2534 }
2535
2536 intr_cnt = vdev->no_of_vpath * 2;
2537 snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
2538 "%s:vxge:MSI-X %d - Alarm - fn:%d",
2539 vdev->ndev->name,
2540 vdev->entries[intr_cnt].entry,
2541 pci_fun);
2542
2543 ret = request_irq(vdev->entries[intr_cnt].vector,
2544 vxge_alarm_msix_handle, 0,
2545 vdev->desc[intr_cnt],
2546 &vdev->vpaths[0]);
2547 if (ret) {
2548 vxge_debug_init(VXGE_ERR,
2549 "%s: MSIX - %d Registration failed",
2550 vdev->ndev->name, intr_cnt);
2551 vxge_rem_msix_isr(vdev);
2552 vdev->config.intr_type = INTA;
2553 vxge_debug_init(VXGE_ERR,
2554 "%s: Defaulting to INTA",
2555 vdev->ndev->name);
2556 goto INTA_MODE;
2557 }
2558
2559 msix_idx = (vdev->vpaths[0].handle->vpath->vp_id *
2560 VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
2561 vxge_hw_vpath_msix_unmask(vdev->vpaths[vp_idx].handle,
2562 msix_idx);
2563 vdev->vxge_entries[intr_cnt].in_use = 1;
2564 vdev->vxge_entries[intr_cnt].arg = &vdev->vpaths[0];
2565 }
2566
2567INTA_MODE:
2568 if (vdev->config.intr_type == INTA) {
2569 snprintf(vdev->desc[0], VXGE_INTR_STRLEN,
2570 "%s:vxge:INTA", vdev->ndev->name);
2571 vxge_hw_device_set_intr_type(vdev->devh,
2572 VXGE_HW_INTR_MODE_IRQLINE);
2573
2574 vxge_hw_vpath_tti_ci_set(vdev->vpaths[0].fifo.handle);
2575
2576 ret = request_irq((int) vdev->pdev->irq,
2577 vxge_isr_napi,
2578 IRQF_SHARED, vdev->desc[0], vdev);
2579 if (ret) {
2580 vxge_debug_init(VXGE_ERR,
2581 "%s %s-%d: ISR registration failed",
2582 VXGE_DRIVER_NAME, "IRQ", vdev->pdev->irq);
2583 return -ENODEV;
2584 }
2585 vxge_debug_init(VXGE_TRACE,
2586 "new %s-%d line allocated",
2587 "IRQ", vdev->pdev->irq);
2588 }
2589
2590 return VXGE_HW_OK;
2591}
2592
2593static void vxge_poll_vp_reset(struct timer_list *t)
2594{
2595 struct vxgedev *vdev = from_timer(vdev, t, vp_reset_timer);
2596 int i, j = 0;
2597
2598 for (i = 0; i < vdev->no_of_vpath; i++) {
2599 if (test_bit(i, &vdev->vp_reset)) {
2600 vxge_reset_vpath(vdev, i);
2601 j++;
2602 }
2603 }
2604 if (j && (vdev->config.intr_type != MSI_X)) {
2605 vxge_hw_device_unmask_all(vdev->devh);
2606 vxge_hw_device_flush_io(vdev->devh);
2607 }
2608
2609 mod_timer(&vdev->vp_reset_timer, jiffies + HZ / 2);
2610}
2611
2612static void vxge_poll_vp_lockup(struct timer_list *t)
2613{
2614 struct vxgedev *vdev = from_timer(vdev, t, vp_lockup_timer);
2615 enum vxge_hw_status status = VXGE_HW_OK;
2616 struct vxge_vpath *vpath;
2617 struct vxge_ring *ring;
2618 int i;
2619 unsigned long rx_frms;
2620
2621 for (i = 0; i < vdev->no_of_vpath; i++) {
2622 ring = &vdev->vpaths[i].ring;
2623
2624
2625 rx_frms = READ_ONCE(ring->stats.rx_frms);
2626
2627
2628 if (ring->stats.prev_rx_frms == rx_frms) {
2629 status = vxge_hw_vpath_check_leak(ring->handle);
2630
2631
2632 if ((VXGE_HW_FAIL == status) &&
2633 (VXGE_HW_FAIL == ring->last_status)) {
2634
2635
2636 if (!test_and_set_bit(i, &vdev->vp_reset)) {
2637 vpath = &vdev->vpaths[i];
2638
2639
2640 vxge_vpath_intr_disable(vdev, i);
2641
2642
2643 netif_tx_stop_queue(vpath->fifo.txq);
2644 continue;
2645 }
2646 }
2647 }
2648 ring->stats.prev_rx_frms = rx_frms;
2649 ring->last_status = status;
2650 }
2651
2652
2653 mod_timer(&vdev->vp_lockup_timer, jiffies + HZ / 1000);
2654}
2655
2656static netdev_features_t vxge_fix_features(struct net_device *dev,
2657 netdev_features_t features)
2658{
2659 netdev_features_t changed = dev->features ^ features;
2660
2661
2662
2663
2664
2665 if ((changed & NETIF_F_RXHASH) && netif_running(dev))
2666 features ^= NETIF_F_RXHASH;
2667
2668 return features;
2669}
2670
2671static int vxge_set_features(struct net_device *dev, netdev_features_t features)
2672{
2673 struct vxgedev *vdev = netdev_priv(dev);
2674 netdev_features_t changed = dev->features ^ features;
2675
2676 if (!(changed & NETIF_F_RXHASH))
2677 return 0;
2678
2679
2680
2681 vdev->devh->config.rth_en = !!(features & NETIF_F_RXHASH);
2682 if (vxge_reset_all_vpaths(vdev) != VXGE_HW_OK) {
2683 dev->features = features ^ NETIF_F_RXHASH;
2684 vdev->devh->config.rth_en = !!(dev->features & NETIF_F_RXHASH);
2685 return -EIO;
2686 }
2687
2688 return 0;
2689}
2690
2691
2692
2693
2694
2695
2696
2697
2698
2699
2700
2701static int vxge_open(struct net_device *dev)
2702{
2703 enum vxge_hw_status status;
2704 struct vxgedev *vdev;
2705 struct __vxge_hw_device *hldev;
2706 struct vxge_vpath *vpath;
2707 int ret = 0;
2708 int i;
2709 u64 val64;
2710
2711 vxge_debug_entryexit(VXGE_TRACE,
2712 "%s: %s:%d", dev->name, __func__, __LINE__);
2713
2714 vdev = netdev_priv(dev);
2715 hldev = pci_get_drvdata(vdev->pdev);
2716
2717
2718
2719 netif_carrier_off(dev);
2720
2721
2722 status = vxge_open_vpaths(vdev);
2723 if (status != VXGE_HW_OK) {
2724 vxge_debug_init(VXGE_ERR,
2725 "%s: fatal: Vpath open failed", vdev->ndev->name);
2726 ret = -EPERM;
2727 goto out0;
2728 }
2729
2730 vdev->mtu = dev->mtu;
2731
2732 status = vxge_add_isr(vdev);
2733 if (status != VXGE_HW_OK) {
2734 vxge_debug_init(VXGE_ERR,
2735 "%s: fatal: ISR add failed", dev->name);
2736 ret = -EPERM;
2737 goto out1;
2738 }
2739
2740 if (vdev->config.intr_type != MSI_X) {
2741 netif_napi_add(dev, &vdev->napi, vxge_poll_inta,
2742 vdev->config.napi_weight);
2743 napi_enable(&vdev->napi);
2744 for (i = 0; i < vdev->no_of_vpath; i++) {
2745 vpath = &vdev->vpaths[i];
2746 vpath->ring.napi_p = &vdev->napi;
2747 }
2748 } else {
2749 for (i = 0; i < vdev->no_of_vpath; i++) {
2750 vpath = &vdev->vpaths[i];
2751 netif_napi_add(dev, &vpath->ring.napi,
2752 vxge_poll_msix, vdev->config.napi_weight);
2753 napi_enable(&vpath->ring.napi);
2754 vpath->ring.napi_p = &vpath->ring.napi;
2755 }
2756 }
2757
2758
2759 if (vdev->config.rth_steering) {
2760 status = vxge_rth_configure(vdev);
2761 if (status != VXGE_HW_OK) {
2762 vxge_debug_init(VXGE_ERR,
2763 "%s: fatal: RTH configuration failed",
2764 dev->name);
2765 ret = -EPERM;
2766 goto out2;
2767 }
2768 }
2769 printk(KERN_INFO "%s: Receive Hashing Offload %s\n", dev->name,
2770 hldev->config.rth_en ? "enabled" : "disabled");
2771
2772 for (i = 0; i < vdev->no_of_vpath; i++) {
2773 vpath = &vdev->vpaths[i];
2774
2775
2776 status = vxge_hw_vpath_mtu_set(vpath->handle, vdev->mtu);
2777 if (status != VXGE_HW_OK) {
2778 vxge_debug_init(VXGE_ERR,
2779 "%s: fatal: can not set new MTU", dev->name);
2780 ret = -EPERM;
2781 goto out2;
2782 }
2783 }
2784
2785 VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_TRACE, VXGE_COMPONENT_LL, vdev);
2786 vxge_debug_init(vdev->level_trace,
2787 "%s: MTU is %d", vdev->ndev->name, vdev->mtu);
2788 VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_ERR, VXGE_COMPONENT_LL, vdev);
2789
2790
2791
2792
2793 if (vdev->all_multi_flg) {
2794 for (i = 0; i < vdev->no_of_vpath; i++) {
2795 vpath = &vdev->vpaths[i];
2796 vxge_restore_vpath_mac_addr(vpath);
2797 vxge_restore_vpath_vid_table(vpath);
2798
2799 status = vxge_hw_vpath_mcast_enable(vpath->handle);
2800 if (status != VXGE_HW_OK)
2801 vxge_debug_init(VXGE_ERR,
2802 "%s:%d Enabling multicast failed",
2803 __func__, __LINE__);
2804 }
2805 }
2806
2807
2808
2809
2810
2811 val64 = 0;
2812 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
2813 val64 |= VXGE_HW_RXMAC_AUTHORIZE_ALL_ADDR_VP(i);
2814
2815 vxge_hw_mgmt_reg_write(vdev->devh,
2816 vxge_hw_mgmt_reg_type_mrpcim,
2817 0,
2818 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2819 rxmac_authorize_all_addr),
2820 val64);
2821
2822 vxge_hw_mgmt_reg_write(vdev->devh,
2823 vxge_hw_mgmt_reg_type_mrpcim,
2824 0,
2825 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2826 rxmac_authorize_all_vid),
2827 val64);
2828
2829 vxge_set_multicast(dev);
2830
2831
2832 for (i = 0; i < vdev->no_of_vpath; i++) {
2833 vpath = &vdev->vpaths[i];
2834 status = vxge_hw_vpath_bcast_enable(vpath->handle);
2835 if (status != VXGE_HW_OK)
2836 vxge_debug_init(VXGE_ERR,
2837 "%s : Can not enable bcast for vpath "
2838 "id %d", dev->name, i);
2839 if (vdev->config.addr_learn_en) {
2840 status = vxge_hw_vpath_mcast_enable(vpath->handle);
2841 if (status != VXGE_HW_OK)
2842 vxge_debug_init(VXGE_ERR,
2843 "%s : Can not enable mcast for vpath "
2844 "id %d", dev->name, i);
2845 }
2846 }
2847
2848 vxge_hw_device_setpause_data(vdev->devh, 0,
2849 vdev->config.tx_pause_enable,
2850 vdev->config.rx_pause_enable);
2851
2852 if (vdev->vp_reset_timer.function == NULL)
2853 vxge_os_timer(&vdev->vp_reset_timer, vxge_poll_vp_reset,
2854 HZ / 2);
2855
2856
2857 if (vdev->titan1 && vdev->vp_lockup_timer.function == NULL)
2858 vxge_os_timer(&vdev->vp_lockup_timer, vxge_poll_vp_lockup,
2859 HZ / 2);
2860
2861 set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
2862
2863 smp_wmb();
2864
2865 if (vxge_hw_device_link_state_get(vdev->devh) == VXGE_HW_LINK_UP) {
2866 netif_carrier_on(vdev->ndev);
2867 netdev_notice(vdev->ndev, "Link Up\n");
2868 vdev->stats.link_up++;
2869 }
2870
2871 vxge_hw_device_intr_enable(vdev->devh);
2872
2873 smp_wmb();
2874
2875 for (i = 0; i < vdev->no_of_vpath; i++) {
2876 vpath = &vdev->vpaths[i];
2877
2878 vxge_hw_vpath_enable(vpath->handle);
2879 smp_wmb();
2880 vxge_hw_vpath_rx_doorbell_init(vpath->handle);
2881 }
2882
2883 netif_tx_start_all_queues(vdev->ndev);
2884
2885
2886 vxge_config_ci_for_tti_rti(vdev);
2887
2888 goto out0;
2889
2890out2:
2891 vxge_rem_isr(vdev);
2892
2893
2894 if (vdev->config.intr_type != MSI_X)
2895 napi_disable(&vdev->napi);
2896 else {
2897 for (i = 0; i < vdev->no_of_vpath; i++)
2898 napi_disable(&vdev->vpaths[i].ring.napi);
2899 }
2900
2901out1:
2902 vxge_close_vpaths(vdev, 0);
2903out0:
2904 vxge_debug_entryexit(VXGE_TRACE,
2905 "%s: %s:%d Exiting...",
2906 dev->name, __func__, __LINE__);
2907 return ret;
2908}
2909
2910
2911static void vxge_free_mac_add_list(struct vxge_vpath *vpath)
2912{
2913
2914 struct list_head *entry, *next;
2915 if (list_empty(&vpath->mac_addr_list))
2916 return;
2917
2918 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
2919 list_del(entry);
2920 kfree((struct vxge_mac_addrs *)entry);
2921 }
2922}
2923
2924static void vxge_napi_del_all(struct vxgedev *vdev)
2925{
2926 int i;
2927 if (vdev->config.intr_type != MSI_X)
2928 netif_napi_del(&vdev->napi);
2929 else {
2930 for (i = 0; i < vdev->no_of_vpath; i++)
2931 netif_napi_del(&vdev->vpaths[i].ring.napi);
2932 }
2933}
2934
2935static int do_vxge_close(struct net_device *dev, int do_io)
2936{
2937 enum vxge_hw_status status;
2938 struct vxgedev *vdev;
2939 struct __vxge_hw_device *hldev;
2940 int i;
2941 u64 val64, vpath_vector;
2942 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
2943 dev->name, __func__, __LINE__);
2944
2945 vdev = netdev_priv(dev);
2946 hldev = pci_get_drvdata(vdev->pdev);
2947
2948 if (unlikely(!is_vxge_card_up(vdev)))
2949 return 0;
2950
2951
2952
2953 while (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
2954 msleep(50);
2955
2956 if (do_io) {
2957
2958 vpath_vector = vxge_mBIT(vdev->vpaths[0].device_id);
2959 status = vxge_hw_mgmt_reg_read(vdev->devh,
2960 vxge_hw_mgmt_reg_type_mrpcim,
2961 0,
2962 (ulong)offsetof(
2963 struct vxge_hw_mrpcim_reg,
2964 rts_mgr_cbasin_cfg),
2965 &val64);
2966 if (status == VXGE_HW_OK) {
2967 val64 &= ~vpath_vector;
2968 status = vxge_hw_mgmt_reg_write(vdev->devh,
2969 vxge_hw_mgmt_reg_type_mrpcim,
2970 0,
2971 (ulong)offsetof(
2972 struct vxge_hw_mrpcim_reg,
2973 rts_mgr_cbasin_cfg),
2974 val64);
2975 }
2976
2977
2978 vxge_hw_mgmt_reg_write(vdev->devh,
2979 vxge_hw_mgmt_reg_type_mrpcim,
2980 0,
2981 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2982 rxmac_authorize_all_addr),
2983 0);
2984
2985 vxge_hw_mgmt_reg_write(vdev->devh,
2986 vxge_hw_mgmt_reg_type_mrpcim,
2987 0,
2988 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2989 rxmac_authorize_all_vid),
2990 0);
2991
2992 smp_wmb();
2993 }
2994
2995 if (vdev->titan1)
2996 del_timer_sync(&vdev->vp_lockup_timer);
2997
2998 del_timer_sync(&vdev->vp_reset_timer);
2999
3000 if (do_io)
3001 vxge_hw_device_wait_receive_idle(hldev);
3002
3003 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3004
3005
3006 if (vdev->config.intr_type != MSI_X)
3007 napi_disable(&vdev->napi);
3008 else {
3009 for (i = 0; i < vdev->no_of_vpath; i++)
3010 napi_disable(&vdev->vpaths[i].ring.napi);
3011 }
3012
3013 netif_carrier_off(vdev->ndev);
3014 netdev_notice(vdev->ndev, "Link Down\n");
3015 netif_tx_stop_all_queues(vdev->ndev);
3016
3017
3018 if (do_io)
3019 vxge_hw_device_intr_disable(vdev->devh);
3020
3021 vxge_rem_isr(vdev);
3022
3023 vxge_napi_del_all(vdev);
3024
3025 if (do_io)
3026 vxge_reset_all_vpaths(vdev);
3027
3028 vxge_close_vpaths(vdev, 0);
3029
3030 vxge_debug_entryexit(VXGE_TRACE,
3031 "%s: %s:%d Exiting...", dev->name, __func__, __LINE__);
3032
3033 clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
3034
3035 return 0;
3036}
3037
3038
3039
3040
3041
3042
3043
3044
3045
3046
3047
3048
3049static int vxge_close(struct net_device *dev)
3050{
3051 do_vxge_close(dev, 1);
3052 return 0;
3053}
3054
3055
3056
3057
3058
3059
3060
3061
3062
3063static int vxge_change_mtu(struct net_device *dev, int new_mtu)
3064{
3065 struct vxgedev *vdev = netdev_priv(dev);
3066
3067 vxge_debug_entryexit(vdev->level_trace,
3068 "%s:%d", __func__, __LINE__);
3069
3070
3071 if (unlikely(!is_vxge_card_up(vdev))) {
3072
3073 dev->mtu = new_mtu;
3074 vxge_debug_init(vdev->level_err,
3075 "%s", "device is down on MTU change");
3076 return 0;
3077 }
3078
3079 vxge_debug_init(vdev->level_trace,
3080 "trying to apply new MTU %d", new_mtu);
3081
3082 if (vxge_close(dev))
3083 return -EIO;
3084
3085 dev->mtu = new_mtu;
3086 vdev->mtu = new_mtu;
3087
3088 if (vxge_open(dev))
3089 return -EIO;
3090
3091 vxge_debug_init(vdev->level_trace,
3092 "%s: MTU changed to %d", vdev->ndev->name, new_mtu);
3093
3094 vxge_debug_entryexit(vdev->level_trace,
3095 "%s:%d Exiting...", __func__, __LINE__);
3096
3097 return 0;
3098}
3099
3100
3101
3102
3103
3104
3105
3106static void
3107vxge_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *net_stats)
3108{
3109 struct vxgedev *vdev = netdev_priv(dev);
3110 int k;
3111
3112
3113 for (k = 0; k < vdev->no_of_vpath; k++) {
3114 struct vxge_ring_stats *rxstats = &vdev->vpaths[k].ring.stats;
3115 struct vxge_fifo_stats *txstats = &vdev->vpaths[k].fifo.stats;
3116 unsigned int start;
3117 u64 packets, bytes, multicast;
3118
3119 do {
3120 start = u64_stats_fetch_begin_irq(&rxstats->syncp);
3121
3122 packets = rxstats->rx_frms;
3123 multicast = rxstats->rx_mcast;
3124 bytes = rxstats->rx_bytes;
3125 } while (u64_stats_fetch_retry_irq(&rxstats->syncp, start));
3126
3127 net_stats->rx_packets += packets;
3128 net_stats->rx_bytes += bytes;
3129 net_stats->multicast += multicast;
3130
3131 net_stats->rx_errors += rxstats->rx_errors;
3132 net_stats->rx_dropped += rxstats->rx_dropped;
3133
3134 do {
3135 start = u64_stats_fetch_begin_irq(&txstats->syncp);
3136
3137 packets = txstats->tx_frms;
3138 bytes = txstats->tx_bytes;
3139 } while (u64_stats_fetch_retry_irq(&txstats->syncp, start));
3140
3141 net_stats->tx_packets += packets;
3142 net_stats->tx_bytes += bytes;
3143 net_stats->tx_errors += txstats->tx_errors;
3144 }
3145}
3146
3147static enum vxge_hw_status vxge_timestamp_config(struct __vxge_hw_device *devh)
3148{
3149 enum vxge_hw_status status;
3150 u64 val64;
3151
3152
3153
3154
3155
3156
3157 val64 = VXGE_HW_XMAC_TIMESTAMP_EN |
3158 VXGE_HW_XMAC_TIMESTAMP_USE_LINK_ID(0) |
3159 VXGE_HW_XMAC_TIMESTAMP_INTERVAL(0);
3160
3161 status = vxge_hw_mgmt_reg_write(devh,
3162 vxge_hw_mgmt_reg_type_mrpcim,
3163 0,
3164 offsetof(struct vxge_hw_mrpcim_reg,
3165 xmac_timestamp),
3166 val64);
3167 vxge_hw_device_flush_io(devh);
3168 devh->config.hwts_en = VXGE_HW_HWTS_ENABLE;
3169 return status;
3170}
3171
3172static int vxge_hwtstamp_set(struct vxgedev *vdev, void __user *data)
3173{
3174 struct hwtstamp_config config;
3175 int i;
3176
3177 if (copy_from_user(&config, data, sizeof(config)))
3178 return -EFAULT;
3179
3180
3181 if (config.flags)
3182 return -EINVAL;
3183
3184
3185 switch (config.tx_type) {
3186 case HWTSTAMP_TX_OFF:
3187 break;
3188 case HWTSTAMP_TX_ON:
3189 default:
3190 return -ERANGE;
3191 }
3192
3193 switch (config.rx_filter) {
3194 case HWTSTAMP_FILTER_NONE:
3195 vdev->rx_hwts = 0;
3196 config.rx_filter = HWTSTAMP_FILTER_NONE;
3197 break;
3198
3199 case HWTSTAMP_FILTER_ALL:
3200 case HWTSTAMP_FILTER_SOME:
3201 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3202 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3203 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3204 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3205 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3206 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3207 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3208 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3209 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3210 case HWTSTAMP_FILTER_PTP_V2_EVENT:
3211 case HWTSTAMP_FILTER_PTP_V2_SYNC:
3212 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3213 case HWTSTAMP_FILTER_NTP_ALL:
3214 if (vdev->devh->config.hwts_en != VXGE_HW_HWTS_ENABLE)
3215 return -EFAULT;
3216
3217 vdev->rx_hwts = 1;
3218 config.rx_filter = HWTSTAMP_FILTER_ALL;
3219 break;
3220
3221 default:
3222 return -ERANGE;
3223 }
3224
3225 for (i = 0; i < vdev->no_of_vpath; i++)
3226 vdev->vpaths[i].ring.rx_hwts = vdev->rx_hwts;
3227
3228 if (copy_to_user(data, &config, sizeof(config)))
3229 return -EFAULT;
3230
3231 return 0;
3232}
3233
3234static int vxge_hwtstamp_get(struct vxgedev *vdev, void __user *data)
3235{
3236 struct hwtstamp_config config;
3237
3238 config.flags = 0;
3239 config.tx_type = HWTSTAMP_TX_OFF;
3240 config.rx_filter = (vdev->rx_hwts ?
3241 HWTSTAMP_FILTER_ALL : HWTSTAMP_FILTER_NONE);
3242
3243 if (copy_to_user(data, &config, sizeof(config)))
3244 return -EFAULT;
3245
3246 return 0;
3247}
3248
3249
3250
3251
3252
3253
3254
3255
3256
3257
3258
3259static int vxge_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3260{
3261 struct vxgedev *vdev = netdev_priv(dev);
3262
3263 switch (cmd) {
3264 case SIOCSHWTSTAMP:
3265 return vxge_hwtstamp_set(vdev, rq->ifr_data);
3266 case SIOCGHWTSTAMP:
3267 return vxge_hwtstamp_get(vdev, rq->ifr_data);
3268 default:
3269 return -EOPNOTSUPP;
3270 }
3271}
3272
3273
3274
3275
3276
3277
3278
3279
3280
3281static void vxge_tx_watchdog(struct net_device *dev)
3282{
3283 struct vxgedev *vdev;
3284
3285 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
3286
3287 vdev = netdev_priv(dev);
3288
3289 vdev->cric_err_event = VXGE_HW_EVENT_RESET_START;
3290
3291 schedule_work(&vdev->reset_task);
3292 vxge_debug_entryexit(VXGE_TRACE,
3293 "%s:%d Exiting...", __func__, __LINE__);
3294}
3295
3296
3297
3298
3299
3300
3301
3302
3303
3304static int
3305vxge_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
3306{
3307 struct vxgedev *vdev = netdev_priv(dev);
3308 struct vxge_vpath *vpath;
3309 int vp_id;
3310
3311
3312 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
3313 vpath = &vdev->vpaths[vp_id];
3314 if (!vpath->is_open)
3315 continue;
3316 vxge_hw_vpath_vid_add(vpath->handle, vid);
3317 }
3318 set_bit(vid, vdev->active_vlans);
3319 return 0;
3320}
3321
3322
3323
3324
3325
3326
3327
3328
3329
3330static int
3331vxge_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
3332{
3333 struct vxgedev *vdev = netdev_priv(dev);
3334 struct vxge_vpath *vpath;
3335 int vp_id;
3336
3337 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
3338
3339
3340 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
3341 vpath = &vdev->vpaths[vp_id];
3342 if (!vpath->is_open)
3343 continue;
3344 vxge_hw_vpath_vid_delete(vpath->handle, vid);
3345 }
3346 vxge_debug_entryexit(VXGE_TRACE,
3347 "%s:%d Exiting...", __func__, __LINE__);
3348 clear_bit(vid, vdev->active_vlans);
3349 return 0;
3350}
3351
3352static const struct net_device_ops vxge_netdev_ops = {
3353 .ndo_open = vxge_open,
3354 .ndo_stop = vxge_close,
3355 .ndo_get_stats64 = vxge_get_stats64,
3356 .ndo_start_xmit = vxge_xmit,
3357 .ndo_validate_addr = eth_validate_addr,
3358 .ndo_set_rx_mode = vxge_set_multicast,
3359 .ndo_do_ioctl = vxge_ioctl,
3360 .ndo_set_mac_address = vxge_set_mac_addr,
3361 .ndo_change_mtu = vxge_change_mtu,
3362 .ndo_fix_features = vxge_fix_features,
3363 .ndo_set_features = vxge_set_features,
3364 .ndo_vlan_rx_kill_vid = vxge_vlan_rx_kill_vid,
3365 .ndo_vlan_rx_add_vid = vxge_vlan_rx_add_vid,
3366 .ndo_tx_timeout = vxge_tx_watchdog,
3367#ifdef CONFIG_NET_POLL_CONTROLLER
3368 .ndo_poll_controller = vxge_netpoll,
3369#endif
3370};
3371
3372static int vxge_device_register(struct __vxge_hw_device *hldev,
3373 struct vxge_config *config, int high_dma,
3374 int no_of_vpath, struct vxgedev **vdev_out)
3375{
3376 struct net_device *ndev;
3377 enum vxge_hw_status status = VXGE_HW_OK;
3378 struct vxgedev *vdev;
3379 int ret = 0, no_of_queue = 1;
3380 u64 stat;
3381
3382 *vdev_out = NULL;
3383 if (config->tx_steering_type)
3384 no_of_queue = no_of_vpath;
3385
3386 ndev = alloc_etherdev_mq(sizeof(struct vxgedev),
3387 no_of_queue);
3388 if (ndev == NULL) {
3389 vxge_debug_init(
3390 vxge_hw_device_trace_level_get(hldev),
3391 "%s : device allocation failed", __func__);
3392 ret = -ENODEV;
3393 goto _out0;
3394 }
3395
3396 vxge_debug_entryexit(
3397 vxge_hw_device_trace_level_get(hldev),
3398 "%s: %s:%d Entering...",
3399 ndev->name, __func__, __LINE__);
3400
3401 vdev = netdev_priv(ndev);
3402 memset(vdev, 0, sizeof(struct vxgedev));
3403
3404 vdev->ndev = ndev;
3405 vdev->devh = hldev;
3406 vdev->pdev = hldev->pdev;
3407 memcpy(&vdev->config, config, sizeof(struct vxge_config));
3408 vdev->rx_hwts = 0;
3409 vdev->titan1 = (vdev->pdev->revision == VXGE_HW_TITAN1_PCI_REVISION);
3410
3411 SET_NETDEV_DEV(ndev, &vdev->pdev->dev);
3412
3413 ndev->hw_features = NETIF_F_RXCSUM | NETIF_F_SG |
3414 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
3415 NETIF_F_TSO | NETIF_F_TSO6 |
3416 NETIF_F_HW_VLAN_CTAG_TX;
3417 if (vdev->config.rth_steering != NO_STEERING)
3418 ndev->hw_features |= NETIF_F_RXHASH;
3419
3420 ndev->features |= ndev->hw_features |
3421 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_FILTER;
3422
3423
3424 ndev->netdev_ops = &vxge_netdev_ops;
3425
3426 ndev->watchdog_timeo = VXGE_LL_WATCH_DOG_TIMEOUT;
3427 INIT_WORK(&vdev->reset_task, vxge_reset);
3428
3429 vxge_initialize_ethtool_ops(ndev);
3430
3431
3432 vdev->vpaths = kcalloc(no_of_vpath, sizeof(struct vxge_vpath),
3433 GFP_KERNEL);
3434 if (!vdev->vpaths) {
3435 vxge_debug_init(VXGE_ERR,
3436 "%s: vpath memory allocation failed",
3437 vdev->ndev->name);
3438 ret = -ENOMEM;
3439 goto _out1;
3440 }
3441
3442 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3443 "%s : checksumming enabled", __func__);
3444
3445 if (high_dma) {
3446 ndev->features |= NETIF_F_HIGHDMA;
3447 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3448 "%s : using High DMA", __func__);
3449 }
3450
3451
3452 ndev->min_mtu = VXGE_HW_MIN_MTU;
3453 ndev->max_mtu = VXGE_HW_MAX_MTU;
3454
3455 ret = register_netdev(ndev);
3456 if (ret) {
3457 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3458 "%s: %s : device registration failed!",
3459 ndev->name, __func__);
3460 goto _out2;
3461 }
3462
3463
3464 ndev->addr_len = ETH_ALEN;
3465
3466
3467
3468
3469
3470 netif_carrier_off(ndev);
3471
3472 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3473 "%s: Ethernet device registered",
3474 ndev->name);
3475
3476 hldev->ndev = ndev;
3477 *vdev_out = vdev;
3478
3479
3480 status = vxge_hw_mrpcim_stats_access(
3481 hldev,
3482 VXGE_HW_STATS_OP_CLEAR_ALL_STATS,
3483 0,
3484 0,
3485 &stat);
3486
3487 if (status == VXGE_HW_ERR_PRIVILEGED_OPERATION)
3488 vxge_debug_init(
3489 vxge_hw_device_trace_level_get(hldev),
3490 "%s: device stats clear returns"
3491 "VXGE_HW_ERR_PRIVILEGED_OPERATION", ndev->name);
3492
3493 vxge_debug_entryexit(vxge_hw_device_trace_level_get(hldev),
3494 "%s: %s:%d Exiting...",
3495 ndev->name, __func__, __LINE__);
3496
3497 return ret;
3498_out2:
3499 kfree(vdev->vpaths);
3500_out1:
3501 free_netdev(ndev);
3502_out0:
3503 return ret;
3504}
3505
3506
3507
3508
3509
3510
3511static void vxge_device_unregister(struct __vxge_hw_device *hldev)
3512{
3513 struct vxgedev *vdev;
3514 struct net_device *dev;
3515 char buf[IFNAMSIZ];
3516
3517 dev = hldev->ndev;
3518 vdev = netdev_priv(dev);
3519
3520 vxge_debug_entryexit(vdev->level_trace, "%s: %s:%d", vdev->ndev->name,
3521 __func__, __LINE__);
3522
3523 strlcpy(buf, dev->name, IFNAMSIZ);
3524
3525 flush_work(&vdev->reset_task);
3526
3527
3528 unregister_netdev(dev);
3529
3530 kfree(vdev->vpaths);
3531
3532
3533 free_netdev(dev);
3534
3535 vxge_debug_init(vdev->level_trace, "%s: ethernet device unregistered",
3536 buf);
3537 vxge_debug_entryexit(vdev->level_trace, "%s: %s:%d Exiting...", buf,
3538 __func__, __LINE__);
3539}
3540
3541
3542
3543
3544
3545
3546
3547static void
3548vxge_callback_crit_err(struct __vxge_hw_device *hldev,
3549 enum vxge_hw_event type, u64 vp_id)
3550{
3551 struct net_device *dev = hldev->ndev;
3552 struct vxgedev *vdev = netdev_priv(dev);
3553 struct vxge_vpath *vpath = NULL;
3554 int vpath_idx;
3555
3556 vxge_debug_entryexit(vdev->level_trace,
3557 "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
3558
3559
3560
3561
3562 vdev->cric_err_event = type;
3563
3564 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
3565 vpath = &vdev->vpaths[vpath_idx];
3566 if (vpath->device_id == vp_id)
3567 break;
3568 }
3569
3570 if (!test_bit(__VXGE_STATE_RESET_CARD, &vdev->state)) {
3571 if (type == VXGE_HW_EVENT_SLOT_FREEZE) {
3572 vxge_debug_init(VXGE_ERR,
3573 "%s: Slot is frozen", vdev->ndev->name);
3574 } else if (type == VXGE_HW_EVENT_SERR) {
3575 vxge_debug_init(VXGE_ERR,
3576 "%s: Encountered Serious Error",
3577 vdev->ndev->name);
3578 } else if (type == VXGE_HW_EVENT_CRITICAL_ERR)
3579 vxge_debug_init(VXGE_ERR,
3580 "%s: Encountered Critical Error",
3581 vdev->ndev->name);
3582 }
3583
3584 if ((type == VXGE_HW_EVENT_SERR) ||
3585 (type == VXGE_HW_EVENT_SLOT_FREEZE)) {
3586 if (unlikely(vdev->exec_mode))
3587 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3588 } else if (type == VXGE_HW_EVENT_CRITICAL_ERR) {
3589 vxge_hw_device_mask_all(hldev);
3590 if (unlikely(vdev->exec_mode))
3591 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3592 } else if ((type == VXGE_HW_EVENT_FIFO_ERR) ||
3593 (type == VXGE_HW_EVENT_VPATH_ERR)) {
3594
3595 if (unlikely(vdev->exec_mode))
3596 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3597 else {
3598
3599 if (!test_and_set_bit(vpath_idx, &vdev->vp_reset)) {
3600
3601
3602 vxge_vpath_intr_disable(vdev, vpath_idx);
3603
3604
3605 netif_tx_stop_queue(vpath->fifo.txq);
3606 }
3607 }
3608 }
3609
3610 vxge_debug_entryexit(vdev->level_trace,
3611 "%s: %s:%d Exiting...",
3612 vdev->ndev->name, __func__, __LINE__);
3613}
3614
3615static void verify_bandwidth(void)
3616{
3617 int i, band_width, total = 0, equal_priority = 0;
3618
3619
3620 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3621 if (bw_percentage[i] == 0) {
3622 equal_priority = 1;
3623 break;
3624 }
3625 }
3626
3627 if (!equal_priority) {
3628
3629 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3630 if (bw_percentage[i] == 0xFF)
3631 break;
3632
3633 total += bw_percentage[i];
3634 if (total > VXGE_HW_VPATH_BANDWIDTH_MAX) {
3635 equal_priority = 1;
3636 break;
3637 }
3638 }
3639 }
3640
3641 if (!equal_priority) {
3642
3643 if (total < VXGE_HW_VPATH_BANDWIDTH_MAX) {
3644 if (i < VXGE_HW_MAX_VIRTUAL_PATHS) {
3645
3646 band_width =
3647 (VXGE_HW_VPATH_BANDWIDTH_MAX - total) /
3648 (VXGE_HW_MAX_VIRTUAL_PATHS - i);
3649 if (band_width < 2)
3650 equal_priority = 1;
3651 else {
3652 for (; i < VXGE_HW_MAX_VIRTUAL_PATHS;
3653 i++)
3654 bw_percentage[i] =
3655 band_width;
3656 }
3657 }
3658 } else if (i < VXGE_HW_MAX_VIRTUAL_PATHS)
3659 equal_priority = 1;
3660 }
3661
3662 if (equal_priority) {
3663 vxge_debug_init(VXGE_ERR,
3664 "%s: Assigning equal bandwidth to all the vpaths",
3665 VXGE_DRIVER_NAME);
3666 bw_percentage[0] = VXGE_HW_VPATH_BANDWIDTH_MAX /
3667 VXGE_HW_MAX_VIRTUAL_PATHS;
3668 for (i = 1; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
3669 bw_percentage[i] = bw_percentage[0];
3670 }
3671}
3672
3673
3674
3675
3676static int vxge_config_vpaths(struct vxge_hw_device_config *device_config,
3677 u64 vpath_mask, struct vxge_config *config_param)
3678{
3679 int i, no_of_vpaths = 0, default_no_vpath = 0, temp;
3680 u32 txdl_size, txdl_per_memblock;
3681
3682 temp = driver_config->vpath_per_dev;
3683 if ((driver_config->vpath_per_dev == VXGE_USE_DEFAULT) &&
3684 (max_config_dev == VXGE_MAX_CONFIG_DEV)) {
3685
3686 if (driver_config->g_no_cpus == -1)
3687 return 0;
3688
3689 if (!driver_config->g_no_cpus)
3690 driver_config->g_no_cpus =
3691 netif_get_num_default_rss_queues();
3692
3693 driver_config->vpath_per_dev = driver_config->g_no_cpus >> 1;
3694 if (!driver_config->vpath_per_dev)
3695 driver_config->vpath_per_dev = 1;
3696
3697 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
3698 if (!vxge_bVALn(vpath_mask, i, 1))
3699 continue;
3700 else
3701 default_no_vpath++;
3702 if (default_no_vpath < driver_config->vpath_per_dev)
3703 driver_config->vpath_per_dev = default_no_vpath;
3704
3705 driver_config->g_no_cpus = driver_config->g_no_cpus -
3706 (driver_config->vpath_per_dev * 2);
3707 if (driver_config->g_no_cpus <= 0)
3708 driver_config->g_no_cpus = -1;
3709 }
3710
3711 if (driver_config->vpath_per_dev == 1) {
3712 vxge_debug_ll_config(VXGE_TRACE,
3713 "%s: Disable tx and rx steering, "
3714 "as single vpath is configured", VXGE_DRIVER_NAME);
3715 config_param->rth_steering = NO_STEERING;
3716 config_param->tx_steering_type = NO_STEERING;
3717 device_config->rth_en = 0;
3718 }
3719
3720
3721 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
3722 device_config->vp_config[i].min_bandwidth = bw_percentage[i];
3723
3724 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3725 device_config->vp_config[i].vp_id = i;
3726 device_config->vp_config[i].mtu = VXGE_HW_DEFAULT_MTU;
3727 if (no_of_vpaths < driver_config->vpath_per_dev) {
3728 if (!vxge_bVALn(vpath_mask, i, 1)) {
3729 vxge_debug_ll_config(VXGE_TRACE,
3730 "%s: vpath: %d is not available",
3731 VXGE_DRIVER_NAME, i);
3732 continue;
3733 } else {
3734 vxge_debug_ll_config(VXGE_TRACE,
3735 "%s: vpath: %d available",
3736 VXGE_DRIVER_NAME, i);
3737 no_of_vpaths++;
3738 }
3739 } else {
3740 vxge_debug_ll_config(VXGE_TRACE,
3741 "%s: vpath: %d is not configured, "
3742 "max_config_vpath exceeded",
3743 VXGE_DRIVER_NAME, i);
3744 break;
3745 }
3746
3747
3748 device_config->vp_config[i].fifo.enable =
3749 VXGE_HW_FIFO_ENABLE;
3750 device_config->vp_config[i].fifo.max_frags =
3751 MAX_SKB_FRAGS + 1;
3752 device_config->vp_config[i].fifo.memblock_size =
3753 VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE;
3754
3755 txdl_size = device_config->vp_config[i].fifo.max_frags *
3756 sizeof(struct vxge_hw_fifo_txd);
3757 txdl_per_memblock = VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE / txdl_size;
3758
3759 device_config->vp_config[i].fifo.fifo_blocks =
3760 ((VXGE_DEF_FIFO_LENGTH - 1) / txdl_per_memblock) + 1;
3761
3762 device_config->vp_config[i].fifo.intr =
3763 VXGE_HW_FIFO_QUEUE_INTR_DISABLE;
3764
3765
3766 device_config->vp_config[i].tti.intr_enable =
3767 VXGE_HW_TIM_INTR_ENABLE;
3768
3769 device_config->vp_config[i].tti.btimer_val =
3770 (VXGE_TTI_BTIMER_VAL * 1000) / 272;
3771
3772 device_config->vp_config[i].tti.timer_ac_en =
3773 VXGE_HW_TIM_TIMER_AC_ENABLE;
3774
3775
3776
3777
3778 device_config->vp_config[i].tti.timer_ci_en =
3779 VXGE_HW_TIM_TIMER_CI_DISABLE;
3780
3781 device_config->vp_config[i].tti.timer_ri_en =
3782 VXGE_HW_TIM_TIMER_RI_DISABLE;
3783
3784 device_config->vp_config[i].tti.util_sel =
3785 VXGE_HW_TIM_UTIL_SEL_LEGACY_TX_NET_UTIL;
3786
3787 device_config->vp_config[i].tti.ltimer_val =
3788 (VXGE_TTI_LTIMER_VAL * 1000) / 272;
3789
3790 device_config->vp_config[i].tti.rtimer_val =
3791 (VXGE_TTI_RTIMER_VAL * 1000) / 272;
3792
3793 device_config->vp_config[i].tti.urange_a = TTI_TX_URANGE_A;
3794 device_config->vp_config[i].tti.urange_b = TTI_TX_URANGE_B;
3795 device_config->vp_config[i].tti.urange_c = TTI_TX_URANGE_C;
3796 device_config->vp_config[i].tti.uec_a = TTI_TX_UFC_A;
3797 device_config->vp_config[i].tti.uec_b = TTI_TX_UFC_B;
3798 device_config->vp_config[i].tti.uec_c = TTI_TX_UFC_C;
3799 device_config->vp_config[i].tti.uec_d = TTI_TX_UFC_D;
3800
3801
3802 device_config->vp_config[i].ring.enable =
3803 VXGE_HW_RING_ENABLE;
3804
3805 device_config->vp_config[i].ring.ring_blocks =
3806 VXGE_HW_DEF_RING_BLOCKS;
3807
3808 device_config->vp_config[i].ring.buffer_mode =
3809 VXGE_HW_RING_RXD_BUFFER_MODE_1;
3810
3811 device_config->vp_config[i].ring.rxds_limit =
3812 VXGE_HW_DEF_RING_RXDS_LIMIT;
3813
3814 device_config->vp_config[i].ring.scatter_mode =
3815 VXGE_HW_RING_SCATTER_MODE_A;
3816
3817
3818 device_config->vp_config[i].rti.intr_enable =
3819 VXGE_HW_TIM_INTR_ENABLE;
3820
3821 device_config->vp_config[i].rti.btimer_val =
3822 (VXGE_RTI_BTIMER_VAL * 1000)/272;
3823
3824 device_config->vp_config[i].rti.timer_ac_en =
3825 VXGE_HW_TIM_TIMER_AC_ENABLE;
3826
3827 device_config->vp_config[i].rti.timer_ci_en =
3828 VXGE_HW_TIM_TIMER_CI_DISABLE;
3829
3830 device_config->vp_config[i].rti.timer_ri_en =
3831 VXGE_HW_TIM_TIMER_RI_DISABLE;
3832
3833 device_config->vp_config[i].rti.util_sel =
3834 VXGE_HW_TIM_UTIL_SEL_LEGACY_RX_NET_UTIL;
3835
3836 device_config->vp_config[i].rti.urange_a =
3837 RTI_RX_URANGE_A;
3838 device_config->vp_config[i].rti.urange_b =
3839 RTI_RX_URANGE_B;
3840 device_config->vp_config[i].rti.urange_c =
3841 RTI_RX_URANGE_C;
3842 device_config->vp_config[i].rti.uec_a = RTI_RX_UFC_A;
3843 device_config->vp_config[i].rti.uec_b = RTI_RX_UFC_B;
3844 device_config->vp_config[i].rti.uec_c = RTI_RX_UFC_C;
3845 device_config->vp_config[i].rti.uec_d = RTI_RX_UFC_D;
3846
3847 device_config->vp_config[i].rti.rtimer_val =
3848 (VXGE_RTI_RTIMER_VAL * 1000) / 272;
3849
3850 device_config->vp_config[i].rti.ltimer_val =
3851 (VXGE_RTI_LTIMER_VAL * 1000) / 272;
3852
3853 device_config->vp_config[i].rpa_strip_vlan_tag =
3854 vlan_tag_strip;
3855 }
3856
3857 driver_config->vpath_per_dev = temp;
3858 return no_of_vpaths;
3859}
3860
3861
3862static void vxge_device_config_init(struct vxge_hw_device_config *device_config,
3863 int *intr_type)
3864{
3865
3866 device_config->dma_blockpool_initial =
3867 VXGE_HW_INITIAL_DMA_BLOCK_POOL_SIZE;
3868
3869 device_config->dma_blockpool_max =
3870 VXGE_HW_MAX_DMA_BLOCK_POOL_SIZE;
3871
3872 if (max_mac_vpath > VXGE_MAX_MAC_ADDR_COUNT)
3873 max_mac_vpath = VXGE_MAX_MAC_ADDR_COUNT;
3874
3875 if (!IS_ENABLED(CONFIG_PCI_MSI)) {
3876 vxge_debug_init(VXGE_ERR,
3877 "%s: This Kernel does not support "
3878 "MSI-X. Defaulting to INTA", VXGE_DRIVER_NAME);
3879 *intr_type = INTA;
3880 }
3881
3882
3883 switch (*intr_type) {
3884 case INTA:
3885 device_config->intr_mode = VXGE_HW_INTR_MODE_IRQLINE;
3886 break;
3887
3888 case MSI_X:
3889 device_config->intr_mode = VXGE_HW_INTR_MODE_MSIX_ONE_SHOT;
3890 break;
3891 }
3892
3893
3894 device_config->device_poll_millis = VXGE_TIMER_DELAY;
3895
3896
3897 device_config->rts_mac_en = addr_learn_en;
3898
3899
3900 device_config->rth_it_type = VXGE_HW_RTH_IT_TYPE_MULTI_IT;
3901
3902 vxge_debug_ll_config(VXGE_TRACE, "%s : Device Config Params ",
3903 __func__);
3904 vxge_debug_ll_config(VXGE_TRACE, "intr_mode : %d",
3905 device_config->intr_mode);
3906 vxge_debug_ll_config(VXGE_TRACE, "device_poll_millis : %d",
3907 device_config->device_poll_millis);
3908 vxge_debug_ll_config(VXGE_TRACE, "rth_en : %d",
3909 device_config->rth_en);
3910 vxge_debug_ll_config(VXGE_TRACE, "rth_it_type : %d",
3911 device_config->rth_it_type);
3912}
3913
3914static void vxge_print_parm(struct vxgedev *vdev, u64 vpath_mask)
3915{
3916 int i;
3917
3918 vxge_debug_init(VXGE_TRACE,
3919 "%s: %d Vpath(s) opened",
3920 vdev->ndev->name, vdev->no_of_vpath);
3921
3922 switch (vdev->config.intr_type) {
3923 case INTA:
3924 vxge_debug_init(VXGE_TRACE,
3925 "%s: Interrupt type INTA", vdev->ndev->name);
3926 break;
3927
3928 case MSI_X:
3929 vxge_debug_init(VXGE_TRACE,
3930 "%s: Interrupt type MSI-X", vdev->ndev->name);
3931 break;
3932 }
3933
3934 if (vdev->config.rth_steering) {
3935 vxge_debug_init(VXGE_TRACE,
3936 "%s: RTH steering enabled for TCP_IPV4",
3937 vdev->ndev->name);
3938 } else {
3939 vxge_debug_init(VXGE_TRACE,
3940 "%s: RTH steering disabled", vdev->ndev->name);
3941 }
3942
3943 switch (vdev->config.tx_steering_type) {
3944 case NO_STEERING:
3945 vxge_debug_init(VXGE_TRACE,
3946 "%s: Tx steering disabled", vdev->ndev->name);
3947 break;
3948 case TX_PRIORITY_STEERING:
3949 vxge_debug_init(VXGE_TRACE,
3950 "%s: Unsupported tx steering option",
3951 vdev->ndev->name);
3952 vxge_debug_init(VXGE_TRACE,
3953 "%s: Tx steering disabled", vdev->ndev->name);
3954 vdev->config.tx_steering_type = 0;
3955 break;
3956 case TX_VLAN_STEERING:
3957 vxge_debug_init(VXGE_TRACE,
3958 "%s: Unsupported tx steering option",
3959 vdev->ndev->name);
3960 vxge_debug_init(VXGE_TRACE,
3961 "%s: Tx steering disabled", vdev->ndev->name);
3962 vdev->config.tx_steering_type = 0;
3963 break;
3964 case TX_MULTIQ_STEERING:
3965 vxge_debug_init(VXGE_TRACE,
3966 "%s: Tx multiqueue steering enabled",
3967 vdev->ndev->name);
3968 break;
3969 case TX_PORT_STEERING:
3970 vxge_debug_init(VXGE_TRACE,
3971 "%s: Tx port steering enabled",
3972 vdev->ndev->name);
3973 break;
3974 default:
3975 vxge_debug_init(VXGE_ERR,
3976 "%s: Unsupported tx steering type",
3977 vdev->ndev->name);
3978 vxge_debug_init(VXGE_TRACE,
3979 "%s: Tx steering disabled", vdev->ndev->name);
3980 vdev->config.tx_steering_type = 0;
3981 }
3982
3983 if (vdev->config.addr_learn_en)
3984 vxge_debug_init(VXGE_TRACE,
3985 "%s: MAC Address learning enabled", vdev->ndev->name);
3986
3987 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3988 if (!vxge_bVALn(vpath_mask, i, 1))
3989 continue;
3990 vxge_debug_ll_config(VXGE_TRACE,
3991 "%s: MTU size - %d", vdev->ndev->name,
3992 ((vdev->devh))->
3993 config.vp_config[i].mtu);
3994 vxge_debug_init(VXGE_TRACE,
3995 "%s: VLAN tag stripping %s", vdev->ndev->name,
3996 ((vdev->devh))->
3997 config.vp_config[i].rpa_strip_vlan_tag
3998 ? "Enabled" : "Disabled");
3999 vxge_debug_ll_config(VXGE_TRACE,
4000 "%s: Max frags : %d", vdev->ndev->name,
4001 ((vdev->devh))->
4002 config.vp_config[i].fifo.max_frags);
4003 break;
4004 }
4005}
4006
4007#ifdef CONFIG_PM
4008
4009
4010
4011
4012static int vxge_pm_suspend(struct pci_dev *pdev, pm_message_t state)
4013{
4014 return -ENOSYS;
4015}
4016
4017
4018
4019
4020static int vxge_pm_resume(struct pci_dev *pdev)
4021{
4022 return -ENOSYS;
4023}
4024
4025#endif
4026
4027
4028
4029
4030
4031
4032
4033
4034
4035static pci_ers_result_t vxge_io_error_detected(struct pci_dev *pdev,
4036 pci_channel_state_t state)
4037{
4038 struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
4039 struct net_device *netdev = hldev->ndev;
4040
4041 netif_device_detach(netdev);
4042
4043 if (state == pci_channel_io_perm_failure)
4044 return PCI_ERS_RESULT_DISCONNECT;
4045
4046 if (netif_running(netdev)) {
4047
4048 do_vxge_close(netdev, 0);
4049 }
4050
4051 pci_disable_device(pdev);
4052
4053 return PCI_ERS_RESULT_NEED_RESET;
4054}
4055
4056
4057
4058
4059
4060
4061
4062
4063
4064
4065static pci_ers_result_t vxge_io_slot_reset(struct pci_dev *pdev)
4066{
4067 struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
4068 struct net_device *netdev = hldev->ndev;
4069
4070 struct vxgedev *vdev = netdev_priv(netdev);
4071
4072 if (pci_enable_device(pdev)) {
4073 netdev_err(netdev, "Cannot re-enable device after reset\n");
4074 return PCI_ERS_RESULT_DISCONNECT;
4075 }
4076
4077 pci_set_master(pdev);
4078 do_vxge_reset(vdev, VXGE_LL_FULL_RESET);
4079
4080 return PCI_ERS_RESULT_RECOVERED;
4081}
4082
4083
4084
4085
4086
4087
4088
4089
4090static void vxge_io_resume(struct pci_dev *pdev)
4091{
4092 struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
4093 struct net_device *netdev = hldev->ndev;
4094
4095 if (netif_running(netdev)) {
4096 if (vxge_open(netdev)) {
4097 netdev_err(netdev,
4098 "Can't bring device back up after reset\n");
4099 return;
4100 }
4101 }
4102
4103 netif_device_attach(netdev);
4104}
4105
4106static inline u32 vxge_get_num_vfs(u64 function_mode)
4107{
4108 u32 num_functions = 0;
4109
4110 switch (function_mode) {
4111 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION:
4112 case VXGE_HW_FUNCTION_MODE_SRIOV_8:
4113 num_functions = 8;
4114 break;
4115 case VXGE_HW_FUNCTION_MODE_SINGLE_FUNCTION:
4116 num_functions = 1;
4117 break;
4118 case VXGE_HW_FUNCTION_MODE_SRIOV:
4119 case VXGE_HW_FUNCTION_MODE_MRIOV:
4120 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION_17:
4121 num_functions = 17;
4122 break;
4123 case VXGE_HW_FUNCTION_MODE_SRIOV_4:
4124 num_functions = 4;
4125 break;
4126 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION_2:
4127 num_functions = 2;
4128 break;
4129 case VXGE_HW_FUNCTION_MODE_MRIOV_8:
4130 num_functions = 8;
4131 break;
4132 }
4133 return num_functions;
4134}
4135
4136int vxge_fw_upgrade(struct vxgedev *vdev, char *fw_name, int override)
4137{
4138 struct __vxge_hw_device *hldev = vdev->devh;
4139 u32 maj, min, bld, cmaj, cmin, cbld;
4140 enum vxge_hw_status status;
4141 const struct firmware *fw;
4142 int ret;
4143
4144 ret = request_firmware(&fw, fw_name, &vdev->pdev->dev);
4145 if (ret) {
4146 vxge_debug_init(VXGE_ERR, "%s: Firmware file '%s' not found",
4147 VXGE_DRIVER_NAME, fw_name);
4148 goto out;
4149 }
4150
4151
4152 status = vxge_update_fw_image(hldev, fw->data, fw->size);
4153 if (status != VXGE_HW_OK) {
4154 vxge_debug_init(VXGE_ERR,
4155 "%s: FW image download to adapter failed '%s'.",
4156 VXGE_DRIVER_NAME, fw_name);
4157 ret = -EIO;
4158 goto out;
4159 }
4160
4161
4162 status = vxge_hw_upgrade_read_version(hldev, &maj, &min, &bld);
4163 if (status != VXGE_HW_OK) {
4164 vxge_debug_init(VXGE_ERR,
4165 "%s: Upgrade read version failed '%s'.",
4166 VXGE_DRIVER_NAME, fw_name);
4167 ret = -EIO;
4168 goto out;
4169 }
4170
4171 cmaj = vdev->config.device_hw_info.fw_version.major;
4172 cmin = vdev->config.device_hw_info.fw_version.minor;
4173 cbld = vdev->config.device_hw_info.fw_version.build;
4174
4175
4176
4177
4178 if (VXGE_FW_VER(maj, min, bld) == VXGE_FW_VER(cmaj, cmin, cbld) &&
4179 !override) {
4180 ret = -EINVAL;
4181 goto out;
4182 }
4183
4184 printk(KERN_NOTICE "Upgrade to firmware version %d.%d.%d commencing\n",
4185 maj, min, bld);
4186
4187
4188 status = vxge_hw_flash_fw(hldev);
4189 if (status != VXGE_HW_OK) {
4190 vxge_debug_init(VXGE_ERR, "%s: Upgrade commit failed '%s'.",
4191 VXGE_DRIVER_NAME, fw_name);
4192 ret = -EIO;
4193 goto out;
4194 }
4195
4196 printk(KERN_NOTICE "Upgrade of firmware successful! Adapter must be "
4197 "hard reset before using, thus requiring a system reboot or a "
4198 "hotplug event.\n");
4199
4200out:
4201 release_firmware(fw);
4202 return ret;
4203}
4204
4205static int vxge_probe_fw_update(struct vxgedev *vdev)
4206{
4207 u32 maj, min, bld;
4208 int ret, gpxe = 0;
4209 char *fw_name;
4210
4211 maj = vdev->config.device_hw_info.fw_version.major;
4212 min = vdev->config.device_hw_info.fw_version.minor;
4213 bld = vdev->config.device_hw_info.fw_version.build;
4214
4215 if (VXGE_FW_VER(maj, min, bld) == VXGE_CERT_FW_VER)
4216 return 0;
4217
4218
4219
4220
4221 if (VXGE_FW_VER(maj, min, 0) > VXGE_CERT_FW_VER) {
4222 vxge_debug_init(VXGE_ERR, "%s: Firmware newer than last known "
4223 "version, unable to load driver\n",
4224 VXGE_DRIVER_NAME);
4225 return -EINVAL;
4226 }
4227
4228
4229
4230
4231 if (VXGE_FW_VER(maj, min, bld) <= VXGE_FW_DEAD_VER) {
4232 vxge_debug_init(VXGE_ERR, "%s: Firmware %d.%d.%d cannot be "
4233 "upgraded\n", VXGE_DRIVER_NAME, maj, min, bld);
4234 return -EINVAL;
4235 }
4236
4237
4238 if (VXGE_FW_VER(maj, min, bld) >= VXGE_EPROM_FW_VER) {
4239 int i;
4240 for (i = 0; i < VXGE_HW_MAX_ROM_IMAGES; i++)
4241 if (vdev->devh->eprom_versions[i]) {
4242 gpxe = 1;
4243 break;
4244 }
4245 }
4246 if (gpxe)
4247 fw_name = "vxge/X3fw-pxe.ncf";
4248 else
4249 fw_name = "vxge/X3fw.ncf";
4250
4251 ret = vxge_fw_upgrade(vdev, fw_name, 0);
4252
4253
4254
4255 if (ret != -EINVAL && ret != -ENOENT)
4256 return -EIO;
4257 else
4258 ret = 0;
4259
4260 if (VXGE_FW_VER(VXGE_CERT_FW_VER_MAJOR, VXGE_CERT_FW_VER_MINOR, 0) >
4261 VXGE_FW_VER(maj, min, 0)) {
4262 vxge_debug_init(VXGE_ERR, "%s: Firmware %d.%d.%d is too old to"
4263 " be used with this driver.",
4264 VXGE_DRIVER_NAME, maj, min, bld);
4265 return -EINVAL;
4266 }
4267
4268 return ret;
4269}
4270
4271static int is_sriov_initialized(struct pci_dev *pdev)
4272{
4273 int pos;
4274 u16 ctrl;
4275
4276 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
4277 if (pos) {
4278 pci_read_config_word(pdev, pos + PCI_SRIOV_CTRL, &ctrl);
4279 if (ctrl & PCI_SRIOV_CTRL_VFE)
4280 return 1;
4281 }
4282 return 0;
4283}
4284
4285static const struct vxge_hw_uld_cbs vxge_callbacks = {
4286 .link_up = vxge_callback_link_up,
4287 .link_down = vxge_callback_link_down,
4288 .crit_err = vxge_callback_crit_err,
4289};
4290
4291
4292
4293
4294
4295
4296
4297
4298
4299
4300
4301
4302static int
4303vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre)
4304{
4305 struct __vxge_hw_device *hldev;
4306 enum vxge_hw_status status;
4307 int ret;
4308 int high_dma = 0;
4309 u64 vpath_mask = 0;
4310 struct vxgedev *vdev;
4311 struct vxge_config *ll_config = NULL;
4312 struct vxge_hw_device_config *device_config = NULL;
4313 struct vxge_hw_device_attr attr;
4314 int i, j, no_of_vpath = 0, max_vpath_supported = 0;
4315 u8 *macaddr;
4316 struct vxge_mac_addrs *entry;
4317 static int bus = -1, device = -1;
4318 u32 host_type;
4319 u8 new_device = 0;
4320 enum vxge_hw_status is_privileged;
4321 u32 function_mode;
4322 u32 num_vfs = 0;
4323
4324 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
4325 attr.pdev = pdev;
4326
4327
4328
4329
4330 if (((bus != pdev->bus->number) || (device != PCI_SLOT(pdev->devfn))) &&
4331 !pdev->is_virtfn)
4332 new_device = 1;
4333
4334 bus = pdev->bus->number;
4335 device = PCI_SLOT(pdev->devfn);
4336
4337 if (new_device) {
4338 if (driver_config->config_dev_cnt &&
4339 (driver_config->config_dev_cnt !=
4340 driver_config->total_dev_cnt))
4341 vxge_debug_init(VXGE_ERR,
4342 "%s: Configured %d of %d devices",
4343 VXGE_DRIVER_NAME,
4344 driver_config->config_dev_cnt,
4345 driver_config->total_dev_cnt);
4346 driver_config->config_dev_cnt = 0;
4347 driver_config->total_dev_cnt = 0;
4348 }
4349
4350
4351
4352
4353 driver_config->g_no_cpus = 0;
4354 driver_config->vpath_per_dev = max_config_vpath;
4355
4356 driver_config->total_dev_cnt++;
4357 if (++driver_config->config_dev_cnt > max_config_dev) {
4358 ret = 0;
4359 goto _exit0;
4360 }
4361
4362 device_config = kzalloc(sizeof(struct vxge_hw_device_config),
4363 GFP_KERNEL);
4364 if (!device_config) {
4365 ret = -ENOMEM;
4366 vxge_debug_init(VXGE_ERR,
4367 "device_config : malloc failed %s %d",
4368 __FILE__, __LINE__);
4369 goto _exit0;
4370 }
4371
4372 ll_config = kzalloc(sizeof(struct vxge_config), GFP_KERNEL);
4373 if (!ll_config) {
4374 ret = -ENOMEM;
4375 vxge_debug_init(VXGE_ERR,
4376 "device_config : malloc failed %s %d",
4377 __FILE__, __LINE__);
4378 goto _exit0;
4379 }
4380 ll_config->tx_steering_type = TX_MULTIQ_STEERING;
4381 ll_config->intr_type = MSI_X;
4382 ll_config->napi_weight = NEW_NAPI_WEIGHT;
4383 ll_config->rth_steering = RTH_STEERING;
4384
4385
4386 vxge_hw_device_config_default_get(device_config);
4387
4388
4389 vxge_device_config_init(device_config, &ll_config->intr_type);
4390
4391 ret = pci_enable_device(pdev);
4392 if (ret) {
4393 vxge_debug_init(VXGE_ERR,
4394 "%s : can not enable PCI device", __func__);
4395 goto _exit0;
4396 }
4397
4398 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
4399 vxge_debug_ll_config(VXGE_TRACE,
4400 "%s : using 64bit DMA", __func__);
4401
4402 high_dma = 1;
4403
4404 if (pci_set_consistent_dma_mask(pdev,
4405 DMA_BIT_MASK(64))) {
4406 vxge_debug_init(VXGE_ERR,
4407 "%s : unable to obtain 64bit DMA for "
4408 "consistent allocations", __func__);
4409 ret = -ENOMEM;
4410 goto _exit1;
4411 }
4412 } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
4413 vxge_debug_ll_config(VXGE_TRACE,
4414 "%s : using 32bit DMA", __func__);
4415 } else {
4416 ret = -ENOMEM;
4417 goto _exit1;
4418 }
4419
4420 ret = pci_request_region(pdev, 0, VXGE_DRIVER_NAME);
4421 if (ret) {
4422 vxge_debug_init(VXGE_ERR,
4423 "%s : request regions failed", __func__);
4424 goto _exit1;
4425 }
4426
4427 pci_set_master(pdev);
4428
4429 attr.bar0 = pci_ioremap_bar(pdev, 0);
4430 if (!attr.bar0) {
4431 vxge_debug_init(VXGE_ERR,
4432 "%s : cannot remap io memory bar0", __func__);
4433 ret = -ENODEV;
4434 goto _exit2;
4435 }
4436 vxge_debug_ll_config(VXGE_TRACE,
4437 "pci ioremap bar0: %p:0x%llx",
4438 attr.bar0,
4439 (unsigned long long)pci_resource_start(pdev, 0));
4440
4441 status = vxge_hw_device_hw_info_get(attr.bar0,
4442 &ll_config->device_hw_info);
4443 if (status != VXGE_HW_OK) {
4444 vxge_debug_init(VXGE_ERR,
4445 "%s: Reading of hardware info failed."
4446 "Please try upgrading the firmware.", VXGE_DRIVER_NAME);
4447 ret = -EINVAL;
4448 goto _exit3;
4449 }
4450
4451 vpath_mask = ll_config->device_hw_info.vpath_mask;
4452 if (vpath_mask == 0) {
4453 vxge_debug_ll_config(VXGE_TRACE,
4454 "%s: No vpaths available in device", VXGE_DRIVER_NAME);
4455 ret = -EINVAL;
4456 goto _exit3;
4457 }
4458
4459 vxge_debug_ll_config(VXGE_TRACE,
4460 "%s:%d Vpath mask = %llx", __func__, __LINE__,
4461 (unsigned long long)vpath_mask);
4462
4463 function_mode = ll_config->device_hw_info.function_mode;
4464 host_type = ll_config->device_hw_info.host_type;
4465 is_privileged = __vxge_hw_device_is_privilaged(host_type,
4466 ll_config->device_hw_info.func_id);
4467
4468
4469 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
4470 if (!((vpath_mask) & vxge_mBIT(i)))
4471 continue;
4472 max_vpath_supported++;
4473 }
4474
4475 if (new_device)
4476 num_vfs = vxge_get_num_vfs(function_mode) - 1;
4477
4478
4479 if (is_sriov(function_mode) && !is_sriov_initialized(pdev) &&
4480 (ll_config->intr_type != INTA)) {
4481 ret = pci_enable_sriov(pdev, num_vfs);
4482 if (ret)
4483 vxge_debug_ll_config(VXGE_ERR,
4484 "Failed in enabling SRIOV mode: %d\n", ret);
4485
4486 }
4487
4488
4489
4490
4491
4492 no_of_vpath = vxge_config_vpaths(device_config, vpath_mask, ll_config);
4493 if (!no_of_vpath) {
4494 vxge_debug_ll_config(VXGE_ERR,
4495 "%s: No more vpaths to configure", VXGE_DRIVER_NAME);
4496 ret = 0;
4497 goto _exit3;
4498 }
4499
4500
4501 attr.uld_callbacks = &vxge_callbacks;
4502
4503 status = vxge_hw_device_initialize(&hldev, &attr, device_config);
4504 if (status != VXGE_HW_OK) {
4505 vxge_debug_init(VXGE_ERR,
4506 "Failed to initialize device (%d)", status);
4507 ret = -EINVAL;
4508 goto _exit3;
4509 }
4510
4511 if (VXGE_FW_VER(ll_config->device_hw_info.fw_version.major,
4512 ll_config->device_hw_info.fw_version.minor,
4513 ll_config->device_hw_info.fw_version.build) >=
4514 VXGE_EPROM_FW_VER) {
4515 struct eprom_image img[VXGE_HW_MAX_ROM_IMAGES];
4516
4517 status = vxge_hw_vpath_eprom_img_ver_get(hldev, img);
4518 if (status != VXGE_HW_OK) {
4519 vxge_debug_init(VXGE_ERR, "%s: Reading of EPROM failed",
4520 VXGE_DRIVER_NAME);
4521
4522 }
4523
4524 for (i = 0; i < VXGE_HW_MAX_ROM_IMAGES; i++) {
4525 hldev->eprom_versions[i] = img[i].version;
4526 if (!img[i].is_valid)
4527 break;
4528 vxge_debug_init(VXGE_TRACE, "%s: EPROM %d, version "
4529 "%d.%d.%d.%d", VXGE_DRIVER_NAME, i,
4530 VXGE_EPROM_IMG_MAJOR(img[i].version),
4531 VXGE_EPROM_IMG_MINOR(img[i].version),
4532 VXGE_EPROM_IMG_FIX(img[i].version),
4533 VXGE_EPROM_IMG_BUILD(img[i].version));
4534 }
4535 }
4536
4537
4538 status = vxge_hw_vpath_strip_fcs_check(hldev, vpath_mask);
4539 if (status != VXGE_HW_OK) {
4540 vxge_debug_init(VXGE_ERR, "%s: FCS stripping is enabled in MAC"
4541 " failing driver load", VXGE_DRIVER_NAME);
4542 ret = -EINVAL;
4543 goto _exit4;
4544 }
4545
4546
4547
4548
4549
4550
4551
4552
4553
4554 if (is_privileged == VXGE_HW_OK) {
4555 status = vxge_timestamp_config(hldev);
4556 if (status != VXGE_HW_OK) {
4557 vxge_debug_init(VXGE_ERR, "%s: HWTS enable failed",
4558 VXGE_DRIVER_NAME);
4559 ret = -EFAULT;
4560 goto _exit4;
4561 }
4562 }
4563
4564 vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
4565
4566
4567 pci_set_drvdata(pdev, hldev);
4568
4569 ll_config->fifo_indicate_max_pkts = VXGE_FIFO_INDICATE_MAX_PKTS;
4570 ll_config->addr_learn_en = addr_learn_en;
4571 ll_config->rth_algorithm = RTH_ALG_JENKINS;
4572 ll_config->rth_hash_type_tcpipv4 = 1;
4573 ll_config->rth_hash_type_ipv4 = 0;
4574 ll_config->rth_hash_type_tcpipv6 = 0;
4575 ll_config->rth_hash_type_ipv6 = 0;
4576 ll_config->rth_hash_type_tcpipv6ex = 0;
4577 ll_config->rth_hash_type_ipv6ex = 0;
4578 ll_config->rth_bkt_sz = RTH_BUCKET_SIZE;
4579 ll_config->tx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
4580 ll_config->rx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
4581
4582 ret = vxge_device_register(hldev, ll_config, high_dma, no_of_vpath,
4583 &vdev);
4584 if (ret) {
4585 ret = -EINVAL;
4586 goto _exit4;
4587 }
4588
4589 ret = vxge_probe_fw_update(vdev);
4590 if (ret)
4591 goto _exit5;
4592
4593 vxge_hw_device_debug_set(hldev, VXGE_TRACE, VXGE_COMPONENT_LL);
4594 VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
4595 vxge_hw_device_trace_level_get(hldev));
4596
4597
4598 vdev->mtu = VXGE_HW_DEFAULT_MTU;
4599 vdev->bar0 = attr.bar0;
4600 vdev->max_vpath_supported = max_vpath_supported;
4601 vdev->no_of_vpath = no_of_vpath;
4602
4603
4604 for (i = 0, j = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
4605 if (!vxge_bVALn(vpath_mask, i, 1))
4606 continue;
4607 if (j >= vdev->no_of_vpath)
4608 break;
4609
4610 vdev->vpaths[j].is_configured = 1;
4611 vdev->vpaths[j].device_id = i;
4612 vdev->vpaths[j].ring.driver_id = j;
4613 vdev->vpaths[j].vdev = vdev;
4614 vdev->vpaths[j].max_mac_addr_cnt = max_mac_vpath;
4615 memcpy((u8 *)vdev->vpaths[j].macaddr,
4616 ll_config->device_hw_info.mac_addrs[i],
4617 ETH_ALEN);
4618
4619
4620 INIT_LIST_HEAD(&vdev->vpaths[j].mac_addr_list);
4621
4622 vdev->vpaths[j].mac_addr_cnt = 0;
4623 vdev->vpaths[j].mcast_addr_cnt = 0;
4624 j++;
4625 }
4626 vdev->exec_mode = VXGE_EXEC_MODE_DISABLE;
4627 vdev->max_config_port = max_config_port;
4628
4629 vdev->vlan_tag_strip = vlan_tag_strip;
4630
4631
4632 for (i = 0; i < vdev->no_of_vpath; i++)
4633 vdev->vpath_selector[i] = vpath_selector[i];
4634
4635 macaddr = (u8 *)vdev->vpaths[0].macaddr;
4636
4637 ll_config->device_hw_info.serial_number[VXGE_HW_INFO_LEN - 1] = '\0';
4638 ll_config->device_hw_info.product_desc[VXGE_HW_INFO_LEN - 1] = '\0';
4639 ll_config->device_hw_info.part_number[VXGE_HW_INFO_LEN - 1] = '\0';
4640
4641 vxge_debug_init(VXGE_TRACE, "%s: SERIAL NUMBER: %s",
4642 vdev->ndev->name, ll_config->device_hw_info.serial_number);
4643
4644 vxge_debug_init(VXGE_TRACE, "%s: PART NUMBER: %s",
4645 vdev->ndev->name, ll_config->device_hw_info.part_number);
4646
4647 vxge_debug_init(VXGE_TRACE, "%s: Neterion %s Server Adapter",
4648 vdev->ndev->name, ll_config->device_hw_info.product_desc);
4649
4650 vxge_debug_init(VXGE_TRACE, "%s: MAC ADDR: %pM",
4651 vdev->ndev->name, macaddr);
4652
4653 vxge_debug_init(VXGE_TRACE, "%s: Link Width x%d",
4654 vdev->ndev->name, vxge_hw_device_link_width_get(hldev));
4655
4656 vxge_debug_init(VXGE_TRACE,
4657 "%s: Firmware version : %s Date : %s", vdev->ndev->name,
4658 ll_config->device_hw_info.fw_version.version,
4659 ll_config->device_hw_info.fw_date.date);
4660
4661 if (new_device) {
4662 switch (ll_config->device_hw_info.function_mode) {
4663 case VXGE_HW_FUNCTION_MODE_SINGLE_FUNCTION:
4664 vxge_debug_init(VXGE_TRACE,
4665 "%s: Single Function Mode Enabled", vdev->ndev->name);
4666 break;
4667 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION:
4668 vxge_debug_init(VXGE_TRACE,
4669 "%s: Multi Function Mode Enabled", vdev->ndev->name);
4670 break;
4671 case VXGE_HW_FUNCTION_MODE_SRIOV:
4672 vxge_debug_init(VXGE_TRACE,
4673 "%s: Single Root IOV Mode Enabled", vdev->ndev->name);
4674 break;
4675 case VXGE_HW_FUNCTION_MODE_MRIOV:
4676 vxge_debug_init(VXGE_TRACE,
4677 "%s: Multi Root IOV Mode Enabled", vdev->ndev->name);
4678 break;
4679 }
4680 }
4681
4682 vxge_print_parm(vdev, vpath_mask);
4683
4684
4685 strcpy(vdev->fw_version, ll_config->device_hw_info.fw_version.version);
4686 memcpy(vdev->ndev->dev_addr, (u8 *)vdev->vpaths[0].macaddr, ETH_ALEN);
4687
4688
4689 for (i = 0; i < vdev->no_of_vpath; i++) {
4690 entry = kzalloc(sizeof(struct vxge_mac_addrs), GFP_KERNEL);
4691 if (NULL == entry) {
4692 vxge_debug_init(VXGE_ERR,
4693 "%s: mac_addr_list : memory allocation failed",
4694 vdev->ndev->name);
4695 ret = -EPERM;
4696 goto _exit6;
4697 }
4698 macaddr = (u8 *)&entry->macaddr;
4699 memcpy(macaddr, vdev->ndev->dev_addr, ETH_ALEN);
4700 list_add(&entry->item, &vdev->vpaths[i].mac_addr_list);
4701 vdev->vpaths[i].mac_addr_cnt = 1;
4702 }
4703
4704 kfree(device_config);
4705
4706
4707
4708
4709
4710
4711
4712
4713
4714
4715
4716
4717
4718
4719
4720
4721 if (ll_config->device_hw_info.function_mode ==
4722 VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION)
4723 if (vdev->config.intr_type == INTA)
4724 vxge_hw_device_unmask_all(hldev);
4725
4726 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
4727 vdev->ndev->name, __func__, __LINE__);
4728
4729 vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
4730 VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
4731 vxge_hw_device_trace_level_get(hldev));
4732
4733 kfree(ll_config);
4734 return 0;
4735
4736_exit6:
4737 for (i = 0; i < vdev->no_of_vpath; i++)
4738 vxge_free_mac_add_list(&vdev->vpaths[i]);
4739_exit5:
4740 vxge_device_unregister(hldev);
4741_exit4:
4742 vxge_hw_device_terminate(hldev);
4743 pci_disable_sriov(pdev);
4744_exit3:
4745 iounmap(attr.bar0);
4746_exit2:
4747 pci_release_region(pdev, 0);
4748_exit1:
4749 pci_disable_device(pdev);
4750_exit0:
4751 kfree(ll_config);
4752 kfree(device_config);
4753 driver_config->config_dev_cnt--;
4754 driver_config->total_dev_cnt--;
4755 return ret;
4756}
4757
4758
4759
4760
4761
4762
4763
4764static void vxge_remove(struct pci_dev *pdev)
4765{
4766 struct __vxge_hw_device *hldev;
4767 struct vxgedev *vdev;
4768 int i;
4769
4770 hldev = pci_get_drvdata(pdev);
4771 if (hldev == NULL)
4772 return;
4773
4774 vdev = netdev_priv(hldev->ndev);
4775
4776 vxge_debug_entryexit(vdev->level_trace, "%s:%d", __func__, __LINE__);
4777 vxge_debug_init(vdev->level_trace, "%s : removing PCI device...",
4778 __func__);
4779
4780 for (i = 0; i < vdev->no_of_vpath; i++)
4781 vxge_free_mac_add_list(&vdev->vpaths[i]);
4782
4783 vxge_device_unregister(hldev);
4784
4785 vxge_hw_device_terminate(hldev);
4786 iounmap(vdev->bar0);
4787 pci_release_region(pdev, 0);
4788 pci_disable_device(pdev);
4789 driver_config->config_dev_cnt--;
4790 driver_config->total_dev_cnt--;
4791
4792 vxge_debug_init(vdev->level_trace, "%s:%d Device unregistered",
4793 __func__, __LINE__);
4794 vxge_debug_entryexit(vdev->level_trace, "%s:%d Exiting...", __func__,
4795 __LINE__);
4796}
4797
4798static const struct pci_error_handlers vxge_err_handler = {
4799 .error_detected = vxge_io_error_detected,
4800 .slot_reset = vxge_io_slot_reset,
4801 .resume = vxge_io_resume,
4802};
4803
4804static struct pci_driver vxge_driver = {
4805 .name = VXGE_DRIVER_NAME,
4806 .id_table = vxge_id_table,
4807 .probe = vxge_probe,
4808 .remove = vxge_remove,
4809#ifdef CONFIG_PM
4810 .suspend = vxge_pm_suspend,
4811 .resume = vxge_pm_resume,
4812#endif
4813 .err_handler = &vxge_err_handler,
4814};
4815
4816static int __init
4817vxge_starter(void)
4818{
4819 int ret = 0;
4820
4821 pr_info("Copyright(c) 2002-2010 Exar Corp.\n");
4822 pr_info("Driver version: %s\n", DRV_VERSION);
4823
4824 verify_bandwidth();
4825
4826 driver_config = kzalloc(sizeof(struct vxge_drv_config), GFP_KERNEL);
4827 if (!driver_config)
4828 return -ENOMEM;
4829
4830 ret = pci_register_driver(&vxge_driver);
4831 if (ret) {
4832 kfree(driver_config);
4833 goto err;
4834 }
4835
4836 if (driver_config->config_dev_cnt &&
4837 (driver_config->config_dev_cnt != driver_config->total_dev_cnt))
4838 vxge_debug_init(VXGE_ERR,
4839 "%s: Configured %d of %d devices",
4840 VXGE_DRIVER_NAME, driver_config->config_dev_cnt,
4841 driver_config->total_dev_cnt);
4842err:
4843 return ret;
4844}
4845
4846static void __exit
4847vxge_closer(void)
4848{
4849 pci_unregister_driver(&vxge_driver);
4850 kfree(driver_config);
4851}
4852module_init(vxge_starter);
4853module_exit(vxge_closer);
4854