LXR linux/drivers/scsi/lpfc/lpfc.h

   1/*******************************************************************
   2 * This file is part of the Emulex Linux Device Driver for         *
   3 * Fibre Channel Host Bus Adapters.                                *
   4 * Copyright (C) 2017-2019 Broadcom. All Rights Reserved. The term *
   5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.     *
   6 * Copyright (C) 2004-2016 Emulex.  All rights reserved.           *
   7 * EMULEX and SLI are trademarks of Emulex.                        *
   8 * www.broadcom.com                                                *
   9 * Portions Copyright (C) 2004-2005 Christoph Hellwig              *
  10 *                                                                 *
  11 * This program is free software; you can redistribute it and/or   *
  12 * modify it under the terms of version 2 of the GNU General       *
  13 * Public License as published by the Free Software Foundation.    *
  14 * This program is distributed in the hope that it will be useful. *
  15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND          *
  16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY,  *
  17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE      *
  18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
  19 * TO BE LEGALLY INVALID.  See the GNU General Public License for  *
  20 * more details, a copy of which can be found in the file COPYING  *
  21 * included with this package.                                     *
  22 *******************************************************************/
  23
  24#include <scsi/scsi_host.h>
  25#include <linux/ktime.h>
  26#include <linux/workqueue.h>
  27
  28#if defined(CONFIG_DEBUG_FS) && !defined(CONFIG_SCSI_LPFC_DEBUG_FS)
  29#define CONFIG_SCSI_LPFC_DEBUG_FS
  30#endif
  31
  32struct lpfc_sli2_slim;
  33
  34#define ELX_MODEL_NAME_SIZE     80
  35
  36#define LPFC_PCI_DEV_LP         0x1
  37#define LPFC_PCI_DEV_OC         0x2
  38
  39#define LPFC_SLI_REV2           2
  40#define LPFC_SLI_REV3           3
  41#define LPFC_SLI_REV4           4
  42
  43#define LPFC_MAX_TARGET         4096    /* max number of targets supported */
  44#define LPFC_MAX_DISC_THREADS   64      /* max outstanding discovery els
  45                                           requests */
  46#define LPFC_MAX_NS_RETRY       3       /* Number of retry attempts to contact
  47                                           the NameServer  before giving up. */
  48#define LPFC_CMD_PER_LUN        3       /* max outstanding cmds per lun */
  49#define LPFC_DEFAULT_SG_SEG_CNT 64      /* sg element count per scsi cmnd */
  50#define LPFC_DEFAULT_MENLO_SG_SEG_CNT 128       /* sg element count per scsi
  51                cmnd for menlo needs nearly twice as for firmware
  52                downloads using bsg */
  53
  54#define LPFC_MIN_SG_SLI4_BUF_SZ 0x800   /* based on LPFC_DEFAULT_SG_SEG_CNT */
  55#define LPFC_MAX_BG_SLI4_SEG_CNT_DIF 128 /* sg element count for BlockGuard */
  56#define LPFC_MAX_SG_SEG_CNT_DIF 512     /* sg element count per scsi cmnd  */
  57#define LPFC_MAX_SG_SEG_CNT     4096    /* sg element count per scsi cmnd */
  58#define LPFC_MIN_SG_SEG_CNT     32      /* sg element count per scsi cmnd */
  59#define LPFC_MAX_SGL_SEG_CNT    512     /* SGL element count per scsi cmnd */
  60#define LPFC_MAX_BPL_SEG_CNT    4096    /* BPL element count per scsi cmnd */
  61#define LPFC_MAX_NVME_SEG_CNT   256     /* max SGL element cnt per NVME cmnd */
  62
  63#define LPFC_MAX_SGE_SIZE       0x80000000 /* Maximum data allowed in a SGE */
  64#define LPFC_IOCB_LIST_CNT      2250    /* list of IOCBs for fast-path usage. */
  65#define LPFC_Q_RAMP_UP_INTERVAL 120     /* lun q_depth ramp up interval */
  66#define LPFC_VNAME_LEN          100     /* vport symbolic name length */
  67#define LPFC_TGTQ_RAMPUP_PCENT  5       /* Target queue rampup in percentage */
  68#define LPFC_MIN_TGT_QDEPTH     10
  69#define LPFC_MAX_TGT_QDEPTH     0xFFFF
  70
  71#define  LPFC_MAX_BUCKET_COUNT 20       /* Maximum no. of buckets for stat data
  72                                           collection. */
  73/*
  74 * Following time intervals are used of adjusting SCSI device
  75 * queue depths when there are driver resource error or Firmware
  76 * resource error.
  77 */
  78/* 1 Second */
  79#define QUEUE_RAMP_DOWN_INTERVAL        (msecs_to_jiffies(1000 * 1))
  80
  81/* Number of exchanges reserved for discovery to complete */
  82#define LPFC_DISC_IOCB_BUFF_COUNT 20
  83
  84#define LPFC_HB_MBOX_INTERVAL   5       /* Heart beat interval in seconds. */
  85#define LPFC_HB_MBOX_TIMEOUT    30      /* Heart beat timeout  in seconds. */
  86
  87/* Error Attention event polling interval */
  88#define LPFC_ERATT_POLL_INTERVAL        5 /* EATT poll interval in seconds */
  89
  90/* Define macros for 64 bit support */
  91#define putPaddrLow(addr)    ((uint32_t) (0xffffffff & (u64)(addr)))
  92#define putPaddrHigh(addr)   ((uint32_t) (0xffffffff & (((u64)(addr))>>32)))
  93#define getPaddr(high, low)  ((dma_addr_t)( \
  94                             (( (u64)(high)<<16 ) << 16)|( (u64)(low))))
  95/* Provide maximum configuration definitions. */
  96#define LPFC_DRVR_TIMEOUT       16      /* driver iocb timeout value in sec */
  97#define FC_MAX_ADPTMSG          64
  98
  99#define MAX_HBAEVT      32
 100#define MAX_HBAS_NO_RESET 16
 101
 102/* Number of MSI-X vectors the driver uses */
 103#define LPFC_MSIX_VECTORS       2
 104
 105/* lpfc wait event data ready flag */
 106#define LPFC_DATA_READY         0       /* bit 0 */
 107
 108/* queue dump line buffer size */
 109#define LPFC_LBUF_SZ            128
 110
 111/* mailbox system shutdown options */
 112#define LPFC_MBX_NO_WAIT        0
 113#define LPFC_MBX_WAIT           1
 114
 115enum lpfc_polling_flags {
 116        ENABLE_FCP_RING_POLLING = 0x1,
 117        DISABLE_FCP_RING_INT    = 0x2
 118};
 119
 120struct perf_prof {
 121        uint16_t cmd_cpu[40];
 122        uint16_t rsp_cpu[40];
 123        uint16_t qh_cpu[40];
 124        uint16_t wqidx[40];
 125};
 126
 127/*
 128 * Provide for FC4 TYPE x28 - NVME.  The
 129 * bit mask for FCP and NVME is 0x8 identically
 130 * because they are 32 bit positions distance.
 131 */
 132#define LPFC_FC4_TYPE_BITMASK   0x00000100
 133
 134/* Provide DMA memory definitions the driver uses per port instance. */
 135struct lpfc_dmabuf {
 136        struct list_head list;
 137        void *virt;             /* virtual address ptr */
 138        dma_addr_t phys;        /* mapped address */
 139        uint32_t   buffer_tag;  /* used for tagged queue ring */
 140};
 141
 142struct lpfc_nvmet_ctxbuf {
 143        struct list_head list;
 144        struct lpfc_nvmet_rcv_ctx *context;
 145        struct lpfc_iocbq *iocbq;
 146        struct lpfc_sglq *sglq;
 147        struct work_struct defer_work;
 148};
 149
 150struct lpfc_dma_pool {
 151        struct lpfc_dmabuf   *elements;
 152        uint32_t    max_count;
 153        uint32_t    current_count;
 154};
 155
 156struct hbq_dmabuf {
 157        struct lpfc_dmabuf hbuf;
 158        struct lpfc_dmabuf dbuf;
 159        uint16_t total_size;
 160        uint16_t bytes_recv;
 161        uint32_t tag;
 162        struct lpfc_cq_event cq_event;
 163        unsigned long time_stamp;
 164        void *context;
 165};
 166
 167struct rqb_dmabuf {
 168        struct lpfc_dmabuf hbuf;
 169        struct lpfc_dmabuf dbuf;
 170        uint16_t total_size;
 171        uint16_t bytes_recv;
 172        uint16_t idx;
 173        struct lpfc_queue *hrq;   /* ptr to associated Header RQ */
 174        struct lpfc_queue *drq;   /* ptr to associated Data RQ */
 175};
 176
 177/* Priority bit.  Set value to exceed low water mark in lpfc_mem. */
 178#define MEM_PRI         0x100
 179
 180
 181/****************************************************************************/
 182/*      Device VPD save area                                                */
 183/****************************************************************************/
 184typedef struct lpfc_vpd {
 185        uint32_t status;        /* vpd status value */
 186        uint32_t length;        /* number of bytes actually returned */
 187        struct {
 188                uint32_t rsvd1; /* Revision numbers */
 189                uint32_t biuRev;
 190                uint32_t smRev;
 191                uint32_t smFwRev;
 192                uint32_t endecRev;
 193                uint16_t rBit;
 194                uint8_t fcphHigh;
 195                uint8_t fcphLow;
 196                uint8_t feaLevelHigh;
 197                uint8_t feaLevelLow;
 198                uint32_t postKernRev;
 199                uint32_t opFwRev;
 200                uint8_t opFwName[16];
 201                uint32_t sli1FwRev;
 202                uint8_t sli1FwName[16];
 203                uint32_t sli2FwRev;
 204                uint8_t sli2FwName[16];
 205        } rev;
 206        struct {
 207#ifdef __BIG_ENDIAN_BITFIELD
 208                uint32_t rsvd3  :19;  /* Reserved                             */
 209                uint32_t cdss   : 1;  /* Configure Data Security SLI          */
 210                uint32_t rsvd2  : 3;  /* Reserved                             */
 211                uint32_t cbg    : 1;  /* Configure BlockGuard                 */
 212                uint32_t cmv    : 1;  /* Configure Max VPIs                   */
 213                uint32_t ccrp   : 1;  /* Config Command Ring Polling          */
 214                uint32_t csah   : 1;  /* Configure Synchronous Abort Handling */
 215                uint32_t chbs   : 1;  /* Cofigure Host Backing store          */
 216                uint32_t cinb   : 1;  /* Enable Interrupt Notification Block  */
 217                uint32_t cerbm  : 1;  /* Configure Enhanced Receive Buf Mgmt  */
 218                uint32_t cmx    : 1;  /* Configure Max XRIs                   */
 219                uint32_t cmr    : 1;  /* Configure Max RPIs                   */
 220#else   /*  __LITTLE_ENDIAN */
 221                uint32_t cmr    : 1;  /* Configure Max RPIs                   */
 222                uint32_t cmx    : 1;  /* Configure Max XRIs                   */
 223                uint32_t cerbm  : 1;  /* Configure Enhanced Receive Buf Mgmt  */
 224                uint32_t cinb   : 1;  /* Enable Interrupt Notification Block  */
 225                uint32_t chbs   : 1;  /* Cofigure Host Backing store          */
 226                uint32_t csah   : 1;  /* Configure Synchronous Abort Handling */
 227                uint32_t ccrp   : 1;  /* Config Command Ring Polling          */
 228                uint32_t cmv    : 1;  /* Configure Max VPIs                   */
 229                uint32_t cbg    : 1;  /* Configure BlockGuard                 */
 230                uint32_t rsvd2  : 3;  /* Reserved                             */
 231                uint32_t cdss   : 1;  /* Configure Data Security SLI          */
 232                uint32_t rsvd3  :19;  /* Reserved                             */
 233#endif
 234        } sli3Feat;
 235} lpfc_vpd_t;
 236
 237
 238/*
 239 * lpfc stat counters
 240 */
 241struct lpfc_stats {
 242        /* Statistics for ELS commands */
 243        uint32_t elsLogiCol;
 244        uint32_t elsRetryExceeded;
 245        uint32_t elsXmitRetry;
 246        uint32_t elsDelayRetry;
 247        uint32_t elsRcvDrop;
 248        uint32_t elsRcvFrame;
 249        uint32_t elsRcvRSCN;
 250        uint32_t elsRcvRNID;
 251        uint32_t elsRcvFARP;
 252        uint32_t elsRcvFARPR;
 253        uint32_t elsRcvFLOGI;
 254        uint32_t elsRcvPLOGI;
 255        uint32_t elsRcvADISC;
 256        uint32_t elsRcvPDISC;
 257        uint32_t elsRcvFAN;
 258        uint32_t elsRcvLOGO;
 259        uint32_t elsRcvPRLO;
 260        uint32_t elsRcvPRLI;
 261        uint32_t elsRcvLIRR;
 262        uint32_t elsRcvRLS;
 263        uint32_t elsRcvRPS;
 264        uint32_t elsRcvRPL;
 265        uint32_t elsRcvRRQ;
 266        uint32_t elsRcvRTV;
 267        uint32_t elsRcvECHO;
 268        uint32_t elsRcvLCB;
 269        uint32_t elsRcvRDP;
 270        uint32_t elsXmitFLOGI;
 271        uint32_t elsXmitFDISC;
 272        uint32_t elsXmitPLOGI;
 273        uint32_t elsXmitPRLI;
 274        uint32_t elsXmitADISC;
 275        uint32_t elsXmitLOGO;
 276        uint32_t elsXmitSCR;
 277        uint32_t elsXmitRNID;
 278        uint32_t elsXmitFARP;
 279        uint32_t elsXmitFARPR;
 280        uint32_t elsXmitACC;
 281        uint32_t elsXmitLSRJT;
 282
 283        uint32_t frameRcvBcast;
 284        uint32_t frameRcvMulti;
 285        uint32_t strayXmitCmpl;
 286        uint32_t frameXmitDelay;
 287        uint32_t xriCmdCmpl;
 288        uint32_t xriStatErr;
 289        uint32_t LinkUp;
 290        uint32_t LinkDown;
 291        uint32_t LinkMultiEvent;
 292        uint32_t NoRcvBuf;
 293        uint32_t fcpCmd;
 294        uint32_t fcpCmpl;
 295        uint32_t fcpRspErr;
 296        uint32_t fcpRemoteStop;
 297        uint32_t fcpPortRjt;
 298        uint32_t fcpPortBusy;
 299        uint32_t fcpError;
 300        uint32_t fcpLocalErr;
 301};
 302
 303struct lpfc_hba;
 304
 305
 306enum discovery_state {
 307        LPFC_VPORT_UNKNOWN     =  0,    /* vport state is unknown */
 308        LPFC_VPORT_FAILED      =  1,    /* vport has failed */
 309        LPFC_LOCAL_CFG_LINK    =  6,    /* local NPORT Id configured */
 310        LPFC_FLOGI             =  7,    /* FLOGI sent to Fabric */
 311        LPFC_FDISC             =  8,    /* FDISC sent for vport */
 312        LPFC_FABRIC_CFG_LINK   =  9,    /* Fabric assigned NPORT Id
 313                                         * configured */
 314        LPFC_NS_REG            =  10,   /* Register with NameServer */
 315        LPFC_NS_QRY            =  11,   /* Query NameServer for NPort ID list */
 316        LPFC_BUILD_DISC_LIST   =  12,   /* Build ADISC and PLOGI lists for
 317                                         * device authentication / discovery */
 318        LPFC_DISC_AUTH         =  13,   /* Processing ADISC list */
 319        LPFC_VPORT_READY       =  32,
 320};
 321
 322enum hba_state {
 323        LPFC_LINK_UNKNOWN    =   0,   /* HBA state is unknown */
 324        LPFC_WARM_START      =   1,   /* HBA state after selective reset */
 325        LPFC_INIT_START      =   2,   /* Initial state after board reset */
 326        LPFC_INIT_MBX_CMDS   =   3,   /* Initialize HBA with mbox commands */
 327        LPFC_LINK_DOWN       =   4,   /* HBA initialized, link is down */
 328        LPFC_LINK_UP         =   5,   /* Link is up  - issue READ_LA */
 329        LPFC_CLEAR_LA        =   6,   /* authentication cmplt - issue
 330                                       * CLEAR_LA */
 331        LPFC_HBA_READY       =  32,
 332        LPFC_HBA_ERROR       =  -1
 333};
 334
 335struct lpfc_trunk_link_state {
 336        enum hba_state state;
 337        uint8_t fault;
 338};
 339
 340struct lpfc_trunk_link  {
 341        struct lpfc_trunk_link_state link0,
 342                                     link1,
 343                                     link2,
 344                                     link3;
 345};
 346
 347struct lpfc_vport {
 348        struct lpfc_hba *phba;
 349        struct list_head listentry;
 350        uint8_t port_type;
 351#define LPFC_PHYSICAL_PORT 1
 352#define LPFC_NPIV_PORT  2
 353#define LPFC_FABRIC_PORT 3
 354        enum discovery_state port_state;
 355
 356        uint16_t vpi;
 357        uint16_t vfi;
 358        uint8_t vpi_state;
 359#define LPFC_VPI_REGISTERED     0x1
 360
 361        uint32_t fc_flag;       /* FC flags */
 362/* Several of these flags are HBA centric and should be moved to
 363 * phba->link_flag (e.g. FC_PTP, FC_PUBLIC_LOOP)
 364 */
 365#define FC_PT2PT                0x1      /* pt2pt with no fabric */
 366#define FC_PT2PT_PLOGI          0x2      /* pt2pt initiate PLOGI */
 367#define FC_DISC_TMO             0x4      /* Discovery timer running */
 368#define FC_PUBLIC_LOOP          0x8      /* Public loop */
 369#define FC_LBIT                 0x10     /* LOGIN bit in loopinit set */
 370#define FC_RSCN_MODE            0x20     /* RSCN cmd rcv'ed */
 371#define FC_NLP_MORE             0x40     /* More node to process in node tbl */
 372#define FC_OFFLINE_MODE         0x80     /* Interface is offline for diag */
 373#define FC_FABRIC               0x100    /* We are fabric attached */
 374#define FC_VPORT_LOGO_RCVD      0x200    /* LOGO received on vport */
 375#define FC_RSCN_DISCOVERY       0x400    /* Auth all devices after RSCN */
 376#define FC_LOGO_RCVD_DID_CHNG   0x800    /* FDISC on phys port detect DID chng*/
 377#define FC_SCSI_SCAN_TMO        0x4000   /* scsi scan timer running */
 378#define FC_ABORT_DISCOVERY      0x8000   /* we want to abort discovery */
 379#define FC_NDISC_ACTIVE         0x10000  /* NPort discovery active */
 380#define FC_BYPASSED_MODE        0x20000  /* NPort is in bypassed mode */
 381#define FC_VPORT_NEEDS_REG_VPI  0x80000  /* Needs to have its vpi registered */
 382#define FC_RSCN_DEFERRED        0x100000 /* A deferred RSCN being processed */
 383#define FC_VPORT_NEEDS_INIT_VPI 0x200000 /* Need to INIT_VPI before FDISC */
 384#define FC_VPORT_CVL_RCVD       0x400000 /* VLink failed due to CVL      */
 385#define FC_VFI_REGISTERED       0x800000 /* VFI is registered */
 386#define FC_FDISC_COMPLETED      0x1000000/* FDISC completed */
 387#define FC_DISC_DELAYED         0x2000000/* Delay NPort discovery */
 388
 389        uint32_t ct_flags;
 390#define FC_CT_RFF_ID            0x1      /* RFF_ID accepted by switch */
 391#define FC_CT_RNN_ID            0x2      /* RNN_ID accepted by switch */
 392#define FC_CT_RSNN_NN           0x4      /* RSNN_NN accepted by switch */
 393#define FC_CT_RSPN_ID           0x8      /* RSPN_ID accepted by switch */
 394#define FC_CT_RFT_ID            0x10     /* RFT_ID accepted by switch */
 395
 396        struct list_head fc_nodes;
 397
 398        /* Keep counters for the number of entries in each list. */
 399        uint16_t fc_plogi_cnt;
 400        uint16_t fc_adisc_cnt;
 401        uint16_t fc_reglogin_cnt;
 402        uint16_t fc_prli_cnt;
 403        uint16_t fc_unmap_cnt;
 404        uint16_t fc_map_cnt;
 405        uint16_t fc_npr_cnt;
 406        uint16_t fc_unused_cnt;
 407        struct serv_parm fc_sparam;     /* buffer for our service parameters */
 408
 409        uint32_t fc_myDID;      /* fibre channel S_ID */
 410        uint32_t fc_prevDID;    /* previous fibre channel S_ID */
 411        struct lpfc_name fabric_portname;
 412        struct lpfc_name fabric_nodename;
 413
 414        int32_t stopped;   /* HBA has not been restarted since last ERATT */
 415        uint8_t fc_linkspeed;   /* Link speed after last READ_LA */
 416
 417        uint32_t num_disc_nodes;        /* in addition to hba_state */
 418        uint32_t gidft_inp;             /* cnt of outstanding GID_FTs */
 419
 420        uint32_t fc_nlp_cnt;    /* outstanding NODELIST requests */
 421        uint32_t fc_rscn_id_cnt;        /* count of RSCNs payloads in list */
 422        uint32_t fc_rscn_flush;         /* flag use of fc_rscn_id_list */
 423        struct lpfc_dmabuf *fc_rscn_id_list[FC_MAX_HOLD_RSCN];
 424        struct lpfc_name fc_nodename;   /* fc nodename */
 425        struct lpfc_name fc_portname;   /* fc portname */
 426
 427        struct lpfc_work_evt disc_timeout_evt;
 428
 429        struct timer_list fc_disctmo;   /* Discovery rescue timer */
 430        uint8_t fc_ns_retry;    /* retries for fabric nameserver */
 431        uint32_t fc_prli_sent;  /* cntr for outstanding PRLIs */
 432
 433        spinlock_t work_port_lock;
 434        uint32_t work_port_events; /* Timeout to be handled  */
 435#define WORKER_DISC_TMO                0x1      /* vport: Discovery timeout */
 436#define WORKER_ELS_TMO                 0x2      /* vport: ELS timeout */
 437#define WORKER_DELAYED_DISC_TMO        0x8      /* vport: delayed discovery */
 438
 439#define WORKER_MBOX_TMO                0x100    /* hba: MBOX timeout */
 440#define WORKER_HB_TMO                  0x200    /* hba: Heart beat timeout */
 441#define WORKER_FABRIC_BLOCK_TMO        0x400    /* hba: fabric block timeout */
 442#define WORKER_RAMP_DOWN_QUEUE         0x800    /* hba: Decrease Q depth */
 443#define WORKER_RAMP_UP_QUEUE           0x1000   /* hba: Increase Q depth */
 444#define WORKER_SERVICE_TXQ             0x2000   /* hba: IOCBs on the txq */
 445
 446        struct timer_list els_tmofunc;
 447        struct timer_list delayed_disc_tmo;
 448
 449        int unreg_vpi_cmpl;
 450
 451        uint8_t load_flag;
 452#define FC_LOADING              0x1     /* HBA in process of loading drvr */
 453#define FC_UNLOADING            0x2     /* HBA in process of unloading drvr */
 454#define FC_ALLOW_FDMI           0x4     /* port is ready for FDMI requests */
 455        /* Vport Config Parameters */
 456        uint32_t cfg_scan_down;
 457        uint32_t cfg_lun_queue_depth;
 458        uint32_t cfg_nodev_tmo;
 459        uint32_t cfg_devloss_tmo;
 460        uint32_t cfg_restrict_login;
 461        uint32_t cfg_peer_port_login;
 462        uint32_t cfg_fcp_class;
 463        uint32_t cfg_use_adisc;
 464        uint32_t cfg_discovery_threads;
 465        uint32_t cfg_log_verbose;
 466        uint32_t cfg_enable_fc4_type;
 467        uint32_t cfg_max_luns;
 468        uint32_t cfg_enable_da_id;
 469        uint32_t cfg_max_scsicmpl_time;
 470        uint32_t cfg_tgt_queue_depth;
 471        uint32_t cfg_first_burst_size;
 472        uint32_t dev_loss_tmo_changed;
 473
 474        struct fc_vport *fc_vport;
 475
 476#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
 477        struct dentry *debug_disc_trc;
 478        struct dentry *debug_nodelist;
 479        struct dentry *debug_nvmestat;
 480        struct dentry *debug_scsistat;
 481        struct dentry *debug_nvmektime;
 482        struct dentry *debug_cpucheck;
 483        struct dentry *vport_debugfs_root;
 484        struct lpfc_debugfs_trc *disc_trc;
 485        atomic_t disc_trc_cnt;
 486#endif
 487        uint8_t stat_data_enabled;
 488        uint8_t stat_data_blocked;
 489        struct list_head rcv_buffer_list;
 490        unsigned long rcv_buffer_time_stamp;
 491        uint32_t vport_flag;
 492#define STATIC_VPORT    1
 493#define FAWWPN_SET      2
 494#define FAWWPN_PARAM_CHG        4
 495
 496        uint16_t fdmi_num_disc;
 497        uint32_t fdmi_hba_mask;
 498        uint32_t fdmi_port_mask;
 499
 500        /* There is a single nvme instance per vport. */
 501        struct nvme_fc_local_port *localport;
 502        uint8_t  nvmei_support; /* driver supports NVME Initiator */
 503        uint32_t last_fcp_wqidx;
 504        uint32_t rcv_flogi_cnt; /* How many unsol FLOGIs ACK'd. */
 505};
 506
 507struct hbq_s {
 508        uint16_t entry_count;     /* Current number of HBQ slots */
 509        uint16_t buffer_count;    /* Current number of buffers posted */
 510        uint32_t next_hbqPutIdx;  /* Index to next HBQ slot to use */
 511        uint32_t hbqPutIdx;       /* HBQ slot to use */
 512        uint32_t local_hbqGetIdx; /* Local copy of Get index from Port */
 513        void    *hbq_virt;        /* Virtual ptr to this hbq */
 514        struct list_head hbq_buffer_list;  /* buffers assigned to this HBQ */
 515                                  /* Callback for HBQ buffer allocation */
 516        struct hbq_dmabuf *(*hbq_alloc_buffer) (struct lpfc_hba *);
 517                                  /* Callback for HBQ buffer free */
 518        void               (*hbq_free_buffer) (struct lpfc_hba *,
 519                                               struct hbq_dmabuf *);
 520};
 521
 522/* this matches the position in the lpfc_hbq_defs array */
 523#define LPFC_ELS_HBQ    0
 524#define LPFC_MAX_HBQS   1
 525
 526enum hba_temp_state {
 527        HBA_NORMAL_TEMP,
 528        HBA_OVER_TEMP
 529};
 530
 531enum intr_type_t {
 532        NONE = 0,
 533        INTx,
 534        MSI,
 535        MSIX,
 536};
 537
 538#define LPFC_CT_CTX_MAX         64
 539struct unsol_rcv_ct_ctx {
 540        uint32_t ctxt_id;
 541        uint32_t SID;
 542        uint32_t valid;
 543#define UNSOL_INVALID           0
 544#define UNSOL_VALID             1
 545        uint16_t oxid;
 546        uint16_t rxid;
 547};
 548
 549#define LPFC_USER_LINK_SPEED_AUTO       0       /* auto select (default)*/
 550#define LPFC_USER_LINK_SPEED_1G         1       /* 1 Gigabaud */
 551#define LPFC_USER_LINK_SPEED_2G         2       /* 2 Gigabaud */
 552#define LPFC_USER_LINK_SPEED_4G         4       /* 4 Gigabaud */
 553#define LPFC_USER_LINK_SPEED_8G         8       /* 8 Gigabaud */
 554#define LPFC_USER_LINK_SPEED_10G        10      /* 10 Gigabaud */
 555#define LPFC_USER_LINK_SPEED_16G        16      /* 16 Gigabaud */
 556#define LPFC_USER_LINK_SPEED_32G        32      /* 32 Gigabaud */
 557#define LPFC_USER_LINK_SPEED_64G        64      /* 64 Gigabaud */
 558#define LPFC_USER_LINK_SPEED_MAX        LPFC_USER_LINK_SPEED_64G
 559
 560#define LPFC_LINK_SPEED_STRING "0, 1, 2, 4, 8, 10, 16, 32, 64"
 561
 562enum nemb_type {
 563        nemb_mse = 1,
 564        nemb_hbd
 565};
 566
 567enum mbox_type {
 568        mbox_rd = 1,
 569        mbox_wr
 570};
 571
 572enum dma_type {
 573        dma_mbox = 1,
 574        dma_ebuf
 575};
 576
 577enum sta_type {
 578        sta_pre_addr = 1,
 579        sta_pos_addr
 580};
 581
 582struct lpfc_mbox_ext_buf_ctx {
 583        uint32_t state;
 584#define LPFC_BSG_MBOX_IDLE              0
 585#define LPFC_BSG_MBOX_HOST              1
 586#define LPFC_BSG_MBOX_PORT              2
 587#define LPFC_BSG_MBOX_DONE              3
 588#define LPFC_BSG_MBOX_ABTS              4
 589        enum nemb_type nembType;
 590        enum mbox_type mboxType;
 591        uint32_t numBuf;
 592        uint32_t mbxTag;
 593        uint32_t seqNum;
 594        struct lpfc_dmabuf *mbx_dmabuf;
 595        struct list_head ext_dmabuf_list;
 596};
 597
 598struct lpfc_epd_pool {
 599        /* Expedite pool */
 600        struct list_head list;
 601        u32 count;
 602        spinlock_t lock;        /* lock for expedite pool */
 603};
 604
 605struct lpfc_ras_fwlog {
 606        uint8_t *fwlog_buff;
 607        uint32_t fw_buffcount; /* Buffer size posted to FW */
 608#define LPFC_RAS_BUFF_ENTERIES  16      /* Each entry can hold max of 64k */
 609#define LPFC_RAS_MAX_ENTRY_SIZE (64 * 1024)
 610#define LPFC_RAS_MIN_BUFF_POST_SIZE (256 * 1024)
 611#define LPFC_RAS_MAX_BUFF_POST_SIZE (1024 * 1024)
 612        uint32_t fw_loglevel; /* Log level set */
 613        struct lpfc_dmabuf lwpd;
 614        struct list_head fwlog_buff_list;
 615
 616        /* RAS support status on adapter */
 617        bool ras_hwsupport; /* RAS Support available on HW or not */
 618        bool ras_enabled;   /* Ras Enabled for the function */
 619#define LPFC_RAS_DISABLE_LOGGING 0x00
 620#define LPFC_RAS_ENABLE_LOGGING 0x01
 621        bool ras_active;    /* RAS logging running state */
 622};
 623
 624struct lpfc_hba {
 625        /* SCSI interface function jump table entries */
 626        struct lpfc_io_buf * (*lpfc_get_scsi_buf)
 627                (struct lpfc_hba *phba, struct lpfc_nodelist *ndlp,
 628                struct scsi_cmnd *cmnd);
 629        int (*lpfc_scsi_prep_dma_buf)
 630                (struct lpfc_hba *, struct lpfc_io_buf *);
 631        void (*lpfc_scsi_unprep_dma_buf)
 632                (struct lpfc_hba *, struct lpfc_io_buf *);
 633        void (*lpfc_release_scsi_buf)
 634                (struct lpfc_hba *, struct lpfc_io_buf *);
 635        void (*lpfc_rampdown_queue_depth)
 636                (struct lpfc_hba *);
 637        void (*lpfc_scsi_prep_cmnd)
 638                (struct lpfc_vport *, struct lpfc_io_buf *,
 639                 struct lpfc_nodelist *);
 640
 641        /* IOCB interface function jump table entries */
 642        int (*__lpfc_sli_issue_iocb)
 643                (struct lpfc_hba *, uint32_t,
 644                 struct lpfc_iocbq *, uint32_t);
 645        void (*__lpfc_sli_release_iocbq)(struct lpfc_hba *,
 646                         struct lpfc_iocbq *);
 647        int (*lpfc_hba_down_post)(struct lpfc_hba *phba);
 648        IOCB_t * (*lpfc_get_iocb_from_iocbq)
 649                (struct lpfc_iocbq *);
 650        void (*lpfc_scsi_cmd_iocb_cmpl)
 651                (struct lpfc_hba *, struct lpfc_iocbq *, struct lpfc_iocbq *);
 652
 653        /* MBOX interface function jump table entries */
 654        int (*lpfc_sli_issue_mbox)
 655                (struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t);
 656
 657        /* Slow-path IOCB process function jump table entries */
 658        void (*lpfc_sli_handle_slow_ring_event)
 659                (struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
 660                 uint32_t mask);
 661
 662        /* INIT device interface function jump table entries */
 663        int (*lpfc_sli_hbq_to_firmware)
 664                (struct lpfc_hba *, uint32_t, struct hbq_dmabuf *);
 665        int (*lpfc_sli_brdrestart)
 666                (struct lpfc_hba *);
 667        int (*lpfc_sli_brdready)
 668                (struct lpfc_hba *, uint32_t);
 669        void (*lpfc_handle_eratt)
 670                (struct lpfc_hba *);
 671        void (*lpfc_stop_port)
 672                (struct lpfc_hba *);
 673        int (*lpfc_hba_init_link)
 674                (struct lpfc_hba *, uint32_t);
 675        int (*lpfc_hba_down_link)
 676                (struct lpfc_hba *, uint32_t);
 677        int (*lpfc_selective_reset)
 678                (struct lpfc_hba *);
 679
 680        int (*lpfc_bg_scsi_prep_dma_buf)
 681                (struct lpfc_hba *, struct lpfc_io_buf *);
 682        /* Add new entries here */
 683
 684        /* expedite pool */
 685        struct lpfc_epd_pool epd_pool;
 686
 687        /* SLI4 specific HBA data structure */
 688        struct lpfc_sli4_hba sli4_hba;
 689
 690        struct workqueue_struct *wq;
 691        struct delayed_work     eq_delay_work;
 692
 693        struct lpfc_sli sli;
 694        uint8_t pci_dev_grp;    /* lpfc PCI dev group: 0x0, 0x1, 0x2,... */
 695        uint32_t sli_rev;               /* SLI2, SLI3, or SLI4 */
 696        uint32_t sli3_options;          /* Mask of enabled SLI3 options */
 697#define LPFC_SLI3_HBQ_ENABLED           0x01
 698#define LPFC_SLI3_NPIV_ENABLED          0x02
 699#define LPFC_SLI3_VPORT_TEARDOWN        0x04
 700#define LPFC_SLI3_CRP_ENABLED           0x08
 701#define LPFC_SLI3_BG_ENABLED            0x20
 702#define LPFC_SLI3_DSS_ENABLED           0x40
 703#define LPFC_SLI4_PERFH_ENABLED         0x80
 704#define LPFC_SLI4_PHWQ_ENABLED          0x100
 705        uint32_t iocb_cmd_size;
 706        uint32_t iocb_rsp_size;
 707
 708        struct lpfc_trunk_link  trunk_link;
 709        enum hba_state link_state;
 710        uint32_t link_flag;     /* link state flags */
 711#define LS_LOOPBACK_MODE      0x1       /* NPort is in Loopback mode */
 712                                        /* This flag is set while issuing */
 713                                        /* INIT_LINK mailbox command */
 714#define LS_NPIV_FAB_SUPPORTED 0x2       /* Fabric supports NPIV */
 715#define LS_IGNORE_ERATT       0x4       /* intr handler should ignore ERATT */
 716#define LS_MDS_LINK_DOWN      0x8       /* MDS Diagnostics Link Down */
 717#define LS_MDS_LOOPBACK      0x10       /* MDS Diagnostics Link Up (Loopback) */
 718
 719        uint32_t hba_flag;      /* hba generic flags */
 720#define HBA_ERATT_HANDLED       0x1 /* This flag is set when eratt handled */
 721#define DEFER_ERATT             0x2 /* Deferred error attention in progress */
 722#define HBA_FCOE_MODE           0x4 /* HBA function in FCoE Mode */
 723#define HBA_SP_QUEUE_EVT        0x8 /* Slow-path qevt posted to worker thread*/
 724#define HBA_POST_RECEIVE_BUFFER 0x10 /* Rcv buffers need to be posted */
 725#define ELS_XRI_ABORT_EVENT     0x40
 726#define ASYNC_EVENT             0x80
 727#define LINK_DISABLED           0x100 /* Link disabled by user */
 728#define FCF_TS_INPROG           0x200 /* FCF table scan in progress */
 729#define FCF_RR_INPROG           0x400 /* FCF roundrobin flogi in progress */
 730#define HBA_FIP_SUPPORT         0x800 /* FIP support in HBA */
 731#define HBA_AER_ENABLED         0x1000 /* AER enabled with HBA */
 732#define HBA_DEVLOSS_TMO         0x2000 /* HBA in devloss timeout */
 733#define HBA_RRQ_ACTIVE          0x4000 /* process the rrq active list */
 734#define HBA_FCP_IOQ_FLUSH       0x8000 /* FCP I/O queues being flushed */
 735#define HBA_FW_DUMP_OP          0x10000 /* Skips fn reset before FW dump */
 736#define HBA_RECOVERABLE_UE      0x20000 /* Firmware supports recoverable UE */
 737#define HBA_FORCED_LINK_SPEED   0x40000 /*
 738                                         * Firmware supports Forced Link Speed
 739                                         * capability
 740                                         */
 741#define HBA_NVME_IOQ_FLUSH      0x80000 /* NVME IO queues flushed. */
 742#define HBA_FLOGI_ISSUED        0x100000 /* FLOGI was issued */
 743
 744        uint32_t fcp_ring_in_use; /* When polling test if intr-hndlr active*/
 745        struct lpfc_dmabuf slim2p;
 746
 747        MAILBOX_t *mbox;
 748        uint32_t *mbox_ext;
 749        struct lpfc_mbox_ext_buf_ctx mbox_ext_buf_ctx;
 750        uint32_t ha_copy;
 751        struct _PCB *pcb;
 752        struct _IOCB *IOCBs;
 753
 754        struct lpfc_dmabuf hbqslimp;
 755
 756        uint16_t pci_cfg_value;
 757
 758        uint8_t fc_linkspeed;   /* Link speed after last READ_LA */
 759
 760        uint32_t fc_eventTag;   /* event tag for link attention */
 761        uint32_t link_events;
 762
 763        /* These fields used to be binfo */
 764        uint32_t fc_pref_DID;   /* preferred D_ID */
 765        uint8_t  fc_pref_ALPA;  /* preferred AL_PA */
 766        uint32_t fc_edtovResol; /* E_D_TOV timer resolution */
 767        uint32_t fc_edtov;      /* E_D_TOV timer value */
 768        uint32_t fc_arbtov;     /* ARB_TOV timer value */
 769        uint32_t fc_ratov;      /* R_A_TOV timer value */
 770        uint32_t fc_rttov;      /* R_T_TOV timer value */
 771        uint32_t fc_altov;      /* AL_TOV timer value */
 772        uint32_t fc_crtov;      /* C_R_TOV timer value */
 773
 774        struct serv_parm fc_fabparam;   /* fabric service parameters buffer */
 775        uint8_t alpa_map[128];  /* AL_PA map from READ_LA */
 776
 777        uint32_t lmt;
 778
 779        uint32_t fc_topology;   /* link topology, from LINK INIT */
 780        uint32_t fc_topology_changed;   /* link topology, from LINK INIT */
 781
 782        struct lpfc_stats fc_stat;
 783
 784        struct lpfc_nodelist fc_fcpnodev; /* nodelist entry for no device */
 785        uint32_t nport_event_cnt;       /* timestamp for nlplist entry */
 786
 787        uint8_t  wwnn[8];
 788        uint8_t  wwpn[8];
 789        uint32_t RandomData[7];
 790        uint8_t  fcp_embed_io;
 791        uint8_t  nvme_support;  /* Firmware supports NVME */
 792        uint8_t  nvmet_support; /* driver supports NVMET */
 793#define LPFC_NVMET_MAX_PORTS    32
 794        uint8_t  mds_diags_support;
 795        uint8_t  bbcredit_support;
 796        uint8_t  enab_exp_wqcq_pages;
 797
 798        /* HBA Config Parameters */
 799        uint32_t cfg_ack0;
 800        uint32_t cfg_xri_rebalancing;
 801        uint32_t cfg_enable_npiv;
 802        uint32_t cfg_enable_rrq;
 803        uint32_t cfg_topology;
 804        uint32_t cfg_link_speed;
 805#define LPFC_FCF_FOV 1          /* Fast fcf failover */
 806#define LPFC_FCF_PRIORITY 2     /* Priority fcf failover */
 807        uint32_t cfg_fcf_failover_policy;
 808        uint32_t cfg_fcp_io_sched;
 809        uint32_t cfg_ns_query;
 810        uint32_t cfg_fcp2_no_tgt_reset;
 811        uint32_t cfg_cr_delay;
 812        uint32_t cfg_cr_count;
 813        uint32_t cfg_multi_ring_support;
 814        uint32_t cfg_multi_ring_rctl;
 815        uint32_t cfg_multi_ring_type;
 816        uint32_t cfg_poll;
 817        uint32_t cfg_poll_tmo;
 818        uint32_t cfg_task_mgmt_tmo;
 819        uint32_t cfg_use_msi;
 820        uint32_t cfg_auto_imax;
 821        uint32_t cfg_fcp_imax;
 822        uint32_t cfg_cq_poll_threshold;
 823        uint32_t cfg_cq_max_proc_limit;
 824        uint32_t cfg_fcp_cpu_map;
 825        uint32_t cfg_fcp_mq_threshold;
 826        uint32_t cfg_hdw_queue;
 827        uint32_t cfg_irq_chann;
 828        uint32_t cfg_suppress_rsp;
 829        uint32_t cfg_nvme_oas;
 830        uint32_t cfg_nvme_embed_cmd;
 831        uint32_t cfg_nvmet_mrq_post;
 832        uint32_t cfg_nvmet_mrq;
 833        uint32_t cfg_enable_nvmet;
 834        uint32_t cfg_nvme_enable_fb;
 835        uint32_t cfg_nvmet_fb_size;
 836        uint32_t cfg_total_seg_cnt;
 837        uint32_t cfg_sg_seg_cnt;
 838        uint32_t cfg_nvme_seg_cnt;
 839        uint32_t cfg_scsi_seg_cnt;
 840        uint32_t cfg_sg_dma_buf_size;
 841        uint64_t cfg_soft_wwnn;
 842        uint64_t cfg_soft_wwpn;
 843        uint32_t cfg_hba_queue_depth;
 844        uint32_t cfg_enable_hba_reset;
 845        uint32_t cfg_enable_hba_heartbeat;
 846        uint32_t cfg_fof;
 847        uint32_t cfg_EnableXLane;
 848        uint8_t cfg_oas_tgt_wwpn[8];
 849        uint8_t cfg_oas_vpt_wwpn[8];
 850        uint32_t cfg_oas_lun_state;
 851#define OAS_LUN_ENABLE  1
 852#define OAS_LUN_DISABLE 0
 853        uint32_t cfg_oas_lun_status;
 854#define OAS_LUN_STATUS_EXISTS   0x01
 855        uint32_t cfg_oas_flags;
 856#define OAS_FIND_ANY_VPORT      0x01
 857#define OAS_FIND_ANY_TARGET     0x02
 858#define OAS_LUN_VALID   0x04
 859        uint32_t cfg_oas_priority;
 860        uint32_t cfg_XLanePriority;
 861        uint32_t cfg_enable_bg;
 862        uint32_t cfg_prot_mask;
 863        uint32_t cfg_prot_guard;
 864        uint32_t cfg_hostmem_hgp;
 865        uint32_t cfg_log_verbose;
 866        uint32_t cfg_enable_fc4_type;
 867        uint32_t cfg_aer_support;
 868        uint32_t cfg_sriov_nr_virtfn;
 869        uint32_t cfg_request_firmware_upgrade;
 870        uint32_t cfg_iocb_cnt;
 871        uint32_t cfg_suppress_link_up;
 872        uint32_t cfg_rrq_xri_bitmap_sz;
 873        uint32_t cfg_delay_discovery;
 874        uint32_t cfg_sli_mode;
 875#define LPFC_INITIALIZE_LINK              0     /* do normal init_link mbox */
 876#define LPFC_DELAY_INIT_LINK              1     /* layered driver hold off */
 877#define LPFC_DELAY_INIT_LINK_INDEFINITELY 2     /* wait, manual intervention */
 878        uint32_t cfg_enable_dss;
 879        uint32_t cfg_fdmi_on;
 880#define LPFC_FDMI_NO_SUPPORT    0       /* FDMI not supported */
 881#define LPFC_FDMI_SUPPORT       1       /* FDMI supported? */
 882        uint32_t cfg_enable_SmartSAN;
 883        uint32_t cfg_enable_mds_diags;
 884        uint32_t cfg_ras_fwlog_level;
 885        uint32_t cfg_ras_fwlog_buffsize;
 886        uint32_t cfg_ras_fwlog_func;
 887        uint32_t cfg_enable_bbcr;       /* Enable BB Credit Recovery */
 888        uint32_t cfg_enable_dpp;        /* Enable Direct Packet Push */
 889#define LPFC_ENABLE_FCP  1
 890#define LPFC_ENABLE_NVME 2
 891#define LPFC_ENABLE_BOTH 3
 892        uint32_t cfg_enable_pbde;
 893        struct nvmet_fc_target_port *targetport;
 894        lpfc_vpd_t vpd;         /* vital product data */
 895
 896        struct pci_dev *pcidev;
 897        struct list_head      work_list;
 898        uint32_t              work_ha;      /* Host Attention Bits for WT */
 899        uint32_t              work_ha_mask; /* HA Bits owned by WT        */
 900        uint32_t              work_hs;      /* HS stored in case of ERRAT */
 901        uint32_t              work_status[2]; /* Extra status from SLIM */
 902
 903        wait_queue_head_t    work_waitq;
 904        struct task_struct   *worker_thread;
 905        unsigned long data_flags;
 906
 907        uint32_t hbq_in_use;            /* HBQs in use flag */
 908        uint32_t hbq_count;             /* Count of configured HBQs */
 909        struct hbq_s hbqs[LPFC_MAX_HBQS]; /* local copy of hbq indicies  */
 910
 911        atomic_t fcp_qidx;         /* next FCP WQ (RR Policy) */
 912        atomic_t nvme_qidx;        /* next NVME WQ (RR Policy) */
 913
 914        phys_addr_t pci_bar0_map;     /* Physical address for PCI BAR0 */
 915        phys_addr_t pci_bar1_map;     /* Physical address for PCI BAR1 */
 916        phys_addr_t pci_bar2_map;     /* Physical address for PCI BAR2 */
 917        void __iomem *slim_memmap_p;    /* Kernel memory mapped address for
 918                                           PCI BAR0 */
 919        void __iomem *ctrl_regs_memmap_p;/* Kernel memory mapped address for
 920                                            PCI BAR2 */
 921
 922        void __iomem *pci_bar0_memmap_p; /* Kernel memory mapped address for
 923                                            PCI BAR0 with dual-ULP support */
 924        void __iomem *pci_bar2_memmap_p; /* Kernel memory mapped address for
 925                                            PCI BAR2 with dual-ULP support */
 926        void __iomem *pci_bar4_memmap_p; /* Kernel memory mapped address for
 927                                            PCI BAR4 with dual-ULP support */
 928#define PCI_64BIT_BAR0  0
 929#define PCI_64BIT_BAR2  2
 930#define PCI_64BIT_BAR4  4
 931        void __iomem *MBslimaddr;       /* virtual address for mbox cmds */
 932        void __iomem *HAregaddr;        /* virtual address for host attn reg */
 933        void __iomem *CAregaddr;        /* virtual address for chip attn reg */
 934        void __iomem *HSregaddr;        /* virtual address for host status
 935                                           reg */
 936        void __iomem *HCregaddr;        /* virtual address for host ctl reg */
 937
 938        struct lpfc_hgp __iomem *host_gp; /* Host side get/put pointers */
 939        struct lpfc_pgp   *port_gp;
 940        uint32_t __iomem  *hbq_put;     /* Address in SLIM to HBQ put ptrs */
 941        uint32_t          *hbq_get;     /* Host mem address of HBQ get ptrs */
 942
 943        int brd_no;                     /* FC board number */
 944        char SerialNumber[32];          /* adapter Serial Number */
 945        char OptionROMVersion[32];      /* adapter BIOS / Fcode version */
 946        char BIOSVersion[16];           /* Boot BIOS version */
 947        char ModelDesc[256];            /* Model Description */
 948        char ModelName[80];             /* Model Name */
 949        char ProgramType[256];          /* Program Type */
 950        char Port[20];                  /* Port No */
 951        uint8_t vpd_flag;               /* VPD data flag */
 952
 953#define VPD_MODEL_DESC      0x1         /* valid vpd model description */
 954#define VPD_MODEL_NAME      0x2         /* valid vpd model name */
 955#define VPD_PROGRAM_TYPE    0x4         /* valid vpd program type */
 956#define VPD_PORT            0x8         /* valid vpd port data */
 957#define VPD_MASK            0xf         /* mask for any vpd data */
 958
 959        uint8_t soft_wwn_enable;
 960
 961        struct timer_list fcp_poll_timer;
 962        struct timer_list eratt_poll;
 963        uint32_t eratt_poll_interval;
 964
 965        uint64_t bg_guard_err_cnt;
 966        uint64_t bg_apptag_err_cnt;
 967        uint64_t bg_reftag_err_cnt;
 968
 969        /* fastpath list. */
 970        spinlock_t scsi_buf_list_get_lock;  /* SCSI buf alloc list lock */
 971        spinlock_t scsi_buf_list_put_lock;  /* SCSI buf free list lock */
 972        struct list_head lpfc_scsi_buf_list_get;
 973        struct list_head lpfc_scsi_buf_list_put;
 974        uint32_t total_scsi_bufs;
 975        struct list_head lpfc_iocb_list;
 976        uint32_t total_iocbq_bufs;
 977        struct list_head active_rrq_list;
 978        spinlock_t hbalock;
 979
 980        /* dma_mem_pools */
 981        struct dma_pool *lpfc_sg_dma_buf_pool;
 982        struct dma_pool *lpfc_mbuf_pool;
 983        struct dma_pool *lpfc_hrb_pool; /* header receive buffer pool */
 984        struct dma_pool *lpfc_drb_pool; /* data receive buffer pool */
 985        struct dma_pool *lpfc_nvmet_drb_pool; /* data receive buffer pool */
 986        struct dma_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */
 987        struct dma_pool *txrdy_payload_pool;
 988        struct lpfc_dma_pool lpfc_mbuf_safety_pool;
 989
 990        mempool_t *mbox_mem_pool;
 991        mempool_t *nlp_mem_pool;
 992        mempool_t *rrq_pool;
 993        mempool_t *active_rrq_pool;
 994
 995        struct fc_host_statistics link_stats;
 996        enum intr_type_t intr_type;
 997        uint32_t intr_mode;
 998#define LPFC_INTR_ERROR 0xFFFFFFFF
 999        struct list_head port_list;
1000        spinlock_t port_list_lock;      /* lock for port_list mutations */

1001        struct lpfc_vport *pport;       /* physical lpfc_vport pointer */
1002        uint16_t max_vpi;               /* Maximum virtual nports */
1003#define LPFC_MAX_VPI    0xFF            /* Max number VPI supported 0 - 0xff */
1004#define LPFC_MAX_VPORTS 0x100           /* Max vports per port, with pport */
1005        uint16_t max_vports;            /*
1006                                         * For IOV HBAs max_vpi can change
1007                                         * after a reset. max_vports is max
1008                                         * number of vports present. This can
1009                                         * be greater than max_vpi.
1010                                         */
1011        uint16_t vpi_base;
1012        uint16_t vfi_base;
1013        unsigned long *vpi_bmask;       /* vpi allocation table */
1014        uint16_t *vpi_ids;
1015        uint16_t vpi_count;
1016        struct list_head lpfc_vpi_blk_list;
1017
1018        /* Data structure used by fabric iocb scheduler */
1019        struct list_head fabric_iocb_list;
1020        atomic_t fabric_iocb_count;
1021        struct timer_list fabric_block_timer;
1022        unsigned long bit_flags;
1023#define FABRIC_COMANDS_BLOCKED  0
1024        atomic_t num_rsrc_err;
1025        atomic_t num_cmd_success;
1026        unsigned long last_rsrc_error_time;
1027        unsigned long last_ramp_down_time;
1028#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
1029        struct dentry *hba_debugfs_root;
1030        atomic_t debugfs_vport_count;
1031        struct dentry *debug_multixri_pools;
1032        struct dentry *debug_hbqinfo;
1033        struct dentry *debug_dumpHostSlim;
1034        struct dentry *debug_dumpHBASlim;
1035        struct dentry *debug_dumpData;   /* BlockGuard BPL */
1036        struct dentry *debug_dumpDif;    /* BlockGuard BPL */
1037        struct dentry *debug_InjErrLBA;  /* LBA to inject errors at */
1038        struct dentry *debug_InjErrNPortID;  /* NPortID to inject errors at */
1039        struct dentry *debug_InjErrWWPN;  /* WWPN to inject errors at */
1040        struct dentry *debug_writeGuard; /* inject write guard_tag errors */
1041        struct dentry *debug_writeApp;   /* inject write app_tag errors */
1042        struct dentry *debug_writeRef;   /* inject write ref_tag errors */
1043        struct dentry *debug_readGuard;  /* inject read guard_tag errors */
1044        struct dentry *debug_readApp;    /* inject read app_tag errors */
1045        struct dentry *debug_readRef;    /* inject read ref_tag errors */
1046
1047        struct dentry *debug_nvmeio_trc;
1048        struct lpfc_debugfs_nvmeio_trc *nvmeio_trc;
1049        struct dentry *debug_hdwqinfo;
1050#ifdef LPFC_HDWQ_LOCK_STAT
1051        struct dentry *debug_lockstat;
1052#endif
1053        atomic_t nvmeio_trc_cnt;
1054        uint32_t nvmeio_trc_size;
1055        uint32_t nvmeio_trc_output_idx;
1056
1057        /* T10 DIF error injection */
1058        uint32_t lpfc_injerr_wgrd_cnt;
1059        uint32_t lpfc_injerr_wapp_cnt;
1060        uint32_t lpfc_injerr_wref_cnt;
1061        uint32_t lpfc_injerr_rgrd_cnt;
1062        uint32_t lpfc_injerr_rapp_cnt;
1063        uint32_t lpfc_injerr_rref_cnt;
1064        uint32_t lpfc_injerr_nportid;
1065        struct lpfc_name lpfc_injerr_wwpn;
1066        sector_t lpfc_injerr_lba;
1067#define LPFC_INJERR_LBA_OFF     (sector_t)(-1)
1068
1069        struct dentry *debug_slow_ring_trc;
1070        struct lpfc_debugfs_trc *slow_ring_trc;
1071        atomic_t slow_ring_trc_cnt;
1072        /* iDiag debugfs sub-directory */
1073        struct dentry *idiag_root;
1074        struct dentry *idiag_pci_cfg;
1075        struct dentry *idiag_bar_acc;
1076        struct dentry *idiag_que_info;
1077        struct dentry *idiag_que_acc;
1078        struct dentry *idiag_drb_acc;
1079        struct dentry *idiag_ctl_acc;
1080        struct dentry *idiag_mbx_acc;
1081        struct dentry *idiag_ext_acc;
1082        uint8_t lpfc_idiag_last_eq;
1083#endif
1084        uint16_t nvmeio_trc_on;
1085
1086        /* Used for deferred freeing of ELS data buffers */
1087        struct list_head elsbuf;
1088        int elsbuf_cnt;
1089        int elsbuf_prev_cnt;
1090
1091        uint8_t temp_sensor_support;
1092        /* Fields used for heart beat. */
1093        unsigned long last_completion_time;
1094        unsigned long skipped_hb;
1095        struct timer_list hb_tmofunc;
1096        uint8_t hb_outstanding;
1097        struct timer_list rrq_tmr;
1098        enum hba_temp_state over_temp_state;
1099        /* ndlp reference management */
1100        spinlock_t ndlp_lock;
1101        /*
1102         * Following bit will be set for all buffer tags which are not
1103         * associated with any HBQ.
1104         */
1105#define QUE_BUFTAG_BIT  (1<<31)
1106        uint32_t buffer_tag_count;
1107        int wait_4_mlo_maint_flg;
1108        wait_queue_head_t wait_4_mlo_m_q;
1109        /* data structure used for latency data collection */
1110#define LPFC_NO_BUCKET     0
1111#define LPFC_LINEAR_BUCKET 1
1112#define LPFC_POWER2_BUCKET 2
1113        uint8_t  bucket_type;
1114        uint32_t bucket_base;
1115        uint32_t bucket_step;
1116
1117/* Maximum number of events that can be outstanding at any time*/
1118#define LPFC_MAX_EVT_COUNT 512
1119        atomic_t fast_event_count;
1120        uint32_t fcoe_eventtag;
1121        uint32_t fcoe_eventtag_at_fcf_scan;
1122        uint32_t fcoe_cvl_eventtag;
1123        uint32_t fcoe_cvl_eventtag_attn;
1124        struct lpfc_fcf fcf;
1125        uint8_t fc_map[3];
1126        uint8_t valid_vlan;
1127        uint16_t vlan_id;
1128        struct list_head fcf_conn_rec_list;
1129
1130        bool defer_flogi_acc_flag;
1131        uint16_t defer_flogi_acc_rx_id;
1132        uint16_t defer_flogi_acc_ox_id;
1133
1134        spinlock_t ct_ev_lock; /* synchronize access to ct_ev_waiters */
1135        struct list_head ct_ev_waiters;
1136        struct unsol_rcv_ct_ctx ct_ctx[LPFC_CT_CTX_MAX];
1137        uint32_t ctx_idx;
1138
1139        /* RAS Support */
1140        struct lpfc_ras_fwlog ras_fwlog;
1141
1142        uint8_t menlo_flag;     /* menlo generic flags */
1143#define HBA_MENLO_SUPPORT       0x1 /* HBA supports menlo commands */
1144        uint32_t iocb_cnt;
1145        uint32_t iocb_max;
1146        atomic_t sdev_cnt;
1147        uint8_t fips_spec_rev;
1148        uint8_t fips_level;
1149        spinlock_t devicelock;  /* lock for luns list */
1150        mempool_t *device_data_mem_pool;
1151        struct list_head luns;
1152#define LPFC_TRANSGRESSION_HIGH_TEMPERATURE     0x0080
1153#define LPFC_TRANSGRESSION_LOW_TEMPERATURE      0x0040
1154#define LPFC_TRANSGRESSION_HIGH_VOLTAGE         0x0020
1155#define LPFC_TRANSGRESSION_LOW_VOLTAGE          0x0010
1156#define LPFC_TRANSGRESSION_HIGH_TXBIAS          0x0008
1157#define LPFC_TRANSGRESSION_LOW_TXBIAS           0x0004
1158#define LPFC_TRANSGRESSION_HIGH_TXPOWER         0x0002
1159#define LPFC_TRANSGRESSION_LOW_TXPOWER          0x0001
1160#define LPFC_TRANSGRESSION_HIGH_RXPOWER         0x8000
1161#define LPFC_TRANSGRESSION_LOW_RXPOWER          0x4000
1162        uint16_t sfp_alarm;
1163        uint16_t sfp_warning;
1164
1165#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
1166        uint16_t cpucheck_on;
1167#define LPFC_CHECK_OFF          0
1168#define LPFC_CHECK_NVME_IO      1
1169#define LPFC_CHECK_NVMET_RCV    2
1170#define LPFC_CHECK_NVMET_IO     4
1171#define LPFC_CHECK_SCSI_IO      8
1172        uint16_t ktime_on;
1173        uint64_t ktime_data_samples;
1174        uint64_t ktime_status_samples;
1175        uint64_t ktime_last_cmd;
1176        uint64_t ktime_seg1_total;
1177        uint64_t ktime_seg1_min;
1178        uint64_t ktime_seg1_max;
1179        uint64_t ktime_seg2_total;
1180        uint64_t ktime_seg2_min;
1181        uint64_t ktime_seg2_max;
1182        uint64_t ktime_seg3_total;
1183        uint64_t ktime_seg3_min;
1184        uint64_t ktime_seg3_max;
1185        uint64_t ktime_seg4_total;
1186        uint64_t ktime_seg4_min;
1187        uint64_t ktime_seg4_max;
1188        uint64_t ktime_seg5_total;
1189        uint64_t ktime_seg5_min;
1190        uint64_t ktime_seg5_max;
1191        uint64_t ktime_seg6_total;
1192        uint64_t ktime_seg6_min;
1193        uint64_t ktime_seg6_max;
1194        uint64_t ktime_seg7_total;
1195        uint64_t ktime_seg7_min;
1196        uint64_t ktime_seg7_max;
1197        uint64_t ktime_seg8_total;
1198        uint64_t ktime_seg8_min;
1199        uint64_t ktime_seg8_max;
1200        uint64_t ktime_seg9_total;
1201        uint64_t ktime_seg9_min;
1202        uint64_t ktime_seg9_max;
1203        uint64_t ktime_seg10_total;
1204        uint64_t ktime_seg10_min;
1205        uint64_t ktime_seg10_max;
1206#endif
1207};
1208
1209static inline struct Scsi_Host *
1210lpfc_shost_from_vport(struct lpfc_vport *vport)
1211{
1212        return container_of((void *) vport, struct Scsi_Host, hostdata[0]);
1213}
1214
1215static inline void
1216lpfc_set_loopback_flag(struct lpfc_hba *phba)
1217{
1218        if (phba->cfg_topology == FLAGS_LOCAL_LB)
1219                phba->link_flag |= LS_LOOPBACK_MODE;
1220        else
1221                phba->link_flag &= ~LS_LOOPBACK_MODE;
1222}
1223
1224static inline int
1225lpfc_is_link_up(struct lpfc_hba *phba)
1226{
1227        return  phba->link_state == LPFC_LINK_UP ||
1228                phba->link_state == LPFC_CLEAR_LA ||
1229                phba->link_state == LPFC_HBA_READY;
1230}
1231
1232static inline void
1233lpfc_worker_wake_up(struct lpfc_hba *phba)
1234{
1235        /* Set the lpfc data pending flag */
1236        set_bit(LPFC_DATA_READY, &phba->data_flags);
1237
1238        /* Wake up worker thread */
1239        wake_up(&phba->work_waitq);
1240        return;
1241}
1242
1243static inline int
1244lpfc_readl(void __iomem *addr, uint32_t *data)
1245{
1246        uint32_t temp;
1247        temp = readl(addr);
1248        if (temp == 0xffffffff)
1249                return -EIO;
1250        *data = temp;
1251        return 0;
1252}
1253
1254static inline int
1255lpfc_sli_read_hs(struct lpfc_hba *phba)
1256{
1257        /*
1258         * There was a link/board error. Read the status register to retrieve
1259         * the error event and process it.
1260         */
1261        phba->sli.slistat.err_attn_event++;
1262
1263        /* Save status info and check for unplug error */
1264        if (lpfc_readl(phba->HSregaddr, &phba->work_hs) ||
1265                lpfc_readl(phba->MBslimaddr + 0xa8, &phba->work_status[0]) ||
1266                lpfc_readl(phba->MBslimaddr + 0xac, &phba->work_status[1])) {
1267                return -EIO;
1268        }
1269
1270        /* Clear chip Host Attention error bit */
1271        writel(HA_ERATT, phba->HAregaddr);
1272        readl(phba->HAregaddr); /* flush */
1273        phba->pport->stopped = 1;
1274
1275        return 0;
1276}
1277
1278static inline struct lpfc_sli_ring *
1279lpfc_phba_elsring(struct lpfc_hba *phba)
1280{
1281        /* Return NULL if sli_rev has become invalid due to bad fw */
1282        if (phba->sli_rev != LPFC_SLI_REV4  &&
1283            phba->sli_rev != LPFC_SLI_REV3  &&
1284            phba->sli_rev != LPFC_SLI_REV2)
1285                return NULL;
1286
1287        if (phba->sli_rev == LPFC_SLI_REV4) {
1288                if (phba->sli4_hba.els_wq)
1289                        return phba->sli4_hba.els_wq->pring;
1290                else
1291                        return NULL;
1292        }
1293        return &phba->sli.sli3_ring[LPFC_ELS_RING];
1294}
1295
1296/**
1297 * lpfc_sli4_mod_hba_eq_delay - update EQ delay
1298 * @phba: Pointer to HBA context object.
1299 * @q: The Event Queue to update.
1300 * @delay: The delay value (in us) to be written.
1301 *
1302 **/
1303static inline void
1304lpfc_sli4_mod_hba_eq_delay(struct lpfc_hba *phba, struct lpfc_queue *eq,
1305                           u32 delay)
1306{
1307        struct lpfc_register reg_data;
1308
1309        reg_data.word0 = 0;
1310        bf_set(lpfc_sliport_eqdelay_id, &reg_data, eq->queue_id);
1311        bf_set(lpfc_sliport_eqdelay_delay, &reg_data, delay);
1312        writel(reg_data.word0, phba->sli4_hba.u.if_type2.EQDregaddr);
1313        eq->q_mode = delay;
1314}
1315