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17#include <linux/init.h>
18#include <linux/module.h>
19#include <linux/slab.h>
20#include <linux/platform_device.h>
21#include <linux/clk.h>
22#include <linux/io.h>
23#include <linux/pxa2xx_ssp.h>
24#include <linux/of.h>
25#include <linux/dmaengine.h>
26
27#include <asm/irq.h>
28
29#include <sound/core.h>
30#include <sound/pcm.h>
31#include <sound/initval.h>
32#include <sound/pcm_params.h>
33#include <sound/soc.h>
34#include <sound/pxa2xx-lib.h>
35#include <sound/dmaengine_pcm.h>
36
37#include "pxa-ssp.h"
38
39
40
41
42struct ssp_priv {
43 struct ssp_device *ssp;
44 struct clk *extclk;
45 unsigned long ssp_clk;
46 unsigned int sysclk;
47 unsigned int dai_fmt;
48 unsigned int configured_dai_fmt;
49#ifdef CONFIG_PM
50 uint32_t cr0;
51 uint32_t cr1;
52 uint32_t to;
53 uint32_t psp;
54#endif
55};
56
57static void dump_registers(struct ssp_device *ssp)
58{
59 dev_dbg(&ssp->pdev->dev, "SSCR0 0x%08x SSCR1 0x%08x SSTO 0x%08x\n",
60 pxa_ssp_read_reg(ssp, SSCR0), pxa_ssp_read_reg(ssp, SSCR1),
61 pxa_ssp_read_reg(ssp, SSTO));
62
63 dev_dbg(&ssp->pdev->dev, "SSPSP 0x%08x SSSR 0x%08x SSACD 0x%08x\n",
64 pxa_ssp_read_reg(ssp, SSPSP), pxa_ssp_read_reg(ssp, SSSR),
65 pxa_ssp_read_reg(ssp, SSACD));
66}
67
68static void pxa_ssp_enable(struct ssp_device *ssp)
69{
70 uint32_t sscr0;
71
72 sscr0 = __raw_readl(ssp->mmio_base + SSCR0) | SSCR0_SSE;
73 __raw_writel(sscr0, ssp->mmio_base + SSCR0);
74}
75
76static void pxa_ssp_disable(struct ssp_device *ssp)
77{
78 uint32_t sscr0;
79
80 sscr0 = __raw_readl(ssp->mmio_base + SSCR0) & ~SSCR0_SSE;
81 __raw_writel(sscr0, ssp->mmio_base + SSCR0);
82}
83
84static void pxa_ssp_set_dma_params(struct ssp_device *ssp, int width4,
85 int out, struct snd_dmaengine_dai_dma_data *dma)
86{
87 dma->addr_width = width4 ? DMA_SLAVE_BUSWIDTH_4_BYTES :
88 DMA_SLAVE_BUSWIDTH_2_BYTES;
89 dma->maxburst = 16;
90 dma->addr = ssp->phys_base + SSDR;
91}
92
93static int pxa_ssp_startup(struct snd_pcm_substream *substream,
94 struct snd_soc_dai *cpu_dai)
95{
96 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
97 struct ssp_device *ssp = priv->ssp;
98 struct snd_dmaengine_dai_dma_data *dma;
99 int ret = 0;
100
101 if (!cpu_dai->active) {
102 clk_prepare_enable(ssp->clk);
103 pxa_ssp_disable(ssp);
104 }
105
106 if (priv->extclk)
107 clk_prepare_enable(priv->extclk);
108
109 dma = kzalloc(sizeof(struct snd_dmaengine_dai_dma_data), GFP_KERNEL);
110 if (!dma)
111 return -ENOMEM;
112 dma->chan_name = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
113 "tx" : "rx";
114
115 snd_soc_dai_set_dma_data(cpu_dai, substream, dma);
116
117 return ret;
118}
119
120static void pxa_ssp_shutdown(struct snd_pcm_substream *substream,
121 struct snd_soc_dai *cpu_dai)
122{
123 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
124 struct ssp_device *ssp = priv->ssp;
125
126 if (!cpu_dai->active) {
127 pxa_ssp_disable(ssp);
128 clk_disable_unprepare(ssp->clk);
129 }
130
131 if (priv->extclk)
132 clk_disable_unprepare(priv->extclk);
133
134 kfree(snd_soc_dai_get_dma_data(cpu_dai, substream));
135 snd_soc_dai_set_dma_data(cpu_dai, substream, NULL);
136}
137
138#ifdef CONFIG_PM
139
140static int pxa_ssp_suspend(struct snd_soc_dai *cpu_dai)
141{
142 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
143 struct ssp_device *ssp = priv->ssp;
144
145 if (!cpu_dai->active)
146 clk_prepare_enable(ssp->clk);
147
148 priv->cr0 = __raw_readl(ssp->mmio_base + SSCR0);
149 priv->cr1 = __raw_readl(ssp->mmio_base + SSCR1);
150 priv->to = __raw_readl(ssp->mmio_base + SSTO);
151 priv->psp = __raw_readl(ssp->mmio_base + SSPSP);
152
153 pxa_ssp_disable(ssp);
154 clk_disable_unprepare(ssp->clk);
155 return 0;
156}
157
158static int pxa_ssp_resume(struct snd_soc_dai *cpu_dai)
159{
160 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
161 struct ssp_device *ssp = priv->ssp;
162 uint32_t sssr = SSSR_ROR | SSSR_TUR | SSSR_BCE;
163
164 clk_prepare_enable(ssp->clk);
165
166 __raw_writel(sssr, ssp->mmio_base + SSSR);
167 __raw_writel(priv->cr0 & ~SSCR0_SSE, ssp->mmio_base + SSCR0);
168 __raw_writel(priv->cr1, ssp->mmio_base + SSCR1);
169 __raw_writel(priv->to, ssp->mmio_base + SSTO);
170 __raw_writel(priv->psp, ssp->mmio_base + SSPSP);
171
172 if (cpu_dai->active)
173 pxa_ssp_enable(ssp);
174 else
175 clk_disable_unprepare(ssp->clk);
176
177 return 0;
178}
179
180#else
181#define pxa_ssp_suspend NULL
182#define pxa_ssp_resume NULL
183#endif
184
185
186
187
188
189static void pxa_ssp_set_scr(struct ssp_device *ssp, u32 div)
190{
191 u32 sscr0 = pxa_ssp_read_reg(ssp, SSCR0);
192
193 if (ssp->type == PXA25x_SSP) {
194 sscr0 &= ~0x0000ff00;
195 sscr0 |= ((div - 2)/2) << 8;
196 } else {
197 sscr0 &= ~0x000fff00;
198 sscr0 |= (div - 1) << 8;
199 }
200 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
201}
202
203
204
205
206static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
207 int clk_id, unsigned int freq, int dir)
208{
209 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
210 struct ssp_device *ssp = priv->ssp;
211
212 u32 sscr0 = pxa_ssp_read_reg(ssp, SSCR0) &
213 ~(SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ACS);
214
215 if (priv->extclk) {
216 int ret;
217
218
219
220
221
222
223 ret = clk_set_rate(priv->extclk, freq);
224 if (ret < 0)
225 return ret;
226
227 clk_id = PXA_SSP_CLK_EXT;
228 }
229
230 dev_dbg(&ssp->pdev->dev,
231 "pxa_ssp_set_dai_sysclk id: %d, clk_id %d, freq %u\n",
232 cpu_dai->id, clk_id, freq);
233
234 switch (clk_id) {
235 case PXA_SSP_CLK_NET_PLL:
236 sscr0 |= SSCR0_MOD;
237 break;
238 case PXA_SSP_CLK_PLL:
239
240 if (ssp->type == PXA25x_SSP)
241 priv->sysclk = 1843200;
242 else
243 priv->sysclk = 13000000;
244 break;
245 case PXA_SSP_CLK_EXT:
246 priv->sysclk = freq;
247 sscr0 |= SSCR0_ECS;
248 break;
249 case PXA_SSP_CLK_NET:
250 priv->sysclk = freq;
251 sscr0 |= SSCR0_NCS | SSCR0_MOD;
252 break;
253 case PXA_SSP_CLK_AUDIO:
254 priv->sysclk = 0;
255 pxa_ssp_set_scr(ssp, 1);
256 sscr0 |= SSCR0_ACS;
257 break;
258 default:
259 return -ENODEV;
260 }
261
262
263
264 if (ssp->type != PXA3xx_SSP)
265 clk_disable_unprepare(ssp->clk);
266 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
267 if (ssp->type != PXA3xx_SSP)
268 clk_prepare_enable(ssp->clk);
269
270 return 0;
271}
272
273
274
275
276static int pxa_ssp_set_pll(struct ssp_priv *priv, unsigned int freq)
277{
278 struct ssp_device *ssp = priv->ssp;
279 u32 ssacd = pxa_ssp_read_reg(ssp, SSACD) & ~0x70;
280
281 if (ssp->type == PXA3xx_SSP)
282 pxa_ssp_write_reg(ssp, SSACDD, 0);
283
284 switch (freq) {
285 case 5622000:
286 break;
287 case 11345000:
288 ssacd |= (0x1 << 4);
289 break;
290 case 12235000:
291 ssacd |= (0x2 << 4);
292 break;
293 case 14857000:
294 ssacd |= (0x3 << 4);
295 break;
296 case 32842000:
297 ssacd |= (0x4 << 4);
298 break;
299 case 48000000:
300 ssacd |= (0x5 << 4);
301 break;
302 case 0:
303
304 break;
305
306 default:
307
308
309
310 if (ssp->type == PXA3xx_SSP) {
311 u32 val;
312 u64 tmp = 19968;
313
314 tmp *= 1000000;
315 do_div(tmp, freq);
316 val = tmp;
317
318 val = (val << 16) | 64;
319 pxa_ssp_write_reg(ssp, SSACDD, val);
320
321 ssacd |= (0x6 << 4);
322
323 dev_dbg(&ssp->pdev->dev,
324 "Using SSACDD %x to supply %uHz\n",
325 val, freq);
326 break;
327 }
328
329 return -EINVAL;
330 }
331
332 pxa_ssp_write_reg(ssp, SSACD, ssacd);
333
334 return 0;
335}
336
337
338
339
340static int pxa_ssp_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai,
341 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width)
342{
343 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
344 struct ssp_device *ssp = priv->ssp;
345 u32 sscr0;
346
347 sscr0 = pxa_ssp_read_reg(ssp, SSCR0);
348 sscr0 &= ~(SSCR0_MOD | SSCR0_SlotsPerFrm(8) | SSCR0_EDSS | SSCR0_DSS);
349
350
351 if (slot_width > 16)
352 sscr0 |= SSCR0_EDSS | SSCR0_DataSize(slot_width - 16);
353 else
354 sscr0 |= SSCR0_DataSize(slot_width);
355
356 if (slots > 1) {
357
358 sscr0 |= SSCR0_MOD;
359
360
361 sscr0 |= SSCR0_SlotsPerFrm(slots);
362
363
364 pxa_ssp_write_reg(ssp, SSTSA, tx_mask);
365 pxa_ssp_write_reg(ssp, SSRSA, rx_mask);
366 }
367 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
368
369 return 0;
370}
371
372
373
374
375static int pxa_ssp_set_dai_tristate(struct snd_soc_dai *cpu_dai,
376 int tristate)
377{
378 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
379 struct ssp_device *ssp = priv->ssp;
380 u32 sscr1;
381
382 sscr1 = pxa_ssp_read_reg(ssp, SSCR1);
383 if (tristate)
384 sscr1 &= ~SSCR1_TTE;
385 else
386 sscr1 |= SSCR1_TTE;
387 pxa_ssp_write_reg(ssp, SSCR1, sscr1);
388
389 return 0;
390}
391
392static int pxa_ssp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
393 unsigned int fmt)
394{
395 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
396
397 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
398 case SND_SOC_DAIFMT_CBM_CFM:
399 case SND_SOC_DAIFMT_CBM_CFS:
400 case SND_SOC_DAIFMT_CBS_CFS:
401 break;
402 default:
403 return -EINVAL;
404 }
405
406 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
407 case SND_SOC_DAIFMT_NB_NF:
408 case SND_SOC_DAIFMT_NB_IF:
409 case SND_SOC_DAIFMT_IB_IF:
410 case SND_SOC_DAIFMT_IB_NF:
411 break;
412 default:
413 return -EINVAL;
414 }
415
416 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
417 case SND_SOC_DAIFMT_I2S:
418 case SND_SOC_DAIFMT_DSP_A:
419 case SND_SOC_DAIFMT_DSP_B:
420 break;
421
422 default:
423 return -EINVAL;
424 }
425
426
427 priv->dai_fmt = fmt;
428
429 return 0;
430}
431
432
433
434
435
436
437static int pxa_ssp_configure_dai_fmt(struct ssp_priv *priv)
438{
439 struct ssp_device *ssp = priv->ssp;
440 u32 sscr0, sscr1, sspsp, scfr;
441
442
443 if (priv->configured_dai_fmt == priv->dai_fmt)
444 return 0;
445
446
447 sscr0 = pxa_ssp_read_reg(ssp, SSCR0) &
448 ~(SSCR0_PSP | SSCR0_MOD);
449 sscr1 = pxa_ssp_read_reg(ssp, SSCR1) &
450 ~(SSCR1_SCLKDIR | SSCR1_SFRMDIR | SSCR1_SCFR |
451 SSCR1_RWOT | SSCR1_TRAIL | SSCR1_TFT | SSCR1_RFT);
452 sspsp = pxa_ssp_read_reg(ssp, SSPSP) &
453 ~(SSPSP_SFRMP | SSPSP_SCMODE(3));
454
455 sscr1 |= SSCR1_RxTresh(8) | SSCR1_TxTresh(7);
456
457 switch (priv->dai_fmt & SND_SOC_DAIFMT_MASTER_MASK) {
458 case SND_SOC_DAIFMT_CBM_CFM:
459 sscr1 |= SSCR1_SCLKDIR | SSCR1_SFRMDIR | SSCR1_SCFR;
460 break;
461 case SND_SOC_DAIFMT_CBM_CFS:
462 sscr1 |= SSCR1_SCLKDIR | SSCR1_SCFR;
463 break;
464 case SND_SOC_DAIFMT_CBS_CFS:
465 break;
466 default:
467 return -EINVAL;
468 }
469
470 switch (priv->dai_fmt & SND_SOC_DAIFMT_INV_MASK) {
471 case SND_SOC_DAIFMT_NB_NF:
472 sspsp |= SSPSP_SFRMP;
473 break;
474 case SND_SOC_DAIFMT_NB_IF:
475 break;
476 case SND_SOC_DAIFMT_IB_IF:
477 sspsp |= SSPSP_SCMODE(2);
478 break;
479 case SND_SOC_DAIFMT_IB_NF:
480 sspsp |= SSPSP_SCMODE(2) | SSPSP_SFRMP;
481 break;
482 default:
483 return -EINVAL;
484 }
485
486 switch (priv->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
487 case SND_SOC_DAIFMT_I2S:
488 sscr0 |= SSCR0_PSP;
489 sscr1 |= SSCR1_RWOT | SSCR1_TRAIL;
490
491 break;
492
493 case SND_SOC_DAIFMT_DSP_A:
494 sspsp |= SSPSP_FSRT;
495
496 case SND_SOC_DAIFMT_DSP_B:
497 sscr0 |= SSCR0_MOD | SSCR0_PSP;
498 sscr1 |= SSCR1_TRAIL | SSCR1_RWOT;
499 break;
500
501 default:
502 return -EINVAL;
503 }
504
505 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
506 pxa_ssp_write_reg(ssp, SSCR1, sscr1);
507 pxa_ssp_write_reg(ssp, SSPSP, sspsp);
508
509 switch (priv->dai_fmt & SND_SOC_DAIFMT_MASTER_MASK) {
510 case SND_SOC_DAIFMT_CBM_CFM:
511 case SND_SOC_DAIFMT_CBM_CFS:
512 scfr = pxa_ssp_read_reg(ssp, SSCR1) | SSCR1_SCFR;
513 pxa_ssp_write_reg(ssp, SSCR1, scfr);
514
515 while (pxa_ssp_read_reg(ssp, SSSR) & SSSR_BSY)
516 cpu_relax();
517 break;
518 }
519
520 dump_registers(ssp);
521
522
523
524
525
526 priv->configured_dai_fmt = priv->dai_fmt;
527
528 return 0;
529}
530
531struct pxa_ssp_clock_mode {
532 int rate;
533 int pll;
534 u8 acds;
535 u8 scdb;
536};
537
538static const struct pxa_ssp_clock_mode pxa_ssp_clock_modes[] = {
539 { .rate = 8000, .pll = 32842000, .acds = SSACD_ACDS_32, .scdb = SSACD_SCDB_4X },
540 { .rate = 11025, .pll = 5622000, .acds = SSACD_ACDS_4, .scdb = SSACD_SCDB_4X },
541 { .rate = 16000, .pll = 32842000, .acds = SSACD_ACDS_16, .scdb = SSACD_SCDB_4X },
542 { .rate = 22050, .pll = 5622000, .acds = SSACD_ACDS_2, .scdb = SSACD_SCDB_4X },
543 { .rate = 44100, .pll = 11345000, .acds = SSACD_ACDS_2, .scdb = SSACD_SCDB_4X },
544 { .rate = 48000, .pll = 12235000, .acds = SSACD_ACDS_2, .scdb = SSACD_SCDB_4X },
545 { .rate = 96000, .pll = 12235000, .acds = SSACD_ACDS_4, .scdb = SSACD_SCDB_1X },
546 {}
547};
548
549
550
551
552
553static int pxa_ssp_hw_params(struct snd_pcm_substream *substream,
554 struct snd_pcm_hw_params *params,
555 struct snd_soc_dai *cpu_dai)
556{
557 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
558 struct ssp_device *ssp = priv->ssp;
559 int chn = params_channels(params);
560 u32 sscr0, sspsp;
561 int width = snd_pcm_format_physical_width(params_format(params));
562 int ttsa = pxa_ssp_read_reg(ssp, SSTSA) & 0xf;
563 struct snd_dmaengine_dai_dma_data *dma_data;
564 int rate = params_rate(params);
565 int bclk = rate * chn * (width / 8);
566 int ret;
567
568 dma_data = snd_soc_dai_get_dma_data(cpu_dai, substream);
569
570
571
572
573
574 pxa_ssp_set_dma_params(ssp,
575 ((chn == 2) && (ttsa != 1)) || (width == 32),
576 substream->stream == SNDRV_PCM_STREAM_PLAYBACK, dma_data);
577
578
579 if (pxa_ssp_read_reg(ssp, SSCR0) & SSCR0_SSE)
580 return 0;
581
582 ret = pxa_ssp_configure_dai_fmt(priv);
583 if (ret < 0)
584 return ret;
585
586
587 sscr0 = pxa_ssp_read_reg(ssp, SSCR0) & ~(SSCR0_DSS | SSCR0_EDSS);
588
589
590 switch (params_format(params)) {
591 case SNDRV_PCM_FORMAT_S16_LE:
592 if (ssp->type == PXA3xx_SSP)
593 sscr0 |= SSCR0_FPCKE;
594 sscr0 |= SSCR0_DataSize(16);
595 break;
596 case SNDRV_PCM_FORMAT_S24_LE:
597 sscr0 |= (SSCR0_EDSS | SSCR0_DataSize(8));
598 break;
599 case SNDRV_PCM_FORMAT_S32_LE:
600 sscr0 |= (SSCR0_EDSS | SSCR0_DataSize(16));
601 break;
602 }
603 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
604
605 if (sscr0 & SSCR0_ACS) {
606 ret = pxa_ssp_set_pll(priv, bclk);
607
608
609
610
611
612
613
614 if (ret < 0) {
615 const struct pxa_ssp_clock_mode *m;
616 int ssacd, acds;
617
618 for (m = pxa_ssp_clock_modes; m->rate; m++) {
619 if (m->rate == rate)
620 break;
621 }
622
623 if (!m->rate)
624 return -EINVAL;
625
626 acds = m->acds;
627
628
629 if (width == 32)
630 acds--;
631
632 ret = pxa_ssp_set_pll(priv, bclk);
633 if (ret < 0)
634 return ret;
635
636 ssacd = pxa_ssp_read_reg(ssp, SSACD);
637 ssacd &= ~(SSACD_ACDS(7) | SSACD_SCDB_1X);
638 ssacd |= SSACD_ACDS(m->acds);
639 ssacd |= m->scdb;
640 pxa_ssp_write_reg(ssp, SSACD, ssacd);
641 }
642 } else if (sscr0 & SSCR0_ECS) {
643
644
645
646
647
648 pxa_ssp_set_scr(ssp, bclk / rate);
649 }
650
651 switch (priv->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
652 case SND_SOC_DAIFMT_I2S:
653 sspsp = pxa_ssp_read_reg(ssp, SSPSP);
654
655 if (((priv->sysclk / bclk) == 64) && (width == 16)) {
656
657
658
659
660
661
662
663
664 if (ssp->type != PXA3xx_SSP)
665 return -EINVAL;
666
667 sspsp |= SSPSP_SFRMWDTH(width * 2);
668 sspsp |= SSPSP_SFRMDLY(width * 4);
669 sspsp |= SSPSP_EDMYSTOP(3);
670 sspsp |= SSPSP_DMYSTOP(3);
671 sspsp |= SSPSP_DMYSTRT(1);
672 } else {
673
674
675
676
677
678
679 sspsp |= SSPSP_SFRMWDTH(width + 1);
680 sspsp |= SSPSP_SFRMDLY((width + 1) * 2);
681 sspsp |= SSPSP_DMYSTRT(1);
682 }
683
684 pxa_ssp_write_reg(ssp, SSPSP, sspsp);
685 break;
686 default:
687 break;
688 }
689
690
691
692
693 if ((sscr0 & SSCR0_MOD) && !ttsa) {
694 dev_err(&ssp->pdev->dev, "No TDM timeslot configured\n");
695 return -EINVAL;
696 }
697
698 dump_registers(ssp);
699
700 return 0;
701}
702
703static void pxa_ssp_set_running_bit(struct snd_pcm_substream *substream,
704 struct ssp_device *ssp, int value)
705{
706 uint32_t sscr0 = pxa_ssp_read_reg(ssp, SSCR0);
707 uint32_t sscr1 = pxa_ssp_read_reg(ssp, SSCR1);
708 uint32_t sspsp = pxa_ssp_read_reg(ssp, SSPSP);
709 uint32_t sssr = pxa_ssp_read_reg(ssp, SSSR);
710
711 if (value && (sscr0 & SSCR0_SSE))
712 pxa_ssp_write_reg(ssp, SSCR0, sscr0 & ~SSCR0_SSE);
713
714 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
715 if (value)
716 sscr1 |= SSCR1_TSRE;
717 else
718 sscr1 &= ~SSCR1_TSRE;
719 } else {
720 if (value)
721 sscr1 |= SSCR1_RSRE;
722 else
723 sscr1 &= ~SSCR1_RSRE;
724 }
725
726 pxa_ssp_write_reg(ssp, SSCR1, sscr1);
727
728 if (value) {
729 pxa_ssp_write_reg(ssp, SSSR, sssr);
730 pxa_ssp_write_reg(ssp, SSPSP, sspsp);
731 pxa_ssp_write_reg(ssp, SSCR0, sscr0 | SSCR0_SSE);
732 }
733}
734
735static int pxa_ssp_trigger(struct snd_pcm_substream *substream, int cmd,
736 struct snd_soc_dai *cpu_dai)
737{
738 int ret = 0;
739 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
740 struct ssp_device *ssp = priv->ssp;
741 int val;
742
743 switch (cmd) {
744 case SNDRV_PCM_TRIGGER_RESUME:
745 pxa_ssp_enable(ssp);
746 break;
747 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
748 pxa_ssp_set_running_bit(substream, ssp, 1);
749 val = pxa_ssp_read_reg(ssp, SSSR);
750 pxa_ssp_write_reg(ssp, SSSR, val);
751 break;
752 case SNDRV_PCM_TRIGGER_START:
753 pxa_ssp_set_running_bit(substream, ssp, 1);
754 break;
755 case SNDRV_PCM_TRIGGER_STOP:
756 pxa_ssp_set_running_bit(substream, ssp, 0);
757 break;
758 case SNDRV_PCM_TRIGGER_SUSPEND:
759 pxa_ssp_disable(ssp);
760 break;
761 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
762 pxa_ssp_set_running_bit(substream, ssp, 0);
763 break;
764
765 default:
766 ret = -EINVAL;
767 }
768
769 dump_registers(ssp);
770
771 return ret;
772}
773
774static int pxa_ssp_probe(struct snd_soc_dai *dai)
775{
776 struct device *dev = dai->dev;
777 struct ssp_priv *priv;
778 int ret;
779
780 priv = kzalloc(sizeof(struct ssp_priv), GFP_KERNEL);
781 if (!priv)
782 return -ENOMEM;
783
784 if (dev->of_node) {
785 struct device_node *ssp_handle;
786
787 ssp_handle = of_parse_phandle(dev->of_node, "port", 0);
788 if (!ssp_handle) {
789 dev_err(dev, "unable to get 'port' phandle\n");
790 ret = -ENODEV;
791 goto err_priv;
792 }
793
794 priv->ssp = pxa_ssp_request_of(ssp_handle, "SoC audio");
795 if (priv->ssp == NULL) {
796 ret = -ENODEV;
797 goto err_priv;
798 }
799
800 priv->extclk = devm_clk_get(dev, "extclk");
801 if (IS_ERR(priv->extclk)) {
802 ret = PTR_ERR(priv->extclk);
803 if (ret == -EPROBE_DEFER)
804 return ret;
805
806 priv->extclk = NULL;
807 }
808 } else {
809 priv->ssp = pxa_ssp_request(dai->id + 1, "SoC audio");
810 if (priv->ssp == NULL) {
811 ret = -ENODEV;
812 goto err_priv;
813 }
814 }
815
816 priv->dai_fmt = (unsigned int) -1;
817 snd_soc_dai_set_drvdata(dai, priv);
818
819 return 0;
820
821err_priv:
822 kfree(priv);
823 return ret;
824}
825
826static int pxa_ssp_remove(struct snd_soc_dai *dai)
827{
828 struct ssp_priv *priv = snd_soc_dai_get_drvdata(dai);
829
830 pxa_ssp_free(priv->ssp);
831 kfree(priv);
832 return 0;
833}
834
835#define PXA_SSP_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
836 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \
837 SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
838 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | \
839 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
840
841#define PXA_SSP_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
842
843static const struct snd_soc_dai_ops pxa_ssp_dai_ops = {
844 .startup = pxa_ssp_startup,
845 .shutdown = pxa_ssp_shutdown,
846 .trigger = pxa_ssp_trigger,
847 .hw_params = pxa_ssp_hw_params,
848 .set_sysclk = pxa_ssp_set_dai_sysclk,
849 .set_fmt = pxa_ssp_set_dai_fmt,
850 .set_tdm_slot = pxa_ssp_set_dai_tdm_slot,
851 .set_tristate = pxa_ssp_set_dai_tristate,
852};
853
854static struct snd_soc_dai_driver pxa_ssp_dai = {
855 .probe = pxa_ssp_probe,
856 .remove = pxa_ssp_remove,
857 .suspend = pxa_ssp_suspend,
858 .resume = pxa_ssp_resume,
859 .playback = {
860 .channels_min = 1,
861 .channels_max = 8,
862 .rates = PXA_SSP_RATES,
863 .formats = PXA_SSP_FORMATS,
864 },
865 .capture = {
866 .channels_min = 1,
867 .channels_max = 8,
868 .rates = PXA_SSP_RATES,
869 .formats = PXA_SSP_FORMATS,
870 },
871 .ops = &pxa_ssp_dai_ops,
872};
873
874static const struct snd_soc_component_driver pxa_ssp_component = {
875 .name = "pxa-ssp",
876 .ops = &pxa2xx_pcm_ops,
877 .pcm_new = pxa2xx_soc_pcm_new,
878 .pcm_free = pxa2xx_pcm_free_dma_buffers,
879};
880
881#ifdef CONFIG_OF
882static const struct of_device_id pxa_ssp_of_ids[] = {
883 { .compatible = "mrvl,pxa-ssp-dai" },
884 {}
885};
886MODULE_DEVICE_TABLE(of, pxa_ssp_of_ids);
887#endif
888
889static int asoc_ssp_probe(struct platform_device *pdev)
890{
891 return devm_snd_soc_register_component(&pdev->dev, &pxa_ssp_component,
892 &pxa_ssp_dai, 1);
893}
894
895static struct platform_driver asoc_ssp_driver = {
896 .driver = {
897 .name = "pxa-ssp-dai",
898 .of_match_table = of_match_ptr(pxa_ssp_of_ids),
899 },
900
901 .probe = asoc_ssp_probe,
902};
903
904module_platform_driver(asoc_ssp_driver);
905
906
907MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
908MODULE_DESCRIPTION("PXA SSP/PCM SoC Interface");
909MODULE_LICENSE("GPL");
910MODULE_ALIAS("platform:pxa-ssp-dai");
911
