1
2
3
4
5
6
7
8
9
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/dma-mapping.h>
15#include <linux/serial_8250.h>
16#include <linux/ata_platform.h>
17#include <linux/clk.h>
18#include <linux/clkdev.h>
19#include <linux/mv643xx_eth.h>
20#include <linux/mv643xx_i2c.h>
21#include <net/dsa.h>
22#include <linux/platform_data/dma-mv_xor.h>
23#include <linux/platform_data/usb-ehci-orion.h>
24#include <plat/common.h>
25#include <linux/phy.h>
26
27
28void __init orion_clkdev_add(const char *con_id, const char *dev_id,
29 struct clk *clk)
30{
31 clkdev_create(clk, con_id, "%s", dev_id);
32}
33
34
35
36
37
38void __init orion_clkdev_init(struct clk *tclk)
39{
40 orion_clkdev_add(NULL, "orion_spi.0", tclk);
41 orion_clkdev_add(NULL, "orion_spi.1", tclk);
42 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", tclk);
43 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", tclk);
44 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".2", tclk);
45 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".3", tclk);
46 orion_clkdev_add(NULL, "orion_wdt", tclk);
47 orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".0", tclk);
48}
49
50
51
52
53static void fill_resources(struct platform_device *device,
54 struct resource *resources,
55 resource_size_t mapbase,
56 resource_size_t size)
57{
58 device->resource = resources;
59 device->num_resources = 1;
60 resources[0].flags = IORESOURCE_MEM;
61 resources[0].start = mapbase;
62 resources[0].end = mapbase + size;
63}
64
65static void fill_resources_irq(struct platform_device *device,
66 struct resource *resources,
67 resource_size_t mapbase,
68 resource_size_t size,
69 unsigned int irq)
70{
71 fill_resources(device, resources, mapbase, size);
72
73 device->num_resources++;
74 resources[1].flags = IORESOURCE_IRQ;
75 resources[1].start = irq;
76 resources[1].end = irq;
77}
78
79
80
81
82static unsigned long __init uart_get_clk_rate(struct clk *clk)
83{
84 clk_prepare_enable(clk);
85 return clk_get_rate(clk);
86}
87
88static void __init uart_complete(
89 struct platform_device *orion_uart,
90 struct plat_serial8250_port *data,
91 struct resource *resources,
92 void __iomem *membase,
93 resource_size_t mapbase,
94 unsigned int irq,
95 struct clk *clk)
96{
97 data->mapbase = mapbase;
98 data->membase = membase;
99 data->irq = irq;
100 data->uartclk = uart_get_clk_rate(clk);
101 orion_uart->dev.platform_data = data;
102
103 fill_resources_irq(orion_uart, resources, mapbase, 0xff, irq);
104 platform_device_register(orion_uart);
105}
106
107
108
109
110static struct plat_serial8250_port orion_uart0_data[] = {
111 {
112 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
113 .iotype = UPIO_MEM,
114 .regshift = 2,
115 }, {
116 },
117};
118
119static struct resource orion_uart0_resources[2];
120
121static struct platform_device orion_uart0 = {
122 .name = "serial8250",
123 .id = PLAT8250_DEV_PLATFORM,
124};
125
126void __init orion_uart0_init(void __iomem *membase,
127 resource_size_t mapbase,
128 unsigned int irq,
129 struct clk *clk)
130{
131 uart_complete(&orion_uart0, orion_uart0_data, orion_uart0_resources,
132 membase, mapbase, irq, clk);
133}
134
135
136
137
138static struct plat_serial8250_port orion_uart1_data[] = {
139 {
140 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
141 .iotype = UPIO_MEM,
142 .regshift = 2,
143 }, {
144 },
145};
146
147static struct resource orion_uart1_resources[2];
148
149static struct platform_device orion_uart1 = {
150 .name = "serial8250",
151 .id = PLAT8250_DEV_PLATFORM1,
152};
153
154void __init orion_uart1_init(void __iomem *membase,
155 resource_size_t mapbase,
156 unsigned int irq,
157 struct clk *clk)
158{
159 uart_complete(&orion_uart1, orion_uart1_data, orion_uart1_resources,
160 membase, mapbase, irq, clk);
161}
162
163
164
165
166static struct plat_serial8250_port orion_uart2_data[] = {
167 {
168 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
169 .iotype = UPIO_MEM,
170 .regshift = 2,
171 }, {
172 },
173};
174
175static struct resource orion_uart2_resources[2];
176
177static struct platform_device orion_uart2 = {
178 .name = "serial8250",
179 .id = PLAT8250_DEV_PLATFORM2,
180};
181
182void __init orion_uart2_init(void __iomem *membase,
183 resource_size_t mapbase,
184 unsigned int irq,
185 struct clk *clk)
186{
187 uart_complete(&orion_uart2, orion_uart2_data, orion_uart2_resources,
188 membase, mapbase, irq, clk);
189}
190
191
192
193
194static struct plat_serial8250_port orion_uart3_data[] = {
195 {
196 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
197 .iotype = UPIO_MEM,
198 .regshift = 2,
199 }, {
200 },
201};
202
203static struct resource orion_uart3_resources[2];
204
205static struct platform_device orion_uart3 = {
206 .name = "serial8250",
207 .id = 3,
208};
209
210void __init orion_uart3_init(void __iomem *membase,
211 resource_size_t mapbase,
212 unsigned int irq,
213 struct clk *clk)
214{
215 uart_complete(&orion_uart3, orion_uart3_data, orion_uart3_resources,
216 membase, mapbase, irq, clk);
217}
218
219
220
221
222static struct resource orion_rtc_resource[2];
223
224void __init orion_rtc_init(unsigned long mapbase,
225 unsigned long irq)
226{
227 orion_rtc_resource[0].start = mapbase;
228 orion_rtc_resource[0].end = mapbase + SZ_32 - 1;
229 orion_rtc_resource[0].flags = IORESOURCE_MEM;
230 orion_rtc_resource[1].start = irq;
231 orion_rtc_resource[1].end = irq;
232 orion_rtc_resource[1].flags = IORESOURCE_IRQ;
233
234 platform_device_register_simple("rtc-mv", -1, orion_rtc_resource, 2);
235}
236
237
238
239
240static __init void ge_complete(
241 struct mv643xx_eth_shared_platform_data *orion_ge_shared_data,
242 struct resource *orion_ge_resource, unsigned long irq,
243 struct platform_device *orion_ge_shared,
244 struct platform_device *orion_ge_mvmdio,
245 struct mv643xx_eth_platform_data *eth_data,
246 struct platform_device *orion_ge)
247{
248 orion_ge_resource->start = irq;
249 orion_ge_resource->end = irq;
250 eth_data->shared = orion_ge_shared;
251 orion_ge->dev.platform_data = eth_data;
252
253 platform_device_register(orion_ge_shared);
254 if (orion_ge_mvmdio)
255 platform_device_register(orion_ge_mvmdio);
256 platform_device_register(orion_ge);
257}
258
259
260
261
262static struct mv643xx_eth_shared_platform_data orion_ge00_shared_data;
263
264static struct resource orion_ge00_shared_resources[] = {
265 {
266 .name = "ge00 base",
267 },
268};
269
270static struct platform_device orion_ge00_shared = {
271 .name = MV643XX_ETH_SHARED_NAME,
272 .id = 0,
273 .dev = {
274 .platform_data = &orion_ge00_shared_data,
275 },
276};
277
278static struct resource orion_ge_mvmdio_resources[] = {
279 {
280 .name = "ge00 mvmdio base",
281 }, {
282 .name = "ge00 mvmdio err irq",
283 },
284};
285
286static struct platform_device orion_ge_mvmdio = {
287 .name = "orion-mdio",
288 .id = -1,
289};
290
291static struct resource orion_ge00_resources[] = {
292 {
293 .name = "ge00 irq",
294 .flags = IORESOURCE_IRQ,
295 },
296};
297
298static struct platform_device orion_ge00 = {
299 .name = MV643XX_ETH_NAME,
300 .id = 0,
301 .num_resources = 1,
302 .resource = orion_ge00_resources,
303 .dev = {
304 .coherent_dma_mask = DMA_BIT_MASK(32),
305 },
306};
307
308void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data,
309 unsigned long mapbase,
310 unsigned long irq,
311 unsigned long irq_err,
312 unsigned int tx_csum_limit)
313{
314 fill_resources(&orion_ge00_shared, orion_ge00_shared_resources,
315 mapbase + 0x2000, SZ_16K - 1);
316 fill_resources_irq(&orion_ge_mvmdio, orion_ge_mvmdio_resources,
317 mapbase + 0x2004, 0x84 - 1, irq_err);
318 orion_ge00_shared_data.tx_csum_limit = tx_csum_limit;
319 ge_complete(&orion_ge00_shared_data,
320 orion_ge00_resources, irq, &orion_ge00_shared,
321 &orion_ge_mvmdio,
322 eth_data, &orion_ge00);
323}
324
325
326
327
328static struct mv643xx_eth_shared_platform_data orion_ge01_shared_data;
329
330static struct resource orion_ge01_shared_resources[] = {
331 {
332 .name = "ge01 base",
333 }
334};
335
336static struct platform_device orion_ge01_shared = {
337 .name = MV643XX_ETH_SHARED_NAME,
338 .id = 1,
339 .dev = {
340 .platform_data = &orion_ge01_shared_data,
341 },
342};
343
344static struct resource orion_ge01_resources[] = {
345 {
346 .name = "ge01 irq",
347 .flags = IORESOURCE_IRQ,
348 },
349};
350
351static struct platform_device orion_ge01 = {
352 .name = MV643XX_ETH_NAME,
353 .id = 1,
354 .num_resources = 1,
355 .resource = orion_ge01_resources,
356 .dev = {
357 .coherent_dma_mask = DMA_BIT_MASK(32),
358 },
359};
360
361void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data,
362 unsigned long mapbase,
363 unsigned long irq,
364 unsigned int tx_csum_limit)
365{
366 fill_resources(&orion_ge01_shared, orion_ge01_shared_resources,
367 mapbase + 0x2000, SZ_16K - 1);
368 orion_ge01_shared_data.tx_csum_limit = tx_csum_limit;
369 ge_complete(&orion_ge01_shared_data,
370 orion_ge01_resources, irq, &orion_ge01_shared,
371 NULL,
372 eth_data, &orion_ge01);
373}
374
375
376
377
378static struct mv643xx_eth_shared_platform_data orion_ge10_shared_data;
379
380static struct resource orion_ge10_shared_resources[] = {
381 {
382 .name = "ge10 base",
383 }
384};
385
386static struct platform_device orion_ge10_shared = {
387 .name = MV643XX_ETH_SHARED_NAME,
388 .id = 2,
389 .dev = {
390 .platform_data = &orion_ge10_shared_data,
391 },
392};
393
394static struct resource orion_ge10_resources[] = {
395 {
396 .name = "ge10 irq",
397 .flags = IORESOURCE_IRQ,
398 },
399};
400
401static struct platform_device orion_ge10 = {
402 .name = MV643XX_ETH_NAME,
403 .id = 2,
404 .num_resources = 1,
405 .resource = orion_ge10_resources,
406 .dev = {
407 .coherent_dma_mask = DMA_BIT_MASK(32),
408 },
409};
410
411void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data,
412 unsigned long mapbase,
413 unsigned long irq)
414{
415 fill_resources(&orion_ge10_shared, orion_ge10_shared_resources,
416 mapbase + 0x2000, SZ_16K - 1);
417 ge_complete(&orion_ge10_shared_data,
418 orion_ge10_resources, irq, &orion_ge10_shared,
419 NULL,
420 eth_data, &orion_ge10);
421}
422
423
424
425
426static struct mv643xx_eth_shared_platform_data orion_ge11_shared_data;
427
428static struct resource orion_ge11_shared_resources[] = {
429 {
430 .name = "ge11 base",
431 },
432};
433
434static struct platform_device orion_ge11_shared = {
435 .name = MV643XX_ETH_SHARED_NAME,
436 .id = 3,
437 .dev = {
438 .platform_data = &orion_ge11_shared_data,
439 },
440};
441
442static struct resource orion_ge11_resources[] = {
443 {
444 .name = "ge11 irq",
445 .flags = IORESOURCE_IRQ,
446 },
447};
448
449static struct platform_device orion_ge11 = {
450 .name = MV643XX_ETH_NAME,
451 .id = 3,
452 .num_resources = 1,
453 .resource = orion_ge11_resources,
454 .dev = {
455 .coherent_dma_mask = DMA_BIT_MASK(32),
456 },
457};
458
459void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data,
460 unsigned long mapbase,
461 unsigned long irq)
462{
463 fill_resources(&orion_ge11_shared, orion_ge11_shared_resources,
464 mapbase + 0x2000, SZ_16K - 1);
465 ge_complete(&orion_ge11_shared_data,
466 orion_ge11_resources, irq, &orion_ge11_shared,
467 NULL,
468 eth_data, &orion_ge11);
469}
470
471#ifdef CONFIG_ARCH_ORION5X
472
473
474
475static __initdata struct mdio_board_info orion_ge00_switch_board_info = {
476 .bus_id = "orion-mii",
477 .modalias = "mv88e6085",
478};
479
480void __init orion_ge00_switch_init(struct dsa_chip_data *d)
481{
482 unsigned int i;
483
484 if (!IS_BUILTIN(CONFIG_PHYLIB))
485 return;
486
487 for (i = 0; i < ARRAY_SIZE(d->port_names); i++) {
488 if (!strcmp(d->port_names[i], "cpu")) {
489 d->netdev[i] = &orion_ge00.dev;
490 break;
491 }
492 }
493
494 orion_ge00_switch_board_info.mdio_addr = d->sw_addr;
495 orion_ge00_switch_board_info.platform_data = d;
496
497 mdiobus_register_board_info(&orion_ge00_switch_board_info, 1);
498}
499#endif
500
501
502
503
504static struct mv64xxx_i2c_pdata orion_i2c_pdata = {
505 .freq_n = 3,
506 .timeout = 1000,
507};
508
509static struct resource orion_i2c_resources[2];
510
511static struct platform_device orion_i2c = {
512 .name = MV64XXX_I2C_CTLR_NAME,
513 .id = 0,
514 .dev = {
515 .platform_data = &orion_i2c_pdata,
516 },
517};
518
519static struct mv64xxx_i2c_pdata orion_i2c_1_pdata = {
520 .freq_n = 3,
521 .timeout = 1000,
522};
523
524static struct resource orion_i2c_1_resources[2];
525
526static struct platform_device orion_i2c_1 = {
527 .name = MV64XXX_I2C_CTLR_NAME,
528 .id = 1,
529 .dev = {
530 .platform_data = &orion_i2c_1_pdata,
531 },
532};
533
534void __init orion_i2c_init(unsigned long mapbase,
535 unsigned long irq,
536 unsigned long freq_m)
537{
538 orion_i2c_pdata.freq_m = freq_m;
539 fill_resources_irq(&orion_i2c, orion_i2c_resources, mapbase,
540 SZ_32 - 1, irq);
541 platform_device_register(&orion_i2c);
542}
543
544void __init orion_i2c_1_init(unsigned long mapbase,
545 unsigned long irq,
546 unsigned long freq_m)
547{
548 orion_i2c_1_pdata.freq_m = freq_m;
549 fill_resources_irq(&orion_i2c_1, orion_i2c_1_resources, mapbase,
550 SZ_32 - 1, irq);
551 platform_device_register(&orion_i2c_1);
552}
553
554
555
556
557static struct resource orion_spi_resources;
558
559static struct platform_device orion_spi = {
560 .name = "orion_spi",
561 .id = 0,
562};
563
564static struct resource orion_spi_1_resources;
565
566static struct platform_device orion_spi_1 = {
567 .name = "orion_spi",
568 .id = 1,
569};
570
571
572
573
574void __init orion_spi_init(unsigned long mapbase)
575{
576 fill_resources(&orion_spi, &orion_spi_resources,
577 mapbase, SZ_512 - 1);
578 platform_device_register(&orion_spi);
579}
580
581void __init orion_spi_1_init(unsigned long mapbase)
582{
583 fill_resources(&orion_spi_1, &orion_spi_1_resources,
584 mapbase, SZ_512 - 1);
585 platform_device_register(&orion_spi_1);
586}
587
588
589
590
591static u64 orion_xor_dmamask = DMA_BIT_MASK(32);
592
593
594
595
596static struct resource orion_xor0_shared_resources[] = {
597 {
598 .name = "xor 0 low",
599 .flags = IORESOURCE_MEM,
600 }, {
601 .name = "xor 0 high",
602 .flags = IORESOURCE_MEM,
603 }, {
604 .name = "irq channel 0",
605 .flags = IORESOURCE_IRQ,
606 }, {
607 .name = "irq channel 1",
608 .flags = IORESOURCE_IRQ,
609 },
610};
611
612static struct mv_xor_channel_data orion_xor0_channels_data[2];
613
614static struct mv_xor_platform_data orion_xor0_pdata = {
615 .channels = orion_xor0_channels_data,
616};
617
618static struct platform_device orion_xor0_shared = {
619 .name = MV_XOR_NAME,
620 .id = 0,
621 .num_resources = ARRAY_SIZE(orion_xor0_shared_resources),
622 .resource = orion_xor0_shared_resources,
623 .dev = {
624 .dma_mask = &orion_xor_dmamask,
625 .coherent_dma_mask = DMA_BIT_MASK(64),
626 .platform_data = &orion_xor0_pdata,
627 },
628};
629
630void __init orion_xor0_init(unsigned long mapbase_low,
631 unsigned long mapbase_high,
632 unsigned long irq_0,
633 unsigned long irq_1)
634{
635 orion_xor0_shared_resources[0].start = mapbase_low;
636 orion_xor0_shared_resources[0].end = mapbase_low + 0xff;
637 orion_xor0_shared_resources[1].start = mapbase_high;
638 orion_xor0_shared_resources[1].end = mapbase_high + 0xff;
639
640 orion_xor0_shared_resources[2].start = irq_0;
641 orion_xor0_shared_resources[2].end = irq_0;
642 orion_xor0_shared_resources[3].start = irq_1;
643 orion_xor0_shared_resources[3].end = irq_1;
644
645 dma_cap_set(DMA_MEMCPY, orion_xor0_channels_data[0].cap_mask);
646 dma_cap_set(DMA_XOR, orion_xor0_channels_data[0].cap_mask);
647
648 dma_cap_set(DMA_MEMCPY, orion_xor0_channels_data[1].cap_mask);
649 dma_cap_set(DMA_XOR, orion_xor0_channels_data[1].cap_mask);
650
651 platform_device_register(&orion_xor0_shared);
652}
653
654
655
656
657static struct resource orion_xor1_shared_resources[] = {
658 {
659 .name = "xor 1 low",
660 .flags = IORESOURCE_MEM,
661 }, {
662 .name = "xor 1 high",
663 .flags = IORESOURCE_MEM,
664 }, {
665 .name = "irq channel 0",
666 .flags = IORESOURCE_IRQ,
667 }, {
668 .name = "irq channel 1",
669 .flags = IORESOURCE_IRQ,
670 },
671};
672
673static struct mv_xor_channel_data orion_xor1_channels_data[2];
674
675static struct mv_xor_platform_data orion_xor1_pdata = {
676 .channels = orion_xor1_channels_data,
677};
678
679static struct platform_device orion_xor1_shared = {
680 .name = MV_XOR_NAME,
681 .id = 1,
682 .num_resources = ARRAY_SIZE(orion_xor1_shared_resources),
683 .resource = orion_xor1_shared_resources,
684 .dev = {
685 .dma_mask = &orion_xor_dmamask,
686 .coherent_dma_mask = DMA_BIT_MASK(64),
687 .platform_data = &orion_xor1_pdata,
688 },
689};
690
691void __init orion_xor1_init(unsigned long mapbase_low,
692 unsigned long mapbase_high,
693 unsigned long irq_0,
694 unsigned long irq_1)
695{
696 orion_xor1_shared_resources[0].start = mapbase_low;
697 orion_xor1_shared_resources[0].end = mapbase_low + 0xff;
698 orion_xor1_shared_resources[1].start = mapbase_high;
699 orion_xor1_shared_resources[1].end = mapbase_high + 0xff;
700
701 orion_xor1_shared_resources[2].start = irq_0;
702 orion_xor1_shared_resources[2].end = irq_0;
703 orion_xor1_shared_resources[3].start = irq_1;
704 orion_xor1_shared_resources[3].end = irq_1;
705
706 dma_cap_set(DMA_MEMCPY, orion_xor1_channels_data[0].cap_mask);
707 dma_cap_set(DMA_XOR, orion_xor1_channels_data[0].cap_mask);
708
709 dma_cap_set(DMA_MEMCPY, orion_xor1_channels_data[1].cap_mask);
710 dma_cap_set(DMA_XOR, orion_xor1_channels_data[1].cap_mask);
711
712 platform_device_register(&orion_xor1_shared);
713}
714
715
716
717
718static struct orion_ehci_data orion_ehci_data;
719static u64 ehci_dmamask = DMA_BIT_MASK(32);
720
721
722
723
724
725static struct resource orion_ehci_resources[2];
726
727static struct platform_device orion_ehci = {
728 .name = "orion-ehci",
729 .id = 0,
730 .dev = {
731 .dma_mask = &ehci_dmamask,
732 .coherent_dma_mask = DMA_BIT_MASK(32),
733 .platform_data = &orion_ehci_data,
734 },
735};
736
737void __init orion_ehci_init(unsigned long mapbase,
738 unsigned long irq,
739 enum orion_ehci_phy_ver phy_version)
740{
741 orion_ehci_data.phy_version = phy_version;
742 fill_resources_irq(&orion_ehci, orion_ehci_resources, mapbase, SZ_4K - 1,
743 irq);
744
745 platform_device_register(&orion_ehci);
746}
747
748
749
750
751static struct resource orion_ehci_1_resources[2];
752
753static struct platform_device orion_ehci_1 = {
754 .name = "orion-ehci",
755 .id = 1,
756 .dev = {
757 .dma_mask = &ehci_dmamask,
758 .coherent_dma_mask = DMA_BIT_MASK(32),
759 .platform_data = &orion_ehci_data,
760 },
761};
762
763void __init orion_ehci_1_init(unsigned long mapbase,
764 unsigned long irq)
765{
766 fill_resources_irq(&orion_ehci_1, orion_ehci_1_resources,
767 mapbase, SZ_4K - 1, irq);
768
769 platform_device_register(&orion_ehci_1);
770}
771
772
773
774
775static struct resource orion_ehci_2_resources[2];
776
777static struct platform_device orion_ehci_2 = {
778 .name = "orion-ehci",
779 .id = 2,
780 .dev = {
781 .dma_mask = &ehci_dmamask,
782 .coherent_dma_mask = DMA_BIT_MASK(32),
783 .platform_data = &orion_ehci_data,
784 },
785};
786
787void __init orion_ehci_2_init(unsigned long mapbase,
788 unsigned long irq)
789{
790 fill_resources_irq(&orion_ehci_2, orion_ehci_2_resources,
791 mapbase, SZ_4K - 1, irq);
792
793 platform_device_register(&orion_ehci_2);
794}
795
796
797
798
799static struct resource orion_sata_resources[2] = {
800 {
801 .name = "sata base",
802 }, {
803 .name = "sata irq",
804 },
805};
806
807static struct platform_device orion_sata = {
808 .name = "sata_mv",
809 .id = 0,
810 .dev = {
811 .coherent_dma_mask = DMA_BIT_MASK(32),
812 },
813};
814
815void __init orion_sata_init(struct mv_sata_platform_data *sata_data,
816 unsigned long mapbase,
817 unsigned long irq)
818{
819 orion_sata.dev.platform_data = sata_data;
820 fill_resources_irq(&orion_sata, orion_sata_resources,
821 mapbase, 0x5000 - 1, irq);
822
823 platform_device_register(&orion_sata);
824}
825
826
827
828
829static struct resource orion_crypto_resources[] = {
830 {
831 .name = "regs",
832 }, {
833 .name = "crypto interrupt",
834 }, {
835 .name = "sram",
836 .flags = IORESOURCE_MEM,
837 },
838};
839
840static struct platform_device orion_crypto = {
841 .name = "mv_crypto",
842 .id = -1,
843};
844
845void __init orion_crypto_init(unsigned long mapbase,
846 unsigned long srambase,
847 unsigned long sram_size,
848 unsigned long irq)
849{
850 fill_resources_irq(&orion_crypto, orion_crypto_resources,
851 mapbase, 0xffff, irq);
852 orion_crypto.num_resources = 3;
853 orion_crypto_resources[2].start = srambase;
854 orion_crypto_resources[2].end = srambase + sram_size - 1;
855
856 platform_device_register(&orion_crypto);
857}
858
