LXR linux/arch/arm64/include/asm/acpi.h

   1/*
   2 *  Copyright (C) 2013-2014, Linaro Ltd.
   3 *      Author: Al Stone <al.stone@linaro.org>
   4 *      Author: Graeme Gregory <graeme.gregory@linaro.org>
   5 *      Author: Hanjun Guo <hanjun.guo@linaro.org>
   6 *
   7 *  This program is free software; you can redistribute it and/or modify
   8 *  it under the terms of the GNU General Public License version 2 as
   9 *  published by the Free Software Foundation;
  10 */
  11
  12#ifndef _ASM_ACPI_H
  13#define _ASM_ACPI_H
  14
  15#include <linux/efi.h>
  16#include <linux/memblock.h>
  17#include <linux/psci.h>
  18
  19#include <asm/cputype.h>
  20#include <asm/io.h>
  21#include <asm/smp_plat.h>
  22#include <asm/tlbflush.h>
  23
  24/* Macros for consistency checks of the GICC subtable of MADT */
  25#define ACPI_MADT_GICC_LENGTH   \
  26        (acpi_gbl_FADT.header.revision < 6 ? 76 : 80)
  27
  28#define BAD_MADT_GICC_ENTRY(entry, end)                                 \
  29        (!(entry) || (entry)->header.length != ACPI_MADT_GICC_LENGTH || \
  30        (unsigned long)(entry) + ACPI_MADT_GICC_LENGTH > (end))
  31
  32#define ACPI_MADT_GICC_SPE  (ACPI_OFFSET(struct acpi_madt_generic_interrupt, \
  33        spe_interrupt) + sizeof(u16))
  34
  35/* Basic configuration for ACPI */
  36#ifdef  CONFIG_ACPI
  37pgprot_t __acpi_get_mem_attribute(phys_addr_t addr);
  38
  39/* ACPI table mapping after acpi_permanent_mmap is set */
  40static inline void __iomem *acpi_os_ioremap(acpi_physical_address phys,
  41                                            acpi_size size)
  42{
  43        /* For normal memory we already have a cacheable mapping. */
  44        if (memblock_is_map_memory(phys))
  45                return (void __iomem *)__phys_to_virt(phys);
  46
  47        /*
  48         * We should still honor the memory's attribute here because
  49         * crash dump kernel possibly excludes some ACPI (reclaim)
  50         * regions from memblock list.
  51         */
  52        return __ioremap(phys, size, __acpi_get_mem_attribute(phys));
  53}
  54#define acpi_os_ioremap acpi_os_ioremap
  55
  56typedef u64 phys_cpuid_t;
  57#define PHYS_CPUID_INVALID INVALID_HWID
  58
  59#define acpi_strict 1   /* No out-of-spec workarounds on ARM64 */
  60extern int acpi_disabled;
  61extern int acpi_noirq;
  62extern int acpi_pci_disabled;
  63
  64static inline void disable_acpi(void)
  65{
  66        acpi_disabled = 1;
  67        acpi_pci_disabled = 1;
  68        acpi_noirq = 1;
  69}
  70
  71static inline void enable_acpi(void)
  72{
  73        acpi_disabled = 0;
  74        acpi_pci_disabled = 0;
  75        acpi_noirq = 0;
  76}
  77
  78/*
  79 * The ACPI processor driver for ACPI core code needs this macro
  80 * to find out this cpu was already mapped (mapping from CPU hardware
  81 * ID to CPU logical ID) or not.
  82 */
  83#define cpu_physical_id(cpu) cpu_logical_map(cpu)
  84
  85/*
  86 * It's used from ACPI core in kdump to boot UP system with SMP kernel,
  87 * with this check the ACPI core will not override the CPU index
  88 * obtained from GICC with 0 and not print some error message as well.
  89 * Since MADT must provide at least one GICC structure for GIC
  90 * initialization, CPU will be always available in MADT on ARM64.
  91 */
  92static inline bool acpi_has_cpu_in_madt(void)
  93{
  94        return true;
  95}
  96
  97struct acpi_madt_generic_interrupt *acpi_cpu_get_madt_gicc(int cpu);
  98static inline u32 get_acpi_id_for_cpu(unsigned int cpu)
  99{
 100        return  acpi_cpu_get_madt_gicc(cpu)->uid;
 101}
 102
 103static inline void arch_fix_phys_package_id(int num, u32 slot) { }
 104void __init acpi_init_cpus(void);
 105
 106#else
 107static inline void acpi_init_cpus(void) { }
 108#endif /* CONFIG_ACPI */
 109
 110#ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
 111bool acpi_parking_protocol_valid(int cpu);
 112void __init
 113acpi_set_mailbox_entry(int cpu, struct acpi_madt_generic_interrupt *processor);
 114#else
 115static inline bool acpi_parking_protocol_valid(int cpu) { return false; }
 116static inline void
 117acpi_set_mailbox_entry(int cpu, struct acpi_madt_generic_interrupt *processor)
 118{}
 119#endif
 120
 121static inline const char *acpi_get_enable_method(int cpu)
 122{
 123        if (acpi_psci_present())
 124                return "psci";
 125
 126        if (acpi_parking_protocol_valid(cpu))
 127                return "parking-protocol";
 128
 129        return NULL;
 130}
 131
 132#ifdef  CONFIG_ACPI_APEI
 133/*
 134 * acpi_disable_cmcff is used in drivers/acpi/apei/hest.c for disabling
 135 * IA-32 Architecture Corrected Machine Check (CMC) Firmware-First mode
 136 * with a kernel command line parameter "acpi=nocmcoff". But we don't
 137 * have this IA-32 specific feature on ARM64, this definition is only
 138 * for compatibility.
 139 */
 140#define acpi_disable_cmcff 1
 141static inline pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr)
 142{
 143        return __acpi_get_mem_attribute(addr);
 144}
 145#endif /* CONFIG_ACPI_APEI */
 146
 147#ifdef CONFIG_ACPI_NUMA
 148int arm64_acpi_numa_init(void);
 149int acpi_numa_get_nid(unsigned int cpu);
 150void acpi_map_cpus_to_nodes(void);
 151#else
 152static inline int arm64_acpi_numa_init(void) { return -ENOSYS; }
 153static inline int acpi_numa_get_nid(unsigned int cpu) { return NUMA_NO_NODE; }
 154static inline void acpi_map_cpus_to_nodes(void) { }
 155#endif /* CONFIG_ACPI_NUMA */
 156
 157#define ACPI_TABLE_UPGRADE_MAX_PHYS MEMBLOCK_ALLOC_ACCESSIBLE
 158
 159#endif /*_ASM_ACPI_H*/
 160