linux/arch/m68k/include/asm/q40_master.h
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   1/* SPDX-License-Identifier: GPL-2.0 */
   2/*
   3 * Q40 master Chip Control
   4 * RTC stuff merged for compactness.
   5*/
   6
   7#ifndef _Q40_MASTER_H
   8#define _Q40_MASTER_H
   9
  10#include <asm/raw_io.h>
  11#include <asm/kmap.h>
  12
  13#define q40_master_addr 0xff000000
  14
  15#define IIRQ_REG            0x0       /* internal IRQ reg */
  16#define EIRQ_REG            0x4       /* external ... */
  17#define KEYCODE_REG         0x1c      /* value of received scancode  */
  18#define DISPLAY_CONTROL_REG 0x18
  19#define FRAME_CLEAR_REG     0x24
  20#define LED_REG             0x30
  21
  22#define Q40_LED_ON()        master_outb(1,LED_REG)
  23#define Q40_LED_OFF()       master_outb(0,LED_REG)
  24
  25#define INTERRUPT_REG       IIRQ_REG  /* "native" ints */
  26#define KEY_IRQ_ENABLE_REG  0x08      /**/
  27#define KEYBOARD_UNLOCK_REG 0x20      /* clear kb int */
  28
  29#define SAMPLE_ENABLE_REG   0x14      /* generate SAMPLE ints */
  30#define SAMPLE_RATE_REG     0x2c
  31#define SAMPLE_CLEAR_REG    0x28
  32#define SAMPLE_LOW          0x00
  33#define SAMPLE_HIGH         0x01
  34
  35#define FRAME_RATE_REG       0x38      /* generate FRAME ints at 200 HZ rate */
  36
  37#if 0
  38#define SER_ENABLE_REG      0x0c      /* allow serial ints to be generated */
  39#endif
  40#define EXT_ENABLE_REG      0x10      /* ... rest of the ISA ints ... */
  41
  42
  43#define master_inb(_reg_)      in_8((unsigned char *)q40_master_addr+_reg_)
  44#define master_outb(_b_,_reg_)  out_8((unsigned char *)q40_master_addr+_reg_,_b_)
  45
  46/* RTC defines */
  47
  48#define Q40_RTC_BASE        (0xff021ffc)
  49
  50#define Q40_RTC_YEAR        (*(volatile unsigned char *)(Q40_RTC_BASE+0))
  51#define Q40_RTC_MNTH        (*(volatile unsigned char *)(Q40_RTC_BASE-4))
  52#define Q40_RTC_DATE        (*(volatile unsigned char *)(Q40_RTC_BASE-8))
  53#define Q40_RTC_DOW         (*(volatile unsigned char *)(Q40_RTC_BASE-12))
  54#define Q40_RTC_HOUR        (*(volatile unsigned char *)(Q40_RTC_BASE-16))
  55#define Q40_RTC_MINS        (*(volatile unsigned char *)(Q40_RTC_BASE-20))
  56#define Q40_RTC_SECS        (*(volatile unsigned char *)(Q40_RTC_BASE-24))
  57#define Q40_RTC_CTRL        (*(volatile unsigned char *)(Q40_RTC_BASE-28))
  58
  59/* some control bits */
  60#define Q40_RTC_READ   64  /* prepare for reading */
  61#define Q40_RTC_WRITE  128
  62
  63/* define some Q40 specific ints */
  64#include <asm/q40ints.h>
  65
  66/* misc defs */
  67#define DAC_LEFT  ((unsigned char *)0xff008000)
  68#define DAC_RIGHT ((unsigned char *)0xff008004)
  69
  70#endif /* _Q40_MASTER_H */
  71