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19#include <linux/init.h>
20#include <linux/kernel.h>
21#include <asm/clock.h>
22#include <asm/freq.h>
23#include <asm/io.h>
24
25
26
27
28
29static int stc_multipliers[] = { 1, 2, 3, 4, 6, 1, 1, 1 };
30static int ifc_divisors[] = { 1, 2, 3, 4, 1, 1, 1, 1 };
31static int pfc_divisors[] = { 1, 2, 3, 4, 6, 1, 1, 1 };
32
33static void master_clk_init(struct clk *clk)
34{
35 clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0003];
36}
37
38static struct sh_clk_ops sh7705_master_clk_ops = {
39 .init = master_clk_init,
40};
41
42static unsigned long module_clk_recalc(struct clk *clk)
43{
44 int idx = __raw_readw(FRQCR) & 0x0003;
45 return clk->parent->rate / pfc_divisors[idx];
46}
47
48static struct sh_clk_ops sh7705_module_clk_ops = {
49 .recalc = module_clk_recalc,
50};
51
52static unsigned long bus_clk_recalc(struct clk *clk)
53{
54 int idx = (__raw_readw(FRQCR) & 0x0300) >> 8;
55 return clk->parent->rate / stc_multipliers[idx];
56}
57
58static struct sh_clk_ops sh7705_bus_clk_ops = {
59 .recalc = bus_clk_recalc,
60};
61
62static unsigned long cpu_clk_recalc(struct clk *clk)
63{
64 int idx = (__raw_readw(FRQCR) & 0x0030) >> 4;
65 return clk->parent->rate / ifc_divisors[idx];
66}
67
68static struct sh_clk_ops sh7705_cpu_clk_ops = {
69 .recalc = cpu_clk_recalc,
70};
71
72static struct sh_clk_ops *sh7705_clk_ops[] = {
73 &sh7705_master_clk_ops,
74 &sh7705_module_clk_ops,
75 &sh7705_bus_clk_ops,
76 &sh7705_cpu_clk_ops,
77};
78
79void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
80{
81 if (idx < ARRAY_SIZE(sh7705_clk_ops))
82 *ops = sh7705_clk_ops[idx];
83}
84
85