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14#include <drm/drmP.h>
15#include <drm/drm_crtc.h>
16#include <drm/drm_crtc_helper.h>
17#include <linux/kernel.h>
18#include <linux/component.h>
19#include <linux/platform_device.h>
20#include <linux/of.h>
21#include <linux/of_graph.h>
22#include <linux/interrupt.h>
23#include <linux/types.h>
24#include <linux/clk.h>
25#include <video/videomode.h>
26
27#include "mtk_dpi_regs.h"
28#include "mtk_drm_ddp_comp.h"
29
30enum mtk_dpi_out_bit_num {
31 MTK_DPI_OUT_BIT_NUM_8BITS,
32 MTK_DPI_OUT_BIT_NUM_10BITS,
33 MTK_DPI_OUT_BIT_NUM_12BITS,
34 MTK_DPI_OUT_BIT_NUM_16BITS
35};
36
37enum mtk_dpi_out_yc_map {
38 MTK_DPI_OUT_YC_MAP_RGB,
39 MTK_DPI_OUT_YC_MAP_CYCY,
40 MTK_DPI_OUT_YC_MAP_YCYC,
41 MTK_DPI_OUT_YC_MAP_CY,
42 MTK_DPI_OUT_YC_MAP_YC
43};
44
45enum mtk_dpi_out_channel_swap {
46 MTK_DPI_OUT_CHANNEL_SWAP_RGB,
47 MTK_DPI_OUT_CHANNEL_SWAP_GBR,
48 MTK_DPI_OUT_CHANNEL_SWAP_BRG,
49 MTK_DPI_OUT_CHANNEL_SWAP_RBG,
50 MTK_DPI_OUT_CHANNEL_SWAP_GRB,
51 MTK_DPI_OUT_CHANNEL_SWAP_BGR
52};
53
54enum mtk_dpi_out_color_format {
55 MTK_DPI_COLOR_FORMAT_RGB,
56 MTK_DPI_COLOR_FORMAT_RGB_FULL,
57 MTK_DPI_COLOR_FORMAT_YCBCR_444,
58 MTK_DPI_COLOR_FORMAT_YCBCR_422,
59 MTK_DPI_COLOR_FORMAT_XV_YCC,
60 MTK_DPI_COLOR_FORMAT_YCBCR_444_FULL,
61 MTK_DPI_COLOR_FORMAT_YCBCR_422_FULL
62};
63
64struct mtk_dpi {
65 struct mtk_ddp_comp ddp_comp;
66 struct drm_encoder encoder;
67 struct drm_bridge *bridge;
68 void __iomem *regs;
69 struct device *dev;
70 struct clk *engine_clk;
71 struct clk *pixel_clk;
72 struct clk *tvd_clk;
73 int irq;
74 struct drm_display_mode mode;
75 enum mtk_dpi_out_color_format color_format;
76 enum mtk_dpi_out_yc_map yc_map;
77 enum mtk_dpi_out_bit_num bit_num;
78 enum mtk_dpi_out_channel_swap channel_swap;
79 bool power_sta;
80 u8 power_ctl;
81};
82
83static inline struct mtk_dpi *mtk_dpi_from_encoder(struct drm_encoder *e)
84{
85 return container_of(e, struct mtk_dpi, encoder);
86}
87
88enum mtk_dpi_polarity {
89 MTK_DPI_POLARITY_RISING,
90 MTK_DPI_POLARITY_FALLING,
91};
92
93enum mtk_dpi_power_ctl {
94 DPI_POWER_START = BIT(0),
95 DPI_POWER_ENABLE = BIT(1),
96};
97
98struct mtk_dpi_polarities {
99 enum mtk_dpi_polarity de_pol;
100 enum mtk_dpi_polarity ck_pol;
101 enum mtk_dpi_polarity hsync_pol;
102 enum mtk_dpi_polarity vsync_pol;
103};
104
105struct mtk_dpi_sync_param {
106 u32 sync_width;
107 u32 front_porch;
108 u32 back_porch;
109 bool shift_half_line;
110};
111
112struct mtk_dpi_yc_limit {
113 u16 y_top;
114 u16 y_bottom;
115 u16 c_top;
116 u16 c_bottom;
117};
118
119static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask)
120{
121 u32 tmp = readl(dpi->regs + offset) & ~mask;
122
123 tmp |= (val & mask);
124 writel(tmp, dpi->regs + offset);
125}
126
127static void mtk_dpi_sw_reset(struct mtk_dpi *dpi, bool reset)
128{
129 mtk_dpi_mask(dpi, DPI_RET, reset ? RST : 0, RST);
130}
131
132static void mtk_dpi_enable(struct mtk_dpi *dpi)
133{
134 mtk_dpi_mask(dpi, DPI_EN, EN, EN);
135}
136
137static void mtk_dpi_disable(struct mtk_dpi *dpi)
138{
139 mtk_dpi_mask(dpi, DPI_EN, 0, EN);
140}
141
142static void mtk_dpi_config_hsync(struct mtk_dpi *dpi,
143 struct mtk_dpi_sync_param *sync)
144{
145 mtk_dpi_mask(dpi, DPI_TGEN_HWIDTH,
146 sync->sync_width << HPW, HPW_MASK);
147 mtk_dpi_mask(dpi, DPI_TGEN_HPORCH,
148 sync->back_porch << HBP, HBP_MASK);
149 mtk_dpi_mask(dpi, DPI_TGEN_HPORCH, sync->front_porch << HFP,
150 HFP_MASK);
151}
152
153static void mtk_dpi_config_vsync(struct mtk_dpi *dpi,
154 struct mtk_dpi_sync_param *sync,
155 u32 width_addr, u32 porch_addr)
156{
157 mtk_dpi_mask(dpi, width_addr,
158 sync->sync_width << VSYNC_WIDTH_SHIFT,
159 VSYNC_WIDTH_MASK);
160 mtk_dpi_mask(dpi, width_addr,
161 sync->shift_half_line << VSYNC_HALF_LINE_SHIFT,
162 VSYNC_HALF_LINE_MASK);
163 mtk_dpi_mask(dpi, porch_addr,
164 sync->back_porch << VSYNC_BACK_PORCH_SHIFT,
165 VSYNC_BACK_PORCH_MASK);
166 mtk_dpi_mask(dpi, porch_addr,
167 sync->front_porch << VSYNC_FRONT_PORCH_SHIFT,
168 VSYNC_FRONT_PORCH_MASK);
169}
170
171static void mtk_dpi_config_vsync_lodd(struct mtk_dpi *dpi,
172 struct mtk_dpi_sync_param *sync)
173{
174 mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH, DPI_TGEN_VPORCH);
175}
176
177static void mtk_dpi_config_vsync_leven(struct mtk_dpi *dpi,
178 struct mtk_dpi_sync_param *sync)
179{
180 mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH_LEVEN,
181 DPI_TGEN_VPORCH_LEVEN);
182}
183
184static void mtk_dpi_config_vsync_rodd(struct mtk_dpi *dpi,
185 struct mtk_dpi_sync_param *sync)
186{
187 mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH_RODD,
188 DPI_TGEN_VPORCH_RODD);
189}
190
191static void mtk_dpi_config_vsync_reven(struct mtk_dpi *dpi,
192 struct mtk_dpi_sync_param *sync)
193{
194 mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH_REVEN,
195 DPI_TGEN_VPORCH_REVEN);
196}
197
198static void mtk_dpi_config_pol(struct mtk_dpi *dpi,
199 struct mtk_dpi_polarities *dpi_pol)
200{
201 unsigned int pol;
202
203 pol = (dpi_pol->ck_pol == MTK_DPI_POLARITY_RISING ? 0 : CK_POL) |
204 (dpi_pol->de_pol == MTK_DPI_POLARITY_RISING ? 0 : DE_POL) |
205 (dpi_pol->hsync_pol == MTK_DPI_POLARITY_RISING ? 0 : HSYNC_POL) |
206 (dpi_pol->vsync_pol == MTK_DPI_POLARITY_RISING ? 0 : VSYNC_POL);
207 mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, pol,
208 CK_POL | DE_POL | HSYNC_POL | VSYNC_POL);
209}
210
211static void mtk_dpi_config_3d(struct mtk_dpi *dpi, bool en_3d)
212{
213 mtk_dpi_mask(dpi, DPI_CON, en_3d ? TDFP_EN : 0, TDFP_EN);
214}
215
216static void mtk_dpi_config_interface(struct mtk_dpi *dpi, bool inter)
217{
218 mtk_dpi_mask(dpi, DPI_CON, inter ? INTL_EN : 0, INTL_EN);
219}
220
221static void mtk_dpi_config_fb_size(struct mtk_dpi *dpi, u32 width, u32 height)
222{
223 mtk_dpi_mask(dpi, DPI_SIZE, width << HSIZE, HSIZE_MASK);
224 mtk_dpi_mask(dpi, DPI_SIZE, height << VSIZE, VSIZE_MASK);
225}
226
227static void mtk_dpi_config_channel_limit(struct mtk_dpi *dpi,
228 struct mtk_dpi_yc_limit *limit)
229{
230 mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit->y_bottom << Y_LIMINT_BOT,
231 Y_LIMINT_BOT_MASK);
232 mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit->y_top << Y_LIMINT_TOP,
233 Y_LIMINT_TOP_MASK);
234 mtk_dpi_mask(dpi, DPI_C_LIMIT, limit->c_bottom << C_LIMIT_BOT,
235 C_LIMIT_BOT_MASK);
236 mtk_dpi_mask(dpi, DPI_C_LIMIT, limit->c_top << C_LIMIT_TOP,
237 C_LIMIT_TOP_MASK);
238}
239
240static void mtk_dpi_config_bit_num(struct mtk_dpi *dpi,
241 enum mtk_dpi_out_bit_num num)
242{
243 u32 val;
244
245 switch (num) {
246 case MTK_DPI_OUT_BIT_NUM_8BITS:
247 val = OUT_BIT_8;
248 break;
249 case MTK_DPI_OUT_BIT_NUM_10BITS:
250 val = OUT_BIT_10;
251 break;
252 case MTK_DPI_OUT_BIT_NUM_12BITS:
253 val = OUT_BIT_12;
254 break;
255 case MTK_DPI_OUT_BIT_NUM_16BITS:
256 val = OUT_BIT_16;
257 break;
258 default:
259 val = OUT_BIT_8;
260 break;
261 }
262 mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << OUT_BIT,
263 OUT_BIT_MASK);
264}
265
266static void mtk_dpi_config_yc_map(struct mtk_dpi *dpi,
267 enum mtk_dpi_out_yc_map map)
268{
269 u32 val;
270
271 switch (map) {
272 case MTK_DPI_OUT_YC_MAP_RGB:
273 val = YC_MAP_RGB;
274 break;
275 case MTK_DPI_OUT_YC_MAP_CYCY:
276 val = YC_MAP_CYCY;
277 break;
278 case MTK_DPI_OUT_YC_MAP_YCYC:
279 val = YC_MAP_YCYC;
280 break;
281 case MTK_DPI_OUT_YC_MAP_CY:
282 val = YC_MAP_CY;
283 break;
284 case MTK_DPI_OUT_YC_MAP_YC:
285 val = YC_MAP_YC;
286 break;
287 default:
288 val = YC_MAP_RGB;
289 break;
290 }
291
292 mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << YC_MAP, YC_MAP_MASK);
293}
294
295static void mtk_dpi_config_channel_swap(struct mtk_dpi *dpi,
296 enum mtk_dpi_out_channel_swap swap)
297{
298 u32 val;
299
300 switch (swap) {
301 case MTK_DPI_OUT_CHANNEL_SWAP_RGB:
302 val = SWAP_RGB;
303 break;
304 case MTK_DPI_OUT_CHANNEL_SWAP_GBR:
305 val = SWAP_GBR;
306 break;
307 case MTK_DPI_OUT_CHANNEL_SWAP_BRG:
308 val = SWAP_BRG;
309 break;
310 case MTK_DPI_OUT_CHANNEL_SWAP_RBG:
311 val = SWAP_RBG;
312 break;
313 case MTK_DPI_OUT_CHANNEL_SWAP_GRB:
314 val = SWAP_GRB;
315 break;
316 case MTK_DPI_OUT_CHANNEL_SWAP_BGR:
317 val = SWAP_BGR;
318 break;
319 default:
320 val = SWAP_RGB;
321 break;
322 }
323
324 mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << CH_SWAP, CH_SWAP_MASK);
325}
326
327static void mtk_dpi_config_yuv422_enable(struct mtk_dpi *dpi, bool enable)
328{
329 mtk_dpi_mask(dpi, DPI_CON, enable ? YUV422_EN : 0, YUV422_EN);
330}
331
332static void mtk_dpi_config_csc_enable(struct mtk_dpi *dpi, bool enable)
333{
334 mtk_dpi_mask(dpi, DPI_CON, enable ? CSC_ENABLE : 0, CSC_ENABLE);
335}
336
337static void mtk_dpi_config_swap_input(struct mtk_dpi *dpi, bool enable)
338{
339 mtk_dpi_mask(dpi, DPI_CON, enable ? IN_RB_SWAP : 0, IN_RB_SWAP);
340}
341
342static void mtk_dpi_config_2n_h_fre(struct mtk_dpi *dpi)
343{
344 mtk_dpi_mask(dpi, DPI_H_FRE_CON, H_FRE_2N, H_FRE_2N);
345}
346
347static void mtk_dpi_config_color_format(struct mtk_dpi *dpi,
348 enum mtk_dpi_out_color_format format)
349{
350 if ((format == MTK_DPI_COLOR_FORMAT_YCBCR_444) ||
351 (format == MTK_DPI_COLOR_FORMAT_YCBCR_444_FULL)) {
352 mtk_dpi_config_yuv422_enable(dpi, false);
353 mtk_dpi_config_csc_enable(dpi, true);
354 mtk_dpi_config_swap_input(dpi, false);
355 mtk_dpi_config_channel_swap(dpi, MTK_DPI_OUT_CHANNEL_SWAP_BGR);
356 } else if ((format == MTK_DPI_COLOR_FORMAT_YCBCR_422) ||
357 (format == MTK_DPI_COLOR_FORMAT_YCBCR_422_FULL)) {
358 mtk_dpi_config_yuv422_enable(dpi, true);
359 mtk_dpi_config_csc_enable(dpi, true);
360 mtk_dpi_config_swap_input(dpi, true);
361 mtk_dpi_config_channel_swap(dpi, MTK_DPI_OUT_CHANNEL_SWAP_RGB);
362 } else {
363 mtk_dpi_config_yuv422_enable(dpi, false);
364 mtk_dpi_config_csc_enable(dpi, false);
365 mtk_dpi_config_swap_input(dpi, false);
366 mtk_dpi_config_channel_swap(dpi, MTK_DPI_OUT_CHANNEL_SWAP_RGB);
367 }
368}
369
370static void mtk_dpi_power_off(struct mtk_dpi *dpi, enum mtk_dpi_power_ctl pctl)
371{
372 dpi->power_ctl &= ~pctl;
373
374 if ((dpi->power_ctl & DPI_POWER_START) ||
375 (dpi->power_ctl & DPI_POWER_ENABLE))
376 return;
377
378 if (!dpi->power_sta)
379 return;
380
381 mtk_dpi_disable(dpi);
382 clk_disable_unprepare(dpi->pixel_clk);
383 clk_disable_unprepare(dpi->engine_clk);
384 dpi->power_sta = false;
385}
386
387static int mtk_dpi_power_on(struct mtk_dpi *dpi, enum mtk_dpi_power_ctl pctl)
388{
389 int ret;
390
391 dpi->power_ctl |= pctl;
392
393 if (!(dpi->power_ctl & DPI_POWER_START) &&
394 !(dpi->power_ctl & DPI_POWER_ENABLE))
395 return 0;
396
397 if (dpi->power_sta)
398 return 0;
399
400 ret = clk_prepare_enable(dpi->engine_clk);
401 if (ret) {
402 dev_err(dpi->dev, "Failed to enable engine clock: %d\n", ret);
403 goto err_eng;
404 }
405
406 ret = clk_prepare_enable(dpi->pixel_clk);
407 if (ret) {
408 dev_err(dpi->dev, "Failed to enable pixel clock: %d\n", ret);
409 goto err_pixel;
410 }
411
412 mtk_dpi_enable(dpi);
413 dpi->power_sta = true;
414 return 0;
415
416err_pixel:
417 clk_disable_unprepare(dpi->engine_clk);
418err_eng:
419 dpi->power_ctl &= ~pctl;
420 return ret;
421}
422
423static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
424 struct drm_display_mode *mode)
425{
426 struct mtk_dpi_yc_limit limit;
427 struct mtk_dpi_polarities dpi_pol;
428 struct mtk_dpi_sync_param hsync;
429 struct mtk_dpi_sync_param vsync_lodd = { 0 };
430 struct mtk_dpi_sync_param vsync_leven = { 0 };
431 struct mtk_dpi_sync_param vsync_rodd = { 0 };
432 struct mtk_dpi_sync_param vsync_reven = { 0 };
433 struct videomode vm = { 0 };
434 unsigned long pll_rate;
435 unsigned int factor;
436
437
438
439 if (mode->clock <= 27000)
440 factor = 3 << 4;
441 else if (mode->clock <= 84000)
442 factor = 3 << 3;
443 else if (mode->clock <= 167000)
444 factor = 3 << 2;
445 else
446 factor = 3 << 1;
447 drm_display_mode_to_videomode(mode, &vm);
448 pll_rate = vm.pixelclock * factor;
449
450 dev_dbg(dpi->dev, "Want PLL %lu Hz, pixel clock %lu Hz\n",
451 pll_rate, vm.pixelclock);
452
453 clk_set_rate(dpi->tvd_clk, pll_rate);
454 pll_rate = clk_get_rate(dpi->tvd_clk);
455
456 vm.pixelclock = pll_rate / factor;
457 clk_set_rate(dpi->pixel_clk, vm.pixelclock);
458 vm.pixelclock = clk_get_rate(dpi->pixel_clk);
459
460 dev_dbg(dpi->dev, "Got PLL %lu Hz, pixel clock %lu Hz\n",
461 pll_rate, vm.pixelclock);
462
463 limit.c_bottom = 0x0010;
464 limit.c_top = 0x0FE0;
465 limit.y_bottom = 0x0010;
466 limit.y_top = 0x0FE0;
467
468 dpi_pol.ck_pol = MTK_DPI_POLARITY_FALLING;
469 dpi_pol.de_pol = MTK_DPI_POLARITY_RISING;
470 dpi_pol.hsync_pol = vm.flags & DISPLAY_FLAGS_HSYNC_HIGH ?
471 MTK_DPI_POLARITY_FALLING : MTK_DPI_POLARITY_RISING;
472 dpi_pol.vsync_pol = vm.flags & DISPLAY_FLAGS_VSYNC_HIGH ?
473 MTK_DPI_POLARITY_FALLING : MTK_DPI_POLARITY_RISING;
474 hsync.sync_width = vm.hsync_len;
475 hsync.back_porch = vm.hback_porch;
476 hsync.front_porch = vm.hfront_porch;
477 hsync.shift_half_line = false;
478 vsync_lodd.sync_width = vm.vsync_len;
479 vsync_lodd.back_porch = vm.vback_porch;
480 vsync_lodd.front_porch = vm.vfront_porch;
481 vsync_lodd.shift_half_line = false;
482
483 if (vm.flags & DISPLAY_FLAGS_INTERLACED &&
484 mode->flags & DRM_MODE_FLAG_3D_MASK) {
485 vsync_leven = vsync_lodd;
486 vsync_rodd = vsync_lodd;
487 vsync_reven = vsync_lodd;
488 vsync_leven.shift_half_line = true;
489 vsync_reven.shift_half_line = true;
490 } else if (vm.flags & DISPLAY_FLAGS_INTERLACED &&
491 !(mode->flags & DRM_MODE_FLAG_3D_MASK)) {
492 vsync_leven = vsync_lodd;
493 vsync_leven.shift_half_line = true;
494 } else if (!(vm.flags & DISPLAY_FLAGS_INTERLACED) &&
495 mode->flags & DRM_MODE_FLAG_3D_MASK) {
496 vsync_rodd = vsync_lodd;
497 }
498 mtk_dpi_sw_reset(dpi, true);
499 mtk_dpi_config_pol(dpi, &dpi_pol);
500
501 mtk_dpi_config_hsync(dpi, &hsync);
502 mtk_dpi_config_vsync_lodd(dpi, &vsync_lodd);
503 mtk_dpi_config_vsync_rodd(dpi, &vsync_rodd);
504 mtk_dpi_config_vsync_leven(dpi, &vsync_leven);
505 mtk_dpi_config_vsync_reven(dpi, &vsync_reven);
506
507 mtk_dpi_config_3d(dpi, !!(mode->flags & DRM_MODE_FLAG_3D_MASK));
508 mtk_dpi_config_interface(dpi, !!(vm.flags &
509 DISPLAY_FLAGS_INTERLACED));
510 if (vm.flags & DISPLAY_FLAGS_INTERLACED)
511 mtk_dpi_config_fb_size(dpi, vm.hactive, vm.vactive >> 1);
512 else
513 mtk_dpi_config_fb_size(dpi, vm.hactive, vm.vactive);
514
515 mtk_dpi_config_channel_limit(dpi, &limit);
516 mtk_dpi_config_bit_num(dpi, dpi->bit_num);
517 mtk_dpi_config_channel_swap(dpi, dpi->channel_swap);
518 mtk_dpi_config_yc_map(dpi, dpi->yc_map);
519 mtk_dpi_config_color_format(dpi, dpi->color_format);
520 mtk_dpi_config_2n_h_fre(dpi);
521 mtk_dpi_sw_reset(dpi, false);
522
523 return 0;
524}
525
526static void mtk_dpi_encoder_destroy(struct drm_encoder *encoder)
527{
528 drm_encoder_cleanup(encoder);
529}
530
531static const struct drm_encoder_funcs mtk_dpi_encoder_funcs = {
532 .destroy = mtk_dpi_encoder_destroy,
533};
534
535static bool mtk_dpi_encoder_mode_fixup(struct drm_encoder *encoder,
536 const struct drm_display_mode *mode,
537 struct drm_display_mode *adjusted_mode)
538{
539 return true;
540}
541
542static void mtk_dpi_encoder_mode_set(struct drm_encoder *encoder,
543 struct drm_display_mode *mode,
544 struct drm_display_mode *adjusted_mode)
545{
546 struct mtk_dpi *dpi = mtk_dpi_from_encoder(encoder);
547
548 drm_mode_copy(&dpi->mode, adjusted_mode);
549}
550
551static void mtk_dpi_encoder_disable(struct drm_encoder *encoder)
552{
553 struct mtk_dpi *dpi = mtk_dpi_from_encoder(encoder);
554
555 mtk_dpi_power_off(dpi, DPI_POWER_ENABLE);
556}
557
558static void mtk_dpi_encoder_enable(struct drm_encoder *encoder)
559{
560 struct mtk_dpi *dpi = mtk_dpi_from_encoder(encoder);
561
562 mtk_dpi_power_on(dpi, DPI_POWER_ENABLE);
563 mtk_dpi_set_display_mode(dpi, &dpi->mode);
564}
565
566static int mtk_dpi_atomic_check(struct drm_encoder *encoder,
567 struct drm_crtc_state *crtc_state,
568 struct drm_connector_state *conn_state)
569{
570 return 0;
571}
572
573static const struct drm_encoder_helper_funcs mtk_dpi_encoder_helper_funcs = {
574 .mode_fixup = mtk_dpi_encoder_mode_fixup,
575 .mode_set = mtk_dpi_encoder_mode_set,
576 .disable = mtk_dpi_encoder_disable,
577 .enable = mtk_dpi_encoder_enable,
578 .atomic_check = mtk_dpi_atomic_check,
579};
580
581static void mtk_dpi_start(struct mtk_ddp_comp *comp)
582{
583 struct mtk_dpi *dpi = container_of(comp, struct mtk_dpi, ddp_comp);
584
585 mtk_dpi_power_on(dpi, DPI_POWER_START);
586}
587
588static void mtk_dpi_stop(struct mtk_ddp_comp *comp)
589{
590 struct mtk_dpi *dpi = container_of(comp, struct mtk_dpi, ddp_comp);
591
592 mtk_dpi_power_off(dpi, DPI_POWER_START);
593}
594
595static const struct mtk_ddp_comp_funcs mtk_dpi_funcs = {
596 .start = mtk_dpi_start,
597 .stop = mtk_dpi_stop,
598};
599
600static int mtk_dpi_bind(struct device *dev, struct device *master, void *data)
601{
602 struct mtk_dpi *dpi = dev_get_drvdata(dev);
603 struct drm_device *drm_dev = data;
604 int ret;
605
606 ret = mtk_ddp_comp_register(drm_dev, &dpi->ddp_comp);
607 if (ret < 0) {
608 dev_err(dev, "Failed to register component %pOF: %d\n",
609 dev->of_node, ret);
610 return ret;
611 }
612
613 ret = drm_encoder_init(drm_dev, &dpi->encoder, &mtk_dpi_encoder_funcs,
614 DRM_MODE_ENCODER_TMDS, NULL);
615 if (ret) {
616 dev_err(dev, "Failed to initialize decoder: %d\n", ret);
617 goto err_unregister;
618 }
619 drm_encoder_helper_add(&dpi->encoder, &mtk_dpi_encoder_helper_funcs);
620
621
622 dpi->encoder.possible_crtcs = BIT(1);
623
624 ret = drm_bridge_attach(&dpi->encoder, dpi->bridge, NULL);
625 if (ret) {
626 dev_err(dev, "Failed to attach bridge: %d\n", ret);
627 goto err_cleanup;
628 }
629
630 dpi->bit_num = MTK_DPI_OUT_BIT_NUM_8BITS;
631 dpi->channel_swap = MTK_DPI_OUT_CHANNEL_SWAP_RGB;
632 dpi->yc_map = MTK_DPI_OUT_YC_MAP_RGB;
633 dpi->color_format = MTK_DPI_COLOR_FORMAT_RGB;
634
635 return 0;
636
637err_cleanup:
638 drm_encoder_cleanup(&dpi->encoder);
639err_unregister:
640 mtk_ddp_comp_unregister(drm_dev, &dpi->ddp_comp);
641 return ret;
642}
643
644static void mtk_dpi_unbind(struct device *dev, struct device *master,
645 void *data)
646{
647 struct mtk_dpi *dpi = dev_get_drvdata(dev);
648 struct drm_device *drm_dev = data;
649
650 drm_encoder_cleanup(&dpi->encoder);
651 mtk_ddp_comp_unregister(drm_dev, &dpi->ddp_comp);
652}
653
654static const struct component_ops mtk_dpi_component_ops = {
655 .bind = mtk_dpi_bind,
656 .unbind = mtk_dpi_unbind,
657};
658
659static int mtk_dpi_probe(struct platform_device *pdev)
660{
661 struct device *dev = &pdev->dev;
662 struct mtk_dpi *dpi;
663 struct resource *mem;
664 struct device_node *bridge_node;
665 int comp_id;
666 int ret;
667
668 dpi = devm_kzalloc(dev, sizeof(*dpi), GFP_KERNEL);
669 if (!dpi)
670 return -ENOMEM;
671
672 dpi->dev = dev;
673
674 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
675 dpi->regs = devm_ioremap_resource(dev, mem);
676 if (IS_ERR(dpi->regs)) {
677 ret = PTR_ERR(dpi->regs);
678 dev_err(dev, "Failed to ioremap mem resource: %d\n", ret);
679 return ret;
680 }
681
682 dpi->engine_clk = devm_clk_get(dev, "engine");
683 if (IS_ERR(dpi->engine_clk)) {
684 ret = PTR_ERR(dpi->engine_clk);
685 dev_err(dev, "Failed to get engine clock: %d\n", ret);
686 return ret;
687 }
688
689 dpi->pixel_clk = devm_clk_get(dev, "pixel");
690 if (IS_ERR(dpi->pixel_clk)) {
691 ret = PTR_ERR(dpi->pixel_clk);
692 dev_err(dev, "Failed to get pixel clock: %d\n", ret);
693 return ret;
694 }
695
696 dpi->tvd_clk = devm_clk_get(dev, "pll");
697 if (IS_ERR(dpi->tvd_clk)) {
698 ret = PTR_ERR(dpi->tvd_clk);
699 dev_err(dev, "Failed to get tvdpll clock: %d\n", ret);
700 return ret;
701 }
702
703 dpi->irq = platform_get_irq(pdev, 0);
704 if (dpi->irq <= 0) {
705 dev_err(dev, "Failed to get irq: %d\n", dpi->irq);
706 return -EINVAL;
707 }
708
709 bridge_node = of_graph_get_remote_node(dev->of_node, 0, 0);
710 if (!bridge_node)
711 return -ENODEV;
712
713 dev_info(dev, "Found bridge node: %pOF\n", bridge_node);
714
715 dpi->bridge = of_drm_find_bridge(bridge_node);
716 of_node_put(bridge_node);
717 if (!dpi->bridge)
718 return -EPROBE_DEFER;
719
720 comp_id = mtk_ddp_comp_get_id(dev->of_node, MTK_DPI);
721 if (comp_id < 0) {
722 dev_err(dev, "Failed to identify by alias: %d\n", comp_id);
723 return comp_id;
724 }
725
726 ret = mtk_ddp_comp_init(dev, dev->of_node, &dpi->ddp_comp, comp_id,
727 &mtk_dpi_funcs);
728 if (ret) {
729 dev_err(dev, "Failed to initialize component: %d\n", ret);
730 return ret;
731 }
732
733 platform_set_drvdata(pdev, dpi);
734
735 ret = component_add(dev, &mtk_dpi_component_ops);
736 if (ret) {
737 dev_err(dev, "Failed to add component: %d\n", ret);
738 return ret;
739 }
740
741 return 0;
742}
743
744static int mtk_dpi_remove(struct platform_device *pdev)
745{
746 component_del(&pdev->dev, &mtk_dpi_component_ops);
747
748 return 0;
749}
750
751static const struct of_device_id mtk_dpi_of_ids[] = {
752 { .compatible = "mediatek,mt8173-dpi", },
753 {}
754};
755
756struct platform_driver mtk_dpi_driver = {
757 .probe = mtk_dpi_probe,
758 .remove = mtk_dpi_remove,
759 .driver = {
760 .name = "mediatek-dpi",
761 .of_match_table = mtk_dpi_of_ids,
762 },
763};
764
