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13#include <linux/module.h>
14#include <linux/interrupt.h>
15#include <linux/completion.h>
16#include <linux/clk.h>
17#include <linux/spi/spi.h>
18#include <linux/iio/iio.h>
19#include <linux/iio/buffer.h>
20#include <linux/iio/trigger.h>
21#include <linux/iio/triggered_buffer.h>
22#include <linux/iio/trigger_consumer.h>
23#include <linux/regulator/consumer.h>
24
25#define ADC12138_MODE_AUTO_CAL 0x08
26#define ADC12138_MODE_READ_STATUS 0x0c
27#define ADC12138_MODE_ACQUISITION_TIME_6 0x0e
28#define ADC12138_MODE_ACQUISITION_TIME_10 0x4e
29#define ADC12138_MODE_ACQUISITION_TIME_18 0x8e
30#define ADC12138_MODE_ACQUISITION_TIME_34 0xce
31
32#define ADC12138_STATUS_CAL BIT(6)
33
34enum {
35 adc12130,
36 adc12132,
37 adc12138,
38};
39
40struct adc12138 {
41 struct spi_device *spi;
42 unsigned int id;
43
44 struct clk *cclk;
45
46 struct regulator *vref_p;
47
48 struct regulator *vref_n;
49 struct mutex lock;
50 struct completion complete;
51
52 unsigned int acquisition_time;
53
54 u8 tx_buf[2] ____cacheline_aligned;
55 u8 rx_buf[2];
56};
57
58#define ADC12138_VOLTAGE_CHANNEL(chan) \
59 { \
60 .type = IIO_VOLTAGE, \
61 .indexed = 1, \
62 .channel = chan, \
63 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
64 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
65 | BIT(IIO_CHAN_INFO_OFFSET), \
66 .scan_index = chan, \
67 .scan_type = { \
68 .sign = 's', \
69 .realbits = 13, \
70 .storagebits = 16, \
71 .shift = 3, \
72 .endianness = IIO_BE, \
73 }, \
74 }
75
76#define ADC12138_VOLTAGE_CHANNEL_DIFF(chan1, chan2, si) \
77 { \
78 .type = IIO_VOLTAGE, \
79 .indexed = 1, \
80 .channel = (chan1), \
81 .channel2 = (chan2), \
82 .differential = 1, \
83 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
84 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
85 | BIT(IIO_CHAN_INFO_OFFSET), \
86 .scan_index = si, \
87 .scan_type = { \
88 .sign = 's', \
89 .realbits = 13, \
90 .storagebits = 16, \
91 .shift = 3, \
92 .endianness = IIO_BE, \
93 }, \
94 }
95
96static const struct iio_chan_spec adc12132_channels[] = {
97 ADC12138_VOLTAGE_CHANNEL(0),
98 ADC12138_VOLTAGE_CHANNEL(1),
99 ADC12138_VOLTAGE_CHANNEL_DIFF(0, 1, 2),
100 ADC12138_VOLTAGE_CHANNEL_DIFF(1, 0, 3),
101 IIO_CHAN_SOFT_TIMESTAMP(4),
102};
103
104static const struct iio_chan_spec adc12138_channels[] = {
105 ADC12138_VOLTAGE_CHANNEL(0),
106 ADC12138_VOLTAGE_CHANNEL(1),
107 ADC12138_VOLTAGE_CHANNEL(2),
108 ADC12138_VOLTAGE_CHANNEL(3),
109 ADC12138_VOLTAGE_CHANNEL(4),
110 ADC12138_VOLTAGE_CHANNEL(5),
111 ADC12138_VOLTAGE_CHANNEL(6),
112 ADC12138_VOLTAGE_CHANNEL(7),
113 ADC12138_VOLTAGE_CHANNEL_DIFF(0, 1, 8),
114 ADC12138_VOLTAGE_CHANNEL_DIFF(1, 0, 9),
115 ADC12138_VOLTAGE_CHANNEL_DIFF(2, 3, 10),
116 ADC12138_VOLTAGE_CHANNEL_DIFF(3, 2, 11),
117 ADC12138_VOLTAGE_CHANNEL_DIFF(4, 5, 12),
118 ADC12138_VOLTAGE_CHANNEL_DIFF(5, 4, 13),
119 ADC12138_VOLTAGE_CHANNEL_DIFF(6, 7, 14),
120 ADC12138_VOLTAGE_CHANNEL_DIFF(7, 6, 15),
121 IIO_CHAN_SOFT_TIMESTAMP(16),
122};
123
124static int adc12138_mode_programming(struct adc12138 *adc, u8 mode,
125 void *rx_buf, int len)
126{
127 struct spi_transfer xfer = {
128 .tx_buf = adc->tx_buf,
129 .rx_buf = adc->rx_buf,
130 .len = len,
131 };
132 int ret;
133
134
135 if (adc->id != adc12138)
136 mode = (mode & 0xc0) | ((mode & 0x0f) << 2);
137
138 adc->tx_buf[0] = mode;
139
140 ret = spi_sync_transfer(adc->spi, &xfer, 1);
141 if (ret)
142 return ret;
143
144 memcpy(rx_buf, adc->rx_buf, len);
145
146 return 0;
147}
148
149static int adc12138_read_status(struct adc12138 *adc)
150{
151 u8 rx_buf[2];
152 int ret;
153
154 ret = adc12138_mode_programming(adc, ADC12138_MODE_READ_STATUS,
155 rx_buf, 2);
156 if (ret)
157 return ret;
158
159 return (rx_buf[0] << 1) | (rx_buf[1] >> 7);
160}
161
162static int __adc12138_start_conv(struct adc12138 *adc,
163 struct iio_chan_spec const *channel,
164 void *data, int len)
165
166{
167 static const u8 ch_to_mux[] = { 0, 4, 1, 5, 2, 6, 3, 7 };
168 u8 mode = (ch_to_mux[channel->channel] << 4) |
169 (channel->differential ? 0 : 0x80);
170
171 return adc12138_mode_programming(adc, mode, data, len);
172}
173
174static int adc12138_start_conv(struct adc12138 *adc,
175 struct iio_chan_spec const *channel)
176{
177 u8 trash;
178
179 return __adc12138_start_conv(adc, channel, &trash, 1);
180}
181
182static int adc12138_start_and_read_conv(struct adc12138 *adc,
183 struct iio_chan_spec const *channel,
184 __be16 *data)
185{
186 return __adc12138_start_conv(adc, channel, data, 2);
187}
188
189static int adc12138_read_conv_data(struct adc12138 *adc, __be16 *value)
190{
191
192 return adc12138_mode_programming(adc, ADC12138_MODE_READ_STATUS,
193 value, sizeof(*value));
194}
195
196static int adc12138_wait_eoc(struct adc12138 *adc, unsigned long timeout)
197{
198 if (!wait_for_completion_timeout(&adc->complete, timeout))
199 return -ETIMEDOUT;
200
201 return 0;
202}
203
204static int adc12138_adc_conversion(struct adc12138 *adc,
205 struct iio_chan_spec const *channel,
206 __be16 *value)
207{
208 int ret;
209
210 reinit_completion(&adc->complete);
211
212 ret = adc12138_start_conv(adc, channel);
213 if (ret)
214 return ret;
215
216 ret = adc12138_wait_eoc(adc, msecs_to_jiffies(100));
217 if (ret)
218 return ret;
219
220 return adc12138_read_conv_data(adc, value);
221}
222
223static int adc12138_read_raw(struct iio_dev *iio,
224 struct iio_chan_spec const *channel, int *value,
225 int *shift, long mask)
226{
227 struct adc12138 *adc = iio_priv(iio);
228 int ret;
229 __be16 data;
230
231 switch (mask) {
232 case IIO_CHAN_INFO_RAW:
233 mutex_lock(&adc->lock);
234 ret = adc12138_adc_conversion(adc, channel, &data);
235 mutex_unlock(&adc->lock);
236 if (ret)
237 return ret;
238
239 *value = sign_extend32(be16_to_cpu(data) >> 3, 12);
240
241 return IIO_VAL_INT;
242 case IIO_CHAN_INFO_SCALE:
243 ret = regulator_get_voltage(adc->vref_p);
244 if (ret < 0)
245 return ret;
246 *value = ret;
247
248 if (!IS_ERR(adc->vref_n)) {
249 ret = regulator_get_voltage(adc->vref_n);
250 if (ret < 0)
251 return ret;
252 *value -= ret;
253 }
254
255
256 *value /= 1000;
257 *shift = channel->scan_type.realbits - 1;
258
259 return IIO_VAL_FRACTIONAL_LOG2;
260 case IIO_CHAN_INFO_OFFSET:
261 if (!IS_ERR(adc->vref_n)) {
262 *value = regulator_get_voltage(adc->vref_n);
263 if (*value < 0)
264 return *value;
265 } else {
266 *value = 0;
267 }
268
269
270 *value /= 1000;
271
272 return IIO_VAL_INT;
273 }
274
275 return -EINVAL;
276}
277
278static const struct iio_info adc12138_info = {
279 .read_raw = adc12138_read_raw,
280};
281
282static int adc12138_init(struct adc12138 *adc)
283{
284 int ret;
285 int status;
286 u8 mode;
287 u8 trash;
288
289 reinit_completion(&adc->complete);
290
291 ret = adc12138_mode_programming(adc, ADC12138_MODE_AUTO_CAL, &trash, 1);
292 if (ret)
293 return ret;
294
295
296 status = adc12138_read_status(adc);
297 if (status < 0)
298 return status;
299
300 adc12138_wait_eoc(adc, msecs_to_jiffies(100));
301
302 status = adc12138_read_status(adc);
303 if (status & ADC12138_STATUS_CAL) {
304 dev_warn(&adc->spi->dev,
305 "Auto Cal sequence is still in progress: %#x\n",
306 status);
307 return -EIO;
308 }
309
310 switch (adc->acquisition_time) {
311 case 6:
312 mode = ADC12138_MODE_ACQUISITION_TIME_6;
313 break;
314 case 10:
315 mode = ADC12138_MODE_ACQUISITION_TIME_10;
316 break;
317 case 18:
318 mode = ADC12138_MODE_ACQUISITION_TIME_18;
319 break;
320 case 34:
321 mode = ADC12138_MODE_ACQUISITION_TIME_34;
322 break;
323 default:
324 return -EINVAL;
325 }
326
327 return adc12138_mode_programming(adc, mode, &trash, 1);
328}
329
330static irqreturn_t adc12138_trigger_handler(int irq, void *p)
331{
332 struct iio_poll_func *pf = p;
333 struct iio_dev *indio_dev = pf->indio_dev;
334 struct adc12138 *adc = iio_priv(indio_dev);
335 __be16 data[20] = { };
336 __be16 trash;
337 int ret;
338 int scan_index;
339 int i = 0;
340
341 mutex_lock(&adc->lock);
342
343 for_each_set_bit(scan_index, indio_dev->active_scan_mask,
344 indio_dev->masklength) {
345 const struct iio_chan_spec *scan_chan =
346 &indio_dev->channels[scan_index];
347
348 reinit_completion(&adc->complete);
349
350 ret = adc12138_start_and_read_conv(adc, scan_chan,
351 i ? &data[i - 1] : &trash);
352 if (ret) {
353 dev_warn(&adc->spi->dev,
354 "failed to start conversion\n");
355 goto out;
356 }
357
358 ret = adc12138_wait_eoc(adc, msecs_to_jiffies(100));
359 if (ret) {
360 dev_warn(&adc->spi->dev, "wait eoc timeout\n");
361 goto out;
362 }
363
364 i++;
365 }
366
367 if (i) {
368 ret = adc12138_read_conv_data(adc, &data[i - 1]);
369 if (ret) {
370 dev_warn(&adc->spi->dev,
371 "failed to get conversion data\n");
372 goto out;
373 }
374 }
375
376 iio_push_to_buffers_with_timestamp(indio_dev, data,
377 iio_get_time_ns(indio_dev));
378out:
379 mutex_unlock(&adc->lock);
380
381 iio_trigger_notify_done(indio_dev->trig);
382
383 return IRQ_HANDLED;
384}
385
386static irqreturn_t adc12138_eoc_handler(int irq, void *p)
387{
388 struct iio_dev *indio_dev = p;
389 struct adc12138 *adc = iio_priv(indio_dev);
390
391 complete(&adc->complete);
392
393 return IRQ_HANDLED;
394}
395
396static int adc12138_probe(struct spi_device *spi)
397{
398 struct iio_dev *indio_dev;
399 struct adc12138 *adc;
400 int ret;
401
402 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
403 if (!indio_dev)
404 return -ENOMEM;
405
406 adc = iio_priv(indio_dev);
407 adc->spi = spi;
408 adc->id = spi_get_device_id(spi)->driver_data;
409 mutex_init(&adc->lock);
410 init_completion(&adc->complete);
411
412 indio_dev->name = spi_get_device_id(spi)->name;
413 indio_dev->dev.parent = &spi->dev;
414 indio_dev->info = &adc12138_info;
415 indio_dev->modes = INDIO_DIRECT_MODE;
416
417 switch (adc->id) {
418 case adc12130:
419 case adc12132:
420 indio_dev->channels = adc12132_channels;
421 indio_dev->num_channels = ARRAY_SIZE(adc12132_channels);
422 break;
423 case adc12138:
424 indio_dev->channels = adc12138_channels;
425 indio_dev->num_channels = ARRAY_SIZE(adc12138_channels);
426 break;
427 default:
428 return -EINVAL;
429 }
430
431 ret = of_property_read_u32(spi->dev.of_node, "ti,acquisition-time",
432 &adc->acquisition_time);
433 if (ret)
434 adc->acquisition_time = 10;
435
436 adc->cclk = devm_clk_get(&spi->dev, NULL);
437 if (IS_ERR(adc->cclk))
438 return PTR_ERR(adc->cclk);
439
440 adc->vref_p = devm_regulator_get(&spi->dev, "vref-p");
441 if (IS_ERR(adc->vref_p))
442 return PTR_ERR(adc->vref_p);
443
444 adc->vref_n = devm_regulator_get_optional(&spi->dev, "vref-n");
445 if (IS_ERR(adc->vref_n)) {
446
447
448
449
450 ret = PTR_ERR(adc->vref_n);
451 if (ret != -ENODEV)
452 return ret;
453 }
454
455 ret = devm_request_irq(&spi->dev, spi->irq, adc12138_eoc_handler,
456 IRQF_TRIGGER_RISING, indio_dev->name, indio_dev);
457 if (ret)
458 return ret;
459
460 ret = clk_prepare_enable(adc->cclk);
461 if (ret)
462 return ret;
463
464 ret = regulator_enable(adc->vref_p);
465 if (ret)
466 goto err_clk_disable;
467
468 if (!IS_ERR(adc->vref_n)) {
469 ret = regulator_enable(adc->vref_n);
470 if (ret)
471 goto err_vref_p_disable;
472 }
473
474 ret = adc12138_init(adc);
475 if (ret)
476 goto err_vref_n_disable;
477
478 spi_set_drvdata(spi, indio_dev);
479
480 ret = iio_triggered_buffer_setup(indio_dev, NULL,
481 adc12138_trigger_handler, NULL);
482 if (ret)
483 goto err_vref_n_disable;
484
485 ret = iio_device_register(indio_dev);
486 if (ret)
487 goto err_buffer_cleanup;
488
489 return 0;
490err_buffer_cleanup:
491 iio_triggered_buffer_cleanup(indio_dev);
492err_vref_n_disable:
493 if (!IS_ERR(adc->vref_n))
494 regulator_disable(adc->vref_n);
495err_vref_p_disable:
496 regulator_disable(adc->vref_p);
497err_clk_disable:
498 clk_disable_unprepare(adc->cclk);
499
500 return ret;
501}
502
503static int adc12138_remove(struct spi_device *spi)
504{
505 struct iio_dev *indio_dev = spi_get_drvdata(spi);
506 struct adc12138 *adc = iio_priv(indio_dev);
507
508 iio_device_unregister(indio_dev);
509 iio_triggered_buffer_cleanup(indio_dev);
510 if (!IS_ERR(adc->vref_n))
511 regulator_disable(adc->vref_n);
512 regulator_disable(adc->vref_p);
513 clk_disable_unprepare(adc->cclk);
514
515 return 0;
516}
517
518#ifdef CONFIG_OF
519
520static const struct of_device_id adc12138_dt_ids[] = {
521 { .compatible = "ti,adc12130", },
522 { .compatible = "ti,adc12132", },
523 { .compatible = "ti,adc12138", },
524 {}
525};
526MODULE_DEVICE_TABLE(of, adc12138_dt_ids);
527
528#endif
529
530static const struct spi_device_id adc12138_id[] = {
531 { "adc12130", adc12130 },
532 { "adc12132", adc12132 },
533 { "adc12138", adc12138 },
534 {}
535};
536MODULE_DEVICE_TABLE(spi, adc12138_id);
537
538static struct spi_driver adc12138_driver = {
539 .driver = {
540 .name = "adc12138",
541 .of_match_table = of_match_ptr(adc12138_dt_ids),
542 },
543 .probe = adc12138_probe,
544 .remove = adc12138_remove,
545 .id_table = adc12138_id,
546};
547module_spi_driver(adc12138_driver);
548
549MODULE_AUTHOR("Akinobu Mita <akinobu.mita@gmail.com>");
550MODULE_DESCRIPTION("ADC12130/ADC12132/ADC12138 driver");
551MODULE_LICENSE("GPL v2");
552
