linux/drivers/media/i2c/noon010pc30.c
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   1/*
   2 * Driver for SiliconFile NOON010PC30 CIF (1/11") Image Sensor with ISP
   3 *
   4 * Copyright (C) 2010 - 2011 Samsung Electronics Co., Ltd.
   5 * Contact: Sylwester Nawrocki, <s.nawrocki@samsung.com>
   6 *
   7 * Initial register configuration based on a driver authored by
   8 * HeungJun Kim <riverful.kim@samsung.com>.
   9 *
  10 * This program is free software; you can redistribute it and/or modify
  11 * it under the terms of the GNU General Public License as published by
  12 * the Free Software Foundation; either version 2 of the License, or
  13 * (at your option) any later version.
  14 */
  15
  16#include <linux/delay.h>
  17#include <linux/gpio.h>
  18#include <linux/i2c.h>
  19#include <linux/slab.h>
  20#include <linux/regulator/consumer.h>
  21#include <media/i2c/noon010pc30.h>
  22#include <linux/videodev2.h>
  23#include <linux/module.h>
  24#include <media/v4l2-ctrls.h>
  25#include <media/v4l2-device.h>
  26#include <media/v4l2-mediabus.h>
  27#include <media/v4l2-subdev.h>
  28
  29static int debug;
  30module_param(debug, int, 0644);
  31MODULE_PARM_DESC(debug, "Enable module debug trace. Set to 1 to enable.");
  32
  33#define MODULE_NAME             "NOON010PC30"
  34
  35/*
  36 * Register offsets within a page
  37 * b15..b8 - page id, b7..b0 - register address
  38 */
  39#define POWER_CTRL_REG          0x0001
  40#define PAGEMODE_REG            0x03
  41#define DEVICE_ID_REG           0x0004
  42#define NOON010PC30_ID          0x86
  43#define VDO_CTL_REG(n)          (0x0010 + (n))
  44#define SYNC_CTL_REG            0x0012
  45/* Window size and position */
  46#define WIN_ROWH_REG            0x0013
  47#define WIN_ROWL_REG            0x0014
  48#define WIN_COLH_REG            0x0015
  49#define WIN_COLL_REG            0x0016
  50#define WIN_HEIGHTH_REG         0x0017
  51#define WIN_HEIGHTL_REG         0x0018
  52#define WIN_WIDTHH_REG          0x0019
  53#define WIN_WIDTHL_REG          0x001A
  54#define HBLANKH_REG             0x001B
  55#define HBLANKL_REG             0x001C
  56#define VSYNCH_REG              0x001D
  57#define VSYNCL_REG              0x001E
  58/* VSYNC control */
  59#define VS_CTL_REG(n)           (0x00A1 + (n))
  60/* page 1 */
  61#define ISP_CTL_REG(n)          (0x0110 + (n))
  62#define YOFS_REG                0x0119
  63#define DARK_YOFS_REG           0x011A
  64#define SAT_CTL_REG             0x0120
  65#define BSAT_REG                0x0121
  66#define RSAT_REG                0x0122
  67/* Color correction */
  68#define CMC_CTL_REG             0x0130
  69#define CMC_OFSGH_REG           0x0133
  70#define CMC_OFSGL_REG           0x0135
  71#define CMC_SIGN_REG            0x0136
  72#define CMC_GOFS_REG            0x0137
  73#define CMC_COEF_REG(n)         (0x0138 + (n))
  74#define CMC_OFS_REG(n)          (0x0141 + (n))
  75/* Gamma correction */
  76#define GMA_CTL_REG             0x0160
  77#define GMA_COEF_REG(n)         (0x0161 + (n))
  78/* Lens Shading */
  79#define LENS_CTRL_REG           0x01D0
  80#define LENS_XCEN_REG           0x01D1
  81#define LENS_YCEN_REG           0x01D2
  82#define LENS_RC_REG             0x01D3
  83#define LENS_GC_REG             0x01D4
  84#define LENS_BC_REG             0x01D5
  85#define L_AGON_REG              0x01D6
  86#define L_AGOFF_REG             0x01D7
  87/* Page 3 - Auto Exposure */
  88#define AE_CTL_REG(n)           (0x0310 + (n))
  89#define AE_CTL9_REG             0x032C
  90#define AE_CTL10_REG            0x032D
  91#define AE_YLVL_REG             0x031C
  92#define AE_YTH_REG(n)           (0x031D + (n))
  93#define AE_WGT_REG              0x0326
  94#define EXP_TIMEH_REG           0x0333
  95#define EXP_TIMEM_REG           0x0334
  96#define EXP_TIMEL_REG           0x0335
  97#define EXP_MMINH_REG           0x0336
  98#define EXP_MMINL_REG           0x0337
  99#define EXP_MMAXH_REG           0x0338
 100#define EXP_MMAXM_REG           0x0339
 101#define EXP_MMAXL_REG           0x033A
 102/* Page 4 - Auto White Balance */
 103#define AWB_CTL_REG(n)          (0x0410 + (n))
 104#define AWB_ENABE               0x80
 105#define AWB_WGHT_REG            0x0419
 106#define BGAIN_PAR_REG(n)        (0x044F + (n))
 107/* Manual white balance, when AWB_CTL2[0]=1 */
 108#define MWB_RGAIN_REG           0x0466
 109#define MWB_BGAIN_REG           0x0467
 110
 111/* The token to mark an array end */
 112#define REG_TERM                0xFFFF
 113
 114struct noon010_format {
 115        u32 code;
 116        enum v4l2_colorspace colorspace;
 117        u16 ispctl1_reg;
 118};
 119
 120struct noon010_frmsize {
 121        u16 width;
 122        u16 height;
 123        int vid_ctl1;
 124};
 125
 126static const char * const noon010_supply_name[] = {
 127        "vdd_core", "vddio", "vdda"
 128};
 129
 130#define NOON010_NUM_SUPPLIES ARRAY_SIZE(noon010_supply_name)
 131
 132struct noon010_info {
 133        struct v4l2_subdev sd;
 134        struct media_pad pad;
 135        struct v4l2_ctrl_handler hdl;
 136        struct regulator_bulk_data supply[NOON010_NUM_SUPPLIES];
 137        u32 gpio_nreset;
 138        u32 gpio_nstby;
 139
 140        /* Protects the struct members below */
 141        struct mutex lock;
 142
 143        const struct noon010_format *curr_fmt;
 144        const struct noon010_frmsize *curr_win;
 145        unsigned int apply_new_cfg:1;
 146        unsigned int streaming:1;
 147        unsigned int hflip:1;
 148        unsigned int vflip:1;
 149        unsigned int power:1;
 150        u8 i2c_reg_page;
 151};
 152
 153struct i2c_regval {
 154        u16 addr;
 155        u16 val;
 156};
 157
 158/* Supported resolutions. */
 159static const struct noon010_frmsize noon010_sizes[] = {
 160        {
 161                .width          = 352,
 162                .height         = 288,
 163                .vid_ctl1       = 0,
 164        }, {
 165                .width          = 176,
 166                .height         = 144,
 167                .vid_ctl1       = 0x10,
 168        }, {
 169                .width          = 88,
 170                .height         = 72,
 171                .vid_ctl1       = 0x20,
 172        },
 173};
 174
 175/* Supported pixel formats. */
 176static const struct noon010_format noon010_formats[] = {
 177        {
 178                .code           = MEDIA_BUS_FMT_YUYV8_2X8,
 179                .colorspace     = V4L2_COLORSPACE_JPEG,
 180                .ispctl1_reg    = 0x03,
 181        }, {
 182                .code           = MEDIA_BUS_FMT_YVYU8_2X8,
 183                .colorspace     = V4L2_COLORSPACE_JPEG,
 184                .ispctl1_reg    = 0x02,
 185        }, {
 186                .code           = MEDIA_BUS_FMT_VYUY8_2X8,
 187                .colorspace     = V4L2_COLORSPACE_JPEG,
 188                .ispctl1_reg    = 0,
 189        }, {
 190                .code           = MEDIA_BUS_FMT_UYVY8_2X8,
 191                .colorspace     = V4L2_COLORSPACE_JPEG,
 192                .ispctl1_reg    = 0x01,
 193        }, {
 194                .code           = MEDIA_BUS_FMT_RGB565_2X8_BE,
 195                .colorspace     = V4L2_COLORSPACE_JPEG,
 196                .ispctl1_reg    = 0x40,
 197        },
 198};
 199
 200static const struct i2c_regval noon010_base_regs[] = {
 201        { WIN_COLL_REG,         0x06 }, { HBLANKL_REG,          0x7C },
 202        /* Color corection and saturation */
 203        { ISP_CTL_REG(0),       0x30 }, { ISP_CTL_REG(2),       0x30 },
 204        { YOFS_REG,             0x80 }, { DARK_YOFS_REG,        0x04 },
 205        { SAT_CTL_REG,          0x1F }, { BSAT_REG,             0x90 },
 206        { CMC_CTL_REG,          0x0F }, { CMC_OFSGH_REG,        0x3C },
 207        { CMC_OFSGL_REG,        0x2C }, { CMC_SIGN_REG,         0x3F },
 208        { CMC_COEF_REG(0),      0x79 }, { CMC_OFS_REG(0),       0x00 },
 209        { CMC_COEF_REG(1),      0x39 }, { CMC_OFS_REG(1),       0x00 },
 210        { CMC_COEF_REG(2),      0x00 }, { CMC_OFS_REG(2),       0x00 },
 211        { CMC_COEF_REG(3),      0x11 }, { CMC_OFS_REG(3),       0x8B },
 212        { CMC_COEF_REG(4),      0x65 }, { CMC_OFS_REG(4),       0x07 },
 213        { CMC_COEF_REG(5),      0x14 }, { CMC_OFS_REG(5),       0x04 },
 214        { CMC_COEF_REG(6),      0x01 }, { CMC_OFS_REG(6),       0x9C },
 215        { CMC_COEF_REG(7),      0x33 }, { CMC_OFS_REG(7),       0x89 },
 216        { CMC_COEF_REG(8),      0x74 }, { CMC_OFS_REG(8),       0x25 },
 217        /* Automatic white balance */
 218        { AWB_CTL_REG(0),       0x78 }, { AWB_CTL_REG(1),       0x2E },
 219        { AWB_CTL_REG(2),       0x20 }, { AWB_CTL_REG(3),       0x85 },
 220        /* Auto exposure */
 221        { AE_CTL_REG(0),        0xDC }, { AE_CTL_REG(1),        0x81 },
 222        { AE_CTL_REG(2),        0x30 }, { AE_CTL_REG(3),        0xA5 },
 223        { AE_CTL_REG(4),        0x40 }, { AE_CTL_REG(5),        0x51 },
 224        { AE_CTL_REG(6),        0x33 }, { AE_CTL_REG(7),        0x7E },
 225        { AE_CTL9_REG,          0x00 }, { AE_CTL10_REG,         0x02 },
 226        { AE_YLVL_REG,          0x44 }, { AE_YTH_REG(0),        0x34 },
 227        { AE_YTH_REG(1),        0x30 }, { AE_WGT_REG,           0xD5 },
 228        /* Lens shading compensation */
 229        { LENS_CTRL_REG,        0x01 }, { LENS_XCEN_REG,        0x80 },
 230        { LENS_YCEN_REG,        0x70 }, { LENS_RC_REG,          0x53 },
 231        { LENS_GC_REG,          0x40 }, { LENS_BC_REG,          0x3E },
 232        { REG_TERM,             0 },
 233};
 234
 235static inline struct noon010_info *to_noon010(struct v4l2_subdev *sd)
 236{
 237        return container_of(sd, struct noon010_info, sd);
 238}
 239
 240static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
 241{
 242        return &container_of(ctrl->handler, struct noon010_info, hdl)->sd;
 243}
 244
 245static inline int set_i2c_page(struct noon010_info *info,
 246                               struct i2c_client *client, unsigned int reg)
 247{
 248        u32 page = reg >> 8 & 0xFF;
 249        int ret = 0;
 250
 251        if (info->i2c_reg_page != page && (reg & 0xFF) != 0x03) {
 252                ret = i2c_smbus_write_byte_data(client, PAGEMODE_REG, page);
 253                if (!ret)
 254                        info->i2c_reg_page = page;
 255        }
 256        return ret;
 257}
 258
 259static int cam_i2c_read(struct v4l2_subdev *sd, u32 reg_addr)
 260{
 261        struct i2c_client *client = v4l2_get_subdevdata(sd);
 262        struct noon010_info *info = to_noon010(sd);
 263        int ret = set_i2c_page(info, client, reg_addr);
 264
 265        if (ret)
 266                return ret;
 267        return i2c_smbus_read_byte_data(client, reg_addr & 0xFF);
 268}
 269
 270static int cam_i2c_write(struct v4l2_subdev *sd, u32 reg_addr, u32 val)
 271{
 272        struct i2c_client *client = v4l2_get_subdevdata(sd);
 273        struct noon010_info *info = to_noon010(sd);
 274        int ret = set_i2c_page(info, client, reg_addr);
 275
 276        if (ret)
 277                return ret;
 278        return i2c_smbus_write_byte_data(client, reg_addr & 0xFF, val);
 279}
 280
 281static inline int noon010_bulk_write_reg(struct v4l2_subdev *sd,
 282                                         const struct i2c_regval *msg)
 283{
 284        while (msg->addr != REG_TERM) {
 285                int ret = cam_i2c_write(sd, msg->addr, msg->val);
 286
 287                if (ret)
 288                        return ret;
 289                msg++;
 290        }
 291        return 0;
 292}
 293
 294/* Device reset and sleep mode control */
 295static int noon010_power_ctrl(struct v4l2_subdev *sd, bool reset, bool sleep)
 296{
 297        struct noon010_info *info = to_noon010(sd);
 298        u8 reg = sleep ? 0xF1 : 0xF0;
 299        int ret = 0;
 300
 301        if (reset) {
 302                ret = cam_i2c_write(sd, POWER_CTRL_REG, reg | 0x02);
 303                udelay(20);
 304        }
 305        if (!ret) {
 306                ret = cam_i2c_write(sd, POWER_CTRL_REG, reg);
 307                if (reset && !ret)
 308                        info->i2c_reg_page = -1;
 309        }
 310        return ret;
 311}
 312
 313/* Automatic white balance control */
 314static int noon010_enable_autowhitebalance(struct v4l2_subdev *sd, int on)
 315{
 316        int ret;
 317
 318        ret = cam_i2c_write(sd, AWB_CTL_REG(1), on ? 0x2E : 0x2F);
 319        if (!ret)
 320                ret = cam_i2c_write(sd, AWB_CTL_REG(0), on ? 0xFB : 0x7B);
 321        return ret;
 322}
 323
 324/* Called with struct noon010_info.lock mutex held */
 325static int noon010_set_flip(struct v4l2_subdev *sd, int hflip, int vflip)
 326{
 327        struct noon010_info *info = to_noon010(sd);
 328        int reg, ret;
 329
 330        reg = cam_i2c_read(sd, VDO_CTL_REG(1));
 331        if (reg < 0)
 332                return reg;
 333
 334        reg &= 0x7C;
 335        if (hflip)
 336                reg |= 0x01;
 337        if (vflip)
 338                reg |= 0x02;
 339
 340        ret = cam_i2c_write(sd, VDO_CTL_REG(1), reg | 0x80);
 341        if (!ret) {
 342                info->hflip = hflip;
 343                info->vflip = vflip;
 344        }
 345        return ret;
 346}
 347
 348/* Configure resolution and color format */
 349static int noon010_set_params(struct v4l2_subdev *sd)
 350{
 351        struct noon010_info *info = to_noon010(sd);
 352
 353        int ret = cam_i2c_write(sd, VDO_CTL_REG(0),
 354                                info->curr_win->vid_ctl1);
 355        if (ret)
 356                return ret;
 357        return cam_i2c_write(sd, ISP_CTL_REG(0),
 358                             info->curr_fmt->ispctl1_reg);
 359}
 360
 361/* Find nearest matching image pixel size. */
 362static int noon010_try_frame_size(struct v4l2_mbus_framefmt *mf,
 363                                  const struct noon010_frmsize **size)
 364{
 365        unsigned int min_err = ~0;
 366        int i = ARRAY_SIZE(noon010_sizes);
 367        const struct noon010_frmsize *fsize = &noon010_sizes[0],
 368                *match = NULL;
 369
 370        while (i--) {
 371                int err = abs(fsize->width - mf->width)
 372                                + abs(fsize->height - mf->height);
 373
 374                if (err < min_err) {
 375                        min_err = err;
 376                        match = fsize;
 377                }
 378                fsize++;
 379        }
 380        if (match) {
 381                mf->width  = match->width;
 382                mf->height = match->height;
 383                if (size)
 384                        *size = match;
 385                return 0;
 386        }
 387        return -EINVAL;
 388}
 389
 390/* Called with info.lock mutex held */
 391static int power_enable(struct noon010_info *info)
 392{
 393        int ret;
 394
 395        if (info->power) {
 396                v4l2_info(&info->sd, "%s: sensor is already on\n", __func__);
 397                return 0;
 398        }
 399
 400        if (gpio_is_valid(info->gpio_nstby))
 401                gpio_set_value(info->gpio_nstby, 0);
 402
 403        if (gpio_is_valid(info->gpio_nreset))
 404                gpio_set_value(info->gpio_nreset, 0);
 405
 406        ret = regulator_bulk_enable(NOON010_NUM_SUPPLIES, info->supply);
 407        if (ret)
 408                return ret;
 409
 410        if (gpio_is_valid(info->gpio_nreset)) {
 411                msleep(50);
 412                gpio_set_value(info->gpio_nreset, 1);
 413        }
 414        if (gpio_is_valid(info->gpio_nstby)) {
 415                udelay(1000);
 416                gpio_set_value(info->gpio_nstby, 1);
 417        }
 418        if (gpio_is_valid(info->gpio_nreset)) {
 419                udelay(1000);
 420                gpio_set_value(info->gpio_nreset, 0);
 421                msleep(100);
 422                gpio_set_value(info->gpio_nreset, 1);
 423                msleep(20);
 424        }
 425        info->power = 1;
 426
 427        v4l2_dbg(1, debug, &info->sd,  "%s: sensor is on\n", __func__);
 428        return 0;
 429}
 430
 431/* Called with info.lock mutex held */
 432static int power_disable(struct noon010_info *info)
 433{
 434        int ret;
 435
 436        if (!info->power) {
 437                v4l2_info(&info->sd, "%s: sensor is already off\n", __func__);
 438                return 0;
 439        }
 440
 441        ret = regulator_bulk_disable(NOON010_NUM_SUPPLIES, info->supply);
 442        if (ret)
 443                return ret;
 444
 445        if (gpio_is_valid(info->gpio_nstby))
 446                gpio_set_value(info->gpio_nstby, 0);
 447
 448        if (gpio_is_valid(info->gpio_nreset))
 449                gpio_set_value(info->gpio_nreset, 0);
 450
 451        info->power = 0;
 452
 453        v4l2_dbg(1, debug, &info->sd,  "%s: sensor is off\n", __func__);
 454
 455        return 0;
 456}
 457
 458static int noon010_s_ctrl(struct v4l2_ctrl *ctrl)
 459{
 460        struct v4l2_subdev *sd = to_sd(ctrl);
 461        struct noon010_info *info = to_noon010(sd);
 462        int ret = 0;
 463
 464        v4l2_dbg(1, debug, sd, "%s: ctrl_id: %d, value: %d\n",
 465                 __func__, ctrl->id, ctrl->val);
 466
 467        mutex_lock(&info->lock);
 468        /*
 469         * If the device is not powered up by the host driver do
 470         * not apply any controls to H/W at this time. Instead
 471         * the controls will be restored right after power-up.
 472         */
 473        if (!info->power)
 474                goto unlock;
 475
 476        switch (ctrl->id) {
 477        case V4L2_CID_AUTO_WHITE_BALANCE:
 478                ret = noon010_enable_autowhitebalance(sd, ctrl->val);
 479                break;
 480        case V4L2_CID_BLUE_BALANCE:
 481                ret = cam_i2c_write(sd, MWB_BGAIN_REG, ctrl->val);
 482                break;
 483        case V4L2_CID_RED_BALANCE:
 484                ret =  cam_i2c_write(sd, MWB_RGAIN_REG, ctrl->val);
 485                break;
 486        default:
 487                ret = -EINVAL;
 488        }
 489unlock:
 490        mutex_unlock(&info->lock);
 491        return ret;
 492}
 493
 494static int noon010_enum_mbus_code(struct v4l2_subdev *sd,
 495                                  struct v4l2_subdev_pad_config *cfg,
 496                                  struct v4l2_subdev_mbus_code_enum *code)
 497{
 498        if (code->index >= ARRAY_SIZE(noon010_formats))
 499                return -EINVAL;
 500
 501        code->code = noon010_formats[code->index].code;
 502        return 0;
 503}
 504
 505static int noon010_get_fmt(struct v4l2_subdev *sd,
 506                           struct v4l2_subdev_pad_config *cfg,
 507                           struct v4l2_subdev_format *fmt)
 508{
 509        struct noon010_info *info = to_noon010(sd);
 510        struct v4l2_mbus_framefmt *mf;
 511
 512        if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
 513                if (cfg) {
 514                        mf = v4l2_subdev_get_try_format(sd, cfg, 0);
 515                        fmt->format = *mf;
 516                }
 517                return 0;
 518        }
 519        mf = &fmt->format;
 520
 521        mutex_lock(&info->lock);
 522        mf->width = info->curr_win->width;
 523        mf->height = info->curr_win->height;
 524        mf->code = info->curr_fmt->code;
 525        mf->colorspace = info->curr_fmt->colorspace;
 526        mf->field = V4L2_FIELD_NONE;
 527
 528        mutex_unlock(&info->lock);
 529        return 0;
 530}
 531
 532/* Return nearest media bus frame format. */
 533static const struct noon010_format *noon010_try_fmt(struct v4l2_subdev *sd,
 534                                            struct v4l2_mbus_framefmt *mf)
 535{
 536        int i = ARRAY_SIZE(noon010_formats);
 537
 538        while (--i)
 539                if (mf->code == noon010_formats[i].code)
 540                        break;
 541        mf->code = noon010_formats[i].code;
 542
 543        return &noon010_formats[i];
 544}
 545
 546static int noon010_set_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
 547                           struct v4l2_subdev_format *fmt)
 548{
 549        struct noon010_info *info = to_noon010(sd);
 550        const struct noon010_frmsize *size = NULL;
 551        const struct noon010_format *nf;
 552        struct v4l2_mbus_framefmt *mf;
 553        int ret = 0;
 554
 555        nf = noon010_try_fmt(sd, &fmt->format);
 556        noon010_try_frame_size(&fmt->format, &size);
 557        fmt->format.colorspace = V4L2_COLORSPACE_JPEG;
 558        fmt->format.field = V4L2_FIELD_NONE;
 559
 560        if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
 561                if (cfg) {
 562                        mf = v4l2_subdev_get_try_format(sd, cfg, 0);
 563                        *mf = fmt->format;
 564                }
 565                return 0;
 566        }
 567        mutex_lock(&info->lock);
 568        if (!info->streaming) {
 569                info->apply_new_cfg = 1;
 570                info->curr_fmt = nf;
 571                info->curr_win = size;
 572        } else {
 573                ret = -EBUSY;
 574        }
 575        mutex_unlock(&info->lock);
 576        return ret;
 577}
 578
 579/* Called with struct noon010_info.lock mutex held */
 580static int noon010_base_config(struct v4l2_subdev *sd)
 581{
 582        int ret = noon010_bulk_write_reg(sd, noon010_base_regs);
 583        if (!ret)
 584                ret = noon010_set_params(sd);
 585        if (!ret)
 586                ret = noon010_set_flip(sd, 1, 0);
 587
 588        return ret;
 589}
 590
 591static int noon010_s_power(struct v4l2_subdev *sd, int on)
 592{
 593        struct noon010_info *info = to_noon010(sd);
 594        int ret;
 595
 596        mutex_lock(&info->lock);
 597        if (on) {
 598                ret = power_enable(info);
 599                if (!ret)
 600                        ret = noon010_base_config(sd);
 601        } else {
 602                noon010_power_ctrl(sd, false, true);
 603                ret = power_disable(info);
 604        }
 605        mutex_unlock(&info->lock);
 606
 607        /* Restore the controls state */
 608        if (!ret && on)
 609                ret = v4l2_ctrl_handler_setup(&info->hdl);
 610
 611        return ret;
 612}
 613
 614static int noon010_s_stream(struct v4l2_subdev *sd, int on)
 615{
 616        struct noon010_info *info = to_noon010(sd);
 617        int ret = 0;
 618
 619        mutex_lock(&info->lock);
 620        if (!info->streaming != !on) {
 621                ret = noon010_power_ctrl(sd, false, !on);
 622                if (!ret)
 623                        info->streaming = on;
 624        }
 625        if (!ret && on && info->apply_new_cfg) {
 626                ret = noon010_set_params(sd);
 627                if (!ret)
 628                        info->apply_new_cfg = 0;
 629        }
 630        mutex_unlock(&info->lock);
 631        return ret;
 632}
 633
 634static int noon010_log_status(struct v4l2_subdev *sd)
 635{
 636        struct noon010_info *info = to_noon010(sd);
 637
 638        v4l2_ctrl_handler_log_status(&info->hdl, sd->name);
 639        return 0;
 640}
 641
 642static int noon010_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
 643{
 644        struct v4l2_mbus_framefmt *mf = v4l2_subdev_get_try_format(sd, fh->pad, 0);
 645
 646        mf->width = noon010_sizes[0].width;
 647        mf->height = noon010_sizes[0].height;
 648        mf->code = noon010_formats[0].code;
 649        mf->colorspace = V4L2_COLORSPACE_JPEG;
 650        mf->field = V4L2_FIELD_NONE;
 651        return 0;
 652}
 653
 654static const struct v4l2_subdev_internal_ops noon010_subdev_internal_ops = {
 655        .open = noon010_open,
 656};
 657
 658static const struct v4l2_ctrl_ops noon010_ctrl_ops = {
 659        .s_ctrl = noon010_s_ctrl,
 660};
 661
 662static const struct v4l2_subdev_core_ops noon010_core_ops = {
 663        .s_power        = noon010_s_power,
 664        .log_status     = noon010_log_status,
 665};
 666
 667static const struct v4l2_subdev_pad_ops noon010_pad_ops = {
 668        .enum_mbus_code = noon010_enum_mbus_code,
 669        .get_fmt        = noon010_get_fmt,
 670        .set_fmt        = noon010_set_fmt,
 671};
 672
 673static const struct v4l2_subdev_video_ops noon010_video_ops = {
 674        .s_stream       = noon010_s_stream,
 675};
 676
 677static const struct v4l2_subdev_ops noon010_ops = {
 678        .core   = &noon010_core_ops,
 679        .pad    = &noon010_pad_ops,
 680        .video  = &noon010_video_ops,
 681};
 682
 683/* Return 0 if NOON010PC30L sensor type was detected or -ENODEV otherwise. */
 684static int noon010_detect(struct i2c_client *client, struct noon010_info *info)
 685{
 686        int ret;
 687
 688        ret = power_enable(info);
 689        if (ret)
 690                return ret;
 691
 692        ret = i2c_smbus_read_byte_data(client, DEVICE_ID_REG);
 693        if (ret < 0)
 694                dev_err(&client->dev, "I2C read failed: 0x%X\n", ret);
 695
 696        power_disable(info);
 697
 698        return ret == NOON010PC30_ID ? 0 : -ENODEV;
 699}
 700
 701static int noon010_probe(struct i2c_client *client,
 702                         const struct i2c_device_id *id)
 703{
 704        struct noon010_info *info;
 705        struct v4l2_subdev *sd;
 706        const struct noon010pc30_platform_data *pdata
 707                = client->dev.platform_data;
 708        int ret;
 709        int i;
 710
 711        if (!pdata) {
 712                dev_err(&client->dev, "No platform data!\n");
 713                return -EIO;
 714        }
 715
 716        info = devm_kzalloc(&client->dev, sizeof(*info), GFP_KERNEL);
 717        if (!info)
 718                return -ENOMEM;
 719
 720        mutex_init(&info->lock);
 721        sd = &info->sd;
 722        v4l2_i2c_subdev_init(sd, client, &noon010_ops);
 723        strlcpy(sd->name, MODULE_NAME, sizeof(sd->name));
 724
 725        sd->internal_ops = &noon010_subdev_internal_ops;
 726        sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
 727
 728        v4l2_ctrl_handler_init(&info->hdl, 3);
 729
 730        v4l2_ctrl_new_std(&info->hdl, &noon010_ctrl_ops,
 731                          V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
 732        v4l2_ctrl_new_std(&info->hdl, &noon010_ctrl_ops,
 733                          V4L2_CID_RED_BALANCE, 0, 127, 1, 64);
 734        v4l2_ctrl_new_std(&info->hdl, &noon010_ctrl_ops,
 735                          V4L2_CID_BLUE_BALANCE, 0, 127, 1, 64);
 736
 737        sd->ctrl_handler = &info->hdl;
 738
 739        ret = info->hdl.error;
 740        if (ret)
 741                goto np_err;
 742
 743        info->i2c_reg_page      = -1;
 744        info->gpio_nreset       = -EINVAL;
 745        info->gpio_nstby        = -EINVAL;
 746        info->curr_fmt          = &noon010_formats[0];
 747        info->curr_win          = &noon010_sizes[0];
 748
 749        if (gpio_is_valid(pdata->gpio_nreset)) {
 750                ret = devm_gpio_request_one(&client->dev, pdata->gpio_nreset,
 751                                            GPIOF_OUT_INIT_LOW,
 752                                            "NOON010PC30 NRST");
 753                if (ret) {
 754                        dev_err(&client->dev, "GPIO request error: %d\n", ret);
 755                        goto np_err;
 756                }
 757                info->gpio_nreset = pdata->gpio_nreset;
 758                gpio_export(info->gpio_nreset, 0);
 759        }
 760
 761        if (gpio_is_valid(pdata->gpio_nstby)) {
 762                ret = devm_gpio_request_one(&client->dev, pdata->gpio_nstby,
 763                                            GPIOF_OUT_INIT_LOW,
 764                                            "NOON010PC30 NSTBY");
 765                if (ret) {
 766                        dev_err(&client->dev, "GPIO request error: %d\n", ret);
 767                        goto np_err;
 768                }
 769                info->gpio_nstby = pdata->gpio_nstby;
 770                gpio_export(info->gpio_nstby, 0);
 771        }
 772
 773        for (i = 0; i < NOON010_NUM_SUPPLIES; i++)
 774                info->supply[i].supply = noon010_supply_name[i];
 775
 776        ret = devm_regulator_bulk_get(&client->dev, NOON010_NUM_SUPPLIES,
 777                                 info->supply);
 778        if (ret)
 779                goto np_err;
 780
 781        info->pad.flags = MEDIA_PAD_FL_SOURCE;
 782        sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
 783        ret = media_entity_pads_init(&sd->entity, 1, &info->pad);
 784        if (ret < 0)
 785                goto np_err;
 786
 787        ret = noon010_detect(client, info);
 788        if (!ret)
 789                return 0;
 790
 791np_err:
 792        v4l2_ctrl_handler_free(&info->hdl);
 793        v4l2_device_unregister_subdev(sd);
 794        return ret;
 795}
 796
 797static int noon010_remove(struct i2c_client *client)
 798{
 799        struct v4l2_subdev *sd = i2c_get_clientdata(client);
 800        struct noon010_info *info = to_noon010(sd);
 801
 802        v4l2_device_unregister_subdev(sd);
 803        v4l2_ctrl_handler_free(&info->hdl);
 804        media_entity_cleanup(&sd->entity);
 805
 806        return 0;
 807}
 808
 809static const struct i2c_device_id noon010_id[] = {
 810        { MODULE_NAME, 0 },
 811        { },
 812};
 813MODULE_DEVICE_TABLE(i2c, noon010_id);
 814
 815
 816static struct i2c_driver noon010_i2c_driver = {
 817        .driver = {
 818                .name = MODULE_NAME
 819        },
 820        .probe          = noon010_probe,
 821        .remove         = noon010_remove,
 822        .id_table       = noon010_id,
 823};
 824
 825module_i2c_driver(noon010_i2c_driver);
 826
 827MODULE_DESCRIPTION("Siliconfile NOON010PC30 camera driver");
 828MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>");
 829MODULE_LICENSE("GPL");
 830