1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17#ifndef __MT76x2_H
18#define __MT76x2_H
19
20#include <linux/device.h>
21#include <linux/dma-mapping.h>
22#include <linux/spinlock.h>
23#include <linux/skbuff.h>
24#include <linux/netdevice.h>
25#include <linux/irq.h>
26#include <linux/interrupt.h>
27#include <linux/mutex.h>
28#include <linux/bitops.h>
29#include <linux/kfifo.h>
30
31#define MT7662_FIRMWARE "mt7662.bin"
32#define MT7662_ROM_PATCH "mt7662_rom_patch.bin"
33#define MT7662_EEPROM_SIZE 512
34
35#define MT76x2_RX_RING_SIZE 256
36#define MT_RX_HEADROOM 32
37
38#define MT_MAX_CHAINS 2
39
40#define MT_CALIBRATE_INTERVAL HZ
41
42#define MT_MAX_VIFS 8
43#define MT_VIF_WCID(_n) (254 - ((_n) & 7))
44
45#include "mt76.h"
46#include "mt76x2_regs.h"
47#include "mt76x2_mac.h"
48#include "mt76x2_dfs.h"
49
50struct mt76x2_mcu {
51 struct mutex mutex;
52
53 wait_queue_head_t wait;
54 struct sk_buff_head res_q;
55
56 u32 msg_seq;
57};
58
59struct mt76x2_rx_freq_cal {
60 s8 high_gain[MT_MAX_CHAINS];
61 s8 rssi_offset[MT_MAX_CHAINS];
62 s8 lna_gain;
63 u32 mcu_gain;
64};
65
66struct mt76x2_calibration {
67 struct mt76x2_rx_freq_cal rx;
68
69 u8 agc_gain_init[MT_MAX_CHAINS];
70 u8 agc_gain_cur[MT_MAX_CHAINS];
71
72 int avg_rssi[MT_MAX_CHAINS];
73 int avg_rssi_all;
74
75 s8 agc_gain_adjust;
76 s8 low_gain;
77
78 u8 temp;
79
80 bool init_cal_done;
81 bool tssi_cal_done;
82 bool tssi_comp_pending;
83 bool dpd_cal_done;
84 bool channel_cal_done;
85};
86
87struct mt76x2_dev {
88 struct mt76_dev mt76;
89
90 struct mac_address macaddr_list[8];
91
92 struct mutex mutex;
93
94 const u16 *beacon_offsets;
95 unsigned long wcid_mask[128 / BITS_PER_LONG];
96
97 int txpower_conf;
98 int txpower_cur;
99
100 u8 txdone_seq;
101 DECLARE_KFIFO_PTR(txstatus_fifo, struct mt76x2_tx_status);
102
103 struct mt76x2_mcu mcu;
104 struct sk_buff *rx_head;
105
106 struct tasklet_struct tx_tasklet;
107 struct tasklet_struct pre_tbtt_tasklet;
108 struct delayed_work cal_work;
109 struct delayed_work mac_work;
110
111 u32 aggr_stats[32];
112
113 struct mt76_wcid global_wcid;
114 struct mt76_wcid __rcu *wcid[128];
115
116 spinlock_t irq_lock;
117 u32 irqmask;
118
119 struct sk_buff *beacons[8];
120 u8 beacon_mask;
121 u8 beacon_data_mask;
122
123 u32 rxfilter;
124
125 u16 chainmask;
126
127 struct mt76x2_calibration cal;
128
129 s8 target_power;
130 s8 target_power_delta[2];
131 struct mt76_rate_power rate_power;
132 bool enable_tpc;
133
134 u8 coverage_class;
135 u8 slottime;
136
137 struct mt76x2_dfs_pattern_detector dfs_pd;
138};
139
140struct mt76x2_vif {
141 u8 idx;
142
143 struct mt76_wcid group_wcid;
144};
145
146struct mt76x2_sta {
147 struct mt76_wcid wcid;
148
149 struct mt76x2_vif *vif;
150 struct mt76x2_tx_status status;
151 int n_frames;
152};
153
154static inline bool is_mt7612(struct mt76x2_dev *dev)
155{
156 return mt76_chip(&dev->mt76) == 0x7612;
157}
158
159void mt76x2_set_irq_mask(struct mt76x2_dev *dev, u32 clear, u32 set);
160
161static inline void mt76x2_irq_enable(struct mt76x2_dev *dev, u32 mask)
162{
163 mt76x2_set_irq_mask(dev, 0, mask);
164}
165
166static inline void mt76x2_irq_disable(struct mt76x2_dev *dev, u32 mask)
167{
168 mt76x2_set_irq_mask(dev, mask, 0);
169}
170
171extern const struct ieee80211_ops mt76x2_ops;
172
173struct mt76x2_dev *mt76x2_alloc_device(struct device *pdev);
174int mt76x2_register_device(struct mt76x2_dev *dev);
175void mt76x2_init_debugfs(struct mt76x2_dev *dev);
176
177irqreturn_t mt76x2_irq_handler(int irq, void *dev_instance);
178void mt76x2_phy_power_on(struct mt76x2_dev *dev);
179int mt76x2_init_hardware(struct mt76x2_dev *dev);
180void mt76x2_stop_hardware(struct mt76x2_dev *dev);
181int mt76x2_eeprom_init(struct mt76x2_dev *dev);
182int mt76x2_apply_calibration_data(struct mt76x2_dev *dev, int channel);
183void mt76x2_set_tx_ackto(struct mt76x2_dev *dev);
184
185void mt76x2_phy_set_antenna(struct mt76x2_dev *dev);
186int mt76x2_phy_start(struct mt76x2_dev *dev);
187int mt76x2_phy_set_channel(struct mt76x2_dev *dev,
188 struct cfg80211_chan_def *chandef);
189int mt76x2_phy_get_rssi(struct mt76x2_dev *dev, s8 rssi, int chain);
190void mt76x2_phy_calibrate(struct work_struct *work);
191void mt76x2_phy_set_txpower(struct mt76x2_dev *dev);
192
193int mt76x2_mcu_init(struct mt76x2_dev *dev);
194int mt76x2_mcu_set_channel(struct mt76x2_dev *dev, u8 channel, u8 bw,
195 u8 bw_index, bool scan);
196int mt76x2_mcu_set_radio_state(struct mt76x2_dev *dev, bool on);
197int mt76x2_mcu_load_cr(struct mt76x2_dev *dev, u8 type, u8 temp_level,
198 u8 channel);
199int mt76x2_mcu_cleanup(struct mt76x2_dev *dev);
200
201int mt76x2_dma_init(struct mt76x2_dev *dev);
202void mt76x2_dma_cleanup(struct mt76x2_dev *dev);
203
204void mt76x2_cleanup(struct mt76x2_dev *dev);
205
206int mt76x2_tx_queue_mcu(struct mt76x2_dev *dev, enum mt76_txq_id qid,
207 struct sk_buff *skb, int cmd, int seq);
208void mt76x2_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control,
209 struct sk_buff *skb);
210void mt76x2_tx_complete(struct mt76x2_dev *dev, struct sk_buff *skb);
211int mt76x2_tx_prepare_skb(struct mt76_dev *mdev, void *txwi,
212 struct sk_buff *skb, struct mt76_queue *q,
213 struct mt76_wcid *wcid, struct ieee80211_sta *sta,
214 u32 *tx_info);
215void mt76x2_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue *q,
216 struct mt76_queue_entry *e, bool flush);
217
218void mt76x2_pre_tbtt_tasklet(unsigned long arg);
219
220void mt76x2_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q);
221void mt76x2_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
222 struct sk_buff *skb);
223
224void mt76x2_sta_ps(struct mt76_dev *dev, struct ieee80211_sta *sta, bool ps);
225
226void mt76x2_update_channel(struct mt76_dev *mdev);
227
228s8 mt76x2_tx_get_max_txpwr_adj(struct mt76x2_dev *dev,
229 const struct ieee80211_tx_rate *rate);
230s8 mt76x2_tx_get_txpwr_adj(struct mt76x2_dev *dev, s8 txpwr, s8 max_txpwr_adj);
231void mt76x2_tx_set_txpwr_auto(struct mt76x2_dev *dev, s8 txpwr);
232
233#endif
234
