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15#include <linux/module.h>
16#include <linux/kernel.h>
17#include <linux/types.h>
18#include <linux/slab.h>
19#include <linux/workqueue.h>
20#include <linux/interrupt.h>
21#include <linux/delay.h>
22#include <linux/wait.h>
23#include <linux/pci.h>
24#include <linux/pci_hotplug.h>
25#include <linux/kthread.h>
26#include "cpqphp.h"
27
28static u32 configure_new_device(struct controller *ctrl, struct pci_func *func,
29 u8 behind_bridge, struct resource_lists *resources);
30static int configure_new_function(struct controller *ctrl, struct pci_func *func,
31 u8 behind_bridge, struct resource_lists *resources);
32static void interrupt_event_handler(struct controller *ctrl);
33
34
35static struct task_struct *cpqhp_event_thread;
36static struct timer_list *pushbutton_pending;
37
38
39static void long_delay(int delay)
40{
41
42
43
44
45
46
47 msleep_interruptible(jiffies_to_msecs(delay));
48}
49
50
51
52#define WRONG_BUS_FREQUENCY 0x07
53static u8 handle_switch_change(u8 change, struct controller *ctrl)
54{
55 int hp_slot;
56 u8 rc = 0;
57 u16 temp_word;
58 struct pci_func *func;
59 struct event_info *taskInfo;
60
61 if (!change)
62 return 0;
63
64
65 dbg("cpqsbd: Switch interrupt received.\n");
66
67 for (hp_slot = 0; hp_slot < 6; hp_slot++) {
68 if (change & (0x1L << hp_slot)) {
69
70
71
72 func = cpqhp_slot_find(ctrl->bus,
73 (hp_slot + ctrl->slot_device_offset), 0);
74
75
76
77
78 taskInfo = &(ctrl->event_queue[ctrl->next_event]);
79 ctrl->next_event = (ctrl->next_event + 1) % 10;
80 taskInfo->hp_slot = hp_slot;
81
82 rc++;
83
84 temp_word = ctrl->ctrl_int_comp >> 16;
85 func->presence_save = (temp_word >> hp_slot) & 0x01;
86 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
87
88 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
89
90
91
92
93 func->switch_save = 0;
94
95 taskInfo->event_type = INT_SWITCH_OPEN;
96 } else {
97
98
99
100
101 func->switch_save = 0x10;
102
103 taskInfo->event_type = INT_SWITCH_CLOSE;
104 }
105 }
106 }
107
108 return rc;
109}
110
111
112
113
114
115
116static struct slot *cpqhp_find_slot(struct controller *ctrl, u8 device)
117{
118 struct slot *slot = ctrl->slot;
119
120 while (slot && (slot->device != device))
121 slot = slot->next;
122
123 return slot;
124}
125
126
127static u8 handle_presence_change(u16 change, struct controller *ctrl)
128{
129 int hp_slot;
130 u8 rc = 0;
131 u8 temp_byte;
132 u16 temp_word;
133 struct pci_func *func;
134 struct event_info *taskInfo;
135 struct slot *p_slot;
136
137 if (!change)
138 return 0;
139
140
141
142
143 dbg("cpqsbd: Presence/Notify input change.\n");
144 dbg(" Changed bits are 0x%4.4x\n", change);
145
146 for (hp_slot = 0; hp_slot < 6; hp_slot++) {
147 if (change & (0x0101 << hp_slot)) {
148
149
150
151 func = cpqhp_slot_find(ctrl->bus,
152 (hp_slot + ctrl->slot_device_offset), 0);
153
154 taskInfo = &(ctrl->event_queue[ctrl->next_event]);
155 ctrl->next_event = (ctrl->next_event + 1) % 10;
156 taskInfo->hp_slot = hp_slot;
157
158 rc++;
159
160 p_slot = cpqhp_find_slot(ctrl, hp_slot + (readb(ctrl->hpc_reg + SLOT_MASK) >> 4));
161 if (!p_slot)
162 return 0;
163
164
165
166
167 if (func->switch_save && (ctrl->push_button == 1)) {
168 temp_word = ctrl->ctrl_int_comp >> 16;
169 temp_byte = (temp_word >> hp_slot) & 0x01;
170 temp_byte |= (temp_word >> (hp_slot + 7)) & 0x02;
171
172 if (temp_byte != func->presence_save) {
173
174
175
176 dbg("hp_slot %d button pressed\n", hp_slot);
177 taskInfo->event_type = INT_BUTTON_PRESS;
178 } else {
179
180
181
182 dbg("hp_slot %d button released\n", hp_slot);
183 taskInfo->event_type = INT_BUTTON_RELEASE;
184
185
186 if ((p_slot->state == BLINKINGON_STATE)
187 || (p_slot->state == BLINKINGOFF_STATE)) {
188 taskInfo->event_type = INT_BUTTON_CANCEL;
189 dbg("hp_slot %d button cancel\n", hp_slot);
190 } else if ((p_slot->state == POWERON_STATE)
191 || (p_slot->state == POWEROFF_STATE)) {
192
193 taskInfo->event_type = INT_BUTTON_IGNORE;
194 dbg("hp_slot %d button ignore\n", hp_slot);
195 }
196 }
197 } else {
198
199
200
201 temp_word = ctrl->ctrl_int_comp >> 16;
202 func->presence_save = (temp_word >> hp_slot) & 0x01;
203 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
204
205 if ((!(ctrl->ctrl_int_comp & (0x010000 << hp_slot))) ||
206 (!(ctrl->ctrl_int_comp & (0x01000000 << hp_slot)))) {
207
208 taskInfo->event_type = INT_PRESENCE_ON;
209 } else {
210
211 taskInfo->event_type = INT_PRESENCE_OFF;
212 }
213 }
214 }
215 }
216
217 return rc;
218}
219
220
221static u8 handle_power_fault(u8 change, struct controller *ctrl)
222{
223 int hp_slot;
224 u8 rc = 0;
225 struct pci_func *func;
226 struct event_info *taskInfo;
227
228 if (!change)
229 return 0;
230
231
232
233
234
235 info("power fault interrupt\n");
236
237 for (hp_slot = 0; hp_slot < 6; hp_slot++) {
238 if (change & (0x01 << hp_slot)) {
239
240
241
242 func = cpqhp_slot_find(ctrl->bus,
243 (hp_slot + ctrl->slot_device_offset), 0);
244
245 taskInfo = &(ctrl->event_queue[ctrl->next_event]);
246 ctrl->next_event = (ctrl->next_event + 1) % 10;
247 taskInfo->hp_slot = hp_slot;
248
249 rc++;
250
251 if (ctrl->ctrl_int_comp & (0x00000100 << hp_slot)) {
252
253
254
255 func->status = 0x00;
256
257 taskInfo->event_type = INT_POWER_FAULT_CLEAR;
258 } else {
259
260
261
262 taskInfo->event_type = INT_POWER_FAULT;
263
264 if (ctrl->rev < 4) {
265 amber_LED_on(ctrl, hp_slot);
266 green_LED_off(ctrl, hp_slot);
267 set_SOGO(ctrl);
268
269
270
271
272
273
274
275
276
277
278
279
280
281 } else {
282
283 func->status = 0xFF;
284 info("power fault bit %x set\n", hp_slot);
285 }
286 }
287 }
288 }
289
290 return rc;
291}
292
293
294
295
296
297
298static int sort_by_size(struct pci_resource **head)
299{
300 struct pci_resource *current_res;
301 struct pci_resource *next_res;
302 int out_of_order = 1;
303
304 if (!(*head))
305 return 1;
306
307 if (!((*head)->next))
308 return 0;
309
310 while (out_of_order) {
311 out_of_order = 0;
312
313
314 if (((*head)->next) &&
315 ((*head)->length > (*head)->next->length)) {
316 out_of_order++;
317 current_res = *head;
318 *head = (*head)->next;
319 current_res->next = (*head)->next;
320 (*head)->next = current_res;
321 }
322
323 current_res = *head;
324
325 while (current_res->next && current_res->next->next) {
326 if (current_res->next->length > current_res->next->next->length) {
327 out_of_order++;
328 next_res = current_res->next;
329 current_res->next = current_res->next->next;
330 current_res = current_res->next;
331 next_res->next = current_res->next;
332 current_res->next = next_res;
333 } else
334 current_res = current_res->next;
335 }
336 }
337
338 return 0;
339}
340
341
342
343
344
345
346static int sort_by_max_size(struct pci_resource **head)
347{
348 struct pci_resource *current_res;
349 struct pci_resource *next_res;
350 int out_of_order = 1;
351
352 if (!(*head))
353 return 1;
354
355 if (!((*head)->next))
356 return 0;
357
358 while (out_of_order) {
359 out_of_order = 0;
360
361
362 if (((*head)->next) &&
363 ((*head)->length < (*head)->next->length)) {
364 out_of_order++;
365 current_res = *head;
366 *head = (*head)->next;
367 current_res->next = (*head)->next;
368 (*head)->next = current_res;
369 }
370
371 current_res = *head;
372
373 while (current_res->next && current_res->next->next) {
374 if (current_res->next->length < current_res->next->next->length) {
375 out_of_order++;
376 next_res = current_res->next;
377 current_res->next = current_res->next->next;
378 current_res = current_res->next;
379 next_res->next = current_res->next;
380 current_res->next = next_res;
381 } else
382 current_res = current_res->next;
383 }
384 }
385
386 return 0;
387}
388
389
390
391
392
393
394
395
396static struct pci_resource *do_pre_bridge_resource_split(struct pci_resource **head,
397 struct pci_resource **orig_head, u32 alignment)
398{
399 struct pci_resource *prevnode = NULL;
400 struct pci_resource *node;
401 struct pci_resource *split_node;
402 u32 rc;
403 u32 temp_dword;
404 dbg("do_pre_bridge_resource_split\n");
405
406 if (!(*head) || !(*orig_head))
407 return NULL;
408
409 rc = cpqhp_resource_sort_and_combine(head);
410
411 if (rc)
412 return NULL;
413
414 if ((*head)->base != (*orig_head)->base)
415 return NULL;
416
417 if ((*head)->length == (*orig_head)->length)
418 return NULL;
419
420
421
422
423
424
425 node = *head;
426
427 if (node->length & (alignment - 1)) {
428
429
430
431 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
432
433 if (!split_node)
434 return NULL;
435
436 temp_dword = (node->length | (alignment-1)) + 1 - alignment;
437
438 split_node->base = node->base;
439 split_node->length = temp_dword;
440
441 node->length -= temp_dword;
442 node->base += split_node->length;
443
444
445 *head = split_node;
446 split_node->next = node;
447 }
448
449 if (node->length < alignment)
450 return NULL;
451
452
453 if (*head == node) {
454 *head = node->next;
455 } else {
456 prevnode = *head;
457 while (prevnode->next != node)
458 prevnode = prevnode->next;
459
460 prevnode->next = node->next;
461 }
462 node->next = NULL;
463
464 return node;
465}
466
467
468
469
470
471
472
473static struct pci_resource *do_bridge_resource_split(struct pci_resource **head, u32 alignment)
474{
475 struct pci_resource *prevnode = NULL;
476 struct pci_resource *node;
477 u32 rc;
478 u32 temp_dword;
479
480 rc = cpqhp_resource_sort_and_combine(head);
481
482 if (rc)
483 return NULL;
484
485 node = *head;
486
487 while (node->next) {
488 prevnode = node;
489 node = node->next;
490 kfree(prevnode);
491 }
492
493 if (node->length < alignment)
494 goto error;
495
496 if (node->base & (alignment - 1)) {
497
498 temp_dword = (node->base | (alignment-1)) + 1;
499 if ((node->length - (temp_dword - node->base)) < alignment)
500 goto error;
501
502 node->length -= (temp_dword - node->base);
503 node->base = temp_dword;
504 }
505
506 if (node->length & (alignment - 1))
507
508 goto error;
509
510 return node;
511error:
512 kfree(node);
513 return NULL;
514}
515
516
517
518
519
520
521
522
523
524
525
526static struct pci_resource *get_io_resource(struct pci_resource **head, u32 size)
527{
528 struct pci_resource *prevnode;
529 struct pci_resource *node;
530 struct pci_resource *split_node;
531 u32 temp_dword;
532
533 if (!(*head))
534 return NULL;
535
536 if (cpqhp_resource_sort_and_combine(head))
537 return NULL;
538
539 if (sort_by_size(head))
540 return NULL;
541
542 for (node = *head; node; node = node->next) {
543 if (node->length < size)
544 continue;
545
546 if (node->base & (size - 1)) {
547
548
549
550 temp_dword = (node->base | (size-1)) + 1;
551
552
553 if ((node->length - (temp_dword - node->base)) < size)
554 continue;
555
556 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
557
558 if (!split_node)
559 return NULL;
560
561 split_node->base = node->base;
562 split_node->length = temp_dword - node->base;
563 node->base = temp_dword;
564 node->length -= split_node->length;
565
566
567 split_node->next = node->next;
568 node->next = split_node;
569 }
570
571
572 if (node->length > size) {
573
574
575
576 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
577
578 if (!split_node)
579 return NULL;
580
581 split_node->base = node->base + size;
582 split_node->length = node->length - size;
583 node->length = size;
584
585
586 split_node->next = node->next;
587 node->next = split_node;
588 }
589
590
591 if (node->base & 0x300L)
592 continue;
593
594
595
596
597 if (*head == node) {
598 *head = node->next;
599 } else {
600 prevnode = *head;
601 while (prevnode->next != node)
602 prevnode = prevnode->next;
603
604 prevnode->next = node->next;
605 }
606 node->next = NULL;
607 break;
608 }
609
610 return node;
611}
612
613
614
615
616
617
618
619
620
621
622
623static struct pci_resource *get_max_resource(struct pci_resource **head, u32 size)
624{
625 struct pci_resource *max;
626 struct pci_resource *temp;
627 struct pci_resource *split_node;
628 u32 temp_dword;
629
630 if (cpqhp_resource_sort_and_combine(head))
631 return NULL;
632
633 if (sort_by_max_size(head))
634 return NULL;
635
636 for (max = *head; max; max = max->next) {
637
638
639
640 if (max->length < size)
641 continue;
642
643 if (max->base & (size - 1)) {
644
645
646
647 temp_dword = (max->base | (size-1)) + 1;
648
649
650 if ((max->length - (temp_dword - max->base)) < size)
651 continue;
652
653 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
654
655 if (!split_node)
656 return NULL;
657
658 split_node->base = max->base;
659 split_node->length = temp_dword - max->base;
660 max->base = temp_dword;
661 max->length -= split_node->length;
662
663 split_node->next = max->next;
664 max->next = split_node;
665 }
666
667 if ((max->base + max->length) & (size - 1)) {
668
669
670
671 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
672
673 if (!split_node)
674 return NULL;
675 temp_dword = ((max->base + max->length) & ~(size - 1));
676 split_node->base = temp_dword;
677 split_node->length = max->length + max->base
678 - split_node->base;
679 max->length -= split_node->length;
680
681 split_node->next = max->next;
682 max->next = split_node;
683 }
684
685
686 if (max->length < size)
687 continue;
688
689
690 temp = *head;
691 if (temp == max) {
692 *head = max->next;
693 } else {
694 while (temp && temp->next != max)
695 temp = temp->next;
696
697 if (temp)
698 temp->next = max->next;
699 }
700
701 max->next = NULL;
702 break;
703 }
704
705 return max;
706}
707
708
709
710
711
712
713
714
715
716
717
718
719
720static struct pci_resource *get_resource(struct pci_resource **head, u32 size)
721{
722 struct pci_resource *prevnode;
723 struct pci_resource *node;
724 struct pci_resource *split_node;
725 u32 temp_dword;
726
727 if (cpqhp_resource_sort_and_combine(head))
728 return NULL;
729
730 if (sort_by_size(head))
731 return NULL;
732
733 for (node = *head; node; node = node->next) {
734 dbg("%s: req_size =%x node=%p, base=%x, length=%x\n",
735 __func__, size, node, node->base, node->length);
736 if (node->length < size)
737 continue;
738
739 if (node->base & (size - 1)) {
740 dbg("%s: not aligned\n", __func__);
741
742
743
744 temp_dword = (node->base | (size-1)) + 1;
745
746
747 if ((node->length - (temp_dword - node->base)) < size)
748 continue;
749
750 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
751
752 if (!split_node)
753 return NULL;
754
755 split_node->base = node->base;
756 split_node->length = temp_dword - node->base;
757 node->base = temp_dword;
758 node->length -= split_node->length;
759
760 split_node->next = node->next;
761 node->next = split_node;
762 }
763
764
765 if (node->length > size) {
766 dbg("%s: too big\n", __func__);
767
768
769
770 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
771
772 if (!split_node)
773 return NULL;
774
775 split_node->base = node->base + size;
776 split_node->length = node->length - size;
777 node->length = size;
778
779
780 split_node->next = node->next;
781 node->next = split_node;
782 }
783
784 dbg("%s: got one!!!\n", __func__);
785
786
787 if (*head == node) {
788 *head = node->next;
789 } else {
790 prevnode = *head;
791 while (prevnode->next != node)
792 prevnode = prevnode->next;
793
794 prevnode->next = node->next;
795 }
796 node->next = NULL;
797 break;
798 }
799 return node;
800}
801
802
803
804
805
806
807
808
809
810
811
812
813int cpqhp_resource_sort_and_combine(struct pci_resource **head)
814{
815 struct pci_resource *node1;
816 struct pci_resource *node2;
817 int out_of_order = 1;
818
819 dbg("%s: head = %p, *head = %p\n", __func__, head, *head);
820
821 if (!(*head))
822 return 1;
823
824 dbg("*head->next = %p\n", (*head)->next);
825
826 if (!(*head)->next)
827 return 0;
828
829 dbg("*head->base = 0x%x\n", (*head)->base);
830 dbg("*head->next->base = 0x%x\n", (*head)->next->base);
831 while (out_of_order) {
832 out_of_order = 0;
833
834
835 if (((*head)->next) &&
836 ((*head)->base > (*head)->next->base)) {
837 node1 = *head;
838 (*head) = (*head)->next;
839 node1->next = (*head)->next;
840 (*head)->next = node1;
841 out_of_order++;
842 }
843
844 node1 = (*head);
845
846 while (node1->next && node1->next->next) {
847 if (node1->next->base > node1->next->next->base) {
848 out_of_order++;
849 node2 = node1->next;
850 node1->next = node1->next->next;
851 node1 = node1->next;
852 node2->next = node1->next;
853 node1->next = node2;
854 } else
855 node1 = node1->next;
856 }
857 }
858
859 node1 = *head;
860
861 while (node1 && node1->next) {
862 if ((node1->base + node1->length) == node1->next->base) {
863
864 dbg("8..\n");
865 node1->length += node1->next->length;
866 node2 = node1->next;
867 node1->next = node1->next->next;
868 kfree(node2);
869 } else
870 node1 = node1->next;
871 }
872
873 return 0;
874}
875
876
877irqreturn_t cpqhp_ctrl_intr(int IRQ, void *data)
878{
879 struct controller *ctrl = data;
880 u8 schedule_flag = 0;
881 u8 reset;
882 u16 misc;
883 u32 Diff;
884 u32 temp_dword;
885
886
887 misc = readw(ctrl->hpc_reg + MISC);
888
889
890
891 if (!(misc & 0x000C))
892 return IRQ_NONE;
893
894 if (misc & 0x0004) {
895
896
897
898
899
900 misc |= 0x0004;
901 writew(misc, ctrl->hpc_reg + MISC);
902
903
904 misc = readw(ctrl->hpc_reg + MISC);
905
906 dbg("%s - waking up\n", __func__);
907 wake_up_interruptible(&ctrl->queue);
908 }
909
910 if (misc & 0x0008) {
911
912 Diff = readl(ctrl->hpc_reg + INT_INPUT_CLEAR) ^ ctrl->ctrl_int_comp;
913
914 ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
915
916
917 writel(Diff, ctrl->hpc_reg + INT_INPUT_CLEAR);
918
919
920 temp_dword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
921
922 if (!Diff)
923
924 writel(0xFFFFFFFF, ctrl->hpc_reg + INT_INPUT_CLEAR);
925
926 schedule_flag += handle_switch_change((u8)(Diff & 0xFFL), ctrl);
927 schedule_flag += handle_presence_change((u16)((Diff & 0xFFFF0000L) >> 16), ctrl);
928 schedule_flag += handle_power_fault((u8)((Diff & 0xFF00L) >> 8), ctrl);
929 }
930
931 reset = readb(ctrl->hpc_reg + RESET_FREQ_MODE);
932 if (reset & 0x40) {
933
934 reset &= 0xCF;
935 writeb(reset, ctrl->hpc_reg + RESET_FREQ_MODE);
936 reset = readb(ctrl->hpc_reg + RESET_FREQ_MODE);
937 wake_up_interruptible(&ctrl->queue);
938 }
939
940 if (schedule_flag) {
941 wake_up_process(cpqhp_event_thread);
942 dbg("Waking even thread");
943 }
944 return IRQ_HANDLED;
945}
946
947
948
949
950
951
952
953
954struct pci_func *cpqhp_slot_create(u8 busnumber)
955{
956 struct pci_func *new_slot;
957 struct pci_func *next;
958
959 new_slot = kzalloc(sizeof(*new_slot), GFP_KERNEL);
960 if (new_slot == NULL)
961 return new_slot;
962
963 new_slot->next = NULL;
964 new_slot->configured = 1;
965
966 if (cpqhp_slot_list[busnumber] == NULL) {
967 cpqhp_slot_list[busnumber] = new_slot;
968 } else {
969 next = cpqhp_slot_list[busnumber];
970 while (next->next != NULL)
971 next = next->next;
972 next->next = new_slot;
973 }
974 return new_slot;
975}
976
977
978
979
980
981
982
983
984static int slot_remove(struct pci_func *old_slot)
985{
986 struct pci_func *next;
987
988 if (old_slot == NULL)
989 return 1;
990
991 next = cpqhp_slot_list[old_slot->bus];
992 if (next == NULL)
993 return 1;
994
995 if (next == old_slot) {
996 cpqhp_slot_list[old_slot->bus] = old_slot->next;
997 cpqhp_destroy_board_resources(old_slot);
998 kfree(old_slot);
999 return 0;
1000 }
1001
1002 while ((next->next != old_slot) && (next->next != NULL))
1003 next = next->next;
1004
1005 if (next->next == old_slot) {
1006 next->next = old_slot->next;
1007 cpqhp_destroy_board_resources(old_slot);
1008 kfree(old_slot);
1009 return 0;
1010 } else
1011 return 2;
1012}
1013
1014
1015
1016
1017
1018
1019
1020
1021static int bridge_slot_remove(struct pci_func *bridge)
1022{
1023 u8 subordinateBus, secondaryBus;
1024 u8 tempBus;
1025 struct pci_func *next;
1026
1027 secondaryBus = (bridge->config_space[0x06] >> 8) & 0xFF;
1028 subordinateBus = (bridge->config_space[0x06] >> 16) & 0xFF;
1029
1030 for (tempBus = secondaryBus; tempBus <= subordinateBus; tempBus++) {
1031 next = cpqhp_slot_list[tempBus];
1032
1033 while (!slot_remove(next))
1034 next = cpqhp_slot_list[tempBus];
1035 }
1036
1037 next = cpqhp_slot_list[bridge->bus];
1038
1039 if (next == NULL)
1040 return 1;
1041
1042 if (next == bridge) {
1043 cpqhp_slot_list[bridge->bus] = bridge->next;
1044 goto out;
1045 }
1046
1047 while ((next->next != bridge) && (next->next != NULL))
1048 next = next->next;
1049
1050 if (next->next != bridge)
1051 return 2;
1052 next->next = bridge->next;
1053out:
1054 kfree(bridge);
1055 return 0;
1056}
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067struct pci_func *cpqhp_slot_find(u8 bus, u8 device, u8 index)
1068{
1069 int found = -1;
1070 struct pci_func *func;
1071
1072 func = cpqhp_slot_list[bus];
1073
1074 if ((func == NULL) || ((func->device == device) && (index == 0)))
1075 return func;
1076
1077 if (func->device == device)
1078 found++;
1079
1080 while (func->next != NULL) {
1081 func = func->next;
1082
1083 if (func->device == device)
1084 found++;
1085
1086 if (found == index)
1087 return func;
1088 }
1089
1090 return NULL;
1091}
1092
1093
1094
1095
1096static int is_bridge(struct pci_func *func)
1097{
1098
1099 if (((func->config_space[0x03] >> 16) & 0xFF) == 0x01)
1100 return 1;
1101 else
1102 return 0;
1103}
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115static u8 set_controller_speed(struct controller *ctrl, u8 adapter_speed, u8 hp_slot)
1116{
1117 struct slot *slot;
1118 struct pci_bus *bus = ctrl->pci_bus;
1119 u8 reg;
1120 u8 slot_power = readb(ctrl->hpc_reg + SLOT_POWER);
1121 u16 reg16;
1122 u32 leds = readl(ctrl->hpc_reg + LED_CONTROL);
1123
1124 if (bus->cur_bus_speed == adapter_speed)
1125 return 0;
1126
1127
1128
1129
1130 for (slot = ctrl->slot; slot; slot = slot->next) {
1131 if (slot->device == (hp_slot + ctrl->slot_device_offset))
1132 continue;
1133 if (get_presence_status(ctrl, slot) == 0)
1134 continue;
1135
1136
1137
1138
1139 if (bus->cur_bus_speed < adapter_speed)
1140 return 0;
1141
1142 return 1;
1143 }
1144
1145
1146
1147
1148 if ((bus->cur_bus_speed > adapter_speed) && (!ctrl->pcix_speed_capability))
1149 return 1;
1150
1151
1152 if ((bus->cur_bus_speed < adapter_speed) && (!ctrl->pcix_speed_capability))
1153 return 0;
1154
1155
1156
1157
1158 if (bus->max_bus_speed < adapter_speed) {
1159 if (bus->cur_bus_speed == bus->max_bus_speed)
1160 return 0;
1161 adapter_speed = bus->max_bus_speed;
1162 }
1163
1164 writel(0x0L, ctrl->hpc_reg + LED_CONTROL);
1165 writeb(0x00, ctrl->hpc_reg + SLOT_ENABLE);
1166
1167 set_SOGO(ctrl);
1168 wait_for_ctrl_irq(ctrl);
1169
1170 if (adapter_speed != PCI_SPEED_133MHz_PCIX)
1171 reg = 0xF5;
1172 else
1173 reg = 0xF4;
1174 pci_write_config_byte(ctrl->pci_dev, 0x41, reg);
1175
1176 reg16 = readw(ctrl->hpc_reg + NEXT_CURR_FREQ);
1177 reg16 &= ~0x000F;
1178 switch (adapter_speed) {
1179 case(PCI_SPEED_133MHz_PCIX):
1180 reg = 0x75;
1181 reg16 |= 0xB;
1182 break;
1183 case(PCI_SPEED_100MHz_PCIX):
1184 reg = 0x74;
1185 reg16 |= 0xA;
1186 break;
1187 case(PCI_SPEED_66MHz_PCIX):
1188 reg = 0x73;
1189 reg16 |= 0x9;
1190 break;
1191 case(PCI_SPEED_66MHz):
1192 reg = 0x73;
1193 reg16 |= 0x1;
1194 break;
1195 default:
1196 reg = 0x71;
1197 break;
1198
1199 }
1200 reg16 |= 0xB << 12;
1201 writew(reg16, ctrl->hpc_reg + NEXT_CURR_FREQ);
1202
1203 mdelay(5);
1204
1205
1206 writel(0, ctrl->hpc_reg + INT_MASK);
1207
1208 pci_write_config_byte(ctrl->pci_dev, 0x41, reg);
1209
1210
1211 reg = ~0xF;
1212 pci_read_config_byte(ctrl->pci_dev, 0x43, ®);
1213 pci_write_config_byte(ctrl->pci_dev, 0x43, reg);
1214
1215
1216 if (((bus->cur_bus_speed == PCI_SPEED_66MHz) && (adapter_speed == PCI_SPEED_66MHz_PCIX)) ||
1217 ((bus->cur_bus_speed == PCI_SPEED_66MHz_PCIX) && (adapter_speed == PCI_SPEED_66MHz)))
1218 set_SOGO(ctrl);
1219
1220 wait_for_ctrl_irq(ctrl);
1221 mdelay(1100);
1222
1223
1224 writel(leds, ctrl->hpc_reg + LED_CONTROL);
1225 writeb(slot_power, ctrl->hpc_reg + SLOT_ENABLE);
1226
1227 set_SOGO(ctrl);
1228 wait_for_ctrl_irq(ctrl);
1229
1230 bus->cur_bus_speed = adapter_speed;
1231 slot = cpqhp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
1232
1233 info("Successfully changed frequency/mode for adapter in slot %d\n",
1234 slot->number);
1235 return 0;
1236}
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254static u32 board_replaced(struct pci_func *func, struct controller *ctrl)
1255{
1256 struct pci_bus *bus = ctrl->pci_bus;
1257 u8 hp_slot;
1258 u8 temp_byte;
1259 u8 adapter_speed;
1260 u32 rc = 0;
1261
1262 hp_slot = func->device - ctrl->slot_device_offset;
1263
1264
1265
1266
1267 if (readl(ctrl->hpc_reg + INT_INPUT_CLEAR) & (0x01L << hp_slot))
1268 rc = INTERLOCK_OPEN;
1269
1270
1271
1272 else if (is_slot_enabled(ctrl, hp_slot))
1273 rc = CARD_FUNCTIONING;
1274 else {
1275 mutex_lock(&ctrl->crit_sect);
1276
1277
1278 enable_slot_power(ctrl, hp_slot);
1279
1280 set_SOGO(ctrl);
1281
1282
1283 wait_for_ctrl_irq(ctrl);
1284
1285
1286
1287 temp_byte = readb(ctrl->hpc_reg + SLOT_POWER);
1288 writeb(0x00, ctrl->hpc_reg + SLOT_POWER);
1289 writeb(temp_byte, ctrl->hpc_reg + SLOT_POWER);
1290
1291 set_SOGO(ctrl);
1292
1293
1294 wait_for_ctrl_irq(ctrl);
1295
1296 adapter_speed = get_adapter_speed(ctrl, hp_slot);
1297 if (bus->cur_bus_speed != adapter_speed)
1298 if (set_controller_speed(ctrl, adapter_speed, hp_slot))
1299 rc = WRONG_BUS_FREQUENCY;
1300
1301
1302 disable_slot_power(ctrl, hp_slot);
1303
1304 set_SOGO(ctrl);
1305
1306
1307 wait_for_ctrl_irq(ctrl);
1308
1309 mutex_unlock(&ctrl->crit_sect);
1310
1311 if (rc)
1312 return rc;
1313
1314 mutex_lock(&ctrl->crit_sect);
1315
1316 slot_enable(ctrl, hp_slot);
1317 green_LED_blink(ctrl, hp_slot);
1318
1319 amber_LED_off(ctrl, hp_slot);
1320
1321 set_SOGO(ctrl);
1322
1323
1324 wait_for_ctrl_irq(ctrl);
1325
1326 mutex_unlock(&ctrl->crit_sect);
1327
1328
1329 long_delay(1*HZ);
1330
1331
1332 if (func->status == 0xFF) {
1333
1334 rc = POWER_FAILURE;
1335 func->status = 0;
1336 } else
1337 rc = cpqhp_valid_replace(ctrl, func);
1338
1339 if (!rc) {
1340
1341
1342 rc = cpqhp_configure_board(ctrl, func);
1343
1344
1345
1346
1347
1348
1349
1350
1351 mutex_lock(&ctrl->crit_sect);
1352
1353 amber_LED_on(ctrl, hp_slot);
1354 green_LED_off(ctrl, hp_slot);
1355 slot_disable(ctrl, hp_slot);
1356
1357 set_SOGO(ctrl);
1358
1359
1360 wait_for_ctrl_irq(ctrl);
1361
1362 mutex_unlock(&ctrl->crit_sect);
1363
1364 if (rc)
1365 return rc;
1366 else
1367 return 1;
1368
1369 } else {
1370
1371
1372
1373
1374
1375
1376
1377 mutex_lock(&ctrl->crit_sect);
1378
1379 amber_LED_on(ctrl, hp_slot);
1380 green_LED_off(ctrl, hp_slot);
1381 slot_disable(ctrl, hp_slot);
1382
1383 set_SOGO(ctrl);
1384
1385
1386 wait_for_ctrl_irq(ctrl);
1387
1388 mutex_unlock(&ctrl->crit_sect);
1389 }
1390
1391 }
1392 return rc;
1393
1394}
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405static u32 board_added(struct pci_func *func, struct controller *ctrl)
1406{
1407 u8 hp_slot;
1408 u8 temp_byte;
1409 u8 adapter_speed;
1410 int index;
1411 u32 temp_register = 0xFFFFFFFF;
1412 u32 rc = 0;
1413 struct pci_func *new_slot = NULL;
1414 struct pci_bus *bus = ctrl->pci_bus;
1415 struct slot *p_slot;
1416 struct resource_lists res_lists;
1417
1418 hp_slot = func->device - ctrl->slot_device_offset;
1419 dbg("%s: func->device, slot_offset, hp_slot = %d, %d ,%d\n",
1420 __func__, func->device, ctrl->slot_device_offset, hp_slot);
1421
1422 mutex_lock(&ctrl->crit_sect);
1423
1424
1425 enable_slot_power(ctrl, hp_slot);
1426
1427 set_SOGO(ctrl);
1428
1429
1430 wait_for_ctrl_irq(ctrl);
1431
1432
1433
1434
1435 temp_byte = readb(ctrl->hpc_reg + SLOT_POWER);
1436 writeb(0x00, ctrl->hpc_reg + SLOT_POWER);
1437 writeb(temp_byte, ctrl->hpc_reg + SLOT_POWER);
1438
1439 set_SOGO(ctrl);
1440
1441
1442 wait_for_ctrl_irq(ctrl);
1443
1444 adapter_speed = get_adapter_speed(ctrl, hp_slot);
1445 if (bus->cur_bus_speed != adapter_speed)
1446 if (set_controller_speed(ctrl, adapter_speed, hp_slot))
1447 rc = WRONG_BUS_FREQUENCY;
1448
1449
1450 disable_slot_power(ctrl, hp_slot);
1451
1452 set_SOGO(ctrl);
1453
1454
1455 wait_for_ctrl_irq(ctrl);
1456
1457 mutex_unlock(&ctrl->crit_sect);
1458
1459 if (rc)
1460 return rc;
1461
1462 p_slot = cpqhp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
1463
1464
1465
1466 dbg("%s: before down\n", __func__);
1467 mutex_lock(&ctrl->crit_sect);
1468 dbg("%s: after down\n", __func__);
1469
1470 dbg("%s: before slot_enable\n", __func__);
1471 slot_enable(ctrl, hp_slot);
1472
1473 dbg("%s: before green_LED_blink\n", __func__);
1474 green_LED_blink(ctrl, hp_slot);
1475
1476 dbg("%s: before amber_LED_blink\n", __func__);
1477 amber_LED_off(ctrl, hp_slot);
1478
1479 dbg("%s: before set_SOGO\n", __func__);
1480 set_SOGO(ctrl);
1481
1482
1483 dbg("%s: before wait_for_ctrl_irq\n", __func__);
1484 wait_for_ctrl_irq(ctrl);
1485 dbg("%s: after wait_for_ctrl_irq\n", __func__);
1486
1487 dbg("%s: before up\n", __func__);
1488 mutex_unlock(&ctrl->crit_sect);
1489 dbg("%s: after up\n", __func__);
1490
1491
1492 dbg("%s: before long_delay\n", __func__);
1493 long_delay(1*HZ);
1494 dbg("%s: after long_delay\n", __func__);
1495
1496 dbg("%s: func status = %x\n", __func__, func->status);
1497
1498 if (func->status == 0xFF) {
1499
1500 temp_register = 0xFFFFFFFF;
1501 dbg("%s: temp register set to %x by power fault\n", __func__, temp_register);
1502 rc = POWER_FAILURE;
1503 func->status = 0;
1504 } else {
1505
1506 ctrl->pci_bus->number = func->bus;
1507 rc = pci_bus_read_config_dword(ctrl->pci_bus, PCI_DEVFN(func->device, func->function), PCI_VENDOR_ID, &temp_register);
1508 dbg("%s: pci_read_config_dword returns %d\n", __func__, rc);
1509 dbg("%s: temp_register is %x\n", __func__, temp_register);
1510
1511 if (rc != 0) {
1512
1513 temp_register = 0xFFFFFFFF;
1514 dbg("%s: temp register set to %x by error\n", __func__, temp_register);
1515 }
1516
1517 rc = NO_ADAPTER_PRESENT;
1518 }
1519
1520
1521 if (temp_register != 0xFFFFFFFF) {
1522 res_lists.io_head = ctrl->io_head;
1523 res_lists.mem_head = ctrl->mem_head;
1524 res_lists.p_mem_head = ctrl->p_mem_head;
1525 res_lists.bus_head = ctrl->bus_head;
1526 res_lists.irqs = NULL;
1527
1528 rc = configure_new_device(ctrl, func, 0, &res_lists);
1529
1530 dbg("%s: back from configure_new_device\n", __func__);
1531 ctrl->io_head = res_lists.io_head;
1532 ctrl->mem_head = res_lists.mem_head;
1533 ctrl->p_mem_head = res_lists.p_mem_head;
1534 ctrl->bus_head = res_lists.bus_head;
1535
1536 cpqhp_resource_sort_and_combine(&(ctrl->mem_head));
1537 cpqhp_resource_sort_and_combine(&(ctrl->p_mem_head));
1538 cpqhp_resource_sort_and_combine(&(ctrl->io_head));
1539 cpqhp_resource_sort_and_combine(&(ctrl->bus_head));
1540
1541 if (rc) {
1542 mutex_lock(&ctrl->crit_sect);
1543
1544 amber_LED_on(ctrl, hp_slot);
1545 green_LED_off(ctrl, hp_slot);
1546 slot_disable(ctrl, hp_slot);
1547
1548 set_SOGO(ctrl);
1549
1550
1551 wait_for_ctrl_irq(ctrl);
1552
1553 mutex_unlock(&ctrl->crit_sect);
1554 return rc;
1555 } else {
1556 cpqhp_save_slot_config(ctrl, func);
1557 }
1558
1559
1560 func->status = 0;
1561 func->switch_save = 0x10;
1562 func->is_a_board = 0x01;
1563
1564
1565
1566 dbg("%s: configure linux pci_dev structure\n", __func__);
1567 index = 0;
1568 do {
1569 new_slot = cpqhp_slot_find(ctrl->bus, func->device, index++);
1570 if (new_slot && !new_slot->pci_dev)
1571 cpqhp_configure_device(ctrl, new_slot);
1572 } while (new_slot);
1573
1574 mutex_lock(&ctrl->crit_sect);
1575
1576 green_LED_on(ctrl, hp_slot);
1577
1578 set_SOGO(ctrl);
1579
1580
1581 wait_for_ctrl_irq(ctrl);
1582
1583 mutex_unlock(&ctrl->crit_sect);
1584 } else {
1585 mutex_lock(&ctrl->crit_sect);
1586
1587 amber_LED_on(ctrl, hp_slot);
1588 green_LED_off(ctrl, hp_slot);
1589 slot_disable(ctrl, hp_slot);
1590
1591 set_SOGO(ctrl);
1592
1593
1594 wait_for_ctrl_irq(ctrl);
1595
1596 mutex_unlock(&ctrl->crit_sect);
1597
1598 return rc;
1599 }
1600 return 0;
1601}
1602
1603
1604
1605
1606
1607
1608
1609
1610static u32 remove_board(struct pci_func *func, u32 replace_flag, struct controller *ctrl)
1611{
1612 int index;
1613 u8 skip = 0;
1614 u8 device;
1615 u8 hp_slot;
1616 u8 temp_byte;
1617 u32 rc;
1618 struct resource_lists res_lists;
1619 struct pci_func *temp_func;
1620
1621 if (cpqhp_unconfigure_device(func))
1622 return 1;
1623
1624 device = func->device;
1625
1626 hp_slot = func->device - ctrl->slot_device_offset;
1627 dbg("In %s, hp_slot = %d\n", __func__, hp_slot);
1628
1629
1630
1631 if (replace_flag || !ctrl->add_support)
1632 rc = cpqhp_save_base_addr_length(ctrl, func);
1633 else if (!func->bus_head && !func->mem_head &&
1634 !func->p_mem_head && !func->io_head) {
1635
1636
1637
1638 index = 0;
1639 temp_func = cpqhp_slot_find(func->bus, func->device, index++);
1640 while (temp_func) {
1641 if (temp_func->bus_head || temp_func->mem_head
1642 || temp_func->p_mem_head || temp_func->io_head) {
1643 skip = 1;
1644 break;
1645 }
1646 temp_func = cpqhp_slot_find(temp_func->bus, temp_func->device, index++);
1647 }
1648
1649 if (!skip)
1650 rc = cpqhp_save_used_resources(ctrl, func);
1651 }
1652
1653 if (func->is_a_board)
1654 func->status = 0x01;
1655 func->configured = 0;
1656
1657 mutex_lock(&ctrl->crit_sect);
1658
1659 green_LED_off(ctrl, hp_slot);
1660 slot_disable(ctrl, hp_slot);
1661
1662 set_SOGO(ctrl);
1663
1664
1665 temp_byte = readb(ctrl->hpc_reg + SLOT_SERR);
1666 temp_byte &= ~(0x01 << hp_slot);
1667 writeb(temp_byte, ctrl->hpc_reg + SLOT_SERR);
1668
1669
1670 wait_for_ctrl_irq(ctrl);
1671
1672 mutex_unlock(&ctrl->crit_sect);
1673
1674 if (!replace_flag && ctrl->add_support) {
1675 while (func) {
1676 res_lists.io_head = ctrl->io_head;
1677 res_lists.mem_head = ctrl->mem_head;
1678 res_lists.p_mem_head = ctrl->p_mem_head;
1679 res_lists.bus_head = ctrl->bus_head;
1680
1681 cpqhp_return_board_resources(func, &res_lists);
1682
1683 ctrl->io_head = res_lists.io_head;
1684 ctrl->mem_head = res_lists.mem_head;
1685 ctrl->p_mem_head = res_lists.p_mem_head;
1686 ctrl->bus_head = res_lists.bus_head;
1687
1688 cpqhp_resource_sort_and_combine(&(ctrl->mem_head));
1689 cpqhp_resource_sort_and_combine(&(ctrl->p_mem_head));
1690 cpqhp_resource_sort_and_combine(&(ctrl->io_head));
1691 cpqhp_resource_sort_and_combine(&(ctrl->bus_head));
1692
1693 if (is_bridge(func)) {
1694 bridge_slot_remove(func);
1695 } else
1696 slot_remove(func);
1697
1698 func = cpqhp_slot_find(ctrl->bus, device, 0);
1699 }
1700
1701
1702 func = cpqhp_slot_create(ctrl->bus);
1703
1704 if (func == NULL)
1705 return 1;
1706
1707 func->bus = ctrl->bus;
1708 func->device = device;
1709 func->function = 0;
1710 func->configured = 0;
1711 func->switch_save = 0x10;
1712 func->is_a_board = 0;
1713 func->p_task_event = NULL;
1714 }
1715
1716 return 0;
1717}
1718
1719static void pushbutton_helper_thread(struct timer_list *t)
1720{
1721 pushbutton_pending = t;
1722
1723 wake_up_process(cpqhp_event_thread);
1724}
1725
1726
1727
1728static int event_thread(void *data)
1729{
1730 struct controller *ctrl;
1731
1732 while (1) {
1733 dbg("!!!!event_thread sleeping\n");
1734 set_current_state(TASK_INTERRUPTIBLE);
1735 schedule();
1736
1737 if (kthread_should_stop())
1738 break;
1739
1740 if (pushbutton_pending)
1741 cpqhp_pushbutton_thread(pushbutton_pending);
1742 else
1743 for (ctrl = cpqhp_ctrl_list; ctrl; ctrl = ctrl->next)
1744 interrupt_event_handler(ctrl);
1745 }
1746 dbg("event_thread signals exit\n");
1747 return 0;
1748}
1749
1750int cpqhp_event_start_thread(void)
1751{
1752 cpqhp_event_thread = kthread_run(event_thread, NULL, "phpd_event");
1753 if (IS_ERR(cpqhp_event_thread)) {
1754 err("Can't start up our event thread\n");
1755 return PTR_ERR(cpqhp_event_thread);
1756 }
1757
1758 return 0;
1759}
1760
1761
1762void cpqhp_event_stop_thread(void)
1763{
1764 kthread_stop(cpqhp_event_thread);
1765}
1766
1767
1768static void interrupt_event_handler(struct controller *ctrl)
1769{
1770 int loop = 0;
1771 int change = 1;
1772 struct pci_func *func;
1773 u8 hp_slot;
1774 struct slot *p_slot;
1775
1776 while (change) {
1777 change = 0;
1778
1779 for (loop = 0; loop < 10; loop++) {
1780
1781 if (ctrl->event_queue[loop].event_type != 0) {
1782 hp_slot = ctrl->event_queue[loop].hp_slot;
1783
1784 func = cpqhp_slot_find(ctrl->bus, (hp_slot + ctrl->slot_device_offset), 0);
1785 if (!func)
1786 return;
1787
1788 p_slot = cpqhp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
1789 if (!p_slot)
1790 return;
1791
1792 dbg("hp_slot %d, func %p, p_slot %p\n",
1793 hp_slot, func, p_slot);
1794
1795 if (ctrl->event_queue[loop].event_type == INT_BUTTON_PRESS) {
1796 dbg("button pressed\n");
1797 } else if (ctrl->event_queue[loop].event_type ==
1798 INT_BUTTON_CANCEL) {
1799 dbg("button cancel\n");
1800 del_timer(&p_slot->task_event);
1801
1802 mutex_lock(&ctrl->crit_sect);
1803
1804 if (p_slot->state == BLINKINGOFF_STATE) {
1805
1806 dbg("turn on green LED\n");
1807 green_LED_on(ctrl, hp_slot);
1808 } else if (p_slot->state == BLINKINGON_STATE) {
1809
1810 dbg("turn off green LED\n");
1811 green_LED_off(ctrl, hp_slot);
1812 }
1813
1814 info(msg_button_cancel, p_slot->number);
1815
1816 p_slot->state = STATIC_STATE;
1817
1818 amber_LED_off(ctrl, hp_slot);
1819
1820 set_SOGO(ctrl);
1821
1822
1823 wait_for_ctrl_irq(ctrl);
1824
1825 mutex_unlock(&ctrl->crit_sect);
1826 }
1827
1828 else if (ctrl->event_queue[loop].event_type == INT_BUTTON_RELEASE) {
1829 dbg("button release\n");
1830
1831 if (is_slot_enabled(ctrl, hp_slot)) {
1832 dbg("slot is on\n");
1833 p_slot->state = BLINKINGOFF_STATE;
1834 info(msg_button_off, p_slot->number);
1835 } else {
1836 dbg("slot is off\n");
1837 p_slot->state = BLINKINGON_STATE;
1838 info(msg_button_on, p_slot->number);
1839 }
1840 mutex_lock(&ctrl->crit_sect);
1841
1842 dbg("blink green LED and turn off amber\n");
1843
1844 amber_LED_off(ctrl, hp_slot);
1845 green_LED_blink(ctrl, hp_slot);
1846
1847 set_SOGO(ctrl);
1848
1849
1850 wait_for_ctrl_irq(ctrl);
1851
1852 mutex_unlock(&ctrl->crit_sect);
1853 timer_setup(&p_slot->task_event,
1854 pushbutton_helper_thread,
1855 0);
1856 p_slot->hp_slot = hp_slot;
1857 p_slot->ctrl = ctrl;
1858
1859 p_slot->task_event.expires = jiffies + 5 * HZ;
1860
1861 dbg("add_timer p_slot = %p\n", p_slot);
1862 add_timer(&p_slot->task_event);
1863 }
1864
1865 else if (ctrl->event_queue[loop].event_type == INT_POWER_FAULT) {
1866 dbg("power fault\n");
1867 }
1868
1869 ctrl->event_queue[loop].event_type = 0;
1870
1871 change = 1;
1872 }
1873 }
1874 }
1875
1876 return;
1877}
1878
1879
1880
1881
1882
1883
1884
1885
1886
1887void cpqhp_pushbutton_thread(struct timer_list *t)
1888{
1889 u8 hp_slot;
1890 u8 device;
1891 struct pci_func *func;
1892 struct slot *p_slot = from_timer(p_slot, t, task_event);
1893 struct controller *ctrl = (struct controller *) p_slot->ctrl;
1894
1895 pushbutton_pending = NULL;
1896 hp_slot = p_slot->hp_slot;
1897
1898 device = p_slot->device;
1899
1900 if (is_slot_enabled(ctrl, hp_slot)) {
1901 p_slot->state = POWEROFF_STATE;
1902
1903 func = cpqhp_slot_find(p_slot->bus, p_slot->device, 0);
1904 dbg("In power_down_board, func = %p, ctrl = %p\n", func, ctrl);
1905 if (!func) {
1906 dbg("Error! func NULL in %s\n", __func__);
1907 return;
1908 }
1909
1910 if (cpqhp_process_SS(ctrl, func) != 0) {
1911 amber_LED_on(ctrl, hp_slot);
1912 green_LED_on(ctrl, hp_slot);
1913
1914 set_SOGO(ctrl);
1915
1916
1917 wait_for_ctrl_irq(ctrl);
1918 }
1919
1920 p_slot->state = STATIC_STATE;
1921 } else {
1922 p_slot->state = POWERON_STATE;
1923
1924
1925 func = cpqhp_slot_find(p_slot->bus, p_slot->device, 0);
1926 dbg("In add_board, func = %p, ctrl = %p\n", func, ctrl);
1927 if (!func) {
1928 dbg("Error! func NULL in %s\n", __func__);
1929 return;
1930 }
1931
1932 if (ctrl != NULL) {
1933 if (cpqhp_process_SI(ctrl, func) != 0) {
1934 amber_LED_on(ctrl, hp_slot);
1935 green_LED_off(ctrl, hp_slot);
1936
1937 set_SOGO(ctrl);
1938
1939
1940 wait_for_ctrl_irq(ctrl);
1941 }
1942 }
1943
1944 p_slot->state = STATIC_STATE;
1945 }
1946
1947 return;
1948}
1949
1950
1951int cpqhp_process_SI(struct controller *ctrl, struct pci_func *func)
1952{
1953 u8 device, hp_slot;
1954 u16 temp_word;
1955 u32 tempdword;
1956 int rc;
1957 struct slot *p_slot;
1958 int physical_slot = 0;
1959
1960 tempdword = 0;
1961
1962 device = func->device;
1963 hp_slot = device - ctrl->slot_device_offset;
1964 p_slot = cpqhp_find_slot(ctrl, device);
1965 if (p_slot)
1966 physical_slot = p_slot->number;
1967
1968
1969 tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
1970
1971 if (tempdword & (0x01 << hp_slot))
1972 return 1;
1973
1974 if (func->is_a_board) {
1975 rc = board_replaced(func, ctrl);
1976 } else {
1977
1978 slot_remove(func);
1979
1980 func = cpqhp_slot_create(ctrl->bus);
1981 if (func == NULL)
1982 return 1;
1983
1984 func->bus = ctrl->bus;
1985 func->device = device;
1986 func->function = 0;
1987 func->configured = 0;
1988 func->is_a_board = 1;
1989
1990
1991 temp_word = ctrl->ctrl_int_comp >> 16;
1992 func->presence_save = (temp_word >> hp_slot) & 0x01;
1993 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
1994
1995 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
1996 func->switch_save = 0;
1997 } else {
1998 func->switch_save = 0x10;
1999 }
2000
2001 rc = board_added(func, ctrl);
2002 if (rc) {
2003 if (is_bridge(func)) {
2004 bridge_slot_remove(func);
2005 } else
2006 slot_remove(func);
2007
2008
2009 func = cpqhp_slot_create(ctrl->bus);
2010
2011 if (func == NULL)
2012 return 1;
2013
2014 func->bus = ctrl->bus;
2015 func->device = device;
2016 func->function = 0;
2017 func->configured = 0;
2018 func->is_a_board = 0;
2019
2020
2021 temp_word = ctrl->ctrl_int_comp >> 16;
2022 func->presence_save = (temp_word >> hp_slot) & 0x01;
2023 func->presence_save |=
2024 (temp_word >> (hp_slot + 7)) & 0x02;
2025
2026 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
2027 func->switch_save = 0;
2028 } else {
2029 func->switch_save = 0x10;
2030 }
2031 }
2032 }
2033
2034 if (rc)
2035 dbg("%s: rc = %d\n", __func__, rc);
2036
2037 return rc;
2038}
2039
2040
2041int cpqhp_process_SS(struct controller *ctrl, struct pci_func *func)
2042{
2043 u8 device, class_code, header_type, BCR;
2044 u8 index = 0;
2045 u8 replace_flag;
2046 u32 rc = 0;
2047 unsigned int devfn;
2048 struct slot *p_slot;
2049 struct pci_bus *pci_bus = ctrl->pci_bus;
2050 int physical_slot = 0;
2051
2052 device = func->device;
2053 func = cpqhp_slot_find(ctrl->bus, device, index++);
2054 p_slot = cpqhp_find_slot(ctrl, device);
2055 if (p_slot)
2056 physical_slot = p_slot->number;
2057
2058
2059 while (func && !rc) {
2060 pci_bus->number = func->bus;
2061 devfn = PCI_DEVFN(func->device, func->function);
2062
2063
2064 rc = pci_bus_read_config_byte(pci_bus, devfn, 0x0B, &class_code);
2065 if (rc)
2066 return rc;
2067
2068 if (class_code == PCI_BASE_CLASS_DISPLAY) {
2069
2070 rc = REMOVE_NOT_SUPPORTED;
2071 } else {
2072
2073 rc = pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
2074 if (rc)
2075 return rc;
2076
2077
2078 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
2079 rc = pci_bus_read_config_byte(pci_bus, devfn, PCI_BRIDGE_CONTROL, &BCR);
2080 if (rc)
2081 return rc;
2082
2083
2084
2085 if (BCR & PCI_BRIDGE_CTL_VGA)
2086 rc = REMOVE_NOT_SUPPORTED;
2087 }
2088 }
2089
2090 func = cpqhp_slot_find(ctrl->bus, device, index++);
2091 }
2092
2093 func = cpqhp_slot_find(ctrl->bus, device, 0);
2094 if ((func != NULL) && !rc) {
2095
2096 replace_flag = !(ctrl->add_support);
2097 rc = remove_board(func, replace_flag, ctrl);
2098 } else if (!rc) {
2099 rc = 1;
2100 }
2101
2102 return rc;
2103}
2104
2105
2106
2107
2108
2109
2110
2111
2112static void switch_leds(struct controller *ctrl, const int num_of_slots,
2113 u32 *work_LED, const int direction)
2114{
2115 int loop;
2116
2117 for (loop = 0; loop < num_of_slots; loop++) {
2118 if (direction)
2119 *work_LED = *work_LED >> 1;
2120 else
2121 *work_LED = *work_LED << 1;
2122 writel(*work_LED, ctrl->hpc_reg + LED_CONTROL);
2123
2124 set_SOGO(ctrl);
2125
2126
2127 wait_for_ctrl_irq(ctrl);
2128
2129
2130 long_delay((2*HZ)/10);
2131 }
2132}
2133
2134
2135
2136
2137
2138
2139
2140
2141int cpqhp_hardware_test(struct controller *ctrl, int test_num)
2142{
2143 u32 save_LED;
2144 u32 work_LED;
2145 int loop;
2146 int num_of_slots;
2147
2148 num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0f;
2149
2150 switch (test_num) {
2151 case 1:
2152
2153
2154
2155
2156 save_LED = readl(ctrl->hpc_reg + LED_CONTROL);
2157 work_LED = 0x01010101;
2158 switch_leds(ctrl, num_of_slots, &work_LED, 0);
2159 switch_leds(ctrl, num_of_slots, &work_LED, 1);
2160 switch_leds(ctrl, num_of_slots, &work_LED, 0);
2161 switch_leds(ctrl, num_of_slots, &work_LED, 1);
2162
2163 work_LED = 0x01010000;
2164 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2165 switch_leds(ctrl, num_of_slots, &work_LED, 0);
2166 switch_leds(ctrl, num_of_slots, &work_LED, 1);
2167 work_LED = 0x00000101;
2168 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2169 switch_leds(ctrl, num_of_slots, &work_LED, 0);
2170 switch_leds(ctrl, num_of_slots, &work_LED, 1);
2171
2172 work_LED = 0x01010000;
2173 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2174 for (loop = 0; loop < num_of_slots; loop++) {
2175 set_SOGO(ctrl);
2176
2177
2178 wait_for_ctrl_irq(ctrl);
2179
2180
2181 long_delay((3*HZ)/10);
2182 work_LED = work_LED >> 16;
2183 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2184
2185 set_SOGO(ctrl);
2186
2187
2188 wait_for_ctrl_irq(ctrl);
2189
2190
2191 long_delay((3*HZ)/10);
2192 work_LED = work_LED << 16;
2193 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2194 work_LED = work_LED << 1;
2195 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2196 }
2197
2198
2199 writel(save_LED, ctrl->hpc_reg + LED_CONTROL);
2200
2201 set_SOGO(ctrl);
2202
2203
2204 wait_for_ctrl_irq(ctrl);
2205 break;
2206 case 2:
2207
2208 break;
2209 case 3:
2210
2211 break;
2212 }
2213 return 0;
2214}
2215
2216
2217
2218
2219
2220
2221
2222
2223
2224
2225
2226static u32 configure_new_device(struct controller *ctrl, struct pci_func *func,
2227 u8 behind_bridge, struct resource_lists *resources)
2228{
2229 u8 temp_byte, function, max_functions, stop_it;
2230 int rc;
2231 u32 ID;
2232 struct pci_func *new_slot;
2233 int index;
2234
2235 new_slot = func;
2236
2237 dbg("%s\n", __func__);
2238
2239 ctrl->pci_bus->number = func->bus;
2240 rc = pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(func->device, func->function), 0x0E, &temp_byte);
2241 if (rc) {
2242 dbg("%s: rc = %d\n", __func__, rc);
2243 return rc;
2244 }
2245
2246 if (temp_byte & 0x80)
2247 max_functions = 8;
2248 else
2249 max_functions = 1;
2250
2251 function = 0;
2252
2253 do {
2254 rc = configure_new_function(ctrl, new_slot, behind_bridge, resources);
2255
2256 if (rc) {
2257 dbg("configure_new_function failed %d\n", rc);
2258 index = 0;
2259
2260 while (new_slot) {
2261 new_slot = cpqhp_slot_find(new_slot->bus, new_slot->device, index++);
2262
2263 if (new_slot)
2264 cpqhp_return_board_resources(new_slot, resources);
2265 }
2266
2267 return rc;
2268 }
2269
2270 function++;
2271
2272 stop_it = 0;
2273
2274
2275
2276
2277 while ((function < max_functions) && (!stop_it)) {
2278 pci_bus_read_config_dword(ctrl->pci_bus, PCI_DEVFN(func->device, function), 0x00, &ID);
2279
2280 if (ID == 0xFFFFFFFF) {
2281 function++;
2282 } else {
2283
2284 new_slot = cpqhp_slot_create(func->bus);
2285
2286 if (new_slot == NULL)
2287 return 1;
2288
2289 new_slot->bus = func->bus;
2290 new_slot->device = func->device;
2291 new_slot->function = function;
2292 new_slot->is_a_board = 1;
2293 new_slot->status = 0;
2294
2295 stop_it++;
2296 }
2297 }
2298
2299 } while (function < max_functions);
2300 dbg("returning from configure_new_device\n");
2301
2302 return 0;
2303}
2304
2305
2306
2307
2308
2309
2310
2311
2312
2313
2314
2315
2316
2317
2318
2319
2320
2321
2322static int configure_new_function(struct controller *ctrl, struct pci_func *func,
2323 u8 behind_bridge,
2324 struct resource_lists *resources)
2325{
2326 int cloop;
2327 u8 IRQ = 0;
2328 u8 temp_byte;
2329 u8 device;
2330 u8 class_code;
2331 u16 command;
2332 u16 temp_word;
2333 u32 temp_dword;
2334 u32 rc;
2335 u32 temp_register;
2336 u32 base;
2337 u32 ID;
2338 unsigned int devfn;
2339 struct pci_resource *mem_node;
2340 struct pci_resource *p_mem_node;
2341 struct pci_resource *io_node;
2342 struct pci_resource *bus_node;
2343 struct pci_resource *hold_mem_node;
2344 struct pci_resource *hold_p_mem_node;
2345 struct pci_resource *hold_IO_node;
2346 struct pci_resource *hold_bus_node;
2347 struct irq_mapping irqs;
2348 struct pci_func *new_slot;
2349 struct pci_bus *pci_bus;
2350 struct resource_lists temp_resources;
2351
2352 pci_bus = ctrl->pci_bus;
2353 pci_bus->number = func->bus;
2354 devfn = PCI_DEVFN(func->device, func->function);
2355
2356
2357 rc = pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &temp_byte);
2358 if (rc)
2359 return rc;
2360
2361 if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
2362
2363 dbg("set Primary bus = %d\n", func->bus);
2364 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_PRIMARY_BUS, func->bus);
2365 if (rc)
2366 return rc;
2367
2368
2369 dbg("find ranges of buses to use\n");
2370 bus_node = get_max_resource(&(resources->bus_head), 1);
2371
2372
2373 if (!bus_node)
2374 return -ENOMEM;
2375
2376
2377 temp_byte = bus_node->base;
2378 dbg("set Secondary bus = %d\n", bus_node->base);
2379 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, temp_byte);
2380 if (rc)
2381 return rc;
2382
2383
2384 temp_byte = bus_node->base + bus_node->length - 1;
2385 dbg("set subordinate bus = %d\n", bus_node->base + bus_node->length - 1);
2386 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte);
2387 if (rc)
2388 return rc;
2389
2390
2391 temp_byte = 0x40;
2392 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SEC_LATENCY_TIMER, temp_byte);
2393 if (rc)
2394 return rc;
2395 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_LATENCY_TIMER, temp_byte);
2396 if (rc)
2397 return rc;
2398
2399
2400 temp_byte = 0x08;
2401 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_CACHE_LINE_SIZE, temp_byte);
2402 if (rc)
2403 return rc;
2404
2405
2406 io_node = get_max_resource(&(resources->io_head), 0x1000);
2407 if (!io_node)
2408 return -ENOMEM;
2409 mem_node = get_max_resource(&(resources->mem_head), 0x100000);
2410 if (!mem_node)
2411 return -ENOMEM;
2412 p_mem_node = get_max_resource(&(resources->p_mem_head), 0x100000);
2413 if (!p_mem_node)
2414 return -ENOMEM;
2415 dbg("Setup the IO, memory, and prefetchable windows\n");
2416 dbg("io_node\n");
2417 dbg("(base, len, next) (%x, %x, %p)\n", io_node->base,
2418 io_node->length, io_node->next);
2419 dbg("mem_node\n");
2420 dbg("(base, len, next) (%x, %x, %p)\n", mem_node->base,
2421 mem_node->length, mem_node->next);
2422 dbg("p_mem_node\n");
2423 dbg("(base, len, next) (%x, %x, %p)\n", p_mem_node->base,
2424 p_mem_node->length, p_mem_node->next);
2425
2426
2427 if (!resources->irqs) {
2428 irqs.barber_pole = 0;
2429 irqs.interrupt[0] = 0;
2430 irqs.interrupt[1] = 0;
2431 irqs.interrupt[2] = 0;
2432 irqs.interrupt[3] = 0;
2433 irqs.valid_INT = 0;
2434 } else {
2435 irqs.barber_pole = resources->irqs->barber_pole;
2436 irqs.interrupt[0] = resources->irqs->interrupt[0];
2437 irqs.interrupt[1] = resources->irqs->interrupt[1];
2438 irqs.interrupt[2] = resources->irqs->interrupt[2];
2439 irqs.interrupt[3] = resources->irqs->interrupt[3];
2440 irqs.valid_INT = resources->irqs->valid_INT;
2441 }
2442
2443
2444
2445 temp_resources.bus_head = bus_node;
2446 temp_resources.io_head = io_node;
2447 temp_resources.mem_head = mem_node;
2448 temp_resources.p_mem_head = p_mem_node;
2449 temp_resources.irqs = &irqs;
2450
2451
2452
2453
2454 hold_bus_node = kmalloc(sizeof(*hold_bus_node), GFP_KERNEL);
2455 hold_IO_node = kmalloc(sizeof(*hold_IO_node), GFP_KERNEL);
2456 hold_mem_node = kmalloc(sizeof(*hold_mem_node), GFP_KERNEL);
2457 hold_p_mem_node = kmalloc(sizeof(*hold_p_mem_node), GFP_KERNEL);
2458
2459 if (!hold_bus_node || !hold_IO_node || !hold_mem_node || !hold_p_mem_node) {
2460 kfree(hold_bus_node);
2461 kfree(hold_IO_node);
2462 kfree(hold_mem_node);
2463 kfree(hold_p_mem_node);
2464
2465 return 1;
2466 }
2467
2468 memcpy(hold_bus_node, bus_node, sizeof(struct pci_resource));
2469
2470 bus_node->base += 1;
2471 bus_node->length -= 1;
2472 bus_node->next = NULL;
2473
2474
2475
2476 memcpy(hold_IO_node, io_node, sizeof(struct pci_resource));
2477 io_node->next = NULL;
2478
2479
2480 temp_byte = io_node->base >> 8;
2481 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_BASE, temp_byte);
2482
2483 temp_byte = (io_node->base + io_node->length - 1) >> 8;
2484 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
2485
2486
2487
2488
2489 memcpy(hold_mem_node, mem_node, sizeof(struct pci_resource));
2490 mem_node->next = NULL;
2491
2492
2493 temp_word = mem_node->base >> 16;
2494 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_BASE, temp_word);
2495
2496 temp_word = (mem_node->base + mem_node->length - 1) >> 16;
2497 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2498
2499 memcpy(hold_p_mem_node, p_mem_node, sizeof(struct pci_resource));
2500 p_mem_node->next = NULL;
2501
2502
2503 temp_word = p_mem_node->base >> 16;
2504 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word);
2505
2506 temp_word = (p_mem_node->base + p_mem_node->length - 1) >> 16;
2507 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2508
2509
2510
2511 irqs.barber_pole--;
2512
2513 rc = 0;
2514
2515
2516 for (device = 0; (device <= 0x1F) && !rc; device++) {
2517 irqs.barber_pole = (irqs.barber_pole + 1) & 0x03;
2518
2519 ID = 0xFFFFFFFF;
2520 pci_bus->number = hold_bus_node->base;
2521 pci_bus_read_config_dword(pci_bus, PCI_DEVFN(device, 0), 0x00, &ID);
2522 pci_bus->number = func->bus;
2523
2524 if (ID != 0xFFFFFFFF) {
2525
2526 new_slot = cpqhp_slot_create(hold_bus_node->base);
2527
2528 if (new_slot == NULL) {
2529 rc = -ENOMEM;
2530 continue;
2531 }
2532
2533 new_slot->bus = hold_bus_node->base;
2534 new_slot->device = device;
2535 new_slot->function = 0;
2536 new_slot->is_a_board = 1;
2537 new_slot->status = 0;
2538
2539 rc = configure_new_device(ctrl, new_slot, 1, &temp_resources);
2540 dbg("configure_new_device rc=0x%x\n", rc);
2541 }
2542 }
2543
2544 if (rc)
2545 goto free_and_out;
2546
2547 if (resources->irqs) {
2548 resources->irqs->interrupt[0] = irqs.interrupt[0];
2549 resources->irqs->interrupt[1] = irqs.interrupt[1];
2550 resources->irqs->interrupt[2] = irqs.interrupt[2];
2551 resources->irqs->interrupt[3] = irqs.interrupt[3];
2552 resources->irqs->valid_INT = irqs.valid_INT;
2553 } else if (!behind_bridge) {
2554
2555 for (cloop = 0; cloop < 4; cloop++) {
2556 if (irqs.valid_INT & (0x01 << cloop)) {
2557 rc = cpqhp_set_irq(func->bus, func->device,
2558 cloop + 1, irqs.interrupt[cloop]);
2559 if (rc)
2560 goto free_and_out;
2561 }
2562 }
2563 }
2564
2565
2566
2567 if (bus_node && temp_resources.bus_head) {
2568 hold_bus_node->length = bus_node->base - hold_bus_node->base;
2569
2570 hold_bus_node->next = func->bus_head;
2571 func->bus_head = hold_bus_node;
2572
2573 temp_byte = temp_resources.bus_head->base - 1;
2574
2575
2576 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte);
2577
2578 if (temp_resources.bus_head->length == 0) {
2579 kfree(temp_resources.bus_head);
2580 temp_resources.bus_head = NULL;
2581 } else {
2582 return_resource(&(resources->bus_head), temp_resources.bus_head);
2583 }
2584 }
2585
2586
2587
2588 if (hold_IO_node && temp_resources.io_head) {
2589 io_node = do_pre_bridge_resource_split(&(temp_resources.io_head),
2590 &hold_IO_node, 0x1000);
2591
2592
2593 if (io_node) {
2594 hold_IO_node->base = io_node->base + io_node->length;
2595
2596 temp_byte = (hold_IO_node->base) >> 8;
2597 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_IO_BASE, temp_byte);
2598
2599 return_resource(&(resources->io_head), io_node);
2600 }
2601
2602 io_node = do_bridge_resource_split(&(temp_resources.io_head), 0x1000);
2603
2604
2605 if (io_node) {
2606
2607
2608 hold_IO_node->length = io_node->base - hold_IO_node->base;
2609
2610
2611 if (hold_IO_node->length) {
2612 hold_IO_node->next = func->io_head;
2613 func->io_head = hold_IO_node;
2614
2615 temp_byte = (io_node->base - 1) >> 8;
2616 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
2617
2618 return_resource(&(resources->io_head), io_node);
2619 } else {
2620
2621 temp_word = 0x0000;
2622 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_IO_LIMIT, temp_word);
2623
2624 return_resource(&(resources->io_head), io_node);
2625 kfree(hold_IO_node);
2626 }
2627 } else {
2628
2629 hold_IO_node->next = func->io_head;
2630 func->io_head = hold_IO_node;
2631 }
2632 } else if (hold_IO_node) {
2633
2634 hold_IO_node->next = func->io_head;
2635 func->io_head = hold_IO_node;
2636 }
2637
2638
2639 if (hold_mem_node && temp_resources.mem_head) {
2640 mem_node = do_pre_bridge_resource_split(&(temp_resources. mem_head),
2641 &hold_mem_node, 0x100000);
2642
2643
2644 if (mem_node) {
2645 hold_mem_node->base = mem_node->base + mem_node->length;
2646
2647 temp_word = (hold_mem_node->base) >> 16;
2648 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_BASE, temp_word);
2649
2650 return_resource(&(resources->mem_head), mem_node);
2651 }
2652
2653 mem_node = do_bridge_resource_split(&(temp_resources.mem_head), 0x100000);
2654
2655
2656 if (mem_node) {
2657
2658
2659 hold_mem_node->length = mem_node->base - hold_mem_node->base;
2660
2661 if (hold_mem_node->length) {
2662 hold_mem_node->next = func->mem_head;
2663 func->mem_head = hold_mem_node;
2664
2665
2666 temp_word = (mem_node->base - 1) >> 16;
2667 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2668
2669
2670 return_resource(&(resources->mem_head), mem_node);
2671 } else {
2672
2673 temp_word = 0x0000;
2674 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2675
2676 return_resource(&(resources->mem_head), mem_node);
2677 kfree(hold_mem_node);
2678 }
2679 } else {
2680
2681 hold_mem_node->next = func->mem_head;
2682 func->mem_head = hold_mem_node;
2683 }
2684 } else if (hold_mem_node) {
2685
2686 hold_mem_node->next = func->mem_head;
2687 func->mem_head = hold_mem_node;
2688 }
2689
2690
2691 if (temp_resources.p_mem_head) {
2692 p_mem_node = do_pre_bridge_resource_split(&(temp_resources.p_mem_head),
2693 &hold_p_mem_node, 0x100000);
2694
2695
2696 if (p_mem_node) {
2697 hold_p_mem_node->base = p_mem_node->base + p_mem_node->length;
2698
2699 temp_word = (hold_p_mem_node->base) >> 16;
2700 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word);
2701
2702 return_resource(&(resources->p_mem_head), p_mem_node);
2703 }
2704
2705 p_mem_node = do_bridge_resource_split(&(temp_resources.p_mem_head), 0x100000);
2706
2707
2708 if (p_mem_node) {
2709
2710
2711 hold_p_mem_node->length = p_mem_node->base - hold_p_mem_node->base;
2712
2713
2714 if (hold_p_mem_node->length) {
2715 hold_p_mem_node->next = func->p_mem_head;
2716 func->p_mem_head = hold_p_mem_node;
2717
2718 temp_word = (p_mem_node->base - 1) >> 16;
2719 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2720
2721 return_resource(&(resources->p_mem_head), p_mem_node);
2722 } else {
2723
2724 temp_word = 0x0000;
2725 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2726
2727 return_resource(&(resources->p_mem_head), p_mem_node);
2728 kfree(hold_p_mem_node);
2729 }
2730 } else {
2731
2732 hold_p_mem_node->next = func->p_mem_head;
2733 func->p_mem_head = hold_p_mem_node;
2734 }
2735 } else if (hold_p_mem_node) {
2736
2737 hold_p_mem_node->next = func->p_mem_head;
2738 func->p_mem_head = hold_p_mem_node;
2739 }
2740
2741
2742
2743
2744
2745 command = 0x0157;
2746
2747
2748
2749
2750
2751 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
2752
2753
2754 command = 0x07;
2755
2756
2757 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, command);
2758 } else if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
2759
2760 rc = pci_bus_read_config_byte(pci_bus, devfn, 0x0B, &class_code);
2761
2762 if (class_code == PCI_BASE_CLASS_DISPLAY) {
2763
2764 return DEVICE_TYPE_NOT_SUPPORTED;
2765 }
2766
2767 for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
2768 temp_register = 0xFFFFFFFF;
2769
2770 dbg("CND: bus=%d, devfn=%d, offset=%d\n", pci_bus->number, devfn, cloop);
2771 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register);
2772
2773 rc = pci_bus_read_config_dword(pci_bus, devfn, cloop, &temp_register);
2774 dbg("CND: base = 0x%x\n", temp_register);
2775
2776 if (temp_register) {
2777 if ((temp_register & 0x03L) == 0x01) {
2778
2779
2780
2781 base = temp_register & 0xFFFFFFFC;
2782 base = ~base + 1;
2783
2784 dbg("CND: length = 0x%x\n", base);
2785 io_node = get_io_resource(&(resources->io_head), base);
2786 if (!io_node)
2787 return -ENOMEM;
2788 dbg("Got io_node start = %8.8x, length = %8.8x next (%p)\n",
2789 io_node->base, io_node->length, io_node->next);
2790 dbg("func (%p) io_head (%p)\n", func, func->io_head);
2791
2792
2793 base = io_node->base;
2794 io_node->next = func->io_head;
2795 func->io_head = io_node;
2796 } else if ((temp_register & 0x0BL) == 0x08) {
2797
2798 base = temp_register & 0xFFFFFFF0;
2799 base = ~base + 1;
2800
2801 dbg("CND: length = 0x%x\n", base);
2802 p_mem_node = get_resource(&(resources->p_mem_head), base);
2803
2804
2805 if (p_mem_node) {
2806 base = p_mem_node->base;
2807
2808 p_mem_node->next = func->p_mem_head;
2809 func->p_mem_head = p_mem_node;
2810 } else
2811 return -ENOMEM;
2812 } else if ((temp_register & 0x0BL) == 0x00) {
2813
2814 base = temp_register & 0xFFFFFFF0;
2815 base = ~base + 1;
2816
2817 dbg("CND: length = 0x%x\n", base);
2818 mem_node = get_resource(&(resources->mem_head), base);
2819
2820
2821 if (mem_node) {
2822 base = mem_node->base;
2823
2824 mem_node->next = func->mem_head;
2825 func->mem_head = mem_node;
2826 } else
2827 return -ENOMEM;
2828 } else {
2829
2830 return NOT_ENOUGH_RESOURCES;
2831 }
2832
2833 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, base);
2834
2835
2836 if ((temp_register & 0x07L) == 0x04) {
2837 cloop += 4;
2838
2839
2840
2841
2842
2843 base = 0;
2844 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, base);
2845 }
2846 }
2847 }
2848 if (cpqhp_legacy_mode) {
2849
2850 rc = pci_bus_read_config_byte(pci_bus, devfn,
2851 PCI_INTERRUPT_PIN, &temp_byte);
2852
2853
2854
2855
2856 if (temp_byte && resources->irqs &&
2857 (resources->irqs->valid_INT &
2858 (0x01 << ((temp_byte + resources->irqs->barber_pole - 1) & 0x03)))) {
2859
2860 IRQ = resources->irqs->interrupt[(temp_byte +
2861 resources->irqs->barber_pole - 1) & 0x03];
2862 } else {
2863
2864 rc = pci_bus_read_config_byte(pci_bus, devfn, 0x0B, &class_code);
2865
2866 if (class_code == PCI_BASE_CLASS_STORAGE)
2867 IRQ = cpqhp_disk_irq;
2868 else
2869 IRQ = cpqhp_nic_irq;
2870 }
2871
2872
2873 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_INTERRUPT_LINE, IRQ);
2874 }
2875
2876 if (!behind_bridge) {
2877 rc = cpqhp_set_irq(func->bus, func->device, temp_byte, IRQ);
2878 if (rc)
2879 return 1;
2880 } else {
2881
2882
2883 resources->irqs->interrupt[(temp_byte + resources->irqs->barber_pole - 1) & 0x03] = IRQ;
2884 resources->irqs->valid_INT |= 0x01 << (temp_byte + resources->irqs->barber_pole - 1) & 0x03;
2885 }
2886
2887
2888 temp_byte = 0x40;
2889 rc = pci_bus_write_config_byte(pci_bus, devfn,
2890 PCI_LATENCY_TIMER, temp_byte);
2891
2892
2893 temp_byte = 0x08;
2894 rc = pci_bus_write_config_byte(pci_bus, devfn,
2895 PCI_CACHE_LINE_SIZE, temp_byte);
2896
2897
2898 temp_dword = 0x00L;
2899 rc = pci_bus_write_config_word(pci_bus, devfn,
2900 PCI_ROM_ADDRESS, temp_dword);
2901
2902
2903 temp_word = 0x0157;
2904
2905
2906
2907
2908
2909 rc = pci_bus_write_config_word(pci_bus, devfn,
2910 PCI_COMMAND, temp_word);
2911 } else {
2912
2913 return DEVICE_TYPE_NOT_SUPPORTED;
2914 }
2915
2916 func->configured = 1;
2917
2918 return 0;
2919free_and_out:
2920 cpqhp_destroy_resource_list(&temp_resources);
2921
2922 return_resource(&(resources->bus_head), hold_bus_node);
2923 return_resource(&(resources->io_head), hold_IO_node);
2924 return_resource(&(resources->mem_head), hold_mem_node);
2925 return_resource(&(resources->p_mem_head), hold_p_mem_node);
2926 return rc;
2927}
2928