linux/drivers/thermal/rockchip_thermal.c
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   1/*
   2 * Copyright (c) 2014-2016, Fuzhou Rockchip Electronics Co., Ltd
   3 * Caesar Wang <wxt@rock-chips.com>
   4 *
   5 * This program is free software; you can redistribute it and/or modify it
   6 * under the terms and conditions of the GNU General Public License,
   7 * version 2, as published by the Free Software Foundation.
   8 *
   9 * This program is distributed in the hope it will be useful, but WITHOUT
  10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12 * more details.
  13 */
  14
  15#include <linux/clk.h>
  16#include <linux/delay.h>
  17#include <linux/interrupt.h>
  18#include <linux/io.h>
  19#include <linux/module.h>
  20#include <linux/of.h>
  21#include <linux/of_address.h>
  22#include <linux/of_irq.h>
  23#include <linux/platform_device.h>
  24#include <linux/regmap.h>
  25#include <linux/reset.h>
  26#include <linux/thermal.h>
  27#include <linux/mfd/syscon.h>
  28#include <linux/pinctrl/consumer.h>
  29
  30/**
  31 * If the temperature over a period of time High,
  32 * the resulting TSHUT gave CRU module,let it reset the entire chip,
  33 * or via GPIO give PMIC.
  34 */
  35enum tshut_mode {
  36        TSHUT_MODE_CRU = 0,
  37        TSHUT_MODE_GPIO,
  38};
  39
  40/**
  41 * The system Temperature Sensors tshut(tshut) polarity
  42 * the bit 8 is tshut polarity.
  43 * 0: low active, 1: high active
  44 */
  45enum tshut_polarity {
  46        TSHUT_LOW_ACTIVE = 0,
  47        TSHUT_HIGH_ACTIVE,
  48};
  49
  50/**
  51 * The system has two Temperature Sensors.
  52 * sensor0 is for CPU, and sensor1 is for GPU.
  53 */
  54enum sensor_id {
  55        SENSOR_CPU = 0,
  56        SENSOR_GPU,
  57};
  58
  59/**
  60 * The conversion table has the adc value and temperature.
  61 * ADC_DECREMENT: the adc value is of diminishing.(e.g. rk3288_code_table)
  62 * ADC_INCREMENT: the adc value is incremental.(e.g. rk3368_code_table)
  63 */
  64enum adc_sort_mode {
  65        ADC_DECREMENT = 0,
  66        ADC_INCREMENT,
  67};
  68
  69/**
  70 * The max sensors is two in rockchip SoCs.
  71 * Two sensors: CPU and GPU sensor.
  72 */
  73#define SOC_MAX_SENSORS 2
  74
  75/**
  76 * struct chip_tsadc_table - hold information about chip-specific differences
  77 * @id: conversion table
  78 * @length: size of conversion table
  79 * @data_mask: mask to apply on data inputs
  80 * @mode: sort mode of this adc variant (incrementing or decrementing)
  81 */
  82struct chip_tsadc_table {
  83        const struct tsadc_table *id;
  84        unsigned int length;
  85        u32 data_mask;
  86        enum adc_sort_mode mode;
  87};
  88
  89/**
  90 * struct rockchip_tsadc_chip - hold the private data of tsadc chip
  91 * @chn_id[SOC_MAX_SENSORS]: the sensor id of chip correspond to the channel
  92 * @chn_num: the channel number of tsadc chip
  93 * @tshut_temp: the hardware-controlled shutdown temperature value
  94 * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO)
  95 * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH)
  96 * @initialize: SoC special initialize tsadc controller method
  97 * @irq_ack: clear the interrupt
  98 * @get_temp: get the temperature
  99 * @set_alarm_temp: set the high temperature interrupt
 100 * @set_tshut_temp: set the hardware-controlled shutdown temperature
 101 * @set_tshut_mode: set the hardware-controlled shutdown mode
 102 * @table: the chip-specific conversion table
 103 */
 104struct rockchip_tsadc_chip {
 105        /* The sensor id of chip correspond to the ADC channel */
 106        int chn_id[SOC_MAX_SENSORS];
 107        int chn_num;
 108
 109        /* The hardware-controlled tshut property */
 110        int tshut_temp;
 111        enum tshut_mode tshut_mode;
 112        enum tshut_polarity tshut_polarity;
 113
 114        /* Chip-wide methods */
 115        void (*initialize)(struct regmap *grf,
 116                           void __iomem *reg, enum tshut_polarity p);
 117        void (*irq_ack)(void __iomem *reg);
 118        void (*control)(void __iomem *reg, bool on);
 119
 120        /* Per-sensor methods */
 121        int (*get_temp)(const struct chip_tsadc_table *table,
 122                        int chn, void __iomem *reg, int *temp);
 123        int (*set_alarm_temp)(const struct chip_tsadc_table *table,
 124                              int chn, void __iomem *reg, int temp);
 125        int (*set_tshut_temp)(const struct chip_tsadc_table *table,
 126                              int chn, void __iomem *reg, int temp);
 127        void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
 128
 129        /* Per-table methods */
 130        struct chip_tsadc_table table;
 131};
 132
 133/**
 134 * struct rockchip_thermal_sensor - hold the information of thermal sensor
 135 * @thermal:  pointer to the platform/configuration data
 136 * @tzd: pointer to a thermal zone
 137 * @id: identifier of the thermal sensor
 138 */
 139struct rockchip_thermal_sensor {
 140        struct rockchip_thermal_data *thermal;
 141        struct thermal_zone_device *tzd;
 142        int id;
 143};
 144
 145/**
 146 * struct rockchip_thermal_data - hold the private data of thermal driver
 147 * @chip: pointer to the platform/configuration data
 148 * @pdev: platform device of thermal
 149 * @reset: the reset controller of tsadc
 150 * @sensors[SOC_MAX_SENSORS]: the thermal sensor
 151 * @clk: the controller clock is divided by the exteral 24MHz
 152 * @pclk: the advanced peripherals bus clock
 153 * @grf: the general register file will be used to do static set by software
 154 * @regs: the base address of tsadc controller
 155 * @tshut_temp: the hardware-controlled shutdown temperature value
 156 * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO)
 157 * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH)
 158 */
 159struct rockchip_thermal_data {
 160        const struct rockchip_tsadc_chip *chip;
 161        struct platform_device *pdev;
 162        struct reset_control *reset;
 163
 164        struct rockchip_thermal_sensor sensors[SOC_MAX_SENSORS];
 165
 166        struct clk *clk;
 167        struct clk *pclk;
 168
 169        struct regmap *grf;
 170        void __iomem *regs;
 171
 172        int tshut_temp;
 173        enum tshut_mode tshut_mode;
 174        enum tshut_polarity tshut_polarity;
 175};
 176
 177/**
 178 * TSADC Sensor Register description:
 179 *
 180 * TSADCV2_* are used for RK3288 SoCs, the other chips can reuse it.
 181 * TSADCV3_* are used for newer SoCs than RK3288. (e.g: RK3228, RK3399)
 182 *
 183 */
 184#define TSADCV2_USER_CON                        0x00
 185#define TSADCV2_AUTO_CON                        0x04
 186#define TSADCV2_INT_EN                          0x08
 187#define TSADCV2_INT_PD                          0x0c
 188#define TSADCV2_DATA(chn)                       (0x20 + (chn) * 0x04)
 189#define TSADCV2_COMP_INT(chn)                   (0x30 + (chn) * 0x04)
 190#define TSADCV2_COMP_SHUT(chn)                  (0x40 + (chn) * 0x04)
 191#define TSADCV2_HIGHT_INT_DEBOUNCE              0x60
 192#define TSADCV2_HIGHT_TSHUT_DEBOUNCE            0x64
 193#define TSADCV2_AUTO_PERIOD                     0x68
 194#define TSADCV2_AUTO_PERIOD_HT                  0x6c
 195
 196#define TSADCV2_AUTO_EN                         BIT(0)
 197#define TSADCV2_AUTO_SRC_EN(chn)                BIT(4 + (chn))
 198#define TSADCV2_AUTO_TSHUT_POLARITY_HIGH        BIT(8)
 199
 200#define TSADCV3_AUTO_Q_SEL_EN                   BIT(1)
 201
 202#define TSADCV2_INT_SRC_EN(chn)                 BIT(chn)
 203#define TSADCV2_SHUT_2GPIO_SRC_EN(chn)          BIT(4 + (chn))
 204#define TSADCV2_SHUT_2CRU_SRC_EN(chn)           BIT(8 + (chn))
 205
 206#define TSADCV2_INT_PD_CLEAR_MASK               ~BIT(8)
 207#define TSADCV3_INT_PD_CLEAR_MASK               ~BIT(16)
 208
 209#define TSADCV2_DATA_MASK                       0xfff
 210#define TSADCV3_DATA_MASK                       0x3ff
 211
 212#define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT        4
 213#define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT      4
 214#define TSADCV2_AUTO_PERIOD_TIME                250 /* 250ms */
 215#define TSADCV2_AUTO_PERIOD_HT_TIME             50  /* 50ms */
 216#define TSADCV3_AUTO_PERIOD_TIME                1875 /* 2.5ms */
 217#define TSADCV3_AUTO_PERIOD_HT_TIME             1875 /* 2.5ms */
 218
 219#define TSADCV2_USER_INTER_PD_SOC               0x340 /* 13 clocks */
 220
 221#define GRF_SARADC_TESTBIT                      0x0e644
 222#define GRF_TSADC_TESTBIT_L                     0x0e648
 223#define GRF_TSADC_TESTBIT_H                     0x0e64c
 224
 225#define GRF_SARADC_TESTBIT_ON                   (0x10001 << 2)
 226#define GRF_TSADC_TESTBIT_H_ON                  (0x10001 << 2)
 227#define GRF_TSADC_VCM_EN_L                      (0x10001 << 7)
 228#define GRF_TSADC_VCM_EN_H                      (0x10001 << 7)
 229
 230/**
 231 * struct tsadc_table - code to temperature conversion table
 232 * @code: the value of adc channel
 233 * @temp: the temperature
 234 * Note:
 235 * code to temperature mapping of the temperature sensor is a piece wise linear
 236 * curve.Any temperature, code faling between to 2 give temperatures can be
 237 * linearly interpolated.
 238 * Code to Temperature mapping should be updated based on manufacturer results.
 239 */
 240struct tsadc_table {
 241        u32 code;
 242        int temp;
 243};
 244
 245static const struct tsadc_table rv1108_table[] = {
 246        {0, -40000},
 247        {374, -40000},
 248        {382, -35000},
 249        {389, -30000},
 250        {397, -25000},
 251        {405, -20000},
 252        {413, -15000},
 253        {421, -10000},
 254        {429, -5000},
 255        {436, 0},
 256        {444, 5000},
 257        {452, 10000},
 258        {460, 15000},
 259        {468, 20000},
 260        {476, 25000},
 261        {483, 30000},
 262        {491, 35000},
 263        {499, 40000},
 264        {507, 45000},
 265        {515, 50000},
 266        {523, 55000},
 267        {531, 60000},
 268        {539, 65000},
 269        {547, 70000},
 270        {555, 75000},
 271        {562, 80000},
 272        {570, 85000},
 273        {578, 90000},
 274        {586, 95000},
 275        {594, 100000},
 276        {602, 105000},
 277        {610, 110000},
 278        {618, 115000},
 279        {626, 120000},
 280        {634, 125000},
 281        {TSADCV2_DATA_MASK, 125000},
 282};
 283
 284static const struct tsadc_table rk3228_code_table[] = {
 285        {0, -40000},
 286        {588, -40000},
 287        {593, -35000},
 288        {598, -30000},
 289        {603, -25000},
 290        {608, -20000},
 291        {613, -15000},
 292        {618, -10000},
 293        {623, -5000},
 294        {629, 0},
 295        {634, 5000},
 296        {639, 10000},
 297        {644, 15000},
 298        {649, 20000},
 299        {654, 25000},
 300        {660, 30000},
 301        {665, 35000},
 302        {670, 40000},
 303        {675, 45000},
 304        {681, 50000},
 305        {686, 55000},
 306        {691, 60000},
 307        {696, 65000},
 308        {702, 70000},
 309        {707, 75000},
 310        {712, 80000},
 311        {717, 85000},
 312        {723, 90000},
 313        {728, 95000},
 314        {733, 100000},
 315        {738, 105000},
 316        {744, 110000},
 317        {749, 115000},
 318        {754, 120000},
 319        {760, 125000},
 320        {TSADCV2_DATA_MASK, 125000},
 321};
 322
 323static const struct tsadc_table rk3288_code_table[] = {
 324        {TSADCV2_DATA_MASK, -40000},
 325        {3800, -40000},
 326        {3792, -35000},
 327        {3783, -30000},
 328        {3774, -25000},
 329        {3765, -20000},
 330        {3756, -15000},
 331        {3747, -10000},
 332        {3737, -5000},
 333        {3728, 0},
 334        {3718, 5000},
 335        {3708, 10000},
 336        {3698, 15000},
 337        {3688, 20000},
 338        {3678, 25000},
 339        {3667, 30000},
 340        {3656, 35000},
 341        {3645, 40000},
 342        {3634, 45000},
 343        {3623, 50000},
 344        {3611, 55000},
 345        {3600, 60000},
 346        {3588, 65000},
 347        {3575, 70000},
 348        {3563, 75000},
 349        {3550, 80000},
 350        {3537, 85000},
 351        {3524, 90000},
 352        {3510, 95000},
 353        {3496, 100000},
 354        {3482, 105000},
 355        {3467, 110000},
 356        {3452, 115000},
 357        {3437, 120000},
 358        {3421, 125000},
 359        {0, 125000},
 360};
 361
 362static const struct tsadc_table rk3328_code_table[] = {
 363        {0, -40000},
 364        {296, -40000},
 365        {304, -35000},
 366        {313, -30000},
 367        {331, -20000},
 368        {340, -15000},
 369        {349, -10000},
 370        {359, -5000},
 371        {368, 0},
 372        {378, 5000},
 373        {388, 10000},
 374        {398, 15000},
 375        {408, 20000},
 376        {418, 25000},
 377        {429, 30000},
 378        {440, 35000},
 379        {451, 40000},
 380        {462, 45000},
 381        {473, 50000},
 382        {485, 55000},
 383        {496, 60000},
 384        {508, 65000},
 385        {521, 70000},
 386        {533, 75000},
 387        {546, 80000},
 388        {559, 85000},
 389        {572, 90000},
 390        {586, 95000},
 391        {600, 100000},
 392        {614, 105000},
 393        {629, 110000},
 394        {644, 115000},
 395        {659, 120000},
 396        {675, 125000},
 397        {TSADCV2_DATA_MASK, 125000},
 398};
 399
 400static const struct tsadc_table rk3368_code_table[] = {
 401        {0, -40000},
 402        {106, -40000},
 403        {108, -35000},
 404        {110, -30000},
 405        {112, -25000},
 406        {114, -20000},
 407        {116, -15000},
 408        {118, -10000},
 409        {120, -5000},
 410        {122, 0},
 411        {124, 5000},
 412        {126, 10000},
 413        {128, 15000},
 414        {130, 20000},
 415        {132, 25000},
 416        {134, 30000},
 417        {136, 35000},
 418        {138, 40000},
 419        {140, 45000},
 420        {142, 50000},
 421        {144, 55000},
 422        {146, 60000},
 423        {148, 65000},
 424        {150, 70000},
 425        {152, 75000},
 426        {154, 80000},
 427        {156, 85000},
 428        {158, 90000},
 429        {160, 95000},
 430        {162, 100000},
 431        {163, 105000},
 432        {165, 110000},
 433        {167, 115000},
 434        {169, 120000},
 435        {171, 125000},
 436        {TSADCV3_DATA_MASK, 125000},
 437};
 438
 439static const struct tsadc_table rk3399_code_table[] = {
 440        {0, -40000},
 441        {402, -40000},
 442        {410, -35000},
 443        {419, -30000},
 444        {427, -25000},
 445        {436, -20000},
 446        {444, -15000},
 447        {453, -10000},
 448        {461, -5000},
 449        {470, 0},
 450        {478, 5000},
 451        {487, 10000},
 452        {496, 15000},
 453        {504, 20000},
 454        {513, 25000},
 455        {521, 30000},
 456        {530, 35000},
 457        {538, 40000},
 458        {547, 45000},
 459        {555, 50000},
 460        {564, 55000},
 461        {573, 60000},
 462        {581, 65000},
 463        {590, 70000},
 464        {599, 75000},
 465        {607, 80000},
 466        {616, 85000},
 467        {624, 90000},
 468        {633, 95000},
 469        {642, 100000},
 470        {650, 105000},
 471        {659, 110000},
 472        {668, 115000},
 473        {677, 120000},
 474        {685, 125000},
 475        {TSADCV3_DATA_MASK, 125000},
 476};
 477
 478static u32 rk_tsadcv2_temp_to_code(const struct chip_tsadc_table *table,
 479                                   int temp)
 480{
 481        int high, low, mid;
 482        unsigned long num;
 483        unsigned int denom;
 484        u32 error = table->data_mask;
 485
 486        low = 0;
 487        high = (table->length - 1) - 1; /* ignore the last check for table */
 488        mid = (high + low) / 2;
 489
 490        /* Return mask code data when the temp is over table range */
 491        if (temp < table->id[low].temp || temp > table->id[high].temp)
 492                goto exit;
 493
 494        while (low <= high) {
 495                if (temp == table->id[mid].temp)
 496                        return table->id[mid].code;
 497                else if (temp < table->id[mid].temp)
 498                        high = mid - 1;
 499                else
 500                        low = mid + 1;
 501                mid = (low + high) / 2;
 502        }
 503
 504        /*
 505         * The conversion code granularity provided by the table. Let's
 506         * assume that the relationship between temperature and
 507         * analog value between 2 table entries is linear and interpolate
 508         * to produce less granular result.
 509         */
 510        num = abs(table->id[mid + 1].code - table->id[mid].code);
 511        num *= temp - table->id[mid].temp;
 512        denom = table->id[mid + 1].temp - table->id[mid].temp;
 513
 514        switch (table->mode) {
 515        case ADC_DECREMENT:
 516                return table->id[mid].code - (num / denom);
 517        case ADC_INCREMENT:
 518                return table->id[mid].code + (num / denom);
 519        default:
 520                pr_err("%s: unknown table mode: %d\n", __func__, table->mode);
 521                return error;
 522        }
 523
 524exit:
 525        pr_err("%s: invalid temperature, temp=%d error=%d\n",
 526               __func__, temp, error);
 527        return error;
 528}
 529
 530static int rk_tsadcv2_code_to_temp(const struct chip_tsadc_table *table,
 531                                   u32 code, int *temp)
 532{
 533        unsigned int low = 1;
 534        unsigned int high = table->length - 1;
 535        unsigned int mid = (low + high) / 2;
 536        unsigned int num;
 537        unsigned long denom;
 538
 539        WARN_ON(table->length < 2);
 540
 541        switch (table->mode) {
 542        case ADC_DECREMENT:
 543                code &= table->data_mask;
 544                if (code <= table->id[high].code)
 545                        return -EAGAIN;         /* Incorrect reading */
 546
 547                while (low <= high) {
 548                        if (code >= table->id[mid].code &&
 549                            code < table->id[mid - 1].code)
 550                                break;
 551                        else if (code < table->id[mid].code)
 552                                low = mid + 1;
 553                        else
 554                                high = mid - 1;
 555
 556                        mid = (low + high) / 2;
 557                }
 558                break;
 559        case ADC_INCREMENT:
 560                code &= table->data_mask;
 561                if (code < table->id[low].code)
 562                        return -EAGAIN;         /* Incorrect reading */
 563
 564                while (low <= high) {
 565                        if (code <= table->id[mid].code &&
 566                            code > table->id[mid - 1].code)
 567                                break;
 568                        else if (code > table->id[mid].code)
 569                                low = mid + 1;
 570                        else
 571                                high = mid - 1;
 572
 573                        mid = (low + high) / 2;
 574                }
 575                break;
 576        default:
 577                pr_err("%s: unknown table mode: %d\n", __func__, table->mode);
 578                return -EINVAL;
 579        }
 580
 581        /*
 582         * The 5C granularity provided by the table is too much. Let's
 583         * assume that the relationship between sensor readings and
 584         * temperature between 2 table entries is linear and interpolate
 585         * to produce less granular result.
 586         */
 587        num = table->id[mid].temp - table->id[mid - 1].temp;
 588        num *= abs(table->id[mid - 1].code - code);
 589        denom = abs(table->id[mid - 1].code - table->id[mid].code);
 590        *temp = table->id[mid - 1].temp + (num / denom);
 591
 592        return 0;
 593}
 594
 595/**
 596 * rk_tsadcv2_initialize - initialize TASDC Controller.
 597 *
 598 * (1) Set TSADC_V2_AUTO_PERIOD:
 599 *     Configure the interleave between every two accessing of
 600 *     TSADC in normal operation.
 601 *
 602 * (2) Set TSADCV2_AUTO_PERIOD_HT:
 603 *     Configure the interleave between every two accessing of
 604 *     TSADC after the temperature is higher than COM_SHUT or COM_INT.
 605 *
 606 * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
 607 *     If the temperature is higher than COMP_INT or COMP_SHUT for
 608 *     "debounce" times, TSADC controller will generate interrupt or TSHUT.
 609 */
 610static void rk_tsadcv2_initialize(struct regmap *grf, void __iomem *regs,
 611                                  enum tshut_polarity tshut_polarity)
 612{
 613        if (tshut_polarity == TSHUT_HIGH_ACTIVE)
 614                writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
 615                               regs + TSADCV2_AUTO_CON);
 616        else
 617                writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
 618                               regs + TSADCV2_AUTO_CON);
 619
 620        writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
 621        writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
 622                       regs + TSADCV2_HIGHT_INT_DEBOUNCE);
 623        writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
 624                       regs + TSADCV2_AUTO_PERIOD_HT);
 625        writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
 626                       regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
 627}
 628
 629/**
 630 * rk_tsadcv3_initialize - initialize TASDC Controller.
 631 *
 632 * (1) The tsadc control power sequence.
 633 *
 634 * (2) Set TSADC_V2_AUTO_PERIOD:
 635 *     Configure the interleave between every two accessing of
 636 *     TSADC in normal operation.
 637 *
 638 * (2) Set TSADCV2_AUTO_PERIOD_HT:
 639 *     Configure the interleave between every two accessing of
 640 *     TSADC after the temperature is higher than COM_SHUT or COM_INT.
 641 *
 642 * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
 643 *     If the temperature is higher than COMP_INT or COMP_SHUT for
 644 *     "debounce" times, TSADC controller will generate interrupt or TSHUT.
 645 */
 646static void rk_tsadcv3_initialize(struct regmap *grf, void __iomem *regs,
 647                                  enum tshut_polarity tshut_polarity)
 648{
 649        /* The tsadc control power sequence */
 650        if (IS_ERR(grf)) {
 651                /* Set interleave value to workround ic time sync issue */
 652                writel_relaxed(TSADCV2_USER_INTER_PD_SOC, regs +
 653                               TSADCV2_USER_CON);
 654
 655                writel_relaxed(TSADCV2_AUTO_PERIOD_TIME,
 656                               regs + TSADCV2_AUTO_PERIOD);
 657                writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
 658                               regs + TSADCV2_HIGHT_INT_DEBOUNCE);
 659                writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
 660                               regs + TSADCV2_AUTO_PERIOD_HT);
 661                writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
 662                               regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
 663
 664        } else {
 665                /* Enable the voltage common mode feature */
 666                regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_VCM_EN_L);
 667                regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_VCM_EN_H);
 668
 669                usleep_range(15, 100); /* The spec note says at least 15 us */
 670                regmap_write(grf, GRF_SARADC_TESTBIT, GRF_SARADC_TESTBIT_ON);
 671                regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_TESTBIT_H_ON);
 672                usleep_range(90, 200); /* The spec note says at least 90 us */
 673
 674                writel_relaxed(TSADCV3_AUTO_PERIOD_TIME,
 675                               regs + TSADCV2_AUTO_PERIOD);
 676                writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
 677                               regs + TSADCV2_HIGHT_INT_DEBOUNCE);
 678                writel_relaxed(TSADCV3_AUTO_PERIOD_HT_TIME,
 679                               regs + TSADCV2_AUTO_PERIOD_HT);
 680                writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
 681                               regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
 682        }
 683
 684        if (tshut_polarity == TSHUT_HIGH_ACTIVE)
 685                writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
 686                               regs + TSADCV2_AUTO_CON);
 687        else
 688                writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
 689                               regs + TSADCV2_AUTO_CON);
 690}
 691
 692static void rk_tsadcv2_irq_ack(void __iomem *regs)
 693{
 694        u32 val;
 695
 696        val = readl_relaxed(regs + TSADCV2_INT_PD);
 697        writel_relaxed(val & TSADCV2_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
 698}
 699
 700static void rk_tsadcv3_irq_ack(void __iomem *regs)
 701{
 702        u32 val;
 703
 704        val = readl_relaxed(regs + TSADCV2_INT_PD);
 705        writel_relaxed(val & TSADCV3_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
 706}
 707
 708static void rk_tsadcv2_control(void __iomem *regs, bool enable)
 709{
 710        u32 val;
 711
 712        val = readl_relaxed(regs + TSADCV2_AUTO_CON);
 713        if (enable)
 714                val |= TSADCV2_AUTO_EN;
 715        else
 716                val &= ~TSADCV2_AUTO_EN;
 717
 718        writel_relaxed(val, regs + TSADCV2_AUTO_CON);
 719}
 720
 721/**
 722 * rk_tsadcv3_control - the tsadc controller is enabled or disabled.
 723 *
 724 * NOTE: TSADC controller works at auto mode, and some SoCs need set the
 725 * tsadc_q_sel bit on TSADCV2_AUTO_CON[1]. The (1024 - tsadc_q) as output
 726 * adc value if setting this bit to enable.
 727 */
 728static void rk_tsadcv3_control(void __iomem *regs, bool enable)
 729{
 730        u32 val;
 731
 732        val = readl_relaxed(regs + TSADCV2_AUTO_CON);
 733        if (enable)
 734                val |= TSADCV2_AUTO_EN | TSADCV3_AUTO_Q_SEL_EN;
 735        else
 736                val &= ~TSADCV2_AUTO_EN;
 737
 738        writel_relaxed(val, regs + TSADCV2_AUTO_CON);
 739}
 740
 741static int rk_tsadcv2_get_temp(const struct chip_tsadc_table *table,
 742                               int chn, void __iomem *regs, int *temp)
 743{
 744        u32 val;
 745
 746        val = readl_relaxed(regs + TSADCV2_DATA(chn));
 747
 748        return rk_tsadcv2_code_to_temp(table, val, temp);
 749}
 750
 751static int rk_tsadcv2_alarm_temp(const struct chip_tsadc_table *table,
 752                                 int chn, void __iomem *regs, int temp)
 753{
 754        u32 alarm_value;
 755        u32 int_en, int_clr;
 756
 757        /*
 758         * In some cases, some sensors didn't need the trip points, the
 759         * set_trips will pass {-INT_MAX, INT_MAX} to trigger tsadc alarm
 760         * in the end, ignore this case and disable the high temperature
 761         * interrupt.
 762         */
 763        if (temp == INT_MAX) {
 764                int_clr = readl_relaxed(regs + TSADCV2_INT_EN);
 765                int_clr &= ~TSADCV2_INT_SRC_EN(chn);
 766                writel_relaxed(int_clr, regs + TSADCV2_INT_EN);
 767                return 0;
 768        }
 769
 770        /* Make sure the value is valid */
 771        alarm_value = rk_tsadcv2_temp_to_code(table, temp);
 772        if (alarm_value == table->data_mask)
 773                return -ERANGE;
 774
 775        writel_relaxed(alarm_value & table->data_mask,
 776                       regs + TSADCV2_COMP_INT(chn));
 777
 778        int_en = readl_relaxed(regs + TSADCV2_INT_EN);
 779        int_en |= TSADCV2_INT_SRC_EN(chn);
 780        writel_relaxed(int_en, regs + TSADCV2_INT_EN);
 781
 782        return 0;
 783}
 784
 785static int rk_tsadcv2_tshut_temp(const struct chip_tsadc_table *table,
 786                                 int chn, void __iomem *regs, int temp)
 787{
 788        u32 tshut_value, val;
 789
 790        /* Make sure the value is valid */
 791        tshut_value = rk_tsadcv2_temp_to_code(table, temp);
 792        if (tshut_value == table->data_mask)
 793                return -ERANGE;
 794
 795        writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
 796
 797        /* TSHUT will be valid */
 798        val = readl_relaxed(regs + TSADCV2_AUTO_CON);
 799        writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
 800
 801        return 0;
 802}
 803
 804static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
 805                                  enum tshut_mode mode)
 806{
 807        u32 val;
 808
 809        val = readl_relaxed(regs + TSADCV2_INT_EN);
 810        if (mode == TSHUT_MODE_GPIO) {
 811                val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
 812                val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
 813        } else {
 814                val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
 815                val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
 816        }
 817
 818        writel_relaxed(val, regs + TSADCV2_INT_EN);
 819}
 820
 821static const struct rockchip_tsadc_chip rv1108_tsadc_data = {
 822        .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 823        .chn_num = 1, /* one channel for tsadc */
 824
 825        .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 826        .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 827        .tshut_temp = 95000,
 828
 829        .initialize = rk_tsadcv2_initialize,
 830        .irq_ack = rk_tsadcv3_irq_ack,
 831        .control = rk_tsadcv3_control,
 832        .get_temp = rk_tsadcv2_get_temp,
 833        .set_alarm_temp = rk_tsadcv2_alarm_temp,
 834        .set_tshut_temp = rk_tsadcv2_tshut_temp,
 835        .set_tshut_mode = rk_tsadcv2_tshut_mode,
 836
 837        .table = {
 838                .id = rv1108_table,
 839                .length = ARRAY_SIZE(rv1108_table),
 840                .data_mask = TSADCV2_DATA_MASK,
 841                .mode = ADC_INCREMENT,
 842        },
 843};
 844
 845static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
 846        .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 847        .chn_num = 1, /* one channel for tsadc */
 848
 849        .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 850        .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 851        .tshut_temp = 95000,
 852
 853        .initialize = rk_tsadcv2_initialize,
 854        .irq_ack = rk_tsadcv3_irq_ack,
 855        .control = rk_tsadcv3_control,
 856        .get_temp = rk_tsadcv2_get_temp,
 857        .set_alarm_temp = rk_tsadcv2_alarm_temp,
 858        .set_tshut_temp = rk_tsadcv2_tshut_temp,
 859        .set_tshut_mode = rk_tsadcv2_tshut_mode,
 860
 861        .table = {
 862                .id = rk3228_code_table,
 863                .length = ARRAY_SIZE(rk3228_code_table),
 864                .data_mask = TSADCV3_DATA_MASK,
 865                .mode = ADC_INCREMENT,
 866        },
 867};
 868
 869static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
 870        .chn_id[SENSOR_CPU] = 1, /* cpu sensor is channel 1 */
 871        .chn_id[SENSOR_GPU] = 2, /* gpu sensor is channel 2 */
 872        .chn_num = 2, /* two channels for tsadc */
 873
 874        .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 875        .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 876        .tshut_temp = 95000,
 877
 878        .initialize = rk_tsadcv2_initialize,
 879        .irq_ack = rk_tsadcv2_irq_ack,
 880        .control = rk_tsadcv2_control,
 881        .get_temp = rk_tsadcv2_get_temp,
 882        .set_alarm_temp = rk_tsadcv2_alarm_temp,
 883        .set_tshut_temp = rk_tsadcv2_tshut_temp,
 884        .set_tshut_mode = rk_tsadcv2_tshut_mode,
 885
 886        .table = {
 887                .id = rk3288_code_table,
 888                .length = ARRAY_SIZE(rk3288_code_table),
 889                .data_mask = TSADCV2_DATA_MASK,
 890                .mode = ADC_DECREMENT,
 891        },
 892};
 893
 894static const struct rockchip_tsadc_chip rk3328_tsadc_data = {
 895        .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 896        .chn_num = 1, /* one channels for tsadc */
 897
 898        .tshut_mode = TSHUT_MODE_CRU, /* default TSHUT via CRU */
 899        .tshut_temp = 95000,
 900
 901        .initialize = rk_tsadcv2_initialize,
 902        .irq_ack = rk_tsadcv3_irq_ack,
 903        .control = rk_tsadcv3_control,
 904        .get_temp = rk_tsadcv2_get_temp,
 905        .set_alarm_temp = rk_tsadcv2_alarm_temp,
 906        .set_tshut_temp = rk_tsadcv2_tshut_temp,
 907        .set_tshut_mode = rk_tsadcv2_tshut_mode,
 908
 909        .table = {
 910                .id = rk3328_code_table,
 911                .length = ARRAY_SIZE(rk3328_code_table),
 912                .data_mask = TSADCV2_DATA_MASK,
 913                .mode = ADC_INCREMENT,
 914        },
 915};
 916
 917static const struct rockchip_tsadc_chip rk3366_tsadc_data = {
 918        .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 919        .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
 920        .chn_num = 2, /* two channels for tsadc */
 921
 922        .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 923        .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 924        .tshut_temp = 95000,
 925
 926        .initialize = rk_tsadcv3_initialize,
 927        .irq_ack = rk_tsadcv3_irq_ack,
 928        .control = rk_tsadcv3_control,
 929        .get_temp = rk_tsadcv2_get_temp,
 930        .set_alarm_temp = rk_tsadcv2_alarm_temp,
 931        .set_tshut_temp = rk_tsadcv2_tshut_temp,
 932        .set_tshut_mode = rk_tsadcv2_tshut_mode,
 933
 934        .table = {
 935                .id = rk3228_code_table,
 936                .length = ARRAY_SIZE(rk3228_code_table),
 937                .data_mask = TSADCV3_DATA_MASK,
 938                .mode = ADC_INCREMENT,
 939        },
 940};
 941
 942static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
 943        .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 944        .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
 945        .chn_num = 2, /* two channels for tsadc */
 946
 947        .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 948        .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 949        .tshut_temp = 95000,
 950
 951        .initialize = rk_tsadcv2_initialize,
 952        .irq_ack = rk_tsadcv2_irq_ack,
 953        .control = rk_tsadcv2_control,
 954        .get_temp = rk_tsadcv2_get_temp,
 955        .set_alarm_temp = rk_tsadcv2_alarm_temp,
 956        .set_tshut_temp = rk_tsadcv2_tshut_temp,
 957        .set_tshut_mode = rk_tsadcv2_tshut_mode,
 958
 959        .table = {
 960                .id = rk3368_code_table,
 961                .length = ARRAY_SIZE(rk3368_code_table),
 962                .data_mask = TSADCV3_DATA_MASK,
 963                .mode = ADC_INCREMENT,
 964        },
 965};
 966
 967static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
 968        .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 969        .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
 970        .chn_num = 2, /* two channels for tsadc */
 971
 972        .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 973        .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 974        .tshut_temp = 95000,
 975
 976        .initialize = rk_tsadcv3_initialize,
 977        .irq_ack = rk_tsadcv3_irq_ack,
 978        .control = rk_tsadcv3_control,
 979        .get_temp = rk_tsadcv2_get_temp,
 980        .set_alarm_temp = rk_tsadcv2_alarm_temp,
 981        .set_tshut_temp = rk_tsadcv2_tshut_temp,
 982        .set_tshut_mode = rk_tsadcv2_tshut_mode,
 983
 984        .table = {
 985                .id = rk3399_code_table,
 986                .length = ARRAY_SIZE(rk3399_code_table),
 987                .data_mask = TSADCV3_DATA_MASK,
 988                .mode = ADC_INCREMENT,
 989        },
 990};
 991
 992static const struct of_device_id of_rockchip_thermal_match[] = {
 993        {
 994                .compatible = "rockchip,rv1108-tsadc",
 995                .data = (void *)&rv1108_tsadc_data,
 996        },
 997        {
 998                .compatible = "rockchip,rk3228-tsadc",
 999                .data = (void *)&rk3228_tsadc_data,
1000        },
1001        {
1002                .compatible = "rockchip,rk3288-tsadc",
1003                .data = (void *)&rk3288_tsadc_data,
1004        },
1005        {
1006                .compatible = "rockchip,rk3328-tsadc",
1007                .data = (void *)&rk3328_tsadc_data,
1008        },
1009        {
1010                .compatible = "rockchip,rk3366-tsadc",
1011                .data = (void *)&rk3366_tsadc_data,
1012        },
1013        {
1014                .compatible = "rockchip,rk3368-tsadc",
1015                .data = (void *)&rk3368_tsadc_data,
1016        },
1017        {
1018                .compatible = "rockchip,rk3399-tsadc",
1019                .data = (void *)&rk3399_tsadc_data,
1020        },
1021        { /* end */ },
1022};
1023MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
1024
1025static void
1026rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor, bool on)
1027{
1028        struct thermal_zone_device *tzd = sensor->tzd;
1029
1030        tzd->ops->set_mode(tzd,
1031                on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
1032}
1033
1034static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
1035{
1036        struct rockchip_thermal_data *thermal = dev;
1037        int i;
1038
1039        dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
1040
1041        thermal->chip->irq_ack(thermal->regs);
1042
1043        for (i = 0; i < thermal->chip->chn_num; i++)
1044                thermal_zone_device_update(thermal->sensors[i].tzd,
1045                                           THERMAL_EVENT_UNSPECIFIED);
1046
1047        return IRQ_HANDLED;
1048}
1049
1050static int rockchip_thermal_set_trips(void *_sensor, int low, int high)
1051{
1052        struct rockchip_thermal_sensor *sensor = _sensor;
1053        struct rockchip_thermal_data *thermal = sensor->thermal;
1054        const struct rockchip_tsadc_chip *tsadc = thermal->chip;
1055
1056        dev_dbg(&thermal->pdev->dev, "%s: sensor %d: low: %d, high %d\n",
1057                __func__, sensor->id, low, high);
1058
1059        return tsadc->set_alarm_temp(&tsadc->table,
1060                                     sensor->id, thermal->regs, high);
1061}
1062
1063static int rockchip_thermal_get_temp(void *_sensor, int *out_temp)
1064{
1065        struct rockchip_thermal_sensor *sensor = _sensor;
1066        struct rockchip_thermal_data *thermal = sensor->thermal;
1067        const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
1068        int retval;
1069
1070        retval = tsadc->get_temp(&tsadc->table,
1071                                 sensor->id, thermal->regs, out_temp);
1072        dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %d, retval: %d\n",
1073                sensor->id, *out_temp, retval);
1074
1075        return retval;
1076}
1077
1078static const struct thermal_zone_of_device_ops rockchip_of_thermal_ops = {
1079        .get_temp = rockchip_thermal_get_temp,
1080        .set_trips = rockchip_thermal_set_trips,
1081};
1082
1083static int rockchip_configure_from_dt(struct device *dev,
1084                                      struct device_node *np,
1085                                      struct rockchip_thermal_data *thermal)
1086{
1087        u32 shut_temp, tshut_mode, tshut_polarity;
1088
1089        if (of_property_read_u32(np, "rockchip,hw-tshut-temp", &shut_temp)) {
1090                dev_warn(dev,
1091                         "Missing tshut temp property, using default %d\n",
1092                         thermal->chip->tshut_temp);
1093                thermal->tshut_temp = thermal->chip->tshut_temp;
1094        } else {
1095                if (shut_temp > INT_MAX) {
1096                        dev_err(dev, "Invalid tshut temperature specified: %d\n",
1097                                shut_temp);
1098                        return -ERANGE;
1099                }
1100                thermal->tshut_temp = shut_temp;
1101        }
1102
1103        if (of_property_read_u32(np, "rockchip,hw-tshut-mode", &tshut_mode)) {
1104                dev_warn(dev,
1105                         "Missing tshut mode property, using default (%s)\n",
1106                         thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
1107                                "gpio" : "cru");
1108                thermal->tshut_mode = thermal->chip->tshut_mode;
1109        } else {
1110                thermal->tshut_mode = tshut_mode;
1111        }
1112
1113        if (thermal->tshut_mode > 1) {
1114                dev_err(dev, "Invalid tshut mode specified: %d\n",
1115                        thermal->tshut_mode);
1116                return -EINVAL;
1117        }
1118
1119        if (of_property_read_u32(np, "rockchip,hw-tshut-polarity",
1120                                 &tshut_polarity)) {
1121                dev_warn(dev,
1122                         "Missing tshut-polarity property, using default (%s)\n",
1123                         thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
1124                                "low" : "high");
1125                thermal->tshut_polarity = thermal->chip->tshut_polarity;
1126        } else {
1127                thermal->tshut_polarity = tshut_polarity;
1128        }
1129
1130        if (thermal->tshut_polarity > 1) {
1131                dev_err(dev, "Invalid tshut-polarity specified: %d\n",
1132                        thermal->tshut_polarity);
1133                return -EINVAL;
1134        }
1135
1136        /* The tsadc wont to handle the error in here since some SoCs didn't
1137         * need this property.
1138         */
1139        thermal->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
1140        if (IS_ERR(thermal->grf))
1141                dev_warn(dev, "Missing rockchip,grf property\n");
1142
1143        return 0;
1144}
1145
1146static int
1147rockchip_thermal_register_sensor(struct platform_device *pdev,
1148                                 struct rockchip_thermal_data *thermal,
1149                                 struct rockchip_thermal_sensor *sensor,
1150                                 int id)
1151{
1152        const struct rockchip_tsadc_chip *tsadc = thermal->chip;
1153        int error;
1154
1155        tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
1156
1157        error = tsadc->set_tshut_temp(&tsadc->table, id, thermal->regs,
1158                              thermal->tshut_temp);
1159        if (error)
1160                dev_err(&pdev->dev, "%s: invalid tshut=%d, error=%d\n",
1161                        __func__, thermal->tshut_temp, error);
1162
1163        sensor->thermal = thermal;
1164        sensor->id = id;
1165        sensor->tzd = devm_thermal_zone_of_sensor_register(&pdev->dev, id,
1166                                        sensor, &rockchip_of_thermal_ops);
1167        if (IS_ERR(sensor->tzd)) {
1168                error = PTR_ERR(sensor->tzd);
1169                dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
1170                        id, error);
1171                return error;
1172        }
1173
1174        return 0;
1175}
1176
1177/**
1178 * Reset TSADC Controller, reset all tsadc registers.
1179 */
1180static void rockchip_thermal_reset_controller(struct reset_control *reset)
1181{
1182        reset_control_assert(reset);
1183        usleep_range(10, 20);
1184        reset_control_deassert(reset);
1185}
1186
1187static int rockchip_thermal_probe(struct platform_device *pdev)
1188{
1189        struct device_node *np = pdev->dev.of_node;
1190        struct rockchip_thermal_data *thermal;
1191        const struct of_device_id *match;
1192        struct resource *res;
1193        int irq;
1194        int i;
1195        int error;
1196
1197        match = of_match_node(of_rockchip_thermal_match, np);
1198        if (!match)
1199                return -ENXIO;
1200
1201        irq = platform_get_irq(pdev, 0);
1202        if (irq < 0) {
1203                dev_err(&pdev->dev, "no irq resource?\n");
1204                return -EINVAL;
1205        }
1206
1207        thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
1208                               GFP_KERNEL);
1209        if (!thermal)
1210                return -ENOMEM;
1211
1212        thermal->pdev = pdev;
1213
1214        thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
1215        if (!thermal->chip)
1216                return -EINVAL;
1217
1218        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1219        thermal->regs = devm_ioremap_resource(&pdev->dev, res);
1220        if (IS_ERR(thermal->regs))
1221                return PTR_ERR(thermal->regs);
1222
1223        thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
1224        if (IS_ERR(thermal->reset)) {
1225                error = PTR_ERR(thermal->reset);
1226                dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
1227                return error;
1228        }
1229
1230        thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
1231        if (IS_ERR(thermal->clk)) {
1232                error = PTR_ERR(thermal->clk);
1233                dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
1234                return error;
1235        }
1236
1237        thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
1238        if (IS_ERR(thermal->pclk)) {
1239                error = PTR_ERR(thermal->pclk);
1240                dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
1241                        error);
1242                return error;
1243        }
1244
1245        error = clk_prepare_enable(thermal->clk);
1246        if (error) {
1247                dev_err(&pdev->dev, "failed to enable converter clock: %d\n",
1248                        error);
1249                return error;
1250        }
1251
1252        error = clk_prepare_enable(thermal->pclk);
1253        if (error) {
1254                dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
1255                goto err_disable_clk;
1256        }
1257
1258        rockchip_thermal_reset_controller(thermal->reset);
1259
1260        error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
1261        if (error) {
1262                dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
1263                        error);
1264                goto err_disable_pclk;
1265        }
1266
1267        thermal->chip->initialize(thermal->grf, thermal->regs,
1268                                  thermal->tshut_polarity);
1269
1270        for (i = 0; i < thermal->chip->chn_num; i++) {
1271                error = rockchip_thermal_register_sensor(pdev, thermal,
1272                                                &thermal->sensors[i],
1273                                                thermal->chip->chn_id[i]);
1274                if (error) {
1275                        dev_err(&pdev->dev,
1276                                "failed to register sensor[%d] : error = %d\n",
1277                                i, error);
1278                        goto err_disable_pclk;
1279                }
1280        }
1281
1282        error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
1283                                          &rockchip_thermal_alarm_irq_thread,
1284                                          IRQF_ONESHOT,
1285                                          "rockchip_thermal", thermal);
1286        if (error) {
1287                dev_err(&pdev->dev,
1288                        "failed to request tsadc irq: %d\n", error);
1289                goto err_disable_pclk;
1290        }
1291
1292        thermal->chip->control(thermal->regs, true);
1293
1294        for (i = 0; i < thermal->chip->chn_num; i++)
1295                rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1296
1297        platform_set_drvdata(pdev, thermal);
1298
1299        return 0;
1300
1301err_disable_pclk:
1302        clk_disable_unprepare(thermal->pclk);
1303err_disable_clk:
1304        clk_disable_unprepare(thermal->clk);
1305
1306        return error;
1307}
1308
1309static int rockchip_thermal_remove(struct platform_device *pdev)
1310{
1311        struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1312        int i;
1313
1314        for (i = 0; i < thermal->chip->chn_num; i++) {
1315                struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
1316
1317                rockchip_thermal_toggle_sensor(sensor, false);
1318        }
1319
1320        thermal->chip->control(thermal->regs, false);
1321
1322        clk_disable_unprepare(thermal->pclk);
1323        clk_disable_unprepare(thermal->clk);
1324
1325        return 0;
1326}
1327
1328static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
1329{
1330        struct platform_device *pdev = to_platform_device(dev);
1331        struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1332        int i;
1333
1334        for (i = 0; i < thermal->chip->chn_num; i++)
1335                rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
1336
1337        thermal->chip->control(thermal->regs, false);
1338
1339        clk_disable(thermal->pclk);
1340        clk_disable(thermal->clk);
1341
1342        pinctrl_pm_select_sleep_state(dev);
1343
1344        return 0;
1345}
1346
1347static int __maybe_unused rockchip_thermal_resume(struct device *dev)
1348{
1349        struct platform_device *pdev = to_platform_device(dev);
1350        struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1351        int i;
1352        int error;
1353
1354        error = clk_enable(thermal->clk);
1355        if (error)
1356                return error;
1357
1358        error = clk_enable(thermal->pclk);
1359        if (error) {
1360                clk_disable(thermal->clk);
1361                return error;
1362        }
1363
1364        rockchip_thermal_reset_controller(thermal->reset);
1365
1366        thermal->chip->initialize(thermal->grf, thermal->regs,
1367                                  thermal->tshut_polarity);
1368
1369        for (i = 0; i < thermal->chip->chn_num; i++) {
1370                int id = thermal->sensors[i].id;
1371
1372                thermal->chip->set_tshut_mode(id, thermal->regs,
1373                                              thermal->tshut_mode);
1374
1375                error = thermal->chip->set_tshut_temp(&thermal->chip->table,
1376                                              id, thermal->regs,
1377                                              thermal->tshut_temp);
1378                if (error)
1379                        dev_err(&pdev->dev, "%s: invalid tshut=%d, error=%d\n",
1380                                __func__, thermal->tshut_temp, error);
1381        }
1382
1383        thermal->chip->control(thermal->regs, true);
1384
1385        for (i = 0; i < thermal->chip->chn_num; i++)
1386                rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1387
1388        pinctrl_pm_select_default_state(dev);
1389
1390        return 0;
1391}
1392
1393static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
1394                         rockchip_thermal_suspend, rockchip_thermal_resume);
1395
1396static struct platform_driver rockchip_thermal_driver = {
1397        .driver = {
1398                .name = "rockchip-thermal",
1399                .pm = &rockchip_thermal_pm_ops,
1400                .of_match_table = of_rockchip_thermal_match,
1401        },
1402        .probe = rockchip_thermal_probe,
1403        .remove = rockchip_thermal_remove,
1404};
1405
1406module_platform_driver(rockchip_thermal_driver);
1407
1408MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
1409MODULE_AUTHOR("Rockchip, Inc.");
1410MODULE_LICENSE("GPL v2");
1411MODULE_ALIAS("platform:rockchip-thermal");
1412