1
2
3
4
5
6#define pr_fmt(fmt) "dt-cpu-ftrs: " fmt
7
8#include <linux/export.h>
9#include <linux/init.h>
10#include <linux/jump_label.h>
11#include <linux/libfdt.h>
12#include <linux/memblock.h>
13#include <linux/printk.h>
14#include <linux/sched.h>
15#include <linux/string.h>
16#include <linux/threads.h>
17
18#include <asm/cputable.h>
19#include <asm/dt_cpu_ftrs.h>
20#include <asm/mmu.h>
21#include <asm/oprofile_impl.h>
22#include <asm/prom.h>
23#include <asm/setup.h>
24
25
26
27#define ISA_V2_07B 2070
28#define ISA_V3_0B 3000
29
30#define USABLE_PR (1U << 0)
31#define USABLE_OS (1U << 1)
32#define USABLE_HV (1U << 2)
33
34#define HV_SUPPORT_HFSCR (1U << 0)
35#define OS_SUPPORT_FSCR (1U << 0)
36
37
38#define HV_SUPPORT_NONE 0xffffffffU
39#define OS_SUPPORT_NONE 0xffffffffU
40
41struct dt_cpu_feature {
42 const char *name;
43 uint32_t isa;
44 uint32_t usable_privilege;
45 uint32_t hv_support;
46 uint32_t os_support;
47 uint32_t hfscr_bit_nr;
48 uint32_t fscr_bit_nr;
49 uint32_t hwcap_bit_nr;
50
51 unsigned long node;
52 int enabled;
53 int disabled;
54};
55
56#define MMU_FTRS_HASH_BASE (MMU_FTRS_POWER8)
57
58#define COMMON_USER_BASE (PPC_FEATURE_32 | PPC_FEATURE_64 | \
59 PPC_FEATURE_ARCH_2_06 |\
60 PPC_FEATURE_ICACHE_SNOOP)
61#define COMMON_USER2_BASE (PPC_FEATURE2_ARCH_2_07 | \
62 PPC_FEATURE2_ISEL)
63
64
65
66
67extern long __machine_check_early_realmode_p8(struct pt_regs *regs);
68extern long __machine_check_early_realmode_p9(struct pt_regs *regs);
69
70static int hv_mode;
71
72static struct {
73 u64 lpcr;
74 u64 lpcr_clear;
75 u64 hfscr;
76 u64 fscr;
77} system_registers;
78
79static void (*init_pmu_registers)(void);
80
81static void __restore_cpu_cpufeatures(void)
82{
83 u64 lpcr;
84
85
86
87
88
89
90
91
92
93
94
95
96
97 lpcr = mfspr(SPRN_LPCR);
98 lpcr |= system_registers.lpcr;
99 lpcr &= ~system_registers.lpcr_clear;
100 mtspr(SPRN_LPCR, lpcr);
101 if (hv_mode) {
102 mtspr(SPRN_LPID, 0);
103 mtspr(SPRN_HFSCR, system_registers.hfscr);
104 mtspr(SPRN_PCR, PCR_MASK);
105 }
106 mtspr(SPRN_FSCR, system_registers.fscr);
107
108 if (init_pmu_registers)
109 init_pmu_registers();
110}
111
112static char dt_cpu_name[64];
113
114static struct cpu_spec __initdata base_cpu_spec = {
115 .cpu_name = NULL,
116 .cpu_features = CPU_FTRS_DT_CPU_BASE,
117 .cpu_user_features = COMMON_USER_BASE,
118 .cpu_user_features2 = COMMON_USER2_BASE,
119 .mmu_features = 0,
120 .icache_bsize = 32,
121 .dcache_bsize = 32,
122 .num_pmcs = 0,
123 .pmc_type = PPC_PMC_DEFAULT,
124 .oprofile_cpu_type = NULL,
125 .oprofile_type = PPC_OPROFILE_INVALID,
126 .cpu_setup = NULL,
127 .cpu_restore = __restore_cpu_cpufeatures,
128 .machine_check_early = NULL,
129 .platform = NULL,
130};
131
132static void __init cpufeatures_setup_cpu(void)
133{
134 set_cur_cpu_spec(&base_cpu_spec);
135
136 cur_cpu_spec->pvr_mask = -1;
137 cur_cpu_spec->pvr_value = mfspr(SPRN_PVR);
138
139
140 hv_mode = !!(mfmsr() & MSR_HV);
141 if (hv_mode) {
142
143 cur_cpu_spec->cpu_features |= CPU_FTR_HVMODE;
144 mtspr(SPRN_HFSCR, 0);
145 }
146 mtspr(SPRN_FSCR, 0);
147 mtspr(SPRN_PCR, PCR_MASK);
148
149
150
151
152
153
154}
155
156static int __init feat_try_enable_unknown(struct dt_cpu_feature *f)
157{
158 if (f->hv_support == HV_SUPPORT_NONE) {
159 } else if (f->hv_support & HV_SUPPORT_HFSCR) {
160 u64 hfscr = mfspr(SPRN_HFSCR);
161 hfscr |= 1UL << f->hfscr_bit_nr;
162 mtspr(SPRN_HFSCR, hfscr);
163 } else {
164
165 return 0;
166 }
167
168 if (f->os_support == OS_SUPPORT_NONE) {
169 } else if (f->os_support & OS_SUPPORT_FSCR) {
170 u64 fscr = mfspr(SPRN_FSCR);
171 fscr |= 1UL << f->fscr_bit_nr;
172 mtspr(SPRN_FSCR, fscr);
173 } else {
174
175 return 0;
176 }
177
178 if ((f->usable_privilege & USABLE_PR) && (f->hwcap_bit_nr != -1)) {
179 uint32_t word = f->hwcap_bit_nr / 32;
180 uint32_t bit = f->hwcap_bit_nr % 32;
181
182 if (word == 0)
183 cur_cpu_spec->cpu_user_features |= 1U << bit;
184 else if (word == 1)
185 cur_cpu_spec->cpu_user_features2 |= 1U << bit;
186 else
187 pr_err("%s could not advertise to user (no hwcap bits)\n", f->name);
188 }
189
190 return 1;
191}
192
193static int __init feat_enable(struct dt_cpu_feature *f)
194{
195 if (f->hv_support != HV_SUPPORT_NONE) {
196 if (f->hfscr_bit_nr != -1) {
197 u64 hfscr = mfspr(SPRN_HFSCR);
198 hfscr |= 1UL << f->hfscr_bit_nr;
199 mtspr(SPRN_HFSCR, hfscr);
200 }
201 }
202
203 if (f->os_support != OS_SUPPORT_NONE) {
204 if (f->fscr_bit_nr != -1) {
205 u64 fscr = mfspr(SPRN_FSCR);
206 fscr |= 1UL << f->fscr_bit_nr;
207 mtspr(SPRN_FSCR, fscr);
208 }
209 }
210
211 if ((f->usable_privilege & USABLE_PR) && (f->hwcap_bit_nr != -1)) {
212 uint32_t word = f->hwcap_bit_nr / 32;
213 uint32_t bit = f->hwcap_bit_nr % 32;
214
215 if (word == 0)
216 cur_cpu_spec->cpu_user_features |= 1U << bit;
217 else if (word == 1)
218 cur_cpu_spec->cpu_user_features2 |= 1U << bit;
219 else
220 pr_err("CPU feature: %s could not advertise to user (no hwcap bits)\n", f->name);
221 }
222
223 return 1;
224}
225
226static int __init feat_disable(struct dt_cpu_feature *f)
227{
228 return 0;
229}
230
231static int __init feat_enable_hv(struct dt_cpu_feature *f)
232{
233 u64 lpcr;
234
235 if (!hv_mode) {
236 pr_err("CPU feature hypervisor present in device tree but HV mode not enabled in the CPU. Ignoring.\n");
237 return 0;
238 }
239
240 mtspr(SPRN_LPID, 0);
241
242 lpcr = mfspr(SPRN_LPCR);
243 lpcr &= ~LPCR_LPES0;
244 mtspr(SPRN_LPCR, lpcr);
245
246 cur_cpu_spec->cpu_features |= CPU_FTR_HVMODE;
247
248 return 1;
249}
250
251static int __init feat_enable_le(struct dt_cpu_feature *f)
252{
253 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_TRUE_LE;
254 return 1;
255}
256
257static int __init feat_enable_smt(struct dt_cpu_feature *f)
258{
259 cur_cpu_spec->cpu_features |= CPU_FTR_SMT;
260 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_SMT;
261 return 1;
262}
263
264static int __init feat_enable_idle_nap(struct dt_cpu_feature *f)
265{
266 u64 lpcr;
267
268
269 lpcr = mfspr(SPRN_LPCR);
270 lpcr |= LPCR_PECE0;
271 lpcr |= LPCR_PECE1;
272 lpcr |= LPCR_PECE2;
273 mtspr(SPRN_LPCR, lpcr);
274
275 return 1;
276}
277
278static int __init feat_enable_align_dsisr(struct dt_cpu_feature *f)
279{
280 cur_cpu_spec->cpu_features &= ~CPU_FTR_NODSISRALIGN;
281
282 return 1;
283}
284
285static int __init feat_enable_idle_stop(struct dt_cpu_feature *f)
286{
287 u64 lpcr;
288
289
290 lpcr = mfspr(SPRN_LPCR);
291 lpcr |= LPCR_PECE0;
292 lpcr |= LPCR_PECE1;
293 lpcr |= LPCR_PECE2;
294 mtspr(SPRN_LPCR, lpcr);
295
296 return 1;
297}
298
299static int __init feat_enable_mmu_hash(struct dt_cpu_feature *f)
300{
301 u64 lpcr;
302
303 lpcr = mfspr(SPRN_LPCR);
304 lpcr &= ~LPCR_ISL;
305
306
307 lpcr |= LPCR_VPM0;
308 lpcr &= ~LPCR_VPM1;
309 lpcr |= 0x10UL << LPCR_VRMASD_SH;
310 mtspr(SPRN_LPCR, lpcr);
311
312 cur_cpu_spec->mmu_features |= MMU_FTRS_HASH_BASE;
313 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_MMU;
314
315 return 1;
316}
317
318static int __init feat_enable_mmu_hash_v3(struct dt_cpu_feature *f)
319{
320 u64 lpcr;
321
322 system_registers.lpcr_clear |= (LPCR_ISL | LPCR_UPRT | LPCR_HR);
323 lpcr = mfspr(SPRN_LPCR);
324 lpcr &= ~(LPCR_ISL | LPCR_UPRT | LPCR_HR);
325 mtspr(SPRN_LPCR, lpcr);
326
327 cur_cpu_spec->mmu_features |= MMU_FTRS_HASH_BASE;
328 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_MMU;
329
330 return 1;
331}
332
333
334static int __init feat_enable_mmu_radix(struct dt_cpu_feature *f)
335{
336#ifdef CONFIG_PPC_RADIX_MMU
337 cur_cpu_spec->mmu_features |= MMU_FTR_TYPE_RADIX;
338 cur_cpu_spec->mmu_features |= MMU_FTRS_HASH_BASE;
339 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_MMU;
340
341 return 1;
342#endif
343 return 0;
344}
345
346static int __init feat_enable_dscr(struct dt_cpu_feature *f)
347{
348 u64 lpcr;
349
350 feat_enable(f);
351
352 lpcr = mfspr(SPRN_LPCR);
353 lpcr &= ~LPCR_DPFD;
354 lpcr |= (4UL << LPCR_DPFD_SH);
355 mtspr(SPRN_LPCR, lpcr);
356
357 return 1;
358}
359
360static void hfscr_pmu_enable(void)
361{
362 u64 hfscr = mfspr(SPRN_HFSCR);
363 hfscr |= PPC_BIT(60);
364 mtspr(SPRN_HFSCR, hfscr);
365}
366
367static void init_pmu_power8(void)
368{
369 if (hv_mode) {
370 mtspr(SPRN_MMCRC, 0);
371 mtspr(SPRN_MMCRH, 0);
372 }
373
374 mtspr(SPRN_MMCRA, 0);
375 mtspr(SPRN_MMCR0, 0);
376 mtspr(SPRN_MMCR1, 0);
377 mtspr(SPRN_MMCR2, 0);
378 mtspr(SPRN_MMCRS, 0);
379}
380
381static int __init feat_enable_mce_power8(struct dt_cpu_feature *f)
382{
383 cur_cpu_spec->platform = "power8";
384 cur_cpu_spec->machine_check_early = __machine_check_early_realmode_p8;
385
386 return 1;
387}
388
389static int __init feat_enable_pmu_power8(struct dt_cpu_feature *f)
390{
391 hfscr_pmu_enable();
392
393 init_pmu_power8();
394 init_pmu_registers = init_pmu_power8;
395
396 cur_cpu_spec->cpu_features |= CPU_FTR_MMCRA;
397 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_PSERIES_PERFMON_COMPAT;
398 if (pvr_version_is(PVR_POWER8E))
399 cur_cpu_spec->cpu_features |= CPU_FTR_PMAO_BUG;
400
401 cur_cpu_spec->num_pmcs = 6;
402 cur_cpu_spec->pmc_type = PPC_PMC_IBM;
403 cur_cpu_spec->oprofile_cpu_type = "ppc64/power8";
404
405 return 1;
406}
407
408static void init_pmu_power9(void)
409{
410 if (hv_mode)
411 mtspr(SPRN_MMCRC, 0);
412
413 mtspr(SPRN_MMCRA, 0);
414 mtspr(SPRN_MMCR0, 0);
415 mtspr(SPRN_MMCR1, 0);
416 mtspr(SPRN_MMCR2, 0);
417}
418
419static int __init feat_enable_mce_power9(struct dt_cpu_feature *f)
420{
421 cur_cpu_spec->platform = "power9";
422 cur_cpu_spec->machine_check_early = __machine_check_early_realmode_p9;
423
424 return 1;
425}
426
427static int __init feat_enable_pmu_power9(struct dt_cpu_feature *f)
428{
429 hfscr_pmu_enable();
430
431 init_pmu_power9();
432 init_pmu_registers = init_pmu_power9;
433
434 cur_cpu_spec->cpu_features |= CPU_FTR_MMCRA;
435 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_PSERIES_PERFMON_COMPAT;
436
437 cur_cpu_spec->num_pmcs = 6;
438 cur_cpu_spec->pmc_type = PPC_PMC_IBM;
439 cur_cpu_spec->oprofile_cpu_type = "ppc64/power9";
440
441 return 1;
442}
443
444static int __init feat_enable_tm(struct dt_cpu_feature *f)
445{
446#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
447 feat_enable(f);
448 cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_HTM_NOSC;
449 return 1;
450#endif
451 return 0;
452}
453
454static int __init feat_enable_fp(struct dt_cpu_feature *f)
455{
456 feat_enable(f);
457 cur_cpu_spec->cpu_features &= ~CPU_FTR_FPU_UNAVAILABLE;
458
459 return 1;
460}
461
462static int __init feat_enable_vector(struct dt_cpu_feature *f)
463{
464#ifdef CONFIG_ALTIVEC
465 feat_enable(f);
466 cur_cpu_spec->cpu_features |= CPU_FTR_ALTIVEC;
467 cur_cpu_spec->cpu_features |= CPU_FTR_VMX_COPY;
468 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_ALTIVEC;
469
470 return 1;
471#endif
472 return 0;
473}
474
475static int __init feat_enable_vsx(struct dt_cpu_feature *f)
476{
477#ifdef CONFIG_VSX
478 feat_enable(f);
479 cur_cpu_spec->cpu_features |= CPU_FTR_VSX;
480 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_VSX;
481
482 return 1;
483#endif
484 return 0;
485}
486
487static int __init feat_enable_purr(struct dt_cpu_feature *f)
488{
489 cur_cpu_spec->cpu_features |= CPU_FTR_PURR | CPU_FTR_SPURR;
490
491 return 1;
492}
493
494static int __init feat_enable_ebb(struct dt_cpu_feature *f)
495{
496
497
498
499
500
501
502 f->hwcap_bit_nr = -1;
503 feat_enable(f);
504
505 return 1;
506}
507
508static int __init feat_enable_dbell(struct dt_cpu_feature *f)
509{
510 u64 lpcr;
511
512
513 feat_enable(f);
514
515 cur_cpu_spec->cpu_features |= CPU_FTR_DBELL;
516
517 lpcr = mfspr(SPRN_LPCR);
518 lpcr |= LPCR_PECEDH;
519 mtspr(SPRN_LPCR, lpcr);
520
521 return 1;
522}
523
524static int __init feat_enable_hvi(struct dt_cpu_feature *f)
525{
526 u64 lpcr;
527
528
529
530
531
532
533
534
535
536
537
538
539
540 lpcr = mfspr(SPRN_LPCR);
541 lpcr |= LPCR_HVICE;
542 lpcr |= LPCR_HEIC;
543 lpcr |= LPCR_PECE_HVEE;
544 mtspr(SPRN_LPCR, lpcr);
545
546 return 1;
547}
548
549static int __init feat_enable_large_ci(struct dt_cpu_feature *f)
550{
551 cur_cpu_spec->mmu_features |= MMU_FTR_CI_LARGE_PAGE;
552
553 return 1;
554}
555
556struct dt_cpu_feature_match {
557 const char *name;
558 int (*enable)(struct dt_cpu_feature *f);
559 u64 cpu_ftr_bit_mask;
560};
561
562static struct dt_cpu_feature_match __initdata
563 dt_cpu_feature_match_table[] = {
564 {"hypervisor", feat_enable_hv, 0},
565 {"big-endian", feat_enable, 0},
566 {"little-endian", feat_enable_le, CPU_FTR_REAL_LE},
567 {"smt", feat_enable_smt, 0},
568 {"interrupt-facilities", feat_enable, 0},
569 {"timer-facilities", feat_enable, 0},
570 {"timer-facilities-v3", feat_enable, 0},
571 {"debug-facilities", feat_enable, 0},
572 {"come-from-address-register", feat_enable, CPU_FTR_CFAR},
573 {"branch-tracing", feat_enable, 0},
574 {"floating-point", feat_enable_fp, 0},
575 {"vector", feat_enable_vector, 0},
576 {"vector-scalar", feat_enable_vsx, 0},
577 {"vector-scalar-v3", feat_enable, 0},
578 {"decimal-floating-point", feat_enable, 0},
579 {"decimal-integer", feat_enable, 0},
580 {"quadword-load-store", feat_enable, 0},
581 {"vector-crypto", feat_enable, 0},
582 {"mmu-hash", feat_enable_mmu_hash, 0},
583 {"mmu-radix", feat_enable_mmu_radix, 0},
584 {"mmu-hash-v3", feat_enable_mmu_hash_v3, 0},
585 {"virtual-page-class-key-protection", feat_enable, 0},
586 {"transactional-memory", feat_enable_tm, CPU_FTR_TM},
587 {"transactional-memory-v3", feat_enable_tm, 0},
588 {"tm-suspend-hypervisor-assist", feat_enable, CPU_FTR_P9_TM_HV_ASSIST},
589 {"tm-suspend-xer-so-bug", feat_enable, CPU_FTR_P9_TM_XER_SO_BUG},
590 {"idle-nap", feat_enable_idle_nap, 0},
591 {"alignment-interrupt-dsisr", feat_enable_align_dsisr, 0},
592 {"idle-stop", feat_enable_idle_stop, 0},
593 {"machine-check-power8", feat_enable_mce_power8, 0},
594 {"performance-monitor-power8", feat_enable_pmu_power8, 0},
595 {"data-stream-control-register", feat_enable_dscr, CPU_FTR_DSCR},
596 {"event-based-branch", feat_enable_ebb, 0},
597 {"target-address-register", feat_enable, 0},
598 {"branch-history-rolling-buffer", feat_enable, 0},
599 {"control-register", feat_enable, CPU_FTR_CTRL},
600 {"processor-control-facility", feat_enable_dbell, CPU_FTR_DBELL},
601 {"processor-control-facility-v3", feat_enable_dbell, CPU_FTR_DBELL},
602 {"processor-utilization-of-resources-register", feat_enable_purr, 0},
603 {"no-execute", feat_enable, 0},
604 {"strong-access-ordering", feat_enable, CPU_FTR_SAO},
605 {"cache-inhibited-large-page", feat_enable_large_ci, 0},
606 {"coprocessor-icswx", feat_enable, 0},
607 {"hypervisor-virtualization-interrupt", feat_enable_hvi, 0},
608 {"program-priority-register", feat_enable, CPU_FTR_HAS_PPR},
609 {"wait", feat_enable, 0},
610 {"atomic-memory-operations", feat_enable, 0},
611 {"branch-v3", feat_enable, 0},
612 {"copy-paste", feat_enable, 0},
613 {"decimal-floating-point-v3", feat_enable, 0},
614 {"decimal-integer-v3", feat_enable, 0},
615 {"fixed-point-v3", feat_enable, 0},
616 {"floating-point-v3", feat_enable, 0},
617 {"group-start-register", feat_enable, 0},
618 {"pc-relative-addressing", feat_enable, 0},
619 {"machine-check-power9", feat_enable_mce_power9, 0},
620 {"performance-monitor-power9", feat_enable_pmu_power9, 0},
621 {"event-based-branch-v3", feat_enable, 0},
622 {"random-number-generator", feat_enable, 0},
623 {"system-call-vectored", feat_disable, 0},
624 {"trace-interrupt-v3", feat_enable, 0},
625 {"vector-v3", feat_enable, 0},
626 {"vector-binary128", feat_enable, 0},
627 {"vector-binary16", feat_enable, 0},
628 {"wait-v3", feat_enable, 0},
629};
630
631static bool __initdata using_dt_cpu_ftrs;
632static bool __initdata enable_unknown = true;
633
634static int __init dt_cpu_ftrs_parse(char *str)
635{
636 if (!str)
637 return 0;
638
639 if (!strcmp(str, "off"))
640 using_dt_cpu_ftrs = false;
641 else if (!strcmp(str, "known"))
642 enable_unknown = false;
643 else
644 return 1;
645
646 return 0;
647}
648early_param("dt_cpu_ftrs", dt_cpu_ftrs_parse);
649
650static void __init cpufeatures_setup_start(u32 isa)
651{
652 pr_info("setup for ISA %d\n", isa);
653
654 if (isa >= 3000) {
655 cur_cpu_spec->cpu_features |= CPU_FTR_ARCH_300;
656 cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_ARCH_3_00;
657 }
658}
659
660static bool __init cpufeatures_process_feature(struct dt_cpu_feature *f)
661{
662 const struct dt_cpu_feature_match *m;
663 bool known = false;
664 int i;
665
666 for (i = 0; i < ARRAY_SIZE(dt_cpu_feature_match_table); i++) {
667 m = &dt_cpu_feature_match_table[i];
668 if (!strcmp(f->name, m->name)) {
669 known = true;
670 if (m->enable(f))
671 break;
672
673 pr_info("not enabling: %s (disabled or unsupported by kernel)\n",
674 f->name);
675 return false;
676 }
677 }
678
679 if (!known && enable_unknown) {
680 if (!feat_try_enable_unknown(f)) {
681 pr_info("not enabling: %s (unknown and unsupported by kernel)\n",
682 f->name);
683 return false;
684 }
685 }
686
687 if (m->cpu_ftr_bit_mask)
688 cur_cpu_spec->cpu_features |= m->cpu_ftr_bit_mask;
689
690 if (known)
691 pr_debug("enabling: %s\n", f->name);
692 else
693 pr_debug("enabling: %s (unknown)\n", f->name);
694
695 return true;
696}
697
698
699
700
701
702static __init void update_tlbie_feature_flag(unsigned long pvr)
703{
704 if (PVR_VER(pvr) == PVR_POWER9) {
705
706
707
708
709 if ((pvr & 0xe000) == 0) {
710
711 if ((pvr & 0xfff) < 0x203)
712 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_STQ_BUG;
713 } else if ((pvr & 0xc000) == 0) {
714
715 if ((pvr & 0xfff) < 0x103)
716 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_STQ_BUG;
717 } else {
718 WARN_ONCE(1, "Unknown PVR");
719 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_STQ_BUG;
720 }
721
722 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_ERAT_BUG;
723 }
724}
725
726static __init void cpufeatures_cpu_quirks(void)
727{
728 unsigned long version = mfspr(SPRN_PVR);
729
730
731
732
733 if ((version & 0xffffefff) == 0x004e0200) {
734
735 cur_cpu_spec->cpu_features |= CPU_FTR_P9_RADIX_PREFETCH_BUG;
736 } else if ((version & 0xffffefff) == 0x004e0201) {
737 cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD2_1;
738 cur_cpu_spec->cpu_features |= CPU_FTR_P9_RADIX_PREFETCH_BUG;
739 } else if ((version & 0xffffefff) == 0x004e0202) {
740 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TM_HV_ASSIST;
741 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TM_XER_SO_BUG;
742 cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD2_1;
743 } else if ((version & 0xffff0000) == 0x004e0000) {
744
745 cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD2_1;
746 }
747
748 if ((version & 0xffff0000) == 0x004e0000) {
749 cur_cpu_spec->cpu_features &= ~(CPU_FTR_DAWR);
750 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TIDR;
751 }
752
753 update_tlbie_feature_flag(version);
754
755
756
757
758
759 cur_cpu_spec->cpu_features |= CPU_FTR_PKEY;
760}
761
762static void __init cpufeatures_setup_finished(void)
763{
764 cpufeatures_cpu_quirks();
765
766 if (hv_mode && !(cur_cpu_spec->cpu_features & CPU_FTR_HVMODE)) {
767 pr_err("hypervisor not present in device tree but HV mode is enabled in the CPU. Enabling.\n");
768 cur_cpu_spec->cpu_features |= CPU_FTR_HVMODE;
769 }
770
771
772 powerpc_base_platform = cur_cpu_spec->platform;
773
774 system_registers.lpcr = mfspr(SPRN_LPCR);
775 system_registers.hfscr = mfspr(SPRN_HFSCR);
776 system_registers.fscr = mfspr(SPRN_FSCR);
777
778 pr_info("final cpu/mmu features = 0x%016lx 0x%08x\n",
779 cur_cpu_spec->cpu_features, cur_cpu_spec->mmu_features);
780}
781
782static int __init disabled_on_cmdline(void)
783{
784 unsigned long root, chosen;
785 const char *p;
786
787 root = of_get_flat_dt_root();
788 chosen = of_get_flat_dt_subnode_by_name(root, "chosen");
789 if (chosen == -FDT_ERR_NOTFOUND)
790 return false;
791
792 p = of_get_flat_dt_prop(chosen, "bootargs", NULL);
793 if (!p)
794 return false;
795
796 if (strstr(p, "dt_cpu_ftrs=off"))
797 return true;
798
799 return false;
800}
801
802static int __init fdt_find_cpu_features(unsigned long node, const char *uname,
803 int depth, void *data)
804{
805 if (of_flat_dt_is_compatible(node, "ibm,powerpc-cpu-features")
806 && of_get_flat_dt_prop(node, "isa", NULL))
807 return 1;
808
809 return 0;
810}
811
812bool __init dt_cpu_ftrs_in_use(void)
813{
814 return using_dt_cpu_ftrs;
815}
816
817bool __init dt_cpu_ftrs_init(void *fdt)
818{
819 using_dt_cpu_ftrs = false;
820
821
822 if (!early_init_dt_verify(fdt))
823 return false;
824
825 if (!of_scan_flat_dt(fdt_find_cpu_features, NULL))
826 return false;
827
828 if (disabled_on_cmdline())
829 return false;
830
831 cpufeatures_setup_cpu();
832
833 using_dt_cpu_ftrs = true;
834 return true;
835}
836
837static int nr_dt_cpu_features;
838static struct dt_cpu_feature *dt_cpu_features;
839
840static int __init process_cpufeatures_node(unsigned long node,
841 const char *uname, int i)
842{
843 const __be32 *prop;
844 struct dt_cpu_feature *f;
845 int len;
846
847 f = &dt_cpu_features[i];
848 memset(f, 0, sizeof(struct dt_cpu_feature));
849
850 f->node = node;
851
852 f->name = uname;
853
854 prop = of_get_flat_dt_prop(node, "isa", &len);
855 if (!prop) {
856 pr_warn("%s: missing isa property\n", uname);
857 return 0;
858 }
859 f->isa = be32_to_cpup(prop);
860
861 prop = of_get_flat_dt_prop(node, "usable-privilege", &len);
862 if (!prop) {
863 pr_warn("%s: missing usable-privilege property", uname);
864 return 0;
865 }
866 f->usable_privilege = be32_to_cpup(prop);
867
868 prop = of_get_flat_dt_prop(node, "hv-support", &len);
869 if (prop)
870 f->hv_support = be32_to_cpup(prop);
871 else
872 f->hv_support = HV_SUPPORT_NONE;
873
874 prop = of_get_flat_dt_prop(node, "os-support", &len);
875 if (prop)
876 f->os_support = be32_to_cpup(prop);
877 else
878 f->os_support = OS_SUPPORT_NONE;
879
880 prop = of_get_flat_dt_prop(node, "hfscr-bit-nr", &len);
881 if (prop)
882 f->hfscr_bit_nr = be32_to_cpup(prop);
883 else
884 f->hfscr_bit_nr = -1;
885 prop = of_get_flat_dt_prop(node, "fscr-bit-nr", &len);
886 if (prop)
887 f->fscr_bit_nr = be32_to_cpup(prop);
888 else
889 f->fscr_bit_nr = -1;
890 prop = of_get_flat_dt_prop(node, "hwcap-bit-nr", &len);
891 if (prop)
892 f->hwcap_bit_nr = be32_to_cpup(prop);
893 else
894 f->hwcap_bit_nr = -1;
895
896 if (f->usable_privilege & USABLE_HV) {
897 if (!(mfmsr() & MSR_HV)) {
898 pr_warn("%s: HV feature passed to guest\n", uname);
899 return 0;
900 }
901
902 if (f->hv_support == HV_SUPPORT_NONE && f->hfscr_bit_nr != -1) {
903 pr_warn("%s: unwanted hfscr_bit_nr\n", uname);
904 return 0;
905 }
906
907 if (f->hv_support == HV_SUPPORT_HFSCR) {
908 if (f->hfscr_bit_nr == -1) {
909 pr_warn("%s: missing hfscr_bit_nr\n", uname);
910 return 0;
911 }
912 }
913 } else {
914 if (f->hv_support != HV_SUPPORT_NONE || f->hfscr_bit_nr != -1) {
915 pr_warn("%s: unwanted hv_support/hfscr_bit_nr\n", uname);
916 return 0;
917 }
918 }
919
920 if (f->usable_privilege & USABLE_OS) {
921 if (f->os_support == OS_SUPPORT_NONE && f->fscr_bit_nr != -1) {
922 pr_warn("%s: unwanted fscr_bit_nr\n", uname);
923 return 0;
924 }
925
926 if (f->os_support == OS_SUPPORT_FSCR) {
927 if (f->fscr_bit_nr == -1) {
928 pr_warn("%s: missing fscr_bit_nr\n", uname);
929 return 0;
930 }
931 }
932 } else {
933 if (f->os_support != OS_SUPPORT_NONE || f->fscr_bit_nr != -1) {
934 pr_warn("%s: unwanted os_support/fscr_bit_nr\n", uname);
935 return 0;
936 }
937 }
938
939 if (!(f->usable_privilege & USABLE_PR)) {
940 if (f->hwcap_bit_nr != -1) {
941 pr_warn("%s: unwanted hwcap_bit_nr\n", uname);
942 return 0;
943 }
944 }
945
946
947 if (!of_get_flat_dt_prop(node, "dependencies", &len)) {
948 if (cpufeatures_process_feature(f))
949 f->enabled = 1;
950 else
951 f->disabled = 1;
952 }
953
954 return 0;
955}
956
957static void __init cpufeatures_deps_enable(struct dt_cpu_feature *f)
958{
959 const __be32 *prop;
960 int len;
961 int nr_deps;
962 int i;
963
964 if (f->enabled || f->disabled)
965 return;
966
967 prop = of_get_flat_dt_prop(f->node, "dependencies", &len);
968 if (!prop) {
969 pr_warn("%s: missing dependencies property", f->name);
970 return;
971 }
972
973 nr_deps = len / sizeof(int);
974
975 for (i = 0; i < nr_deps; i++) {
976 unsigned long phandle = be32_to_cpu(prop[i]);
977 int j;
978
979 for (j = 0; j < nr_dt_cpu_features; j++) {
980 struct dt_cpu_feature *d = &dt_cpu_features[j];
981
982 if (of_get_flat_dt_phandle(d->node) == phandle) {
983 cpufeatures_deps_enable(d);
984 if (d->disabled) {
985 f->disabled = 1;
986 return;
987 }
988 }
989 }
990 }
991
992 if (cpufeatures_process_feature(f))
993 f->enabled = 1;
994 else
995 f->disabled = 1;
996}
997
998static int __init scan_cpufeatures_subnodes(unsigned long node,
999 const char *uname,
1000 void *data)
1001{
1002 int *count = data;
1003
1004 process_cpufeatures_node(node, uname, *count);
1005
1006 (*count)++;
1007
1008 return 0;
1009}
1010
1011static int __init count_cpufeatures_subnodes(unsigned long node,
1012 const char *uname,
1013 void *data)
1014{
1015 int *count = data;
1016
1017 (*count)++;
1018
1019 return 0;
1020}
1021
1022static int __init dt_cpu_ftrs_scan_callback(unsigned long node, const char
1023 *uname, int depth, void *data)
1024{
1025 const __be32 *prop;
1026 int count, i;
1027 u32 isa;
1028
1029
1030 if (!of_flat_dt_is_compatible(node, "ibm,powerpc-cpu-features"))
1031 return 0;
1032
1033 prop = of_get_flat_dt_prop(node, "isa", NULL);
1034 if (!prop)
1035
1036 return 0;
1037
1038 isa = be32_to_cpup(prop);
1039
1040
1041 of_scan_flat_dt_subnodes(node, count_cpufeatures_subnodes,
1042 &nr_dt_cpu_features);
1043 dt_cpu_features = __va(memblock_phys_alloc(sizeof(struct dt_cpu_feature) * nr_dt_cpu_features, PAGE_SIZE));
1044
1045 cpufeatures_setup_start(isa);
1046
1047
1048 count = 0;
1049 of_scan_flat_dt_subnodes(node, scan_cpufeatures_subnodes, &count);
1050
1051
1052 for (i = 0; i < nr_dt_cpu_features; i++) {
1053 struct dt_cpu_feature *f = &dt_cpu_features[i];
1054
1055 cpufeatures_deps_enable(f);
1056 }
1057
1058 prop = of_get_flat_dt_prop(node, "display-name", NULL);
1059 if (prop && strlen((char *)prop) != 0) {
1060 strlcpy(dt_cpu_name, (char *)prop, sizeof(dt_cpu_name));
1061 cur_cpu_spec->cpu_name = dt_cpu_name;
1062 }
1063
1064 cpufeatures_setup_finished();
1065
1066 memblock_free(__pa(dt_cpu_features),
1067 sizeof(struct dt_cpu_feature)*nr_dt_cpu_features);
1068
1069 return 0;
1070}
1071
1072void __init dt_cpu_ftrs_scan(void)
1073{
1074 if (!using_dt_cpu_ftrs)
1075 return;
1076
1077 of_scan_flat_dt(dt_cpu_ftrs_scan_callback, NULL);
1078}
1079
