linux/drivers/gpu/drm/amd/powerplay/inc/smu_v12_0_ppsmc.h
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   1/*
   2 * Copyright 2019 Advanced Micro Devices, Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 */
  23
  24#ifndef SMU_12_0_PPSMC_H
  25#define SMU_12_0_PPSMC_H
  26
  27// SMU Response Codes:
  28#define PPSMC_Result_OK                    0x1
  29#define PPSMC_Result_Failed                0xFF
  30#define PPSMC_Result_UnknownCmd            0xFE
  31#define PPSMC_Result_CmdRejectedPrereq     0xFD
  32#define PPSMC_Result_CmdRejectedBusy       0xFC
  33
  34
  35// Message Definitions:
  36#define PPSMC_MSG_TestMessage                   0x1
  37#define PPSMC_MSG_GetSmuVersion                 0x2
  38#define PPSMC_MSG_GetDriverIfVersion            0x3
  39#define PPSMC_MSG_PowerUpGfx                    0x6
  40#define PPSMC_MSG_EnableGfxOff                  0x7
  41#define PPSMC_MSG_DisableGfxOff                 0x8
  42#define PPSMC_MSG_PowerDownIspByTile            0x9 // ISP is power gated by default
  43#define PPSMC_MSG_PowerUpIspByTile              0xA
  44#define PPSMC_MSG_PowerDownVcn                  0xB // VCN is power gated by default
  45#define PPSMC_MSG_PowerUpVcn                    0xC
  46#define PPSMC_MSG_PowerDownSdma                 0xD // SDMA is power gated by default
  47#define PPSMC_MSG_PowerUpSdma                   0xE
  48#define PPSMC_MSG_SetHardMinIspclkByFreq        0xF
  49#define PPSMC_MSG_SetHardMinVcn                 0x10 // For wireless display
  50#define PPSMC_MSG_spare1                        0x11
  51#define PPSMC_MSG_spare2                        0x12
  52#define PPSMC_MSG_SetAllowFclkSwitch            0x13
  53#define PPSMC_MSG_SetMinVideoGfxclkFreq         0x14
  54#define PPSMC_MSG_ActiveProcessNotify           0x15
  55#define PPSMC_MSG_SetCustomPolicy               0x16
  56#define PPSMC_MSG_SetVideoFps                   0x17
  57#define PPSMC_MSG_SetDisplayCount               0x18 // Moved to VBIOS
  58#define PPSMC_MSG_QueryPowerLimit               0x19 //Driver to look up sustainable clocks for VQ
  59#define PPSMC_MSG_SetDriverDramAddrHigh         0x1A
  60#define PPSMC_MSG_SetDriverDramAddrLow          0x1B
  61#define PPSMC_MSG_TransferTableSmu2Dram         0x1C
  62#define PPSMC_MSG_TransferTableDram2Smu         0x1D
  63#define PPSMC_MSG_GfxDeviceDriverReset          0x1E
  64#define PPSMC_MSG_SetGfxclkOverdriveByFreqVid   0x1F
  65#define PPSMC_MSG_SetHardMinDcfclkByFreq        0x20 // Moved to VBIOS
  66#define PPSMC_MSG_SetHardMinSocclkByFreq        0x21
  67#define PPSMC_MSG_ControlIgpuATS                0x22
  68#define PPSMC_MSG_SetMinVideoFclkFreq           0x23
  69#define PPSMC_MSG_SetMinDeepSleepDcfclk         0x24 // Moved to VBIOS
  70#define PPSMC_MSG_ForcePowerDownGfx             0x25
  71#define PPSMC_MSG_SetPhyclkVoltageByFreq        0x26 // Moved to VBIOS
  72#define PPSMC_MSG_SetDppclkVoltageByFreq        0x27 // Moved to VBIOS and is SetDppclkFreq
  73#define PPSMC_MSG_SetSoftMinVcn                 0x28
  74#define PPSMC_MSG_EnablePostCode                0x29
  75#define PPSMC_MSG_GetGfxclkFrequency            0x2A
  76#define PPSMC_MSG_GetFclkFrequency              0x2B
  77#define PPSMC_MSG_GetMinGfxclkFrequency         0x2C
  78#define PPSMC_MSG_GetMaxGfxclkFrequency         0x2D
  79#define PPSMC_MSG_SoftReset                     0x2E // Not supported
  80#define PPSMC_MSG_SetGfxCGPG                    0x2F
  81#define PPSMC_MSG_SetSoftMaxGfxClk              0x30
  82#define PPSMC_MSG_SetHardMinGfxClk              0x31
  83#define PPSMC_MSG_SetSoftMaxSocclkByFreq        0x32
  84#define PPSMC_MSG_SetSoftMaxFclkByFreq          0x33
  85#define PPSMC_MSG_SetSoftMaxVcn                 0x34
  86#define PPSMC_MSG_PowerGateMmHub                0x35
  87#define PPSMC_MSG_UpdatePmeRestore              0x36 // Moved to VBIOS
  88#define PPSMC_MSG_GpuChangeState                0x37
  89#define PPSMC_MSG_SetPowerLimitPercentage       0x38
  90#define PPSMC_MSG_ForceGfxContentSave           0x39
  91#define PPSMC_MSG_EnableTmdp48MHzRefclkPwrDown  0x3A // Moved to VBIOS
  92#define PPSMC_MSG_PowerDownJpeg                 0x3B
  93#define PPSMC_MSG_PowerUpJpeg                   0x3C
  94#define PPSMC_MSG_PowerGateAtHub                0x3D
  95#define PPSMC_MSG_SetSoftMinJpeg                0x3E
  96#define PPSMC_MSG_SetHardMinFclkByFreq          0x3F
  97#define PPSMC_Message_Count                     0x40
  98
  99
 100//Argument for  PPSMC_MSG_GpuChangeState
 101enum {
 102  eGpuChangeState_D0Entry = 1,
 103  eGpuChangeState_D3Entry,
 104};
 105
 106#endif
 107