linux/drivers/net/ethernet/aurora/nb8800.c
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   1/*
   2 * Copyright (C) 2015 Mans Rullgard <mans@mansr.com>
   3 *
   4 * Mostly rewritten, based on driver from Sigma Designs.  Original
   5 * copyright notice below.
   6 *
   7 *
   8 * Driver for tangox SMP864x/SMP865x/SMP867x/SMP868x builtin Ethernet Mac.
   9 *
  10 * Copyright (C) 2005 Maxime Bizon <mbizon@freebox.fr>
  11 *
  12 * This program is free software; you can redistribute it and/or modify
  13 * it under the terms of the GNU General Public License as published by
  14 * the Free Software Foundation; either version 2 of the License, or
  15 * (at your option) any later version.
  16 *
  17 * This program is distributed in the hope that it will be useful,
  18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20 * GNU General Public License for more details.
  21 */
  22
  23#include <linux/module.h>
  24#include <linux/etherdevice.h>
  25#include <linux/delay.h>
  26#include <linux/ethtool.h>
  27#include <linux/interrupt.h>
  28#include <linux/platform_device.h>
  29#include <linux/of_device.h>
  30#include <linux/of_mdio.h>
  31#include <linux/of_net.h>
  32#include <linux/dma-mapping.h>
  33#include <linux/phy.h>
  34#include <linux/cache.h>
  35#include <linux/jiffies.h>
  36#include <linux/io.h>
  37#include <linux/iopoll.h>
  38#include <asm/barrier.h>
  39
  40#include "nb8800.h"
  41
  42static void nb8800_tx_done(struct net_device *dev);
  43static int nb8800_dma_stop(struct net_device *dev);
  44
  45static inline u8 nb8800_readb(struct nb8800_priv *priv, int reg)
  46{
  47        return readb_relaxed(priv->base + reg);
  48}
  49
  50static inline u32 nb8800_readl(struct nb8800_priv *priv, int reg)
  51{
  52        return readl_relaxed(priv->base + reg);
  53}
  54
  55static inline void nb8800_writeb(struct nb8800_priv *priv, int reg, u8 val)
  56{
  57        writeb_relaxed(val, priv->base + reg);
  58}
  59
  60static inline void nb8800_writew(struct nb8800_priv *priv, int reg, u16 val)
  61{
  62        writew_relaxed(val, priv->base + reg);
  63}
  64
  65static inline void nb8800_writel(struct nb8800_priv *priv, int reg, u32 val)
  66{
  67        writel_relaxed(val, priv->base + reg);
  68}
  69
  70static inline void nb8800_maskb(struct nb8800_priv *priv, int reg,
  71                                u32 mask, u32 val)
  72{
  73        u32 old = nb8800_readb(priv, reg);
  74        u32 new = (old & ~mask) | (val & mask);
  75
  76        if (new != old)
  77                nb8800_writeb(priv, reg, new);
  78}
  79
  80static inline void nb8800_maskl(struct nb8800_priv *priv, int reg,
  81                                u32 mask, u32 val)
  82{
  83        u32 old = nb8800_readl(priv, reg);
  84        u32 new = (old & ~mask) | (val & mask);
  85
  86        if (new != old)
  87                nb8800_writel(priv, reg, new);
  88}
  89
  90static inline void nb8800_modb(struct nb8800_priv *priv, int reg, u8 bits,
  91                               bool set)
  92{
  93        nb8800_maskb(priv, reg, bits, set ? bits : 0);
  94}
  95
  96static inline void nb8800_setb(struct nb8800_priv *priv, int reg, u8 bits)
  97{
  98        nb8800_maskb(priv, reg, bits, bits);
  99}
 100
 101static inline void nb8800_clearb(struct nb8800_priv *priv, int reg, u8 bits)
 102{
 103        nb8800_maskb(priv, reg, bits, 0);
 104}
 105
 106static inline void nb8800_modl(struct nb8800_priv *priv, int reg, u32 bits,
 107                               bool set)
 108{
 109        nb8800_maskl(priv, reg, bits, set ? bits : 0);
 110}
 111
 112static inline void nb8800_setl(struct nb8800_priv *priv, int reg, u32 bits)
 113{
 114        nb8800_maskl(priv, reg, bits, bits);
 115}
 116
 117static inline void nb8800_clearl(struct nb8800_priv *priv, int reg, u32 bits)
 118{
 119        nb8800_maskl(priv, reg, bits, 0);
 120}
 121
 122static int nb8800_mdio_wait(struct mii_bus *bus)
 123{
 124        struct nb8800_priv *priv = bus->priv;
 125        u32 val;
 126
 127        return readl_poll_timeout_atomic(priv->base + NB8800_MDIO_CMD,
 128                                         val, !(val & MDIO_CMD_GO), 1, 1000);
 129}
 130
 131static int nb8800_mdio_cmd(struct mii_bus *bus, u32 cmd)
 132{
 133        struct nb8800_priv *priv = bus->priv;
 134        int err;
 135
 136        err = nb8800_mdio_wait(bus);
 137        if (err)
 138                return err;
 139
 140        nb8800_writel(priv, NB8800_MDIO_CMD, cmd);
 141        udelay(10);
 142        nb8800_writel(priv, NB8800_MDIO_CMD, cmd | MDIO_CMD_GO);
 143
 144        return nb8800_mdio_wait(bus);
 145}
 146
 147static int nb8800_mdio_read(struct mii_bus *bus, int phy_id, int reg)
 148{
 149        struct nb8800_priv *priv = bus->priv;
 150        u32 val;
 151        int err;
 152
 153        err = nb8800_mdio_cmd(bus, MDIO_CMD_ADDR(phy_id) | MDIO_CMD_REG(reg));
 154        if (err)
 155                return err;
 156
 157        val = nb8800_readl(priv, NB8800_MDIO_STS);
 158        if (val & MDIO_STS_ERR)
 159                return 0xffff;
 160
 161        return val & 0xffff;
 162}
 163
 164static int nb8800_mdio_write(struct mii_bus *bus, int phy_id, int reg, u16 val)
 165{
 166        u32 cmd = MDIO_CMD_ADDR(phy_id) | MDIO_CMD_REG(reg) |
 167                MDIO_CMD_DATA(val) | MDIO_CMD_WR;
 168
 169        return nb8800_mdio_cmd(bus, cmd);
 170}
 171
 172static void nb8800_mac_tx(struct net_device *dev, bool enable)
 173{
 174        struct nb8800_priv *priv = netdev_priv(dev);
 175
 176        while (nb8800_readl(priv, NB8800_TXC_CR) & TCR_EN)
 177                cpu_relax();
 178
 179        nb8800_modb(priv, NB8800_TX_CTL1, TX_EN, enable);
 180}
 181
 182static void nb8800_mac_rx(struct net_device *dev, bool enable)
 183{
 184        nb8800_modb(netdev_priv(dev), NB8800_RX_CTL, RX_EN, enable);
 185}
 186
 187static void nb8800_mac_af(struct net_device *dev, bool enable)
 188{
 189        nb8800_modb(netdev_priv(dev), NB8800_RX_CTL, RX_AF_EN, enable);
 190}
 191
 192static void nb8800_start_rx(struct net_device *dev)
 193{
 194        nb8800_setl(netdev_priv(dev), NB8800_RXC_CR, RCR_EN);
 195}
 196
 197static int nb8800_alloc_rx(struct net_device *dev, unsigned int i, bool napi)
 198{
 199        struct nb8800_priv *priv = netdev_priv(dev);
 200        struct nb8800_rx_desc *rxd = &priv->rx_descs[i];
 201        struct nb8800_rx_buf *rxb = &priv->rx_bufs[i];
 202        int size = L1_CACHE_ALIGN(RX_BUF_SIZE);
 203        dma_addr_t dma_addr;
 204        struct page *page;
 205        unsigned long offset;
 206        void *data;
 207
 208        data = napi ? napi_alloc_frag(size) : netdev_alloc_frag(size);
 209        if (!data)
 210                return -ENOMEM;
 211
 212        page = virt_to_head_page(data);
 213        offset = data - page_address(page);
 214
 215        dma_addr = dma_map_page(&dev->dev, page, offset, RX_BUF_SIZE,
 216                                DMA_FROM_DEVICE);
 217
 218        if (dma_mapping_error(&dev->dev, dma_addr)) {
 219                skb_free_frag(data);
 220                return -ENOMEM;
 221        }
 222
 223        rxb->page = page;
 224        rxb->offset = offset;
 225        rxd->desc.s_addr = dma_addr;
 226
 227        return 0;
 228}
 229
 230static void nb8800_receive(struct net_device *dev, unsigned int i,
 231                           unsigned int len)
 232{
 233        struct nb8800_priv *priv = netdev_priv(dev);
 234        struct nb8800_rx_desc *rxd = &priv->rx_descs[i];
 235        struct page *page = priv->rx_bufs[i].page;
 236        int offset = priv->rx_bufs[i].offset;
 237        void *data = page_address(page) + offset;
 238        dma_addr_t dma = rxd->desc.s_addr;
 239        struct sk_buff *skb;
 240        unsigned int size;
 241        int err;
 242
 243        size = len <= RX_COPYBREAK ? len : RX_COPYHDR;
 244
 245        skb = napi_alloc_skb(&priv->napi, size);
 246        if (!skb) {
 247                netdev_err(dev, "rx skb allocation failed\n");
 248                dev->stats.rx_dropped++;
 249                return;
 250        }
 251
 252        if (len <= RX_COPYBREAK) {
 253                dma_sync_single_for_cpu(&dev->dev, dma, len, DMA_FROM_DEVICE);
 254                skb_put_data(skb, data, len);
 255                dma_sync_single_for_device(&dev->dev, dma, len,
 256                                           DMA_FROM_DEVICE);
 257        } else {
 258                err = nb8800_alloc_rx(dev, i, true);
 259                if (err) {
 260                        netdev_err(dev, "rx buffer allocation failed\n");
 261                        dev->stats.rx_dropped++;
 262                        dev_kfree_skb(skb);
 263                        return;
 264                }
 265
 266                dma_unmap_page(&dev->dev, dma, RX_BUF_SIZE, DMA_FROM_DEVICE);
 267                skb_put_data(skb, data, RX_COPYHDR);
 268                skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
 269                                offset + RX_COPYHDR, len - RX_COPYHDR,
 270                                RX_BUF_SIZE);
 271        }
 272
 273        skb->protocol = eth_type_trans(skb, dev);
 274        napi_gro_receive(&priv->napi, skb);
 275}
 276
 277static void nb8800_rx_error(struct net_device *dev, u32 report)
 278{
 279        if (report & RX_LENGTH_ERR)
 280                dev->stats.rx_length_errors++;
 281
 282        if (report & RX_FCS_ERR)
 283                dev->stats.rx_crc_errors++;
 284
 285        if (report & RX_FIFO_OVERRUN)
 286                dev->stats.rx_fifo_errors++;
 287
 288        if (report & RX_ALIGNMENT_ERROR)
 289                dev->stats.rx_frame_errors++;
 290
 291        dev->stats.rx_errors++;
 292}
 293
 294static int nb8800_poll(struct napi_struct *napi, int budget)
 295{
 296        struct net_device *dev = napi->dev;
 297        struct nb8800_priv *priv = netdev_priv(dev);
 298        struct nb8800_rx_desc *rxd;
 299        unsigned int last = priv->rx_eoc;
 300        unsigned int next;
 301        int work = 0;
 302
 303        nb8800_tx_done(dev);
 304
 305again:
 306        do {
 307                struct nb8800_rx_buf *rxb;
 308                unsigned int len;
 309
 310                next = (last + 1) % RX_DESC_COUNT;
 311
 312                rxb = &priv->rx_bufs[next];
 313                rxd = &priv->rx_descs[next];
 314
 315                if (!rxd->report)
 316                        break;
 317
 318                len = RX_BYTES_TRANSFERRED(rxd->report);
 319
 320                if (IS_RX_ERROR(rxd->report))
 321                        nb8800_rx_error(dev, rxd->report);
 322                else
 323                        nb8800_receive(dev, next, len);
 324
 325                dev->stats.rx_packets++;
 326                dev->stats.rx_bytes += len;
 327
 328                if (rxd->report & RX_MULTICAST_PKT)
 329                        dev->stats.multicast++;
 330
 331                rxd->report = 0;
 332                last = next;
 333                work++;
 334        } while (work < budget);
 335
 336        if (work) {
 337                priv->rx_descs[last].desc.config |= DESC_EOC;
 338                wmb();  /* ensure new EOC is written before clearing old */
 339                priv->rx_descs[priv->rx_eoc].desc.config &= ~DESC_EOC;
 340                priv->rx_eoc = last;
 341                nb8800_start_rx(dev);
 342        }
 343
 344        if (work < budget) {
 345                nb8800_writel(priv, NB8800_RX_ITR, priv->rx_itr_irq);
 346
 347                /* If a packet arrived after we last checked but
 348                 * before writing RX_ITR, the interrupt will be
 349                 * delayed, so we retrieve it now.
 350                 */
 351                if (priv->rx_descs[next].report)
 352                        goto again;
 353
 354                napi_complete_done(napi, work);
 355        }
 356
 357        return work;
 358}
 359
 360static void __nb8800_tx_dma_start(struct net_device *dev)
 361{
 362        struct nb8800_priv *priv = netdev_priv(dev);
 363        struct nb8800_tx_buf *txb;
 364        u32 txc_cr;
 365
 366        txb = &priv->tx_bufs[priv->tx_queue];
 367        if (!txb->ready)
 368                return;
 369
 370        txc_cr = nb8800_readl(priv, NB8800_TXC_CR);
 371        if (txc_cr & TCR_EN)
 372                return;
 373
 374        nb8800_writel(priv, NB8800_TX_DESC_ADDR, txb->dma_desc);
 375        wmb();          /* ensure desc addr is written before starting DMA */
 376        nb8800_writel(priv, NB8800_TXC_CR, txc_cr | TCR_EN);
 377
 378        priv->tx_queue = (priv->tx_queue + txb->chain_len) % TX_DESC_COUNT;
 379}
 380
 381static void nb8800_tx_dma_start(struct net_device *dev)
 382{
 383        struct nb8800_priv *priv = netdev_priv(dev);
 384
 385        spin_lock_irq(&priv->tx_lock);
 386        __nb8800_tx_dma_start(dev);
 387        spin_unlock_irq(&priv->tx_lock);
 388}
 389
 390static void nb8800_tx_dma_start_irq(struct net_device *dev)
 391{
 392        struct nb8800_priv *priv = netdev_priv(dev);
 393
 394        spin_lock(&priv->tx_lock);
 395        __nb8800_tx_dma_start(dev);
 396        spin_unlock(&priv->tx_lock);
 397}
 398
 399static int nb8800_xmit(struct sk_buff *skb, struct net_device *dev)
 400{
 401        struct nb8800_priv *priv = netdev_priv(dev);
 402        struct nb8800_tx_desc *txd;
 403        struct nb8800_tx_buf *txb;
 404        struct nb8800_dma_desc *desc;
 405        dma_addr_t dma_addr;
 406        unsigned int dma_len;
 407        unsigned int align;
 408        unsigned int next;
 409        bool xmit_more;
 410
 411        if (atomic_read(&priv->tx_free) <= NB8800_DESC_LOW) {
 412                netif_stop_queue(dev);
 413                return NETDEV_TX_BUSY;
 414        }
 415
 416        align = (8 - (uintptr_t)skb->data) & 7;
 417
 418        dma_len = skb->len - align;
 419        dma_addr = dma_map_single(&dev->dev, skb->data + align,
 420                                  dma_len, DMA_TO_DEVICE);
 421
 422        if (dma_mapping_error(&dev->dev, dma_addr)) {
 423                netdev_err(dev, "tx dma mapping error\n");
 424                kfree_skb(skb);
 425                dev->stats.tx_dropped++;
 426                return NETDEV_TX_OK;
 427        }
 428
 429        xmit_more = netdev_xmit_more();
 430        if (atomic_dec_return(&priv->tx_free) <= NB8800_DESC_LOW) {
 431                netif_stop_queue(dev);
 432                xmit_more = false;
 433        }
 434
 435        next = priv->tx_next;
 436        txb = &priv->tx_bufs[next];
 437        txd = &priv->tx_descs[next];
 438        desc = &txd->desc[0];
 439
 440        next = (next + 1) % TX_DESC_COUNT;
 441
 442        if (align) {
 443                memcpy(txd->buf, skb->data, align);
 444
 445                desc->s_addr =
 446                        txb->dma_desc + offsetof(struct nb8800_tx_desc, buf);
 447                desc->n_addr = txb->dma_desc + sizeof(txd->desc[0]);
 448                desc->config = DESC_BTS(2) | DESC_DS | align;
 449
 450                desc++;
 451        }
 452
 453        desc->s_addr = dma_addr;
 454        desc->n_addr = priv->tx_bufs[next].dma_desc;
 455        desc->config = DESC_BTS(2) | DESC_DS | DESC_EOF | dma_len;
 456
 457        if (!xmit_more)
 458                desc->config |= DESC_EOC;
 459
 460        txb->skb = skb;
 461        txb->dma_addr = dma_addr;
 462        txb->dma_len = dma_len;
 463
 464        if (!priv->tx_chain) {
 465                txb->chain_len = 1;
 466                priv->tx_chain = txb;
 467        } else {
 468                priv->tx_chain->chain_len++;
 469        }
 470
 471        netdev_sent_queue(dev, skb->len);
 472
 473        priv->tx_next = next;
 474
 475        if (!xmit_more) {
 476                smp_wmb();
 477                priv->tx_chain->ready = true;
 478                priv->tx_chain = NULL;
 479                nb8800_tx_dma_start(dev);
 480        }
 481
 482        return NETDEV_TX_OK;
 483}
 484
 485static void nb8800_tx_error(struct net_device *dev, u32 report)
 486{
 487        if (report & TX_LATE_COLLISION)
 488                dev->stats.collisions++;
 489
 490        if (report & TX_PACKET_DROPPED)
 491                dev->stats.tx_dropped++;
 492
 493        if (report & TX_FIFO_UNDERRUN)
 494                dev->stats.tx_fifo_errors++;
 495
 496        dev->stats.tx_errors++;
 497}
 498
 499static void nb8800_tx_done(struct net_device *dev)
 500{
 501        struct nb8800_priv *priv = netdev_priv(dev);
 502        unsigned int limit = priv->tx_next;
 503        unsigned int done = priv->tx_done;
 504        unsigned int packets = 0;
 505        unsigned int len = 0;
 506
 507        while (done != limit) {
 508                struct nb8800_tx_desc *txd = &priv->tx_descs[done];
 509                struct nb8800_tx_buf *txb = &priv->tx_bufs[done];
 510                struct sk_buff *skb;
 511
 512                if (!txd->report)
 513                        break;
 514
 515                skb = txb->skb;
 516                len += skb->len;
 517
 518                dma_unmap_single(&dev->dev, txb->dma_addr, txb->dma_len,
 519                                 DMA_TO_DEVICE);
 520
 521                if (IS_TX_ERROR(txd->report)) {
 522                        nb8800_tx_error(dev, txd->report);
 523                        kfree_skb(skb);
 524                } else {
 525                        consume_skb(skb);
 526                }
 527
 528                dev->stats.tx_packets++;
 529                dev->stats.tx_bytes += TX_BYTES_TRANSFERRED(txd->report);
 530                dev->stats.collisions += TX_EARLY_COLLISIONS(txd->report);
 531
 532                txb->skb = NULL;
 533                txb->ready = false;
 534                txd->report = 0;
 535
 536                done = (done + 1) % TX_DESC_COUNT;
 537                packets++;
 538        }
 539
 540        if (packets) {
 541                smp_mb__before_atomic();
 542                atomic_add(packets, &priv->tx_free);
 543                netdev_completed_queue(dev, packets, len);
 544                netif_wake_queue(dev);
 545                priv->tx_done = done;
 546        }
 547}
 548
 549static irqreturn_t nb8800_irq(int irq, void *dev_id)
 550{
 551        struct net_device *dev = dev_id;
 552        struct nb8800_priv *priv = netdev_priv(dev);
 553        irqreturn_t ret = IRQ_NONE;
 554        u32 val;
 555
 556        /* tx interrupt */
 557        val = nb8800_readl(priv, NB8800_TXC_SR);
 558        if (val) {
 559                nb8800_writel(priv, NB8800_TXC_SR, val);
 560
 561                if (val & TSR_DI)
 562                        nb8800_tx_dma_start_irq(dev);
 563
 564                if (val & TSR_TI)
 565                        napi_schedule_irqoff(&priv->napi);
 566
 567                if (unlikely(val & TSR_DE))
 568                        netdev_err(dev, "TX DMA error\n");
 569
 570                /* should never happen with automatic status retrieval */
 571                if (unlikely(val & TSR_TO))
 572                        netdev_err(dev, "TX Status FIFO overflow\n");
 573
 574                ret = IRQ_HANDLED;
 575        }
 576
 577        /* rx interrupt */
 578        val = nb8800_readl(priv, NB8800_RXC_SR);
 579        if (val) {
 580                nb8800_writel(priv, NB8800_RXC_SR, val);
 581
 582                if (likely(val & (RSR_RI | RSR_DI))) {
 583                        nb8800_writel(priv, NB8800_RX_ITR, priv->rx_itr_poll);
 584                        napi_schedule_irqoff(&priv->napi);
 585                }
 586
 587                if (unlikely(val & RSR_DE))
 588                        netdev_err(dev, "RX DMA error\n");
 589
 590                /* should never happen with automatic status retrieval */
 591                if (unlikely(val & RSR_RO))
 592                        netdev_err(dev, "RX Status FIFO overflow\n");
 593
 594                ret = IRQ_HANDLED;
 595        }
 596
 597        return ret;
 598}
 599
 600static void nb8800_mac_config(struct net_device *dev)
 601{
 602        struct nb8800_priv *priv = netdev_priv(dev);
 603        bool gigabit = priv->speed == SPEED_1000;
 604        u32 mac_mode_mask = RGMII_MODE | HALF_DUPLEX | GMAC_MODE;
 605        u32 mac_mode = 0;
 606        u32 slot_time;
 607        u32 phy_clk;
 608        u32 ict;
 609
 610        if (!priv->duplex)
 611                mac_mode |= HALF_DUPLEX;
 612
 613        if (gigabit) {
 614                if (phy_interface_is_rgmii(dev->phydev))
 615                        mac_mode |= RGMII_MODE;
 616
 617                mac_mode |= GMAC_MODE;
 618                phy_clk = 125000000;
 619
 620                /* Should be 512 but register is only 8 bits */
 621                slot_time = 255;
 622        } else {
 623                phy_clk = 25000000;
 624                slot_time = 128;
 625        }
 626
 627        ict = DIV_ROUND_UP(phy_clk, clk_get_rate(priv->clk));
 628
 629        nb8800_writeb(priv, NB8800_IC_THRESHOLD, ict);
 630        nb8800_writeb(priv, NB8800_SLOT_TIME, slot_time);
 631        nb8800_maskb(priv, NB8800_MAC_MODE, mac_mode_mask, mac_mode);
 632}
 633
 634static void nb8800_pause_config(struct net_device *dev)
 635{
 636        struct nb8800_priv *priv = netdev_priv(dev);
 637        struct phy_device *phydev = dev->phydev;
 638        u32 rxcr;
 639
 640        if (priv->pause_aneg) {
 641                if (!phydev || !phydev->link)
 642                        return;
 643
 644                priv->pause_rx = phydev->pause;
 645                priv->pause_tx = phydev->pause ^ phydev->asym_pause;
 646        }
 647
 648        nb8800_modb(priv, NB8800_RX_CTL, RX_PAUSE_EN, priv->pause_rx);
 649
 650        rxcr = nb8800_readl(priv, NB8800_RXC_CR);
 651        if (!!(rxcr & RCR_FL) == priv->pause_tx)
 652                return;
 653
 654        if (netif_running(dev)) {
 655                napi_disable(&priv->napi);
 656                netif_tx_lock_bh(dev);
 657                nb8800_dma_stop(dev);
 658                nb8800_modl(priv, NB8800_RXC_CR, RCR_FL, priv->pause_tx);
 659                nb8800_start_rx(dev);
 660                netif_tx_unlock_bh(dev);
 661                napi_enable(&priv->napi);
 662        } else {
 663                nb8800_modl(priv, NB8800_RXC_CR, RCR_FL, priv->pause_tx);
 664        }
 665}
 666
 667static void nb8800_link_reconfigure(struct net_device *dev)
 668{
 669        struct nb8800_priv *priv = netdev_priv(dev);
 670        struct phy_device *phydev = dev->phydev;
 671        int change = 0;
 672
 673        if (phydev->link) {
 674                if (phydev->speed != priv->speed) {
 675                        priv->speed = phydev->speed;
 676                        change = 1;
 677                }
 678
 679                if (phydev->duplex != priv->duplex) {
 680                        priv->duplex = phydev->duplex;
 681                        change = 1;
 682                }
 683
 684                if (change)
 685                        nb8800_mac_config(dev);
 686
 687                nb8800_pause_config(dev);
 688        }
 689
 690        if (phydev->link != priv->link) {
 691                priv->link = phydev->link;
 692                change = 1;
 693        }
 694
 695        if (change)
 696                phy_print_status(phydev);
 697}
 698
 699static void nb8800_update_mac_addr(struct net_device *dev)
 700{
 701        struct nb8800_priv *priv = netdev_priv(dev);
 702        int i;
 703
 704        for (i = 0; i < ETH_ALEN; i++)
 705                nb8800_writeb(priv, NB8800_SRC_ADDR(i), dev->dev_addr[i]);
 706
 707        for (i = 0; i < ETH_ALEN; i++)
 708                nb8800_writeb(priv, NB8800_UC_ADDR(i), dev->dev_addr[i]);
 709}
 710
 711static int nb8800_set_mac_address(struct net_device *dev, void *addr)
 712{
 713        struct sockaddr *sock = addr;
 714
 715        if (netif_running(dev))
 716                return -EBUSY;
 717
 718        ether_addr_copy(dev->dev_addr, sock->sa_data);
 719        nb8800_update_mac_addr(dev);
 720
 721        return 0;
 722}
 723
 724static void nb8800_mc_init(struct net_device *dev, int val)
 725{
 726        struct nb8800_priv *priv = netdev_priv(dev);
 727
 728        nb8800_writeb(priv, NB8800_MC_INIT, val);
 729        readb_poll_timeout_atomic(priv->base + NB8800_MC_INIT, val, !val,
 730                                  1, 1000);
 731}
 732
 733static void nb8800_set_rx_mode(struct net_device *dev)
 734{
 735        struct nb8800_priv *priv = netdev_priv(dev);
 736        struct netdev_hw_addr *ha;
 737        int i;
 738
 739        if (dev->flags & (IFF_PROMISC | IFF_ALLMULTI)) {
 740                nb8800_mac_af(dev, false);
 741                return;
 742        }
 743
 744        nb8800_mac_af(dev, true);
 745        nb8800_mc_init(dev, 0);
 746
 747        netdev_for_each_mc_addr(ha, dev) {
 748                for (i = 0; i < ETH_ALEN; i++)
 749                        nb8800_writeb(priv, NB8800_MC_ADDR(i), ha->addr[i]);
 750
 751                nb8800_mc_init(dev, 0xff);
 752        }
 753}
 754
 755#define RX_DESC_SIZE (RX_DESC_COUNT * sizeof(struct nb8800_rx_desc))
 756#define TX_DESC_SIZE (TX_DESC_COUNT * sizeof(struct nb8800_tx_desc))
 757
 758static void nb8800_dma_free(struct net_device *dev)
 759{
 760        struct nb8800_priv *priv = netdev_priv(dev);
 761        unsigned int i;
 762
 763        if (priv->rx_bufs) {
 764                for (i = 0; i < RX_DESC_COUNT; i++)
 765                        if (priv->rx_bufs[i].page)
 766                                put_page(priv->rx_bufs[i].page);
 767
 768                kfree(priv->rx_bufs);
 769                priv->rx_bufs = NULL;
 770        }
 771
 772        if (priv->tx_bufs) {
 773                for (i = 0; i < TX_DESC_COUNT; i++)
 774                        kfree_skb(priv->tx_bufs[i].skb);
 775
 776                kfree(priv->tx_bufs);
 777                priv->tx_bufs = NULL;
 778        }
 779
 780        if (priv->rx_descs) {
 781                dma_free_coherent(dev->dev.parent, RX_DESC_SIZE, priv->rx_descs,
 782                                  priv->rx_desc_dma);
 783                priv->rx_descs = NULL;
 784        }
 785
 786        if (priv->tx_descs) {
 787                dma_free_coherent(dev->dev.parent, TX_DESC_SIZE, priv->tx_descs,
 788                                  priv->tx_desc_dma);
 789                priv->tx_descs = NULL;
 790        }
 791}
 792
 793static void nb8800_dma_reset(struct net_device *dev)
 794{
 795        struct nb8800_priv *priv = netdev_priv(dev);
 796        struct nb8800_rx_desc *rxd;
 797        struct nb8800_tx_desc *txd;
 798        unsigned int i;
 799
 800        for (i = 0; i < RX_DESC_COUNT; i++) {
 801                dma_addr_t rx_dma = priv->rx_desc_dma + i * sizeof(*rxd);
 802
 803                rxd = &priv->rx_descs[i];
 804                rxd->desc.n_addr = rx_dma + sizeof(*rxd);
 805                rxd->desc.r_addr =
 806                        rx_dma + offsetof(struct nb8800_rx_desc, report);
 807                rxd->desc.config = priv->rx_dma_config;
 808                rxd->report = 0;
 809        }
 810
 811        rxd->desc.n_addr = priv->rx_desc_dma;
 812        rxd->desc.config |= DESC_EOC;
 813
 814        priv->rx_eoc = RX_DESC_COUNT - 1;
 815
 816        for (i = 0; i < TX_DESC_COUNT; i++) {
 817                struct nb8800_tx_buf *txb = &priv->tx_bufs[i];
 818                dma_addr_t r_dma = txb->dma_desc +
 819                        offsetof(struct nb8800_tx_desc, report);
 820
 821                txd = &priv->tx_descs[i];
 822                txd->desc[0].r_addr = r_dma;
 823                txd->desc[1].r_addr = r_dma;
 824                txd->report = 0;
 825        }
 826
 827        priv->tx_next = 0;
 828        priv->tx_queue = 0;
 829        priv->tx_done = 0;
 830        atomic_set(&priv->tx_free, TX_DESC_COUNT);
 831
 832        nb8800_writel(priv, NB8800_RX_DESC_ADDR, priv->rx_desc_dma);
 833
 834        wmb();          /* ensure all setup is written before starting */
 835}
 836
 837static int nb8800_dma_init(struct net_device *dev)
 838{
 839        struct nb8800_priv *priv = netdev_priv(dev);
 840        unsigned int n_rx = RX_DESC_COUNT;
 841        unsigned int n_tx = TX_DESC_COUNT;
 842        unsigned int i;
 843        int err;
 844
 845        priv->rx_descs = dma_alloc_coherent(dev->dev.parent, RX_DESC_SIZE,
 846                                            &priv->rx_desc_dma, GFP_KERNEL);
 847        if (!priv->rx_descs)
 848                goto err_out;
 849
 850        priv->rx_bufs = kcalloc(n_rx, sizeof(*priv->rx_bufs), GFP_KERNEL);
 851        if (!priv->rx_bufs)
 852                goto err_out;
 853
 854        for (i = 0; i < n_rx; i++) {
 855                err = nb8800_alloc_rx(dev, i, false);
 856                if (err)
 857                        goto err_out;
 858        }
 859
 860        priv->tx_descs = dma_alloc_coherent(dev->dev.parent, TX_DESC_SIZE,
 861                                            &priv->tx_desc_dma, GFP_KERNEL);
 862        if (!priv->tx_descs)
 863                goto err_out;
 864
 865        priv->tx_bufs = kcalloc(n_tx, sizeof(*priv->tx_bufs), GFP_KERNEL);
 866        if (!priv->tx_bufs)
 867                goto err_out;
 868
 869        for (i = 0; i < n_tx; i++)
 870                priv->tx_bufs[i].dma_desc =
 871                        priv->tx_desc_dma + i * sizeof(struct nb8800_tx_desc);
 872
 873        nb8800_dma_reset(dev);
 874
 875        return 0;
 876
 877err_out:
 878        nb8800_dma_free(dev);
 879
 880        return -ENOMEM;
 881}
 882
 883static int nb8800_dma_stop(struct net_device *dev)
 884{
 885        struct nb8800_priv *priv = netdev_priv(dev);
 886        struct nb8800_tx_buf *txb = &priv->tx_bufs[0];
 887        struct nb8800_tx_desc *txd = &priv->tx_descs[0];
 888        int retry = 5;
 889        u32 txcr;
 890        u32 rxcr;
 891        int err;
 892        unsigned int i;
 893
 894        /* wait for tx to finish */
 895        err = readl_poll_timeout_atomic(priv->base + NB8800_TXC_CR, txcr,
 896                                        !(txcr & TCR_EN) &&
 897                                        priv->tx_done == priv->tx_next,
 898                                        1000, 1000000);
 899        if (err)
 900                return err;
 901
 902        /* The rx DMA only stops if it reaches the end of chain.
 903         * To make this happen, we set the EOC flag on all rx
 904         * descriptors, put the device in loopback mode, and send
 905         * a few dummy frames.  The interrupt handler will ignore
 906         * these since NAPI is disabled and no real frames are in
 907         * the tx queue.
 908         */
 909
 910        for (i = 0; i < RX_DESC_COUNT; i++)
 911                priv->rx_descs[i].desc.config |= DESC_EOC;
 912
 913        txd->desc[0].s_addr =
 914                txb->dma_desc + offsetof(struct nb8800_tx_desc, buf);
 915        txd->desc[0].config = DESC_BTS(2) | DESC_DS | DESC_EOF | DESC_EOC | 8;
 916        memset(txd->buf, 0, sizeof(txd->buf));
 917
 918        nb8800_mac_af(dev, false);
 919        nb8800_setb(priv, NB8800_MAC_MODE, LOOPBACK_EN);
 920
 921        do {
 922                nb8800_writel(priv, NB8800_TX_DESC_ADDR, txb->dma_desc);
 923                wmb();
 924                nb8800_writel(priv, NB8800_TXC_CR, txcr | TCR_EN);
 925
 926                err = readl_poll_timeout_atomic(priv->base + NB8800_RXC_CR,
 927                                                rxcr, !(rxcr & RCR_EN),
 928                                                1000, 100000);
 929        } while (err && --retry);
 930
 931        nb8800_mac_af(dev, true);
 932        nb8800_clearb(priv, NB8800_MAC_MODE, LOOPBACK_EN);
 933        nb8800_dma_reset(dev);
 934
 935        return retry ? 0 : -ETIMEDOUT;
 936}
 937
 938static void nb8800_pause_adv(struct net_device *dev)
 939{
 940        struct nb8800_priv *priv = netdev_priv(dev);
 941        struct phy_device *phydev = dev->phydev;
 942
 943        if (!phydev)
 944                return;
 945
 946        phy_set_asym_pause(phydev, priv->pause_rx, priv->pause_tx);
 947}
 948
 949static int nb8800_open(struct net_device *dev)
 950{
 951        struct nb8800_priv *priv = netdev_priv(dev);
 952        struct phy_device *phydev;
 953        int err;
 954
 955        /* clear any pending interrupts */
 956        nb8800_writel(priv, NB8800_RXC_SR, 0xf);
 957        nb8800_writel(priv, NB8800_TXC_SR, 0xf);
 958
 959        err = nb8800_dma_init(dev);
 960        if (err)
 961                return err;
 962
 963        err = request_irq(dev->irq, nb8800_irq, 0, dev_name(&dev->dev), dev);
 964        if (err)
 965                goto err_free_dma;
 966
 967        nb8800_mac_rx(dev, true);
 968        nb8800_mac_tx(dev, true);
 969
 970        phydev = of_phy_connect(dev, priv->phy_node,
 971                                nb8800_link_reconfigure, 0,
 972                                priv->phy_mode);
 973        if (!phydev) {
 974                err = -ENODEV;
 975                goto err_free_irq;
 976        }
 977
 978        nb8800_pause_adv(dev);
 979
 980        netdev_reset_queue(dev);
 981        napi_enable(&priv->napi);
 982        netif_start_queue(dev);
 983
 984        nb8800_start_rx(dev);
 985        phy_start(phydev);
 986
 987        return 0;
 988
 989err_free_irq:
 990        free_irq(dev->irq, dev);
 991err_free_dma:
 992        nb8800_dma_free(dev);
 993
 994        return err;
 995}
 996
 997static int nb8800_stop(struct net_device *dev)
 998{
 999        struct nb8800_priv *priv = netdev_priv(dev);
1000        struct phy_device *phydev = dev->phydev;
1001
1002        phy_stop(phydev);
1003
1004        netif_stop_queue(dev);
1005        napi_disable(&priv->napi);
1006
1007        nb8800_dma_stop(dev);
1008        nb8800_mac_rx(dev, false);
1009        nb8800_mac_tx(dev, false);
1010
1011        phy_disconnect(phydev);
1012
1013        free_irq(dev->irq, dev);
1014
1015        nb8800_dma_free(dev);
1016
1017        return 0;
1018}
1019
1020static int nb8800_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1021{
1022        return phy_mii_ioctl(dev->phydev, rq, cmd);
1023}
1024
1025static const struct net_device_ops nb8800_netdev_ops = {
1026        .ndo_open               = nb8800_open,
1027        .ndo_stop               = nb8800_stop,
1028        .ndo_start_xmit         = nb8800_xmit,
1029        .ndo_set_mac_address    = nb8800_set_mac_address,
1030        .ndo_set_rx_mode        = nb8800_set_rx_mode,
1031        .ndo_do_ioctl           = nb8800_ioctl,
1032        .ndo_validate_addr      = eth_validate_addr,
1033};
1034
1035static void nb8800_get_pauseparam(struct net_device *dev,
1036                                  struct ethtool_pauseparam *pp)
1037{
1038        struct nb8800_priv *priv = netdev_priv(dev);
1039
1040        pp->autoneg = priv->pause_aneg;
1041        pp->rx_pause = priv->pause_rx;
1042        pp->tx_pause = priv->pause_tx;
1043}
1044
1045static int nb8800_set_pauseparam(struct net_device *dev,
1046                                 struct ethtool_pauseparam *pp)
1047{
1048        struct nb8800_priv *priv = netdev_priv(dev);
1049        struct phy_device *phydev = dev->phydev;
1050
1051        priv->pause_aneg = pp->autoneg;
1052        priv->pause_rx = pp->rx_pause;
1053        priv->pause_tx = pp->tx_pause;
1054
1055        nb8800_pause_adv(dev);
1056
1057        if (!priv->pause_aneg)
1058                nb8800_pause_config(dev);
1059        else if (phydev)
1060                phy_start_aneg(phydev);
1061
1062        return 0;
1063}
1064
1065static const char nb8800_stats_names[][ETH_GSTRING_LEN] = {
1066        "rx_bytes_ok",
1067        "rx_frames_ok",
1068        "rx_undersize_frames",
1069        "rx_fragment_frames",
1070        "rx_64_byte_frames",
1071        "rx_127_byte_frames",
1072        "rx_255_byte_frames",
1073        "rx_511_byte_frames",
1074        "rx_1023_byte_frames",
1075        "rx_max_size_frames",
1076        "rx_oversize_frames",
1077        "rx_bad_fcs_frames",
1078        "rx_broadcast_frames",
1079        "rx_multicast_frames",
1080        "rx_control_frames",
1081        "rx_pause_frames",
1082        "rx_unsup_control_frames",
1083        "rx_align_error_frames",
1084        "rx_overrun_frames",
1085        "rx_jabber_frames",
1086        "rx_bytes",
1087        "rx_frames",
1088
1089        "tx_bytes_ok",
1090        "tx_frames_ok",
1091        "tx_64_byte_frames",
1092        "tx_127_byte_frames",
1093        "tx_255_byte_frames",
1094        "tx_511_byte_frames",
1095        "tx_1023_byte_frames",
1096        "tx_max_size_frames",
1097        "tx_oversize_frames",
1098        "tx_broadcast_frames",
1099        "tx_multicast_frames",
1100        "tx_control_frames",
1101        "tx_pause_frames",
1102        "tx_underrun_frames",
1103        "tx_single_collision_frames",
1104        "tx_multi_collision_frames",
1105        "tx_deferred_collision_frames",
1106        "tx_late_collision_frames",
1107        "tx_excessive_collision_frames",
1108        "tx_bytes",
1109        "tx_frames",
1110        "tx_collisions",
1111};
1112
1113#define NB8800_NUM_STATS ARRAY_SIZE(nb8800_stats_names)
1114
1115static int nb8800_get_sset_count(struct net_device *dev, int sset)
1116{
1117        if (sset == ETH_SS_STATS)
1118                return NB8800_NUM_STATS;
1119
1120        return -EOPNOTSUPP;
1121}
1122
1123static void nb8800_get_strings(struct net_device *dev, u32 sset, u8 *buf)
1124{
1125        if (sset == ETH_SS_STATS)
1126                memcpy(buf, &nb8800_stats_names, sizeof(nb8800_stats_names));
1127}
1128
1129static u32 nb8800_read_stat(struct net_device *dev, int index)
1130{
1131        struct nb8800_priv *priv = netdev_priv(dev);
1132
1133        nb8800_writeb(priv, NB8800_STAT_INDEX, index);
1134
1135        return nb8800_readl(priv, NB8800_STAT_DATA);
1136}
1137
1138static void nb8800_get_ethtool_stats(struct net_device *dev,
1139                                     struct ethtool_stats *estats, u64 *st)
1140{
1141        unsigned int i;
1142        u32 rx, tx;
1143
1144        for (i = 0; i < NB8800_NUM_STATS / 2; i++) {
1145                rx = nb8800_read_stat(dev, i);
1146                tx = nb8800_read_stat(dev, i | 0x80);
1147                st[i] = rx;
1148                st[i + NB8800_NUM_STATS / 2] = tx;
1149        }
1150}
1151
1152static const struct ethtool_ops nb8800_ethtool_ops = {
1153        .nway_reset             = phy_ethtool_nway_reset,
1154        .get_link               = ethtool_op_get_link,
1155        .get_pauseparam         = nb8800_get_pauseparam,
1156        .set_pauseparam         = nb8800_set_pauseparam,
1157        .get_sset_count         = nb8800_get_sset_count,
1158        .get_strings            = nb8800_get_strings,
1159        .get_ethtool_stats      = nb8800_get_ethtool_stats,
1160        .get_link_ksettings     = phy_ethtool_get_link_ksettings,
1161        .set_link_ksettings     = phy_ethtool_set_link_ksettings,
1162};
1163
1164static int nb8800_hw_init(struct net_device *dev)
1165{
1166        struct nb8800_priv *priv = netdev_priv(dev);
1167        u32 val;
1168
1169        val = TX_RETRY_EN | TX_PAD_EN | TX_APPEND_FCS;
1170        nb8800_writeb(priv, NB8800_TX_CTL1, val);
1171
1172        /* Collision retry count */
1173        nb8800_writeb(priv, NB8800_TX_CTL2, 5);
1174
1175        val = RX_PAD_STRIP | RX_AF_EN;
1176        nb8800_writeb(priv, NB8800_RX_CTL, val);
1177
1178        /* Chosen by fair dice roll */
1179        nb8800_writeb(priv, NB8800_RANDOM_SEED, 4);
1180
1181        /* TX cycles per deferral period */
1182        nb8800_writeb(priv, NB8800_TX_SDP, 12);
1183
1184        /* The following three threshold values have been
1185         * experimentally determined for good results.
1186         */
1187
1188        /* RX/TX FIFO threshold for partial empty (64-bit entries) */
1189        nb8800_writeb(priv, NB8800_PE_THRESHOLD, 0);
1190
1191        /* RX/TX FIFO threshold for partial full (64-bit entries) */
1192        nb8800_writeb(priv, NB8800_PF_THRESHOLD, 255);
1193
1194        /* Buffer size for transmit (64-bit entries) */
1195        nb8800_writeb(priv, NB8800_TX_BUFSIZE, 64);
1196
1197        /* Configure tx DMA */
1198
1199        val = nb8800_readl(priv, NB8800_TXC_CR);
1200        val &= TCR_LE;          /* keep endian setting */
1201        val |= TCR_DM;          /* DMA descriptor mode */
1202        val |= TCR_RS;          /* automatically store tx status  */
1203        val |= TCR_DIE;         /* interrupt on DMA chain completion */
1204        val |= TCR_TFI(7);      /* interrupt after 7 frames transmitted */
1205        val |= TCR_BTS(2);      /* 32-byte bus transaction size */
1206        nb8800_writel(priv, NB8800_TXC_CR, val);
1207
1208        /* TX complete interrupt after 10 ms or 7 frames (see above) */
1209        val = clk_get_rate(priv->clk) / 100;
1210        nb8800_writel(priv, NB8800_TX_ITR, val);
1211
1212        /* Configure rx DMA */
1213
1214        val = nb8800_readl(priv, NB8800_RXC_CR);
1215        val &= RCR_LE;          /* keep endian setting */
1216        val |= RCR_DM;          /* DMA descriptor mode */
1217        val |= RCR_RS;          /* automatically store rx status */
1218        val |= RCR_DIE;         /* interrupt at end of DMA chain */
1219        val |= RCR_RFI(7);      /* interrupt after 7 frames received */
1220        val |= RCR_BTS(2);      /* 32-byte bus transaction size */
1221        nb8800_writel(priv, NB8800_RXC_CR, val);
1222
1223        /* The rx interrupt can fire before the DMA has completed
1224         * unless a small delay is added.  50 us is hopefully enough.
1225         */
1226        priv->rx_itr_irq = clk_get_rate(priv->clk) / 20000;
1227
1228        /* In NAPI poll mode we want to disable interrupts, but the
1229         * hardware does not permit this.  Delay 10 ms instead.
1230         */
1231        priv->rx_itr_poll = clk_get_rate(priv->clk) / 100;
1232
1233        nb8800_writel(priv, NB8800_RX_ITR, priv->rx_itr_irq);
1234
1235        priv->rx_dma_config = RX_BUF_SIZE | DESC_BTS(2) | DESC_DS | DESC_EOF;
1236
1237        /* Flow control settings */
1238
1239        /* Pause time of 0.1 ms */
1240        val = 100000 / 512;
1241        nb8800_writeb(priv, NB8800_PQ1, val >> 8);
1242        nb8800_writeb(priv, NB8800_PQ2, val & 0xff);
1243
1244        /* Auto-negotiate by default */
1245        priv->pause_aneg = true;
1246        priv->pause_rx = true;
1247        priv->pause_tx = true;
1248
1249        nb8800_mc_init(dev, 0);
1250
1251        return 0;
1252}
1253
1254static int nb8800_tangox_init(struct net_device *dev)
1255{
1256        struct nb8800_priv *priv = netdev_priv(dev);
1257        u32 pad_mode = PAD_MODE_MII;
1258
1259        switch (priv->phy_mode) {
1260        case PHY_INTERFACE_MODE_MII:
1261        case PHY_INTERFACE_MODE_GMII:
1262                pad_mode = PAD_MODE_MII;
1263                break;
1264
1265        case PHY_INTERFACE_MODE_RGMII:
1266        case PHY_INTERFACE_MODE_RGMII_ID:
1267        case PHY_INTERFACE_MODE_RGMII_RXID:
1268        case PHY_INTERFACE_MODE_RGMII_TXID:
1269                pad_mode = PAD_MODE_RGMII;
1270                break;
1271
1272        default:
1273                dev_err(dev->dev.parent, "unsupported phy mode %s\n",
1274                        phy_modes(priv->phy_mode));
1275                return -EINVAL;
1276        }
1277
1278        nb8800_writeb(priv, NB8800_TANGOX_PAD_MODE, pad_mode);
1279
1280        return 0;
1281}
1282
1283static int nb8800_tangox_reset(struct net_device *dev)
1284{
1285        struct nb8800_priv *priv = netdev_priv(dev);
1286        int clk_div;
1287
1288        nb8800_writeb(priv, NB8800_TANGOX_RESET, 0);
1289        usleep_range(1000, 10000);
1290        nb8800_writeb(priv, NB8800_TANGOX_RESET, 1);
1291
1292        wmb();          /* ensure reset is cleared before proceeding */
1293
1294        clk_div = DIV_ROUND_UP(clk_get_rate(priv->clk), 2 * MAX_MDC_CLOCK);
1295        nb8800_writew(priv, NB8800_TANGOX_MDIO_CLKDIV, clk_div);
1296
1297        return 0;
1298}
1299
1300static const struct nb8800_ops nb8800_tangox_ops = {
1301        .init   = nb8800_tangox_init,
1302        .reset  = nb8800_tangox_reset,
1303};
1304
1305static int nb8800_tango4_init(struct net_device *dev)
1306{
1307        struct nb8800_priv *priv = netdev_priv(dev);
1308        int err;
1309
1310        err = nb8800_tangox_init(dev);
1311        if (err)
1312                return err;
1313
1314        /* On tango4 interrupt on DMA completion per frame works and gives
1315         * better performance despite generating more rx interrupts.
1316         */
1317
1318        /* Disable unnecessary interrupt on rx completion */
1319        nb8800_clearl(priv, NB8800_RXC_CR, RCR_RFI(7));
1320
1321        /* Request interrupt on descriptor DMA completion */
1322        priv->rx_dma_config |= DESC_ID;
1323
1324        return 0;
1325}
1326
1327static const struct nb8800_ops nb8800_tango4_ops = {
1328        .init   = nb8800_tango4_init,
1329        .reset  = nb8800_tangox_reset,
1330};
1331
1332static const struct of_device_id nb8800_dt_ids[] = {
1333        {
1334                .compatible = "aurora,nb8800",
1335        },
1336        {
1337                .compatible = "sigma,smp8642-ethernet",
1338                .data = &nb8800_tangox_ops,
1339        },
1340        {
1341                .compatible = "sigma,smp8734-ethernet",
1342                .data = &nb8800_tango4_ops,
1343        },
1344        { }
1345};
1346MODULE_DEVICE_TABLE(of, nb8800_dt_ids);
1347
1348static int nb8800_probe(struct platform_device *pdev)
1349{
1350        const struct of_device_id *match;
1351        const struct nb8800_ops *ops = NULL;
1352        struct nb8800_priv *priv;
1353        struct resource *res;
1354        struct net_device *dev;
1355        struct mii_bus *bus;
1356        const unsigned char *mac;
1357        void __iomem *base;
1358        int irq;
1359        int ret;
1360
1361        match = of_match_device(nb8800_dt_ids, &pdev->dev);
1362        if (match)
1363                ops = match->data;
1364
1365        irq = platform_get_irq(pdev, 0);
1366        if (irq <= 0) {
1367                dev_err(&pdev->dev, "No IRQ\n");
1368                return -EINVAL;
1369        }
1370
1371        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1372        base = devm_ioremap_resource(&pdev->dev, res);
1373        if (IS_ERR(base))
1374                return PTR_ERR(base);
1375
1376        dev_dbg(&pdev->dev, "AU-NB8800 Ethernet at %pa\n", &res->start);
1377
1378        dev = alloc_etherdev(sizeof(*priv));
1379        if (!dev)
1380                return -ENOMEM;
1381
1382        platform_set_drvdata(pdev, dev);
1383        SET_NETDEV_DEV(dev, &pdev->dev);
1384
1385        priv = netdev_priv(dev);
1386        priv->base = base;
1387
1388        priv->phy_mode = of_get_phy_mode(pdev->dev.of_node);
1389        if (priv->phy_mode < 0)
1390                priv->phy_mode = PHY_INTERFACE_MODE_RGMII;
1391
1392        priv->clk = devm_clk_get(&pdev->dev, NULL);
1393        if (IS_ERR(priv->clk)) {
1394                dev_err(&pdev->dev, "failed to get clock\n");
1395                ret = PTR_ERR(priv->clk);
1396                goto err_free_dev;
1397        }
1398
1399        ret = clk_prepare_enable(priv->clk);
1400        if (ret)
1401                goto err_free_dev;
1402
1403        spin_lock_init(&priv->tx_lock);
1404
1405        if (ops && ops->reset) {
1406                ret = ops->reset(dev);
1407                if (ret)
1408                        goto err_disable_clk;
1409        }
1410
1411        bus = devm_mdiobus_alloc(&pdev->dev);
1412        if (!bus) {
1413                ret = -ENOMEM;
1414                goto err_disable_clk;
1415        }
1416
1417        bus->name = "nb8800-mii";
1418        bus->read = nb8800_mdio_read;
1419        bus->write = nb8800_mdio_write;
1420        bus->parent = &pdev->dev;
1421        snprintf(bus->id, MII_BUS_ID_SIZE, "%lx.nb8800-mii",
1422                 (unsigned long)res->start);
1423        bus->priv = priv;
1424
1425        ret = of_mdiobus_register(bus, pdev->dev.of_node);
1426        if (ret) {
1427                dev_err(&pdev->dev, "failed to register MII bus\n");
1428                goto err_disable_clk;
1429        }
1430
1431        if (of_phy_is_fixed_link(pdev->dev.of_node)) {
1432                ret = of_phy_register_fixed_link(pdev->dev.of_node);
1433                if (ret < 0) {
1434                        dev_err(&pdev->dev, "bad fixed-link spec\n");
1435                        goto err_free_bus;
1436                }
1437                priv->phy_node = of_node_get(pdev->dev.of_node);
1438        }
1439
1440        if (!priv->phy_node)
1441                priv->phy_node = of_parse_phandle(pdev->dev.of_node,
1442                                                  "phy-handle", 0);
1443
1444        if (!priv->phy_node) {
1445                dev_err(&pdev->dev, "no PHY specified\n");
1446                ret = -ENODEV;
1447                goto err_free_bus;
1448        }
1449
1450        priv->mii_bus = bus;
1451
1452        ret = nb8800_hw_init(dev);
1453        if (ret)
1454                goto err_deregister_fixed_link;
1455
1456        if (ops && ops->init) {
1457                ret = ops->init(dev);
1458                if (ret)
1459                        goto err_deregister_fixed_link;
1460        }
1461
1462        dev->netdev_ops = &nb8800_netdev_ops;
1463        dev->ethtool_ops = &nb8800_ethtool_ops;
1464        dev->flags |= IFF_MULTICAST;
1465        dev->irq = irq;
1466
1467        mac = of_get_mac_address(pdev->dev.of_node);
1468        if (mac)
1469                ether_addr_copy(dev->dev_addr, mac);
1470
1471        if (!is_valid_ether_addr(dev->dev_addr))
1472                eth_hw_addr_random(dev);
1473
1474        nb8800_update_mac_addr(dev);
1475
1476        netif_carrier_off(dev);
1477
1478        ret = register_netdev(dev);
1479        if (ret) {
1480                netdev_err(dev, "failed to register netdev\n");
1481                goto err_free_dma;
1482        }
1483
1484        netif_napi_add(dev, &priv->napi, nb8800_poll, NAPI_POLL_WEIGHT);
1485
1486        netdev_info(dev, "MAC address %pM\n", dev->dev_addr);
1487
1488        return 0;
1489
1490err_free_dma:
1491        nb8800_dma_free(dev);
1492err_deregister_fixed_link:
1493        if (of_phy_is_fixed_link(pdev->dev.of_node))
1494                of_phy_deregister_fixed_link(pdev->dev.of_node);
1495err_free_bus:
1496        of_node_put(priv->phy_node);
1497        mdiobus_unregister(bus);
1498err_disable_clk:
1499        clk_disable_unprepare(priv->clk);
1500err_free_dev:
1501        free_netdev(dev);
1502
1503        return ret;
1504}
1505
1506static int nb8800_remove(struct platform_device *pdev)
1507{
1508        struct net_device *ndev = platform_get_drvdata(pdev);
1509        struct nb8800_priv *priv = netdev_priv(ndev);
1510
1511        unregister_netdev(ndev);
1512        if (of_phy_is_fixed_link(pdev->dev.of_node))
1513                of_phy_deregister_fixed_link(pdev->dev.of_node);
1514        of_node_put(priv->phy_node);
1515
1516        mdiobus_unregister(priv->mii_bus);
1517
1518        clk_disable_unprepare(priv->clk);
1519
1520        nb8800_dma_free(ndev);
1521        free_netdev(ndev);
1522
1523        return 0;
1524}
1525
1526static struct platform_driver nb8800_driver = {
1527        .driver = {
1528                .name           = "nb8800",
1529                .of_match_table = nb8800_dt_ids,
1530        },
1531        .probe  = nb8800_probe,
1532        .remove = nb8800_remove,
1533};
1534
1535module_platform_driver(nb8800_driver);
1536
1537MODULE_DESCRIPTION("Aurora AU-NB8800 Ethernet driver");
1538MODULE_AUTHOR("Mans Rullgard <mans@mansr.com>");
1539MODULE_LICENSE("GPL");
1540