LXR linux/drivers/net/ethernet/intel/ice/ice.h

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/* Copyright (c) 2018, Intel Corporation. */
   3
   4#ifndef _ICE_H_
   5#define _ICE_H_
   6
   7#include <linux/types.h>
   8#include <linux/errno.h>
   9#include <linux/kernel.h>
  10#include <linux/module.h>
  11#include <linux/firmware.h>
  12#include <linux/netdevice.h>
  13#include <linux/compiler.h>
  14#include <linux/etherdevice.h>
  15#include <linux/skbuff.h>
  16#include <linux/cpumask.h>
  17#include <linux/rtnetlink.h>
  18#include <linux/if_vlan.h>
  19#include <linux/dma-mapping.h>
  20#include <linux/pci.h>
  21#include <linux/workqueue.h>
  22#include <linux/aer.h>
  23#include <linux/interrupt.h>
  24#include <linux/ethtool.h>
  25#include <linux/timer.h>
  26#include <linux/delay.h>
  27#include <linux/bitmap.h>
  28#include <linux/log2.h>
  29#include <linux/ip.h>
  30#include <linux/sctp.h>
  31#include <linux/ipv6.h>
  32#include <linux/pkt_sched.h>
  33#include <linux/if_bridge.h>
  34#include <linux/ctype.h>
  35#include <linux/bpf.h>
  36#include <linux/avf/virtchnl.h>
  37#include <linux/cpu_rmap.h>
  38#include <net/devlink.h>
  39#include <net/ipv6.h>
  40#include <net/xdp_sock.h>
  41#include <net/geneve.h>
  42#include <net/gre.h>
  43#include <net/udp_tunnel.h>
  44#include <net/vxlan.h>
  45#include "ice_devids.h"
  46#include "ice_type.h"
  47#include "ice_txrx.h"
  48#include "ice_dcb.h"
  49#include "ice_switch.h"
  50#include "ice_common.h"
  51#include "ice_sched.h"
  52#include "ice_virtchnl_pf.h"
  53#include "ice_sriov.h"
  54#include "ice_fdir.h"
  55#include "ice_xsk.h"
  56#include "ice_arfs.h"
  57
  58extern const char ice_drv_ver[];
  59#define ICE_BAR0                0
  60#define ICE_REQ_DESC_MULTIPLE   32
  61#define ICE_MIN_NUM_DESC        64
  62#define ICE_MAX_NUM_DESC        8160
  63#define ICE_DFLT_MIN_RX_DESC    512
  64#define ICE_DFLT_NUM_TX_DESC    256
  65#define ICE_DFLT_NUM_RX_DESC    2048
  66
  67#define ICE_DFLT_TRAFFIC_CLASS  BIT(0)
  68#define ICE_INT_NAME_STR_LEN    (IFNAMSIZ + 16)
  69#define ICE_AQ_LEN              64
  70#define ICE_MBXSQ_LEN           64
  71#define ICE_MIN_MSIX            2
  72#define ICE_FDIR_MSIX           1
  73#define ICE_NO_VSI              0xffff
  74#define ICE_VSI_MAP_CONTIG      0
  75#define ICE_VSI_MAP_SCATTER     1
  76#define ICE_MAX_SCATTER_TXQS    16
  77#define ICE_MAX_SCATTER_RXQS    16
  78#define ICE_Q_WAIT_RETRY_LIMIT  10
  79#define ICE_Q_WAIT_MAX_RETRY    (5 * ICE_Q_WAIT_RETRY_LIMIT)
  80#define ICE_MAX_LG_RSS_QS       256
  81#define ICE_RES_VALID_BIT       0x8000
  82#define ICE_RES_MISC_VEC_ID     (ICE_RES_VALID_BIT - 1)
  83#define ICE_INVAL_Q_INDEX       0xffff
  84#define ICE_INVAL_VFID          256
  85
  86#define ICE_MAX_RESET_WAIT              20
  87
  88#define ICE_VSIQF_HKEY_ARRAY_SIZE       ((VSIQF_HKEY_MAX_INDEX + 1) *   4)
  89
  90#define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
  91
  92#define ICE_MAX_MTU     (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD)
  93
  94#define ICE_UP_TABLE_TRANSLATE(val, i) \
  95                (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \
  96                  ICE_AQ_VSI_UP_TABLE_UP##i##_M)
  97
  98#define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i]))
  99#define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i]))
 100#define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i]))
 101#define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i]))
 102
 103/* Macro for each VSI in a PF */
 104#define ice_for_each_vsi(pf, i) \
 105        for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++)
 106
 107/* Macros for each Tx/Rx ring in a VSI */
 108#define ice_for_each_txq(vsi, i) \
 109        for ((i) = 0; (i) < (vsi)->num_txq; (i)++)
 110
 111#define ice_for_each_rxq(vsi, i) \
 112        for ((i) = 0; (i) < (vsi)->num_rxq; (i)++)
 113
 114/* Macros for each allocated Tx/Rx ring whether used or not in a VSI */
 115#define ice_for_each_alloc_txq(vsi, i) \
 116        for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++)
 117
 118#define ice_for_each_alloc_rxq(vsi, i) \
 119        for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++)
 120
 121#define ice_for_each_q_vector(vsi, i) \
 122        for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++)
 123
 124#define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_MCAST_TX | \
 125                                ICE_PROMISC_UCAST_RX | ICE_PROMISC_MCAST_RX)
 126
 127#define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \
 128                                     ICE_PROMISC_MCAST_TX | \
 129                                     ICE_PROMISC_UCAST_RX | \
 130                                     ICE_PROMISC_MCAST_RX | \
 131                                     ICE_PROMISC_VLAN_TX  | \
 132                                     ICE_PROMISC_VLAN_RX)
 133
 134#define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX)
 135
 136#define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \
 137                                     ICE_PROMISC_MCAST_RX | \
 138                                     ICE_PROMISC_VLAN_TX  | \
 139                                     ICE_PROMISC_VLAN_RX)
 140
 141#define ice_pf_to_dev(pf) (&((pf)->pdev->dev))
 142
 143struct ice_txq_meta {
 144        u32 q_teid;     /* Tx-scheduler element identifier */
 145        u16 q_id;       /* Entry in VSI's txq_map bitmap */
 146        u16 q_handle;   /* Relative index of Tx queue within TC */
 147        u16 vsi_idx;    /* VSI index that Tx queue belongs to */
 148        u8 tc;          /* TC number that Tx queue belongs to */
 149};
 150
 151struct ice_tc_info {
 152        u16 qoffset;
 153        u16 qcount_tx;
 154        u16 qcount_rx;
 155        u8 netdev_tc;
 156};
 157
 158struct ice_tc_cfg {
 159        u8 numtc; /* Total number of enabled TCs */
 160        u8 ena_tc; /* Tx map */
 161        struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS];
 162};
 163
 164struct ice_res_tracker {
 165        u16 num_entries;
 166        u16 end;
 167        u16 list[1];
 168};
 169
 170struct ice_qs_cfg {
 171        struct mutex *qs_mutex;  /* will be assigned to &pf->avail_q_mutex */
 172        unsigned long *pf_map;
 173        unsigned long pf_map_size;
 174        unsigned int q_count;
 175        unsigned int scatter_count;
 176        u16 *vsi_map;
 177        u16 vsi_map_offset;
 178        u8 mapping_mode;
 179};
 180
 181struct ice_sw {
 182        struct ice_pf *pf;
 183        u16 sw_id;              /* switch ID for this switch */
 184        u16 bridge_mode;        /* VEB/VEPA/Port Virtualizer */
 185        struct ice_vsi *dflt_vsi;       /* default VSI for this switch */
 186        u8 dflt_vsi_ena:1;      /* true if above dflt_vsi is enabled */
 187};
 188
 189enum ice_state {
 190        __ICE_TESTING,
 191        __ICE_DOWN,
 192        __ICE_NEEDS_RESTART,
 193        __ICE_PREPARED_FOR_RESET,       /* set by driver when prepared */
 194        __ICE_RESET_OICR_RECV,          /* set by driver after rcv reset OICR */
 195        __ICE_DCBNL_DEVRESET,           /* set by dcbnl devreset */
 196        __ICE_PFR_REQ,                  /* set by driver and peers */
 197        __ICE_CORER_REQ,                /* set by driver and peers */
 198        __ICE_GLOBR_REQ,                /* set by driver and peers */
 199        __ICE_CORER_RECV,               /* set by OICR handler */
 200        __ICE_GLOBR_RECV,               /* set by OICR handler */
 201        __ICE_EMPR_RECV,                /* set by OICR handler */
 202        __ICE_SUSPENDED,                /* set on module remove path */
 203        __ICE_RESET_FAILED,             /* set by reset/rebuild */
 204        /* When checking for the PF to be in a nominal operating state, the
 205         * bits that are grouped at the beginning of the list need to be
 206         * checked. Bits occurring before __ICE_STATE_NOMINAL_CHECK_BITS will
 207         * be checked. If you need to add a bit into consideration for nominal
 208         * operating state, it must be added before
 209         * __ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position
 210         * without appropriate consideration.
 211         */
 212        __ICE_STATE_NOMINAL_CHECK_BITS,
 213        __ICE_ADMINQ_EVENT_PENDING,
 214        __ICE_MAILBOXQ_EVENT_PENDING,
 215        __ICE_MDD_EVENT_PENDING,
 216        __ICE_VFLR_EVENT_PENDING,
 217        __ICE_FLTR_OVERFLOW_PROMISC,
 218        __ICE_VF_DIS,
 219        __ICE_CFG_BUSY,
 220        __ICE_SERVICE_SCHED,
 221        __ICE_SERVICE_DIS,
 222        __ICE_FD_FLUSH_REQ,
 223        __ICE_OICR_INTR_DIS,            /* Global OICR interrupt disabled */
 224        __ICE_MDD_VF_PRINT_PENDING,     /* set when MDD event handle */
 225        __ICE_VF_RESETS_DISABLED,       /* disable resets during ice_remove */
 226        __ICE_STATE_NBITS               /* must be last */
 227};
 228
 229enum ice_vsi_flags {
 230        ICE_VSI_FLAG_UMAC_FLTR_CHANGED,
 231        ICE_VSI_FLAG_MMAC_FLTR_CHANGED,
 232        ICE_VSI_FLAG_VLAN_FLTR_CHANGED,
 233        ICE_VSI_FLAG_PROMISC_CHANGED,
 234        ICE_VSI_FLAG_NBITS              /* must be last */
 235};
 236
 237/* struct that defines a VSI, associated with a dev */
 238struct ice_vsi {
 239        struct net_device *netdev;
 240        struct ice_sw *vsw;              /* switch this VSI is on */
 241        struct ice_pf *back;             /* back pointer to PF */
 242        struct ice_port_info *port_info; /* back pointer to port_info */
 243        struct ice_ring **rx_rings;      /* Rx ring array */
 244        struct ice_ring **tx_rings;      /* Tx ring array */
 245        struct ice_q_vector **q_vectors; /* q_vector array */
 246
 247        irqreturn_t (*irq_handler)(int irq, void *data);
 248
 249        u64 tx_linearize;
 250        DECLARE_BITMAP(state, __ICE_STATE_NBITS);
 251        DECLARE_BITMAP(flags, ICE_VSI_FLAG_NBITS);
 252        unsigned int current_netdev_flags;
 253        u32 tx_restart;
 254        u32 tx_busy;
 255        u32 rx_buf_failed;
 256        u32 rx_page_failed;
 257        u16 num_q_vectors;
 258        u16 base_vector;                /* IRQ base for OS reserved vectors */
 259        enum ice_vsi_type type;
 260        u16 vsi_num;                    /* HW (absolute) index of this VSI */
 261        u16 idx;                        /* software index in pf->vsi[] */
 262
 263        s16 vf_id;                      /* VF ID for SR-IOV VSIs */
 264
 265        u16 ethtype;                    /* Ethernet protocol for pause frame */
 266        u16 num_gfltr;
 267        u16 num_bfltr;
 268
 269        /* RSS config */
 270        u16 rss_table_size;     /* HW RSS table size */
 271        u16 rss_size;           /* Allocated RSS queues */
 272        u8 *rss_hkey_user;      /* User configured hash keys */
 273        u8 *rss_lut_user;       /* User configured lookup table entries */
 274        u8 rss_lut_type;        /* used to configure Get/Set RSS LUT AQ call */
 275
 276        /* aRFS members only allocated for the PF VSI */
 277#define ICE_MAX_ARFS_LIST       1024
 278#define ICE_ARFS_LST_MASK       (ICE_MAX_ARFS_LIST - 1)
 279        struct hlist_head *arfs_fltr_list;
 280        struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs;
 281        spinlock_t arfs_lock;   /* protects aRFS hash table and filter state */
 282        atomic_t *arfs_last_fltr_id;
 283
 284        u16 max_frame;
 285        u16 rx_buf_len;
 286
 287        struct ice_aqc_vsi_props info;   /* VSI properties */
 288
 289        /* VSI stats */
 290        struct rtnl_link_stats64 net_stats;
 291        struct ice_eth_stats eth_stats;
 292        struct ice_eth_stats eth_stats_prev;
 293
 294        struct list_head tmp_sync_list;         /* MAC filters to be synced */
 295        struct list_head tmp_unsync_list;       /* MAC filters to be unsynced */
 296
 297        u8 irqs_ready:1;
 298        u8 current_isup:1;               /* Sync 'link up' logging */
 299        u8 stat_offsets_loaded:1;
 300        u8 vlan_ena:1;
 301        u16 num_vlan;
 302
 303        /* queue information */
 304        u8 tx_mapping_mode;              /* ICE_MAP_MODE_[CONTIG|SCATTER] */
 305        u8 rx_mapping_mode;              /* ICE_MAP_MODE_[CONTIG|SCATTER] */
 306        u16 *txq_map;                    /* index in pf->avail_txqs */
 307        u16 *rxq_map;                    /* index in pf->avail_rxqs */
 308        u16 alloc_txq;                   /* Allocated Tx queues */
 309        u16 num_txq;                     /* Used Tx queues */
 310        u16 alloc_rxq;                   /* Allocated Rx queues */
 311        u16 num_rxq;                     /* Used Rx queues */
 312        u16 req_txq;                     /* User requested Tx queues */
 313        u16 req_rxq;                     /* User requested Rx queues */
 314        u16 num_rx_desc;
 315        u16 num_tx_desc;
 316        struct ice_tc_cfg tc_cfg;
 317        struct bpf_prog *xdp_prog;
 318        struct ice_ring **xdp_rings;     /* XDP ring array */
 319        u16 num_xdp_txq;                 /* Used XDP queues */
 320        u8 xdp_mapping_mode;             /* ICE_MAP_MODE_[CONTIG|SCATTER] */
 321        struct xdp_umem **xsk_umems;
 322        u16 num_xsk_umems_used;
 323        u16 num_xsk_umems;
 324} ____cacheline_internodealigned_in_smp;
 325
 326/* struct that defines an interrupt vector */
 327struct ice_q_vector {
 328        struct ice_vsi *vsi;
 329
 330        u16 v_idx;                      /* index in the vsi->q_vector array. */
 331        u16 reg_idx;
 332        u8 num_ring_rx;                 /* total number of Rx rings in vector */
 333        u8 num_ring_tx;                 /* total number of Tx rings in vector */
 334        u8 itr_countdown;               /* when 0 should adjust adaptive ITR */
 335        /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this
 336         * value to the device
 337         */
 338        u8 intrl;
 339
 340        struct napi_struct napi;
 341
 342        struct ice_ring_container rx;
 343        struct ice_ring_container tx;
 344
 345        cpumask_t affinity_mask;
 346        struct irq_affinity_notify affinity_notify;
 347
 348        char name[ICE_INT_NAME_STR_LEN];
 349} ____cacheline_internodealigned_in_smp;
 350
 351enum ice_pf_flags {
 352        ICE_FLAG_FLTR_SYNC,
 353        ICE_FLAG_RSS_ENA,
 354        ICE_FLAG_SRIOV_ENA,
 355        ICE_FLAG_SRIOV_CAPABLE,
 356        ICE_FLAG_DCB_CAPABLE,
 357        ICE_FLAG_DCB_ENA,
 358        ICE_FLAG_FD_ENA,
 359        ICE_FLAG_ADV_FEATURES,
 360        ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA,
 361        ICE_FLAG_NO_MEDIA,
 362        ICE_FLAG_FW_LLDP_AGENT,
 363        ICE_FLAG_ETHTOOL_CTXT,          /* set when ethtool holds RTNL lock */
 364        ICE_FLAG_LEGACY_RX,
 365        ICE_FLAG_VF_TRUE_PROMISC_ENA,
 366        ICE_FLAG_MDD_AUTO_RESET_VF,
 367        ICE_PF_FLAGS_NBITS              /* must be last */
 368};
 369
 370struct ice_pf {
 371        struct pci_dev *pdev;
 372
 373        /* devlink port data */
 374        struct devlink_port devlink_port;
 375
 376        struct devlink_region *nvm_region;
 377
 378        /* OS reserved IRQ details */
 379        struct msix_entry *msix_entries;
 380        struct ice_res_tracker *irq_tracker;
 381        /* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the
 382         * number of MSIX vectors needed for all SR-IOV VFs from the number of
 383         * MSIX vectors allowed on this PF.
 384         */
 385        u16 sriov_base_vector;
 386
 387        u16 ctrl_vsi_idx;               /* control VSI index in pf->vsi array */
 388
 389        struct ice_vsi **vsi;           /* VSIs created by the driver */
 390        struct ice_sw *first_sw;        /* first switch created by firmware */
 391        /* Virtchnl/SR-IOV config info */
 392        struct ice_vf *vf;
 393        u16 num_alloc_vfs;              /* actual number of VFs allocated */
 394        u16 num_vfs_supported;          /* num VFs supported for this PF */
 395        u16 num_qps_per_vf;
 396        u16 num_msix_per_vf;
 397        /* used to ratelimit the MDD event logging */
 398        unsigned long last_printed_mdd_jiffies;
 399        DECLARE_BITMAP(state, __ICE_STATE_NBITS);
 400        DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS);
 401        unsigned long *avail_txqs;      /* bitmap to track PF Tx queue usage */
 402        unsigned long *avail_rxqs;      /* bitmap to track PF Rx queue usage */
 403        unsigned long serv_tmr_period;
 404        unsigned long serv_tmr_prev;
 405        struct timer_list serv_tmr;
 406        struct work_struct serv_task;
 407        struct mutex avail_q_mutex;     /* protects access to avail_[rx|tx]qs */
 408        struct mutex sw_mutex;          /* lock for protecting VSI alloc flow */
 409        struct mutex tc_mutex;          /* lock to protect TC changes */
 410        u32 msg_enable;
 411        u32 hw_csum_rx_error;
 412        u16 oicr_idx;           /* Other interrupt cause MSIX vector index */
 413        u16 num_avail_sw_msix;  /* remaining MSIX SW vectors left unclaimed */
 414        u16 max_pf_txqs;        /* Total Tx queues PF wide */
 415        u16 max_pf_rxqs;        /* Total Rx queues PF wide */
 416        u16 num_lan_msix;       /* Total MSIX vectors for base driver */
 417        u16 num_lan_tx;         /* num LAN Tx queues setup */
 418        u16 num_lan_rx;         /* num LAN Rx queues setup */
 419        u16 next_vsi;           /* Next free slot in pf->vsi[] - 0-based! */
 420        u16 num_alloc_vsi;
 421        u16 corer_count;        /* Core reset count */
 422        u16 globr_count;        /* Global reset count */
 423        u16 empr_count;         /* EMP reset count */
 424        u16 pfr_count;          /* PF reset count */
 425
 426        struct ice_hw_port_stats stats;
 427        struct ice_hw_port_stats stats_prev;
 428        struct ice_hw hw;
 429        u8 stat_prev_loaded:1; /* has previous stats been loaded */
 430#ifdef CONFIG_DCB
 431        u16 dcbx_cap;
 432#endif /* CONFIG_DCB */
 433        u32 tx_timeout_count;
 434        unsigned long tx_timeout_last_recovery;
 435        u32 tx_timeout_recovery_level;
 436        char int_name[ICE_INT_NAME_STR_LEN];
 437        u32 sw_int_count;
 438};
 439
 440struct ice_netdev_priv {
 441        struct ice_vsi *vsi;
 442};
 443
 444/**
 445 * ice_irq_dynamic_ena - Enable default interrupt generation settings
 446 * @hw: pointer to HW struct
 447 * @vsi: pointer to VSI struct, can be NULL
 448 * @q_vector: pointer to q_vector, can be NULL
 449 */
 450static inline void
 451ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi,
 452                    struct ice_q_vector *q_vector)
 453{
 454        u32 vector = (vsi && q_vector) ? q_vector->reg_idx :
 455                                ((struct ice_pf *)hw->back)->oicr_idx;
 456        int itr = ICE_ITR_NONE;
 457        u32 val;
 458
 459        /* clear the PBA here, as this function is meant to clean out all
 460         * previous interrupts and enable the interrupt
 461         */
 462        val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
 463              (itr << GLINT_DYN_CTL_ITR_INDX_S);
 464        if (vsi)
 465                if (test_bit(__ICE_DOWN, vsi->state))
 466                        return;
 467        wr32(hw, GLINT_DYN_CTL(vector), val);
 468}
 469
 470/**
 471 * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev
 472 * @netdev: pointer to the netdev struct
 473 */
 474static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev)
 475{
 476        struct ice_netdev_priv *np = netdev_priv(netdev);
 477
 478        return np->vsi->back;
 479}
 480
 481static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi)
 482{
 483        return !!vsi->xdp_prog;
 484}
 485
 486static inline void ice_set_ring_xdp(struct ice_ring *ring)
 487{
 488        ring->flags |= ICE_TX_FLAGS_RING_XDP;
 489}
 490
 491/**
 492 * ice_xsk_umem - get XDP UMEM bound to a ring
 493 * @ring - ring to use
 494 *
 495 * Returns a pointer to xdp_umem structure if there is an UMEM present,
 496 * NULL otherwise.
 497 */
 498static inline struct xdp_umem *ice_xsk_umem(struct ice_ring *ring)
 499{
 500        struct xdp_umem **umems = ring->vsi->xsk_umems;
 501        u16 qid = ring->q_index;
 502
 503        if (ice_ring_is_xdp(ring))
 504                qid -= ring->vsi->num_xdp_txq;
 505
 506        if (qid >= ring->vsi->num_xsk_umems || !umems || !umems[qid] ||
 507            !ice_is_xdp_ena_vsi(ring->vsi))
 508                return NULL;
 509
 510        return umems[qid];
 511}
 512
 513/**
 514 * ice_get_main_vsi - Get the PF VSI
 515 * @pf: PF instance
 516 *
 517 * returns pf->vsi[0], which by definition is the PF VSI
 518 */
 519static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf)
 520{
 521        if (pf->vsi)
 522                return pf->vsi[0];
 523
 524        return NULL;
 525}
 526
 527/**
 528 * ice_get_ctrl_vsi - Get the control VSI
 529 * @pf: PF instance
 530 */
 531static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf)
 532{
 533        /* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */
 534        if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI)
 535                return NULL;
 536
 537        return pf->vsi[pf->ctrl_vsi_idx];
 538}
 539
 540#define ICE_FD_STAT_CTR_BLOCK_COUNT     256
 541#define ICE_FD_STAT_PF_IDX(base_idx) \
 542                        ((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT)
 543#define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx)
 544
 545int ice_vsi_setup_tx_rings(struct ice_vsi *vsi);
 546int ice_vsi_setup_rx_rings(struct ice_vsi *vsi);
 547int ice_vsi_open_ctrl(struct ice_vsi *vsi);
 548void ice_set_ethtool_ops(struct net_device *netdev);
 549void ice_set_ethtool_safe_mode_ops(struct net_device *netdev);
 550u16 ice_get_avail_txq_count(struct ice_pf *pf);
 551u16 ice_get_avail_rxq_count(struct ice_pf *pf);
 552int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx);
 553void ice_update_vsi_stats(struct ice_vsi *vsi);
 554void ice_update_pf_stats(struct ice_pf *pf);
 555int ice_up(struct ice_vsi *vsi);
 556int ice_down(struct ice_vsi *vsi);
 557int ice_vsi_cfg(struct ice_vsi *vsi);
 558struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi);
 559int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog);
 560int ice_destroy_xdp_rings(struct ice_vsi *vsi);
 561int
 562ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
 563             u32 flags);
 564int ice_set_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
 565int ice_get_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
 566void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size);
 567int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset);
 568void ice_print_link_msg(struct ice_vsi *vsi, bool isup);
 569const char *ice_stat_str(enum ice_status stat_err);
 570const char *ice_aq_str(enum ice_aq_err aq_err);
 571int
 572ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add,
 573                    bool is_tun);
 574void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena);
 575int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
 576int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
 577int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd);
 578int
 579ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd,
 580                      u32 *rule_locs);
 581void ice_fdir_release_flows(struct ice_hw *hw);
 582void ice_fdir_replay_flows(struct ice_hw *hw);
 583void ice_fdir_replay_fltrs(struct ice_pf *pf);
 584int ice_fdir_create_dflt_rules(struct ice_pf *pf);
 585int ice_open(struct net_device *netdev);
 586int ice_stop(struct net_device *netdev);
 587void ice_service_task_schedule(struct ice_pf *pf);
 588
 589#endif /* _ICE_H_ */
 590