1
2
3
4#include <linux/printk.h>
5#include <linux/dynamic_debug.h>
6#include <linux/module.h>
7#include <linux/netdevice.h>
8#include <linux/utsname.h>
9#include <generated/utsrelease.h>
10
11#include "ionic.h"
12#include "ionic_bus.h"
13#include "ionic_lif.h"
14#include "ionic_debugfs.h"
15
16MODULE_DESCRIPTION(IONIC_DRV_DESCRIPTION);
17MODULE_AUTHOR("Pensando Systems, Inc");
18MODULE_LICENSE("GPL");
19
20static const char *ionic_error_to_str(enum ionic_status_code code)
21{
22 switch (code) {
23 case IONIC_RC_SUCCESS:
24 return "IONIC_RC_SUCCESS";
25 case IONIC_RC_EVERSION:
26 return "IONIC_RC_EVERSION";
27 case IONIC_RC_EOPCODE:
28 return "IONIC_RC_EOPCODE";
29 case IONIC_RC_EIO:
30 return "IONIC_RC_EIO";
31 case IONIC_RC_EPERM:
32 return "IONIC_RC_EPERM";
33 case IONIC_RC_EQID:
34 return "IONIC_RC_EQID";
35 case IONIC_RC_EQTYPE:
36 return "IONIC_RC_EQTYPE";
37 case IONIC_RC_ENOENT:
38 return "IONIC_RC_ENOENT";
39 case IONIC_RC_EINTR:
40 return "IONIC_RC_EINTR";
41 case IONIC_RC_EAGAIN:
42 return "IONIC_RC_EAGAIN";
43 case IONIC_RC_ENOMEM:
44 return "IONIC_RC_ENOMEM";
45 case IONIC_RC_EFAULT:
46 return "IONIC_RC_EFAULT";
47 case IONIC_RC_EBUSY:
48 return "IONIC_RC_EBUSY";
49 case IONIC_RC_EEXIST:
50 return "IONIC_RC_EEXIST";
51 case IONIC_RC_EINVAL:
52 return "IONIC_RC_EINVAL";
53 case IONIC_RC_ENOSPC:
54 return "IONIC_RC_ENOSPC";
55 case IONIC_RC_ERANGE:
56 return "IONIC_RC_ERANGE";
57 case IONIC_RC_BAD_ADDR:
58 return "IONIC_RC_BAD_ADDR";
59 case IONIC_RC_DEV_CMD:
60 return "IONIC_RC_DEV_CMD";
61 case IONIC_RC_ENOSUPP:
62 return "IONIC_RC_ENOSUPP";
63 case IONIC_RC_ERROR:
64 return "IONIC_RC_ERROR";
65 case IONIC_RC_ERDMA:
66 return "IONIC_RC_ERDMA";
67 default:
68 return "IONIC_RC_UNKNOWN";
69 }
70}
71
72static int ionic_error_to_errno(enum ionic_status_code code)
73{
74 switch (code) {
75 case IONIC_RC_SUCCESS:
76 return 0;
77 case IONIC_RC_EVERSION:
78 case IONIC_RC_EQTYPE:
79 case IONIC_RC_EQID:
80 case IONIC_RC_EINVAL:
81 case IONIC_RC_ENOSUPP:
82 return -EINVAL;
83 case IONIC_RC_EPERM:
84 return -EPERM;
85 case IONIC_RC_ENOENT:
86 return -ENOENT;
87 case IONIC_RC_EAGAIN:
88 return -EAGAIN;
89 case IONIC_RC_ENOMEM:
90 return -ENOMEM;
91 case IONIC_RC_EFAULT:
92 return -EFAULT;
93 case IONIC_RC_EBUSY:
94 return -EBUSY;
95 case IONIC_RC_EEXIST:
96 return -EEXIST;
97 case IONIC_RC_ENOSPC:
98 return -ENOSPC;
99 case IONIC_RC_ERANGE:
100 return -ERANGE;
101 case IONIC_RC_BAD_ADDR:
102 return -EFAULT;
103 case IONIC_RC_EOPCODE:
104 case IONIC_RC_EINTR:
105 case IONIC_RC_DEV_CMD:
106 case IONIC_RC_ERROR:
107 case IONIC_RC_ERDMA:
108 case IONIC_RC_EIO:
109 default:
110 return -EIO;
111 }
112}
113
114static const char *ionic_opcode_to_str(enum ionic_cmd_opcode opcode)
115{
116 switch (opcode) {
117 case IONIC_CMD_NOP:
118 return "IONIC_CMD_NOP";
119 case IONIC_CMD_INIT:
120 return "IONIC_CMD_INIT";
121 case IONIC_CMD_RESET:
122 return "IONIC_CMD_RESET";
123 case IONIC_CMD_IDENTIFY:
124 return "IONIC_CMD_IDENTIFY";
125 case IONIC_CMD_GETATTR:
126 return "IONIC_CMD_GETATTR";
127 case IONIC_CMD_SETATTR:
128 return "IONIC_CMD_SETATTR";
129 case IONIC_CMD_PORT_IDENTIFY:
130 return "IONIC_CMD_PORT_IDENTIFY";
131 case IONIC_CMD_PORT_INIT:
132 return "IONIC_CMD_PORT_INIT";
133 case IONIC_CMD_PORT_RESET:
134 return "IONIC_CMD_PORT_RESET";
135 case IONIC_CMD_PORT_GETATTR:
136 return "IONIC_CMD_PORT_GETATTR";
137 case IONIC_CMD_PORT_SETATTR:
138 return "IONIC_CMD_PORT_SETATTR";
139 case IONIC_CMD_LIF_INIT:
140 return "IONIC_CMD_LIF_INIT";
141 case IONIC_CMD_LIF_RESET:
142 return "IONIC_CMD_LIF_RESET";
143 case IONIC_CMD_LIF_IDENTIFY:
144 return "IONIC_CMD_LIF_IDENTIFY";
145 case IONIC_CMD_LIF_SETATTR:
146 return "IONIC_CMD_LIF_SETATTR";
147 case IONIC_CMD_LIF_GETATTR:
148 return "IONIC_CMD_LIF_GETATTR";
149 case IONIC_CMD_RX_MODE_SET:
150 return "IONIC_CMD_RX_MODE_SET";
151 case IONIC_CMD_RX_FILTER_ADD:
152 return "IONIC_CMD_RX_FILTER_ADD";
153 case IONIC_CMD_RX_FILTER_DEL:
154 return "IONIC_CMD_RX_FILTER_DEL";
155 case IONIC_CMD_Q_IDENTIFY:
156 return "IONIC_CMD_Q_IDENTIFY";
157 case IONIC_CMD_Q_INIT:
158 return "IONIC_CMD_Q_INIT";
159 case IONIC_CMD_Q_CONTROL:
160 return "IONIC_CMD_Q_CONTROL";
161 case IONIC_CMD_RDMA_RESET_LIF:
162 return "IONIC_CMD_RDMA_RESET_LIF";
163 case IONIC_CMD_RDMA_CREATE_EQ:
164 return "IONIC_CMD_RDMA_CREATE_EQ";
165 case IONIC_CMD_RDMA_CREATE_CQ:
166 return "IONIC_CMD_RDMA_CREATE_CQ";
167 case IONIC_CMD_RDMA_CREATE_ADMINQ:
168 return "IONIC_CMD_RDMA_CREATE_ADMINQ";
169 case IONIC_CMD_FW_DOWNLOAD:
170 return "IONIC_CMD_FW_DOWNLOAD";
171 case IONIC_CMD_FW_CONTROL:
172 return "IONIC_CMD_FW_CONTROL";
173 case IONIC_CMD_VF_GETATTR:
174 return "IONIC_CMD_VF_GETATTR";
175 case IONIC_CMD_VF_SETATTR:
176 return "IONIC_CMD_VF_SETATTR";
177 default:
178 return "DEVCMD_UNKNOWN";
179 }
180}
181
182static void ionic_adminq_flush(struct ionic_lif *lif)
183{
184 struct ionic_queue *adminq = &lif->adminqcq->q;
185
186 spin_lock(&lif->adminq_lock);
187
188 while (adminq->tail != adminq->head) {
189 memset(adminq->tail->desc, 0, sizeof(union ionic_adminq_cmd));
190 adminq->tail->cb = NULL;
191 adminq->tail->cb_arg = NULL;
192 adminq->tail = adminq->tail->next;
193 }
194 spin_unlock(&lif->adminq_lock);
195}
196
197static int ionic_adminq_check_err(struct ionic_lif *lif,
198 struct ionic_admin_ctx *ctx,
199 bool timeout)
200{
201 struct net_device *netdev = lif->netdev;
202 const char *opcode_str;
203 const char *status_str;
204 int err = 0;
205
206 if (ctx->comp.comp.status || timeout) {
207 opcode_str = ionic_opcode_to_str(ctx->cmd.cmd.opcode);
208 status_str = ionic_error_to_str(ctx->comp.comp.status);
209 err = timeout ? -ETIMEDOUT :
210 ionic_error_to_errno(ctx->comp.comp.status);
211
212 netdev_err(netdev, "%s (%d) failed: %s (%d)\n",
213 opcode_str, ctx->cmd.cmd.opcode,
214 timeout ? "TIMEOUT" : status_str, err);
215
216 if (timeout)
217 ionic_adminq_flush(lif);
218 }
219
220 return err;
221}
222
223static void ionic_adminq_cb(struct ionic_queue *q,
224 struct ionic_desc_info *desc_info,
225 struct ionic_cq_info *cq_info, void *cb_arg)
226{
227 struct ionic_admin_ctx *ctx = cb_arg;
228 struct ionic_admin_comp *comp;
229 struct device *dev;
230
231 if (!ctx)
232 return;
233
234 comp = cq_info->cq_desc;
235 dev = &q->lif->netdev->dev;
236
237 memcpy(&ctx->comp, comp, sizeof(*comp));
238
239 dev_dbg(dev, "comp admin queue command:\n");
240 dynamic_hex_dump("comp ", DUMP_PREFIX_OFFSET, 16, 1,
241 &ctx->comp, sizeof(ctx->comp), true);
242
243 complete_all(&ctx->work);
244}
245
246static int ionic_adminq_post(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)
247{
248 struct ionic_queue *adminq;
249 int err = 0;
250
251 WARN_ON(in_interrupt());
252
253 if (!lif->adminqcq)
254 return -EIO;
255
256 adminq = &lif->adminqcq->q;
257
258 spin_lock(&lif->adminq_lock);
259 if (!ionic_q_has_space(adminq, 1)) {
260 err = -ENOSPC;
261 goto err_out;
262 }
263
264 err = ionic_heartbeat_check(lif->ionic);
265 if (err)
266 goto err_out;
267
268 memcpy(adminq->head->desc, &ctx->cmd, sizeof(ctx->cmd));
269
270 dev_dbg(&lif->netdev->dev, "post admin queue command:\n");
271 dynamic_hex_dump("cmd ", DUMP_PREFIX_OFFSET, 16, 1,
272 &ctx->cmd, sizeof(ctx->cmd), true);
273
274 ionic_q_post(adminq, true, ionic_adminq_cb, ctx);
275
276err_out:
277 spin_unlock(&lif->adminq_lock);
278
279 return err;
280}
281
282int ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)
283{
284 struct net_device *netdev = lif->netdev;
285 unsigned long remaining;
286 const char *name;
287 int err;
288
289 err = ionic_adminq_post(lif, ctx);
290 if (err) {
291 if (!test_bit(IONIC_LIF_F_FW_RESET, lif->state)) {
292 name = ionic_opcode_to_str(ctx->cmd.cmd.opcode);
293 netdev_err(netdev, "Posting of %s (%d) failed: %d\n",
294 name, ctx->cmd.cmd.opcode, err);
295 }
296 return err;
297 }
298
299 remaining = wait_for_completion_timeout(&ctx->work,
300 HZ * (ulong)DEVCMD_TIMEOUT);
301 return ionic_adminq_check_err(lif, ctx, (remaining == 0));
302}
303
304int ionic_napi(struct napi_struct *napi, int budget, ionic_cq_cb cb,
305 ionic_cq_done_cb done_cb, void *done_arg)
306{
307 struct ionic_qcq *qcq = napi_to_qcq(napi);
308 struct ionic_cq *cq = &qcq->cq;
309 u32 work_done, flags = 0;
310
311 work_done = ionic_cq_service(cq, budget, cb, done_cb, done_arg);
312
313 if (work_done < budget && napi_complete_done(napi, work_done)) {
314 flags |= IONIC_INTR_CRED_UNMASK;
315 DEBUG_STATS_INTR_REARM(cq->bound_intr);
316 }
317
318 if (work_done || flags) {
319 flags |= IONIC_INTR_CRED_RESET_COALESCE;
320 ionic_intr_credits(cq->lif->ionic->idev.intr_ctrl,
321 cq->bound_intr->index,
322 work_done, flags);
323 }
324
325 DEBUG_STATS_NAPI_POLL(qcq, work_done);
326
327 return work_done;
328}
329
330static void ionic_dev_cmd_clean(struct ionic *ionic)
331{
332 union ionic_dev_cmd_regs *regs = ionic->idev.dev_cmd_regs;
333
334 iowrite32(0, ®s->doorbell);
335 memset_io(®s->cmd, 0, sizeof(regs->cmd));
336}
337
338int ionic_dev_cmd_wait(struct ionic *ionic, unsigned long max_seconds)
339{
340 struct ionic_dev *idev = &ionic->idev;
341 unsigned long start_time;
342 unsigned long max_wait;
343 unsigned long duration;
344 int opcode;
345 int hb = 0;
346 int done;
347 int err;
348
349 WARN_ON(in_interrupt());
350
351
352
353
354 max_wait = jiffies + (max_seconds * HZ);
355try_again:
356 start_time = jiffies;
357 do {
358 done = ionic_dev_cmd_done(idev);
359 if (done)
360 break;
361 msleep(5);
362 hb = ionic_heartbeat_check(ionic);
363 } while (!done && !hb && time_before(jiffies, max_wait));
364 duration = jiffies - start_time;
365
366 opcode = idev->dev_cmd_regs->cmd.cmd.opcode;
367 dev_dbg(ionic->dev, "DEVCMD %s (%d) done=%d took %ld secs (%ld jiffies)\n",
368 ionic_opcode_to_str(opcode), opcode,
369 done, duration / HZ, duration);
370
371 if (!done && hb) {
372
373
374
375
376 dev_warn(ionic->dev, "DEVCMD %s (%d) failed - FW halted\n",
377 ionic_opcode_to_str(opcode), opcode);
378 return -ENXIO;
379 }
380
381 if (!done && !time_before(jiffies, max_wait)) {
382 ionic_dev_cmd_clean(ionic);
383 dev_warn(ionic->dev, "DEVCMD %s (%d) timeout after %ld secs\n",
384 ionic_opcode_to_str(opcode), opcode, max_seconds);
385 return -ETIMEDOUT;
386 }
387
388 err = ionic_dev_cmd_status(&ionic->idev);
389 if (err) {
390 if (err == IONIC_RC_EAGAIN && !time_after(jiffies, max_wait)) {
391 dev_err(ionic->dev, "DEV_CMD %s (%d) error, %s (%d) retrying...\n",
392 ionic_opcode_to_str(opcode), opcode,
393 ionic_error_to_str(err), err);
394
395 msleep(1000);
396 iowrite32(0, &idev->dev_cmd_regs->done);
397 iowrite32(1, &idev->dev_cmd_regs->doorbell);
398 goto try_again;
399 }
400
401 dev_err(ionic->dev, "DEV_CMD %s (%d) error, %s (%d) failed\n",
402 ionic_opcode_to_str(opcode), opcode,
403 ionic_error_to_str(err), err);
404
405 return ionic_error_to_errno(err);
406 }
407
408 return 0;
409}
410
411int ionic_setup(struct ionic *ionic)
412{
413 int err;
414
415 err = ionic_dev_setup(ionic);
416 if (err)
417 return err;
418 ionic_reset(ionic);
419
420 return 0;
421}
422
423int ionic_identify(struct ionic *ionic)
424{
425 struct ionic_identity *ident = &ionic->ident;
426 struct ionic_dev *idev = &ionic->idev;
427 size_t sz;
428 int err;
429
430 memset(ident, 0, sizeof(*ident));
431
432 ident->drv.os_type = cpu_to_le32(IONIC_OS_TYPE_LINUX);
433 strncpy(ident->drv.driver_ver_str, UTS_RELEASE,
434 sizeof(ident->drv.driver_ver_str) - 1);
435
436 mutex_lock(&ionic->dev_cmd_lock);
437
438 sz = min(sizeof(ident->drv), sizeof(idev->dev_cmd_regs->data));
439 memcpy_toio(&idev->dev_cmd_regs->data, &ident->drv, sz);
440
441 ionic_dev_cmd_identify(idev, IONIC_IDENTITY_VERSION_1);
442 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
443 if (!err) {
444 sz = min(sizeof(ident->dev), sizeof(idev->dev_cmd_regs->data));
445 memcpy_fromio(&ident->dev, &idev->dev_cmd_regs->data, sz);
446 }
447
448 mutex_unlock(&ionic->dev_cmd_lock);
449
450 if (err)
451 goto err_out_unmap;
452
453 ionic_debugfs_add_ident(ionic);
454
455 return 0;
456
457err_out_unmap:
458 return err;
459}
460
461int ionic_init(struct ionic *ionic)
462{
463 struct ionic_dev *idev = &ionic->idev;
464 int err;
465
466 mutex_lock(&ionic->dev_cmd_lock);
467 ionic_dev_cmd_init(idev);
468 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
469 mutex_unlock(&ionic->dev_cmd_lock);
470
471 return err;
472}
473
474int ionic_reset(struct ionic *ionic)
475{
476 struct ionic_dev *idev = &ionic->idev;
477 int err;
478
479 mutex_lock(&ionic->dev_cmd_lock);
480 ionic_dev_cmd_reset(idev);
481 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
482 mutex_unlock(&ionic->dev_cmd_lock);
483
484 return err;
485}
486
487int ionic_port_identify(struct ionic *ionic)
488{
489 struct ionic_identity *ident = &ionic->ident;
490 struct ionic_dev *idev = &ionic->idev;
491 size_t sz;
492 int err;
493
494 mutex_lock(&ionic->dev_cmd_lock);
495
496 ionic_dev_cmd_port_identify(idev);
497 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
498 if (!err) {
499 sz = min(sizeof(ident->port), sizeof(idev->dev_cmd_regs->data));
500 memcpy_fromio(&ident->port, &idev->dev_cmd_regs->data, sz);
501 }
502
503 mutex_unlock(&ionic->dev_cmd_lock);
504
505 return err;
506}
507
508int ionic_port_init(struct ionic *ionic)
509{
510 struct ionic_identity *ident = &ionic->ident;
511 struct ionic_dev *idev = &ionic->idev;
512 size_t sz;
513 int err;
514
515 if (!idev->port_info) {
516 idev->port_info_sz = ALIGN(sizeof(*idev->port_info), PAGE_SIZE);
517 idev->port_info = dma_alloc_coherent(ionic->dev,
518 idev->port_info_sz,
519 &idev->port_info_pa,
520 GFP_KERNEL);
521 if (!idev->port_info) {
522 dev_err(ionic->dev, "Failed to allocate port info\n");
523 return -ENOMEM;
524 }
525 }
526
527 sz = min(sizeof(ident->port.config), sizeof(idev->dev_cmd_regs->data));
528
529 mutex_lock(&ionic->dev_cmd_lock);
530
531 memcpy_toio(&idev->dev_cmd_regs->data, &ident->port.config, sz);
532 ionic_dev_cmd_port_init(idev);
533 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
534
535 ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_UP);
536 (void)ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
537
538 mutex_unlock(&ionic->dev_cmd_lock);
539 if (err) {
540 dev_err(ionic->dev, "Failed to init port\n");
541 dma_free_coherent(ionic->dev, idev->port_info_sz,
542 idev->port_info, idev->port_info_pa);
543 idev->port_info = NULL;
544 idev->port_info_pa = 0;
545 }
546
547 return err;
548}
549
550int ionic_port_reset(struct ionic *ionic)
551{
552 struct ionic_dev *idev = &ionic->idev;
553 int err;
554
555 if (!idev->port_info)
556 return 0;
557
558 mutex_lock(&ionic->dev_cmd_lock);
559 ionic_dev_cmd_port_reset(idev);
560 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
561 mutex_unlock(&ionic->dev_cmd_lock);
562
563 dma_free_coherent(ionic->dev, idev->port_info_sz,
564 idev->port_info, idev->port_info_pa);
565
566 idev->port_info = NULL;
567 idev->port_info_pa = 0;
568
569 if (err)
570 dev_err(ionic->dev, "Failed to reset port\n");
571
572 return err;
573}
574
575static int __init ionic_init_module(void)
576{
577 ionic_debugfs_create();
578 return ionic_bus_register_driver();
579}
580
581static void __exit ionic_cleanup_module(void)
582{
583 ionic_bus_unregister_driver();
584 ionic_debugfs_destroy();
585
586 pr_info("%s removed\n", IONIC_DRV_NAME);
587}
588
589module_init(ionic_init_module);
590module_exit(ionic_cleanup_module);
591
