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8#ifndef _WMI_H_
9#define _WMI_H_
10
11#include <linux/types.h>
12#include <linux/ieee80211.h>
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54struct wmi_cmd_hdr {
55 __le32 cmd_id;
56} __packed;
57
58#define WMI_CMD_HDR_CMD_ID_MASK 0x00FFFFFF
59#define WMI_CMD_HDR_CMD_ID_LSB 0
60#define WMI_CMD_HDR_PLT_PRIV_MASK 0xFF000000
61#define WMI_CMD_HDR_PLT_PRIV_LSB 24
62
63#define HTC_PROTOCOL_VERSION 0x0002
64#define WMI_PROTOCOL_VERSION 0x0002
65
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72
73typedef __s32 __bitwise a_sle32;
74
75static inline a_sle32 a_cpu_to_sle32(s32 val)
76{
77 return (__force a_sle32)cpu_to_le32(val);
78}
79
80static inline s32 a_sle32_to_cpu(a_sle32 val)
81{
82 return le32_to_cpu((__force __le32)val);
83}
84
85enum wmi_service {
86 WMI_SERVICE_BEACON_OFFLOAD = 0,
87 WMI_SERVICE_SCAN_OFFLOAD,
88 WMI_SERVICE_ROAM_OFFLOAD,
89 WMI_SERVICE_BCN_MISS_OFFLOAD,
90 WMI_SERVICE_STA_PWRSAVE,
91 WMI_SERVICE_STA_ADVANCED_PWRSAVE,
92 WMI_SERVICE_AP_UAPSD,
93 WMI_SERVICE_AP_DFS,
94 WMI_SERVICE_11AC,
95 WMI_SERVICE_BLOCKACK,
96 WMI_SERVICE_PHYERR,
97 WMI_SERVICE_BCN_FILTER,
98 WMI_SERVICE_RTT,
99 WMI_SERVICE_RATECTRL,
100 WMI_SERVICE_WOW,
101 WMI_SERVICE_RATECTRL_CACHE,
102 WMI_SERVICE_IRAM_TIDS,
103 WMI_SERVICE_ARPNS_OFFLOAD,
104 WMI_SERVICE_NLO,
105 WMI_SERVICE_GTK_OFFLOAD,
106 WMI_SERVICE_SCAN_SCH,
107 WMI_SERVICE_CSA_OFFLOAD,
108 WMI_SERVICE_CHATTER,
109 WMI_SERVICE_COEX_FREQAVOID,
110 WMI_SERVICE_PACKET_POWER_SAVE,
111 WMI_SERVICE_FORCE_FW_HANG,
112 WMI_SERVICE_GPIO,
113 WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
114 WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
115 WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
116 WMI_SERVICE_STA_KEEP_ALIVE,
117 WMI_SERVICE_TX_ENCAP,
118 WMI_SERVICE_BURST,
119 WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT,
120 WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT,
121 WMI_SERVICE_ROAM_SCAN_OFFLOAD,
122 WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
123 WMI_SERVICE_EARLY_RX,
124 WMI_SERVICE_STA_SMPS,
125 WMI_SERVICE_FWTEST,
126 WMI_SERVICE_STA_WMMAC,
127 WMI_SERVICE_TDLS,
128 WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE,
129 WMI_SERVICE_ADAPTIVE_OCS,
130 WMI_SERVICE_BA_SSN_SUPPORT,
131 WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE,
132 WMI_SERVICE_WLAN_HB,
133 WMI_SERVICE_LTE_ANT_SHARE_SUPPORT,
134 WMI_SERVICE_BATCH_SCAN,
135 WMI_SERVICE_QPOWER,
136 WMI_SERVICE_PLMREQ,
137 WMI_SERVICE_THERMAL_MGMT,
138 WMI_SERVICE_RMC,
139 WMI_SERVICE_MHF_OFFLOAD,
140 WMI_SERVICE_COEX_SAR,
141 WMI_SERVICE_BCN_TXRATE_OVERRIDE,
142 WMI_SERVICE_NAN,
143 WMI_SERVICE_L1SS_STAT,
144 WMI_SERVICE_ESTIMATE_LINKSPEED,
145 WMI_SERVICE_OBSS_SCAN,
146 WMI_SERVICE_TDLS_OFFCHAN,
147 WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
148 WMI_SERVICE_TDLS_UAPSD_SLEEP_STA,
149 WMI_SERVICE_IBSS_PWRSAVE,
150 WMI_SERVICE_LPASS,
151 WMI_SERVICE_EXTSCAN,
152 WMI_SERVICE_D0WOW,
153 WMI_SERVICE_HSOFFLOAD,
154 WMI_SERVICE_ROAM_HO_OFFLOAD,
155 WMI_SERVICE_RX_FULL_REORDER,
156 WMI_SERVICE_DHCP_OFFLOAD,
157 WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT,
158 WMI_SERVICE_MDNS_OFFLOAD,
159 WMI_SERVICE_SAP_AUTH_OFFLOAD,
160 WMI_SERVICE_ATF,
161 WMI_SERVICE_COEX_GPIO,
162 WMI_SERVICE_ENHANCED_PROXY_STA,
163 WMI_SERVICE_TT,
164 WMI_SERVICE_PEER_CACHING,
165 WMI_SERVICE_AUX_SPECTRAL_INTF,
166 WMI_SERVICE_AUX_CHAN_LOAD_INTF,
167 WMI_SERVICE_BSS_CHANNEL_INFO_64,
168 WMI_SERVICE_EXT_RES_CFG_SUPPORT,
169 WMI_SERVICE_MESH_11S,
170 WMI_SERVICE_MESH_NON_11S,
171 WMI_SERVICE_PEER_STATS,
172 WMI_SERVICE_RESTRT_CHNL_SUPPORT,
173 WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT,
174 WMI_SERVICE_TX_MODE_PUSH_ONLY,
175 WMI_SERVICE_TX_MODE_PUSH_PULL,
176 WMI_SERVICE_TX_MODE_DYNAMIC,
177 WMI_SERVICE_VDEV_RX_FILTER,
178 WMI_SERVICE_BTCOEX,
179 WMI_SERVICE_CHECK_CAL_VERSION,
180 WMI_SERVICE_DBGLOG_WARN2,
181 WMI_SERVICE_BTCOEX_DUTY_CYCLE,
182 WMI_SERVICE_4_WIRE_COEX_SUPPORT,
183 WMI_SERVICE_EXTENDED_NSS_SUPPORT,
184 WMI_SERVICE_PROG_GPIO_BAND_SELECT,
185 WMI_SERVICE_SMART_LOGGING_SUPPORT,
186 WMI_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE,
187 WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
188 WMI_SERVICE_MGMT_TX_WMI,
189 WMI_SERVICE_TDLS_WIDER_BANDWIDTH,
190 WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
191 WMI_SERVICE_HOST_DFS_CHECK_SUPPORT,
192 WMI_SERVICE_TPC_STATS_FINAL,
193 WMI_SERVICE_RESET_CHIP,
194 WMI_SERVICE_SPOOF_MAC_SUPPORT,
195 WMI_SERVICE_TX_DATA_ACK_RSSI,
196 WMI_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT,
197 WMI_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT,
198 WMI_SERVICE_BB_TIMING_CONFIG_SUPPORT,
199 WMI_SERVICE_THERM_THROT,
200 WMI_SERVICE_RTT_RESPONDER_ROLE,
201 WMI_SERVICE_PER_PACKET_SW_ENCRYPT,
202 WMI_SERVICE_REPORT_AIRTIME,
203 WMI_SERVICE_SYNC_DELETE_CMDS,
204 WMI_SERVICE_TX_PWR_PER_PEER,
205 WMI_SERVICE_SUPPORT_EXTEND_ADDRESS,
206
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209
210 WMI_SERVICE_MAX,
211};
212
213enum wmi_10x_service {
214 WMI_10X_SERVICE_BEACON_OFFLOAD = 0,
215 WMI_10X_SERVICE_SCAN_OFFLOAD,
216 WMI_10X_SERVICE_ROAM_OFFLOAD,
217 WMI_10X_SERVICE_BCN_MISS_OFFLOAD,
218 WMI_10X_SERVICE_STA_PWRSAVE,
219 WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE,
220 WMI_10X_SERVICE_AP_UAPSD,
221 WMI_10X_SERVICE_AP_DFS,
222 WMI_10X_SERVICE_11AC,
223 WMI_10X_SERVICE_BLOCKACK,
224 WMI_10X_SERVICE_PHYERR,
225 WMI_10X_SERVICE_BCN_FILTER,
226 WMI_10X_SERVICE_RTT,
227 WMI_10X_SERVICE_RATECTRL,
228 WMI_10X_SERVICE_WOW,
229 WMI_10X_SERVICE_RATECTRL_CACHE,
230 WMI_10X_SERVICE_IRAM_TIDS,
231 WMI_10X_SERVICE_BURST,
232
233
234 WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT,
235 WMI_10X_SERVICE_FORCE_FW_HANG,
236 WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT,
237 WMI_10X_SERVICE_ATF,
238 WMI_10X_SERVICE_COEX_GPIO,
239 WMI_10X_SERVICE_AUX_SPECTRAL_INTF,
240 WMI_10X_SERVICE_AUX_CHAN_LOAD_INTF,
241 WMI_10X_SERVICE_BSS_CHANNEL_INFO_64,
242 WMI_10X_SERVICE_MESH,
243 WMI_10X_SERVICE_EXT_RES_CFG_SUPPORT,
244 WMI_10X_SERVICE_PEER_STATS,
245 WMI_10X_SERVICE_RESET_CHIP,
246 WMI_10X_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
247 WMI_10X_SERVICE_VDEV_BCN_RATE_CONTROL,
248 WMI_10X_SERVICE_PER_PACKET_SW_ENCRYPT,
249 WMI_10X_SERVICE_BB_TIMING_CONFIG_SUPPORT,
250};
251
252enum wmi_main_service {
253 WMI_MAIN_SERVICE_BEACON_OFFLOAD = 0,
254 WMI_MAIN_SERVICE_SCAN_OFFLOAD,
255 WMI_MAIN_SERVICE_ROAM_OFFLOAD,
256 WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD,
257 WMI_MAIN_SERVICE_STA_PWRSAVE,
258 WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE,
259 WMI_MAIN_SERVICE_AP_UAPSD,
260 WMI_MAIN_SERVICE_AP_DFS,
261 WMI_MAIN_SERVICE_11AC,
262 WMI_MAIN_SERVICE_BLOCKACK,
263 WMI_MAIN_SERVICE_PHYERR,
264 WMI_MAIN_SERVICE_BCN_FILTER,
265 WMI_MAIN_SERVICE_RTT,
266 WMI_MAIN_SERVICE_RATECTRL,
267 WMI_MAIN_SERVICE_WOW,
268 WMI_MAIN_SERVICE_RATECTRL_CACHE,
269 WMI_MAIN_SERVICE_IRAM_TIDS,
270 WMI_MAIN_SERVICE_ARPNS_OFFLOAD,
271 WMI_MAIN_SERVICE_NLO,
272 WMI_MAIN_SERVICE_GTK_OFFLOAD,
273 WMI_MAIN_SERVICE_SCAN_SCH,
274 WMI_MAIN_SERVICE_CSA_OFFLOAD,
275 WMI_MAIN_SERVICE_CHATTER,
276 WMI_MAIN_SERVICE_COEX_FREQAVOID,
277 WMI_MAIN_SERVICE_PACKET_POWER_SAVE,
278 WMI_MAIN_SERVICE_FORCE_FW_HANG,
279 WMI_MAIN_SERVICE_GPIO,
280 WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
281 WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
282 WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
283 WMI_MAIN_SERVICE_STA_KEEP_ALIVE,
284 WMI_MAIN_SERVICE_TX_ENCAP,
285};
286
287enum wmi_10_4_service {
288 WMI_10_4_SERVICE_BEACON_OFFLOAD = 0,
289 WMI_10_4_SERVICE_SCAN_OFFLOAD,
290 WMI_10_4_SERVICE_ROAM_OFFLOAD,
291 WMI_10_4_SERVICE_BCN_MISS_OFFLOAD,
292 WMI_10_4_SERVICE_STA_PWRSAVE,
293 WMI_10_4_SERVICE_STA_ADVANCED_PWRSAVE,
294 WMI_10_4_SERVICE_AP_UAPSD,
295 WMI_10_4_SERVICE_AP_DFS,
296 WMI_10_4_SERVICE_11AC,
297 WMI_10_4_SERVICE_BLOCKACK,
298 WMI_10_4_SERVICE_PHYERR,
299 WMI_10_4_SERVICE_BCN_FILTER,
300 WMI_10_4_SERVICE_RTT,
301 WMI_10_4_SERVICE_RATECTRL,
302 WMI_10_4_SERVICE_WOW,
303 WMI_10_4_SERVICE_RATECTRL_CACHE,
304 WMI_10_4_SERVICE_IRAM_TIDS,
305 WMI_10_4_SERVICE_BURST,
306 WMI_10_4_SERVICE_SMART_ANTENNA_SW_SUPPORT,
307 WMI_10_4_SERVICE_GTK_OFFLOAD,
308 WMI_10_4_SERVICE_SCAN_SCH,
309 WMI_10_4_SERVICE_CSA_OFFLOAD,
310 WMI_10_4_SERVICE_CHATTER,
311 WMI_10_4_SERVICE_COEX_FREQAVOID,
312 WMI_10_4_SERVICE_PACKET_POWER_SAVE,
313 WMI_10_4_SERVICE_FORCE_FW_HANG,
314 WMI_10_4_SERVICE_SMART_ANTENNA_HW_SUPPORT,
315 WMI_10_4_SERVICE_GPIO,
316 WMI_10_4_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
317 WMI_10_4_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
318 WMI_10_4_SERVICE_STA_KEEP_ALIVE,
319 WMI_10_4_SERVICE_TX_ENCAP,
320 WMI_10_4_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
321 WMI_10_4_SERVICE_EARLY_RX,
322 WMI_10_4_SERVICE_ENHANCED_PROXY_STA,
323 WMI_10_4_SERVICE_TT,
324 WMI_10_4_SERVICE_ATF,
325 WMI_10_4_SERVICE_PEER_CACHING,
326 WMI_10_4_SERVICE_COEX_GPIO,
327 WMI_10_4_SERVICE_AUX_SPECTRAL_INTF,
328 WMI_10_4_SERVICE_AUX_CHAN_LOAD_INTF,
329 WMI_10_4_SERVICE_BSS_CHANNEL_INFO_64,
330 WMI_10_4_SERVICE_EXT_RES_CFG_SUPPORT,
331 WMI_10_4_SERVICE_MESH_NON_11S,
332 WMI_10_4_SERVICE_RESTRT_CHNL_SUPPORT,
333 WMI_10_4_SERVICE_PEER_STATS,
334 WMI_10_4_SERVICE_MESH_11S,
335 WMI_10_4_SERVICE_PERIODIC_CHAN_STAT_SUPPORT,
336 WMI_10_4_SERVICE_TX_MODE_PUSH_ONLY,
337 WMI_10_4_SERVICE_TX_MODE_PUSH_PULL,
338 WMI_10_4_SERVICE_TX_MODE_DYNAMIC,
339 WMI_10_4_SERVICE_VDEV_RX_FILTER,
340 WMI_10_4_SERVICE_BTCOEX,
341 WMI_10_4_SERVICE_CHECK_CAL_VERSION,
342 WMI_10_4_SERVICE_DBGLOG_WARN2,
343 WMI_10_4_SERVICE_BTCOEX_DUTY_CYCLE,
344 WMI_10_4_SERVICE_4_WIRE_COEX_SUPPORT,
345 WMI_10_4_SERVICE_EXTENDED_NSS_SUPPORT,
346 WMI_10_4_SERVICE_PROG_GPIO_BAND_SELECT,
347 WMI_10_4_SERVICE_SMART_LOGGING_SUPPORT,
348 WMI_10_4_SERVICE_TDLS,
349 WMI_10_4_SERVICE_TDLS_OFFCHAN,
350 WMI_10_4_SERVICE_TDLS_UAPSD_BUFFER_STA,
351 WMI_10_4_SERVICE_TDLS_UAPSD_SLEEP_STA,
352 WMI_10_4_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE,
353 WMI_10_4_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
354 WMI_10_4_SERVICE_TDLS_WIDER_BANDWIDTH,
355 WMI_10_4_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
356 WMI_10_4_SERVICE_HOST_DFS_CHECK_SUPPORT,
357 WMI_10_4_SERVICE_TPC_STATS_FINAL,
358 WMI_10_4_SERVICE_CFR_CAPTURE_SUPPORT,
359 WMI_10_4_SERVICE_TX_DATA_ACK_RSSI,
360 WMI_10_4_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_LEGACY,
361 WMI_10_4_SERVICE_PER_PACKET_SW_ENCRYPT,
362 WMI_10_4_SERVICE_PEER_TID_CONFIGS_SUPPORT,
363 WMI_10_4_SERVICE_VDEV_BCN_RATE_CONTROL,
364 WMI_10_4_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT,
365 WMI_10_4_SERVICE_HTT_ASSERT_TRIGGER_SUPPORT,
366 WMI_10_4_SERVICE_VDEV_FILTER_NEIGHBOR_RX_PACKETS,
367 WMI_10_4_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT,
368 WMI_10_4_SERVICE_PEER_CHWIDTH_CHANGE,
369 WMI_10_4_SERVICE_RX_FILTER_OUT_COUNT,
370 WMI_10_4_SERVICE_RTT_RESPONDER_ROLE,
371 WMI_10_4_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT,
372 WMI_10_4_SERVICE_REPORT_AIRTIME,
373 WMI_10_4_SERVICE_TX_PWR_PER_PEER,
374};
375
376static inline char *wmi_service_name(enum wmi_service service_id)
377{
378#define SVCSTR(x) case x: return #x
379
380 switch (service_id) {
381 SVCSTR(WMI_SERVICE_BEACON_OFFLOAD);
382 SVCSTR(WMI_SERVICE_SCAN_OFFLOAD);
383 SVCSTR(WMI_SERVICE_ROAM_OFFLOAD);
384 SVCSTR(WMI_SERVICE_BCN_MISS_OFFLOAD);
385 SVCSTR(WMI_SERVICE_STA_PWRSAVE);
386 SVCSTR(WMI_SERVICE_STA_ADVANCED_PWRSAVE);
387 SVCSTR(WMI_SERVICE_AP_UAPSD);
388 SVCSTR(WMI_SERVICE_AP_DFS);
389 SVCSTR(WMI_SERVICE_11AC);
390 SVCSTR(WMI_SERVICE_BLOCKACK);
391 SVCSTR(WMI_SERVICE_PHYERR);
392 SVCSTR(WMI_SERVICE_BCN_FILTER);
393 SVCSTR(WMI_SERVICE_RTT);
394 SVCSTR(WMI_SERVICE_RATECTRL);
395 SVCSTR(WMI_SERVICE_WOW);
396 SVCSTR(WMI_SERVICE_RATECTRL_CACHE);
397 SVCSTR(WMI_SERVICE_IRAM_TIDS);
398 SVCSTR(WMI_SERVICE_ARPNS_OFFLOAD);
399 SVCSTR(WMI_SERVICE_NLO);
400 SVCSTR(WMI_SERVICE_GTK_OFFLOAD);
401 SVCSTR(WMI_SERVICE_SCAN_SCH);
402 SVCSTR(WMI_SERVICE_CSA_OFFLOAD);
403 SVCSTR(WMI_SERVICE_CHATTER);
404 SVCSTR(WMI_SERVICE_COEX_FREQAVOID);
405 SVCSTR(WMI_SERVICE_PACKET_POWER_SAVE);
406 SVCSTR(WMI_SERVICE_FORCE_FW_HANG);
407 SVCSTR(WMI_SERVICE_GPIO);
408 SVCSTR(WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM);
409 SVCSTR(WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG);
410 SVCSTR(WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG);
411 SVCSTR(WMI_SERVICE_STA_KEEP_ALIVE);
412 SVCSTR(WMI_SERVICE_TX_ENCAP);
413 SVCSTR(WMI_SERVICE_BURST);
414 SVCSTR(WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT);
415 SVCSTR(WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT);
416 SVCSTR(WMI_SERVICE_ROAM_SCAN_OFFLOAD);
417 SVCSTR(WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC);
418 SVCSTR(WMI_SERVICE_EARLY_RX);
419 SVCSTR(WMI_SERVICE_STA_SMPS);
420 SVCSTR(WMI_SERVICE_FWTEST);
421 SVCSTR(WMI_SERVICE_STA_WMMAC);
422 SVCSTR(WMI_SERVICE_TDLS);
423 SVCSTR(WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE);
424 SVCSTR(WMI_SERVICE_ADAPTIVE_OCS);
425 SVCSTR(WMI_SERVICE_BA_SSN_SUPPORT);
426 SVCSTR(WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE);
427 SVCSTR(WMI_SERVICE_WLAN_HB);
428 SVCSTR(WMI_SERVICE_LTE_ANT_SHARE_SUPPORT);
429 SVCSTR(WMI_SERVICE_BATCH_SCAN);
430 SVCSTR(WMI_SERVICE_QPOWER);
431 SVCSTR(WMI_SERVICE_PLMREQ);
432 SVCSTR(WMI_SERVICE_THERMAL_MGMT);
433 SVCSTR(WMI_SERVICE_RMC);
434 SVCSTR(WMI_SERVICE_MHF_OFFLOAD);
435 SVCSTR(WMI_SERVICE_COEX_SAR);
436 SVCSTR(WMI_SERVICE_BCN_TXRATE_OVERRIDE);
437 SVCSTR(WMI_SERVICE_NAN);
438 SVCSTR(WMI_SERVICE_L1SS_STAT);
439 SVCSTR(WMI_SERVICE_ESTIMATE_LINKSPEED);
440 SVCSTR(WMI_SERVICE_OBSS_SCAN);
441 SVCSTR(WMI_SERVICE_TDLS_OFFCHAN);
442 SVCSTR(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA);
443 SVCSTR(WMI_SERVICE_TDLS_UAPSD_SLEEP_STA);
444 SVCSTR(WMI_SERVICE_IBSS_PWRSAVE);
445 SVCSTR(WMI_SERVICE_LPASS);
446 SVCSTR(WMI_SERVICE_EXTSCAN);
447 SVCSTR(WMI_SERVICE_D0WOW);
448 SVCSTR(WMI_SERVICE_HSOFFLOAD);
449 SVCSTR(WMI_SERVICE_ROAM_HO_OFFLOAD);
450 SVCSTR(WMI_SERVICE_RX_FULL_REORDER);
451 SVCSTR(WMI_SERVICE_DHCP_OFFLOAD);
452 SVCSTR(WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT);
453 SVCSTR(WMI_SERVICE_MDNS_OFFLOAD);
454 SVCSTR(WMI_SERVICE_SAP_AUTH_OFFLOAD);
455 SVCSTR(WMI_SERVICE_ATF);
456 SVCSTR(WMI_SERVICE_COEX_GPIO);
457 SVCSTR(WMI_SERVICE_ENHANCED_PROXY_STA);
458 SVCSTR(WMI_SERVICE_TT);
459 SVCSTR(WMI_SERVICE_PEER_CACHING);
460 SVCSTR(WMI_SERVICE_AUX_SPECTRAL_INTF);
461 SVCSTR(WMI_SERVICE_AUX_CHAN_LOAD_INTF);
462 SVCSTR(WMI_SERVICE_BSS_CHANNEL_INFO_64);
463 SVCSTR(WMI_SERVICE_EXT_RES_CFG_SUPPORT);
464 SVCSTR(WMI_SERVICE_MESH_11S);
465 SVCSTR(WMI_SERVICE_MESH_NON_11S);
466 SVCSTR(WMI_SERVICE_PEER_STATS);
467 SVCSTR(WMI_SERVICE_RESTRT_CHNL_SUPPORT);
468 SVCSTR(WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT);
469 SVCSTR(WMI_SERVICE_TX_MODE_PUSH_ONLY);
470 SVCSTR(WMI_SERVICE_TX_MODE_PUSH_PULL);
471 SVCSTR(WMI_SERVICE_TX_MODE_DYNAMIC);
472 SVCSTR(WMI_SERVICE_VDEV_RX_FILTER);
473 SVCSTR(WMI_SERVICE_BTCOEX);
474 SVCSTR(WMI_SERVICE_CHECK_CAL_VERSION);
475 SVCSTR(WMI_SERVICE_DBGLOG_WARN2);
476 SVCSTR(WMI_SERVICE_BTCOEX_DUTY_CYCLE);
477 SVCSTR(WMI_SERVICE_4_WIRE_COEX_SUPPORT);
478 SVCSTR(WMI_SERVICE_EXTENDED_NSS_SUPPORT);
479 SVCSTR(WMI_SERVICE_PROG_GPIO_BAND_SELECT);
480 SVCSTR(WMI_SERVICE_SMART_LOGGING_SUPPORT);
481 SVCSTR(WMI_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE);
482 SVCSTR(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY);
483 SVCSTR(WMI_SERVICE_MGMT_TX_WMI);
484 SVCSTR(WMI_SERVICE_TDLS_WIDER_BANDWIDTH);
485 SVCSTR(WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS);
486 SVCSTR(WMI_SERVICE_HOST_DFS_CHECK_SUPPORT);
487 SVCSTR(WMI_SERVICE_TPC_STATS_FINAL);
488 SVCSTR(WMI_SERVICE_RESET_CHIP);
489 SVCSTR(WMI_SERVICE_SPOOF_MAC_SUPPORT);
490 SVCSTR(WMI_SERVICE_TX_DATA_ACK_RSSI);
491 SVCSTR(WMI_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT);
492 SVCSTR(WMI_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT);
493 SVCSTR(WMI_SERVICE_BB_TIMING_CONFIG_SUPPORT);
494 SVCSTR(WMI_SERVICE_THERM_THROT);
495 SVCSTR(WMI_SERVICE_RTT_RESPONDER_ROLE);
496 SVCSTR(WMI_SERVICE_PER_PACKET_SW_ENCRYPT);
497 SVCSTR(WMI_SERVICE_REPORT_AIRTIME);
498 SVCSTR(WMI_SERVICE_SYNC_DELETE_CMDS);
499 SVCSTR(WMI_SERVICE_TX_PWR_PER_PEER);
500 SVCSTR(WMI_SERVICE_SUPPORT_EXTEND_ADDRESS);
501
502 case WMI_SERVICE_MAX:
503 return NULL;
504 }
505
506#undef SVCSTR
507
508 return NULL;
509}
510
511#define WMI_SERVICE_IS_ENABLED(wmi_svc_bmap, svc_id, len) \
512 ((svc_id) < (len) && \
513 __le32_to_cpu((wmi_svc_bmap)[(svc_id) / (sizeof(u32))]) & \
514 BIT((svc_id) % (sizeof(u32))))
515
516
517
518
519
520
521#define WMI_EXT_SERVICE_IS_ENABLED(wmi_svc_bmap, svc_id, len) \
522 ((svc_id) >= (len) && \
523 __le32_to_cpu((wmi_svc_bmap)[((svc_id) - (len)) / 28]) & \
524 BIT(((((svc_id) - (len)) % 28) & 0x1f) + 4))
525
526#define SVCMAP(x, y, len) \
527 do { \
528 if ((WMI_SERVICE_IS_ENABLED((in), (x), (len))) || \
529 (WMI_EXT_SERVICE_IS_ENABLED((in), (x), (len)))) \
530 __set_bit(y, out); \
531 } while (0)
532
533static inline void wmi_10x_svc_map(const __le32 *in, unsigned long *out,
534 size_t len)
535{
536 SVCMAP(WMI_10X_SERVICE_BEACON_OFFLOAD,
537 WMI_SERVICE_BEACON_OFFLOAD, len);
538 SVCMAP(WMI_10X_SERVICE_SCAN_OFFLOAD,
539 WMI_SERVICE_SCAN_OFFLOAD, len);
540 SVCMAP(WMI_10X_SERVICE_ROAM_OFFLOAD,
541 WMI_SERVICE_ROAM_OFFLOAD, len);
542 SVCMAP(WMI_10X_SERVICE_BCN_MISS_OFFLOAD,
543 WMI_SERVICE_BCN_MISS_OFFLOAD, len);
544 SVCMAP(WMI_10X_SERVICE_STA_PWRSAVE,
545 WMI_SERVICE_STA_PWRSAVE, len);
546 SVCMAP(WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE,
547 WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
548 SVCMAP(WMI_10X_SERVICE_AP_UAPSD,
549 WMI_SERVICE_AP_UAPSD, len);
550 SVCMAP(WMI_10X_SERVICE_AP_DFS,
551 WMI_SERVICE_AP_DFS, len);
552 SVCMAP(WMI_10X_SERVICE_11AC,
553 WMI_SERVICE_11AC, len);
554 SVCMAP(WMI_10X_SERVICE_BLOCKACK,
555 WMI_SERVICE_BLOCKACK, len);
556 SVCMAP(WMI_10X_SERVICE_PHYERR,
557 WMI_SERVICE_PHYERR, len);
558 SVCMAP(WMI_10X_SERVICE_BCN_FILTER,
559 WMI_SERVICE_BCN_FILTER, len);
560 SVCMAP(WMI_10X_SERVICE_RTT,
561 WMI_SERVICE_RTT, len);
562 SVCMAP(WMI_10X_SERVICE_RATECTRL,
563 WMI_SERVICE_RATECTRL, len);
564 SVCMAP(WMI_10X_SERVICE_WOW,
565 WMI_SERVICE_WOW, len);
566 SVCMAP(WMI_10X_SERVICE_RATECTRL_CACHE,
567 WMI_SERVICE_RATECTRL_CACHE, len);
568 SVCMAP(WMI_10X_SERVICE_IRAM_TIDS,
569 WMI_SERVICE_IRAM_TIDS, len);
570 SVCMAP(WMI_10X_SERVICE_BURST,
571 WMI_SERVICE_BURST, len);
572 SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT,
573 WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len);
574 SVCMAP(WMI_10X_SERVICE_FORCE_FW_HANG,
575 WMI_SERVICE_FORCE_FW_HANG, len);
576 SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT,
577 WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len);
578 SVCMAP(WMI_10X_SERVICE_ATF,
579 WMI_SERVICE_ATF, len);
580 SVCMAP(WMI_10X_SERVICE_COEX_GPIO,
581 WMI_SERVICE_COEX_GPIO, len);
582 SVCMAP(WMI_10X_SERVICE_AUX_SPECTRAL_INTF,
583 WMI_SERVICE_AUX_SPECTRAL_INTF, len);
584 SVCMAP(WMI_10X_SERVICE_AUX_CHAN_LOAD_INTF,
585 WMI_SERVICE_AUX_CHAN_LOAD_INTF, len);
586 SVCMAP(WMI_10X_SERVICE_BSS_CHANNEL_INFO_64,
587 WMI_SERVICE_BSS_CHANNEL_INFO_64, len);
588 SVCMAP(WMI_10X_SERVICE_MESH,
589 WMI_SERVICE_MESH_11S, len);
590 SVCMAP(WMI_10X_SERVICE_EXT_RES_CFG_SUPPORT,
591 WMI_SERVICE_EXT_RES_CFG_SUPPORT, len);
592 SVCMAP(WMI_10X_SERVICE_PEER_STATS,
593 WMI_SERVICE_PEER_STATS, len);
594 SVCMAP(WMI_10X_SERVICE_RESET_CHIP,
595 WMI_SERVICE_RESET_CHIP, len);
596 SVCMAP(WMI_10X_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
597 WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS, len);
598 SVCMAP(WMI_10X_SERVICE_BB_TIMING_CONFIG_SUPPORT,
599 WMI_SERVICE_BB_TIMING_CONFIG_SUPPORT, len);
600 SVCMAP(WMI_10X_SERVICE_PER_PACKET_SW_ENCRYPT,
601 WMI_SERVICE_PER_PACKET_SW_ENCRYPT, len);
602}
603
604static inline void wmi_main_svc_map(const __le32 *in, unsigned long *out,
605 size_t len)
606{
607 SVCMAP(WMI_MAIN_SERVICE_BEACON_OFFLOAD,
608 WMI_SERVICE_BEACON_OFFLOAD, len);
609 SVCMAP(WMI_MAIN_SERVICE_SCAN_OFFLOAD,
610 WMI_SERVICE_SCAN_OFFLOAD, len);
611 SVCMAP(WMI_MAIN_SERVICE_ROAM_OFFLOAD,
612 WMI_SERVICE_ROAM_OFFLOAD, len);
613 SVCMAP(WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD,
614 WMI_SERVICE_BCN_MISS_OFFLOAD, len);
615 SVCMAP(WMI_MAIN_SERVICE_STA_PWRSAVE,
616 WMI_SERVICE_STA_PWRSAVE, len);
617 SVCMAP(WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE,
618 WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
619 SVCMAP(WMI_MAIN_SERVICE_AP_UAPSD,
620 WMI_SERVICE_AP_UAPSD, len);
621 SVCMAP(WMI_MAIN_SERVICE_AP_DFS,
622 WMI_SERVICE_AP_DFS, len);
623 SVCMAP(WMI_MAIN_SERVICE_11AC,
624 WMI_SERVICE_11AC, len);
625 SVCMAP(WMI_MAIN_SERVICE_BLOCKACK,
626 WMI_SERVICE_BLOCKACK, len);
627 SVCMAP(WMI_MAIN_SERVICE_PHYERR,
628 WMI_SERVICE_PHYERR, len);
629 SVCMAP(WMI_MAIN_SERVICE_BCN_FILTER,
630 WMI_SERVICE_BCN_FILTER, len);
631 SVCMAP(WMI_MAIN_SERVICE_RTT,
632 WMI_SERVICE_RTT, len);
633 SVCMAP(WMI_MAIN_SERVICE_RATECTRL,
634 WMI_SERVICE_RATECTRL, len);
635 SVCMAP(WMI_MAIN_SERVICE_WOW,
636 WMI_SERVICE_WOW, len);
637 SVCMAP(WMI_MAIN_SERVICE_RATECTRL_CACHE,
638 WMI_SERVICE_RATECTRL_CACHE, len);
639 SVCMAP(WMI_MAIN_SERVICE_IRAM_TIDS,
640 WMI_SERVICE_IRAM_TIDS, len);
641 SVCMAP(WMI_MAIN_SERVICE_ARPNS_OFFLOAD,
642 WMI_SERVICE_ARPNS_OFFLOAD, len);
643 SVCMAP(WMI_MAIN_SERVICE_NLO,
644 WMI_SERVICE_NLO, len);
645 SVCMAP(WMI_MAIN_SERVICE_GTK_OFFLOAD,
646 WMI_SERVICE_GTK_OFFLOAD, len);
647 SVCMAP(WMI_MAIN_SERVICE_SCAN_SCH,
648 WMI_SERVICE_SCAN_SCH, len);
649 SVCMAP(WMI_MAIN_SERVICE_CSA_OFFLOAD,
650 WMI_SERVICE_CSA_OFFLOAD, len);
651 SVCMAP(WMI_MAIN_SERVICE_CHATTER,
652 WMI_SERVICE_CHATTER, len);
653 SVCMAP(WMI_MAIN_SERVICE_COEX_FREQAVOID,
654 WMI_SERVICE_COEX_FREQAVOID, len);
655 SVCMAP(WMI_MAIN_SERVICE_PACKET_POWER_SAVE,
656 WMI_SERVICE_PACKET_POWER_SAVE, len);
657 SVCMAP(WMI_MAIN_SERVICE_FORCE_FW_HANG,
658 WMI_SERVICE_FORCE_FW_HANG, len);
659 SVCMAP(WMI_MAIN_SERVICE_GPIO,
660 WMI_SERVICE_GPIO, len);
661 SVCMAP(WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
662 WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM, len);
663 SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
664 WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len);
665 SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
666 WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len);
667 SVCMAP(WMI_MAIN_SERVICE_STA_KEEP_ALIVE,
668 WMI_SERVICE_STA_KEEP_ALIVE, len);
669 SVCMAP(WMI_MAIN_SERVICE_TX_ENCAP,
670 WMI_SERVICE_TX_ENCAP, len);
671}
672
673static inline void wmi_10_4_svc_map(const __le32 *in, unsigned long *out,
674 size_t len)
675{
676 SVCMAP(WMI_10_4_SERVICE_BEACON_OFFLOAD,
677 WMI_SERVICE_BEACON_OFFLOAD, len);
678 SVCMAP(WMI_10_4_SERVICE_SCAN_OFFLOAD,
679 WMI_SERVICE_SCAN_OFFLOAD, len);
680 SVCMAP(WMI_10_4_SERVICE_ROAM_OFFLOAD,
681 WMI_SERVICE_ROAM_OFFLOAD, len);
682 SVCMAP(WMI_10_4_SERVICE_BCN_MISS_OFFLOAD,
683 WMI_SERVICE_BCN_MISS_OFFLOAD, len);
684 SVCMAP(WMI_10_4_SERVICE_STA_PWRSAVE,
685 WMI_SERVICE_STA_PWRSAVE, len);
686 SVCMAP(WMI_10_4_SERVICE_STA_ADVANCED_PWRSAVE,
687 WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
688 SVCMAP(WMI_10_4_SERVICE_AP_UAPSD,
689 WMI_SERVICE_AP_UAPSD, len);
690 SVCMAP(WMI_10_4_SERVICE_AP_DFS,
691 WMI_SERVICE_AP_DFS, len);
692 SVCMAP(WMI_10_4_SERVICE_11AC,
693 WMI_SERVICE_11AC, len);
694 SVCMAP(WMI_10_4_SERVICE_BLOCKACK,
695 WMI_SERVICE_BLOCKACK, len);
696 SVCMAP(WMI_10_4_SERVICE_PHYERR,
697 WMI_SERVICE_PHYERR, len);
698 SVCMAP(WMI_10_4_SERVICE_BCN_FILTER,
699 WMI_SERVICE_BCN_FILTER, len);
700 SVCMAP(WMI_10_4_SERVICE_RTT,
701 WMI_SERVICE_RTT, len);
702 SVCMAP(WMI_10_4_SERVICE_RATECTRL,
703 WMI_SERVICE_RATECTRL, len);
704 SVCMAP(WMI_10_4_SERVICE_WOW,
705 WMI_SERVICE_WOW, len);
706 SVCMAP(WMI_10_4_SERVICE_RATECTRL_CACHE,
707 WMI_SERVICE_RATECTRL_CACHE, len);
708 SVCMAP(WMI_10_4_SERVICE_IRAM_TIDS,
709 WMI_SERVICE_IRAM_TIDS, len);
710 SVCMAP(WMI_10_4_SERVICE_BURST,
711 WMI_SERVICE_BURST, len);
712 SVCMAP(WMI_10_4_SERVICE_SMART_ANTENNA_SW_SUPPORT,
713 WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len);
714 SVCMAP(WMI_10_4_SERVICE_GTK_OFFLOAD,
715 WMI_SERVICE_GTK_OFFLOAD, len);
716 SVCMAP(WMI_10_4_SERVICE_SCAN_SCH,
717 WMI_SERVICE_SCAN_SCH, len);
718 SVCMAP(WMI_10_4_SERVICE_CSA_OFFLOAD,
719 WMI_SERVICE_CSA_OFFLOAD, len);
720 SVCMAP(WMI_10_4_SERVICE_CHATTER,
721 WMI_SERVICE_CHATTER, len);
722 SVCMAP(WMI_10_4_SERVICE_COEX_FREQAVOID,
723 WMI_SERVICE_COEX_FREQAVOID, len);
724 SVCMAP(WMI_10_4_SERVICE_PACKET_POWER_SAVE,
725 WMI_SERVICE_PACKET_POWER_SAVE, len);
726 SVCMAP(WMI_10_4_SERVICE_FORCE_FW_HANG,
727 WMI_SERVICE_FORCE_FW_HANG, len);
728 SVCMAP(WMI_10_4_SERVICE_SMART_ANTENNA_HW_SUPPORT,
729 WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len);
730 SVCMAP(WMI_10_4_SERVICE_GPIO,
731 WMI_SERVICE_GPIO, len);
732 SVCMAP(WMI_10_4_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
733 WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len);
734 SVCMAP(WMI_10_4_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
735 WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len);
736 SVCMAP(WMI_10_4_SERVICE_STA_KEEP_ALIVE,
737 WMI_SERVICE_STA_KEEP_ALIVE, len);
738 SVCMAP(WMI_10_4_SERVICE_TX_ENCAP,
739 WMI_SERVICE_TX_ENCAP, len);
740 SVCMAP(WMI_10_4_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
741 WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC, len);
742 SVCMAP(WMI_10_4_SERVICE_EARLY_RX,
743 WMI_SERVICE_EARLY_RX, len);
744 SVCMAP(WMI_10_4_SERVICE_ENHANCED_PROXY_STA,
745 WMI_SERVICE_ENHANCED_PROXY_STA, len);
746 SVCMAP(WMI_10_4_SERVICE_TT,
747 WMI_SERVICE_TT, len);
748 SVCMAP(WMI_10_4_SERVICE_ATF,
749 WMI_SERVICE_ATF, len);
750 SVCMAP(WMI_10_4_SERVICE_PEER_CACHING,
751 WMI_SERVICE_PEER_CACHING, len);
752 SVCMAP(WMI_10_4_SERVICE_COEX_GPIO,
753 WMI_SERVICE_COEX_GPIO, len);
754 SVCMAP(WMI_10_4_SERVICE_AUX_SPECTRAL_INTF,
755 WMI_SERVICE_AUX_SPECTRAL_INTF, len);
756 SVCMAP(WMI_10_4_SERVICE_AUX_CHAN_LOAD_INTF,
757 WMI_SERVICE_AUX_CHAN_LOAD_INTF, len);
758 SVCMAP(WMI_10_4_SERVICE_BSS_CHANNEL_INFO_64,
759 WMI_SERVICE_BSS_CHANNEL_INFO_64, len);
760 SVCMAP(WMI_10_4_SERVICE_EXT_RES_CFG_SUPPORT,
761 WMI_SERVICE_EXT_RES_CFG_SUPPORT, len);
762 SVCMAP(WMI_10_4_SERVICE_MESH_NON_11S,
763 WMI_SERVICE_MESH_NON_11S, len);
764 SVCMAP(WMI_10_4_SERVICE_RESTRT_CHNL_SUPPORT,
765 WMI_SERVICE_RESTRT_CHNL_SUPPORT, len);
766 SVCMAP(WMI_10_4_SERVICE_PEER_STATS,
767 WMI_SERVICE_PEER_STATS, len);
768 SVCMAP(WMI_10_4_SERVICE_MESH_11S,
769 WMI_SERVICE_MESH_11S, len);
770 SVCMAP(WMI_10_4_SERVICE_PERIODIC_CHAN_STAT_SUPPORT,
771 WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT, len);
772 SVCMAP(WMI_10_4_SERVICE_TX_MODE_PUSH_ONLY,
773 WMI_SERVICE_TX_MODE_PUSH_ONLY, len);
774 SVCMAP(WMI_10_4_SERVICE_TX_MODE_PUSH_PULL,
775 WMI_SERVICE_TX_MODE_PUSH_PULL, len);
776 SVCMAP(WMI_10_4_SERVICE_TX_MODE_DYNAMIC,
777 WMI_SERVICE_TX_MODE_DYNAMIC, len);
778 SVCMAP(WMI_10_4_SERVICE_VDEV_RX_FILTER,
779 WMI_SERVICE_VDEV_RX_FILTER, len);
780 SVCMAP(WMI_10_4_SERVICE_BTCOEX,
781 WMI_SERVICE_BTCOEX, len);
782 SVCMAP(WMI_10_4_SERVICE_CHECK_CAL_VERSION,
783 WMI_SERVICE_CHECK_CAL_VERSION, len);
784 SVCMAP(WMI_10_4_SERVICE_DBGLOG_WARN2,
785 WMI_SERVICE_DBGLOG_WARN2, len);
786 SVCMAP(WMI_10_4_SERVICE_BTCOEX_DUTY_CYCLE,
787 WMI_SERVICE_BTCOEX_DUTY_CYCLE, len);
788 SVCMAP(WMI_10_4_SERVICE_4_WIRE_COEX_SUPPORT,
789 WMI_SERVICE_4_WIRE_COEX_SUPPORT, len);
790 SVCMAP(WMI_10_4_SERVICE_EXTENDED_NSS_SUPPORT,
791 WMI_SERVICE_EXTENDED_NSS_SUPPORT, len);
792 SVCMAP(WMI_10_4_SERVICE_PROG_GPIO_BAND_SELECT,
793 WMI_SERVICE_PROG_GPIO_BAND_SELECT, len);
794 SVCMAP(WMI_10_4_SERVICE_SMART_LOGGING_SUPPORT,
795 WMI_SERVICE_SMART_LOGGING_SUPPORT, len);
796 SVCMAP(WMI_10_4_SERVICE_TDLS,
797 WMI_SERVICE_TDLS, len);
798 SVCMAP(WMI_10_4_SERVICE_TDLS_OFFCHAN,
799 WMI_SERVICE_TDLS_OFFCHAN, len);
800 SVCMAP(WMI_10_4_SERVICE_TDLS_UAPSD_BUFFER_STA,
801 WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, len);
802 SVCMAP(WMI_10_4_SERVICE_TDLS_UAPSD_SLEEP_STA,
803 WMI_SERVICE_TDLS_UAPSD_SLEEP_STA, len);
804 SVCMAP(WMI_10_4_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE,
805 WMI_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE, len);
806 SVCMAP(WMI_10_4_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
807 WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, len);
808 SVCMAP(WMI_10_4_SERVICE_TDLS_WIDER_BANDWIDTH,
809 WMI_SERVICE_TDLS_WIDER_BANDWIDTH, len);
810 SVCMAP(WMI_10_4_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
811 WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS, len);
812 SVCMAP(WMI_10_4_SERVICE_HOST_DFS_CHECK_SUPPORT,
813 WMI_SERVICE_HOST_DFS_CHECK_SUPPORT, len);
814 SVCMAP(WMI_10_4_SERVICE_TPC_STATS_FINAL,
815 WMI_SERVICE_TPC_STATS_FINAL, len);
816 SVCMAP(WMI_10_4_SERVICE_TX_DATA_ACK_RSSI,
817 WMI_SERVICE_TX_DATA_ACK_RSSI, len);
818 SVCMAP(WMI_10_4_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT,
819 WMI_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT, len);
820 SVCMAP(WMI_10_4_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT,
821 WMI_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT, len);
822 SVCMAP(WMI_10_4_SERVICE_RTT_RESPONDER_ROLE,
823 WMI_SERVICE_RTT_RESPONDER_ROLE, len);
824 SVCMAP(WMI_10_4_SERVICE_PER_PACKET_SW_ENCRYPT,
825 WMI_SERVICE_PER_PACKET_SW_ENCRYPT, len);
826 SVCMAP(WMI_10_4_SERVICE_REPORT_AIRTIME,
827 WMI_SERVICE_REPORT_AIRTIME, len);
828 SVCMAP(WMI_10_4_SERVICE_TX_PWR_PER_PEER,
829 WMI_SERVICE_TX_PWR_PER_PEER, len);
830}
831
832#undef SVCMAP
833
834
835struct wmi_mac_addr {
836 union {
837 u8 addr[6];
838 struct {
839 u32 word0;
840 u32 word1;
841 } __packed;
842 } __packed;
843} __packed;
844
845struct wmi_cmd_map {
846 u32 init_cmdid;
847 u32 start_scan_cmdid;
848 u32 stop_scan_cmdid;
849 u32 scan_chan_list_cmdid;
850 u32 scan_sch_prio_tbl_cmdid;
851 u32 scan_prob_req_oui_cmdid;
852 u32 pdev_set_regdomain_cmdid;
853 u32 pdev_set_channel_cmdid;
854 u32 pdev_set_param_cmdid;
855 u32 pdev_pktlog_enable_cmdid;
856 u32 pdev_pktlog_disable_cmdid;
857 u32 pdev_set_wmm_params_cmdid;
858 u32 pdev_set_ht_cap_ie_cmdid;
859 u32 pdev_set_vht_cap_ie_cmdid;
860 u32 pdev_set_dscp_tid_map_cmdid;
861 u32 pdev_set_quiet_mode_cmdid;
862 u32 pdev_green_ap_ps_enable_cmdid;
863 u32 pdev_get_tpc_config_cmdid;
864 u32 pdev_set_base_macaddr_cmdid;
865 u32 vdev_create_cmdid;
866 u32 vdev_delete_cmdid;
867 u32 vdev_start_request_cmdid;
868 u32 vdev_restart_request_cmdid;
869 u32 vdev_up_cmdid;
870 u32 vdev_stop_cmdid;
871 u32 vdev_down_cmdid;
872 u32 vdev_set_param_cmdid;
873 u32 vdev_install_key_cmdid;
874 u32 peer_create_cmdid;
875 u32 peer_delete_cmdid;
876 u32 peer_flush_tids_cmdid;
877 u32 peer_set_param_cmdid;
878 u32 peer_assoc_cmdid;
879 u32 peer_add_wds_entry_cmdid;
880 u32 peer_remove_wds_entry_cmdid;
881 u32 peer_mcast_group_cmdid;
882 u32 bcn_tx_cmdid;
883 u32 pdev_send_bcn_cmdid;
884 u32 bcn_tmpl_cmdid;
885 u32 bcn_filter_rx_cmdid;
886 u32 prb_req_filter_rx_cmdid;
887 u32 mgmt_tx_cmdid;
888 u32 mgmt_tx_send_cmdid;
889 u32 prb_tmpl_cmdid;
890 u32 addba_clear_resp_cmdid;
891 u32 addba_send_cmdid;
892 u32 addba_status_cmdid;
893 u32 delba_send_cmdid;
894 u32 addba_set_resp_cmdid;
895 u32 send_singleamsdu_cmdid;
896 u32 sta_powersave_mode_cmdid;
897 u32 sta_powersave_param_cmdid;
898 u32 sta_mimo_ps_mode_cmdid;
899 u32 pdev_dfs_enable_cmdid;
900 u32 pdev_dfs_disable_cmdid;
901 u32 roam_scan_mode;
902 u32 roam_scan_rssi_threshold;
903 u32 roam_scan_period;
904 u32 roam_scan_rssi_change_threshold;
905 u32 roam_ap_profile;
906 u32 ofl_scan_add_ap_profile;
907 u32 ofl_scan_remove_ap_profile;
908 u32 ofl_scan_period;
909 u32 p2p_dev_set_device_info;
910 u32 p2p_dev_set_discoverability;
911 u32 p2p_go_set_beacon_ie;
912 u32 p2p_go_set_probe_resp_ie;
913 u32 p2p_set_vendor_ie_data_cmdid;
914 u32 ap_ps_peer_param_cmdid;
915 u32 ap_ps_peer_uapsd_coex_cmdid;
916 u32 peer_rate_retry_sched_cmdid;
917 u32 wlan_profile_trigger_cmdid;
918 u32 wlan_profile_set_hist_intvl_cmdid;
919 u32 wlan_profile_get_profile_data_cmdid;
920 u32 wlan_profile_enable_profile_id_cmdid;
921 u32 wlan_profile_list_profile_id_cmdid;
922 u32 pdev_suspend_cmdid;
923 u32 pdev_resume_cmdid;
924 u32 add_bcn_filter_cmdid;
925 u32 rmv_bcn_filter_cmdid;
926 u32 wow_add_wake_pattern_cmdid;
927 u32 wow_del_wake_pattern_cmdid;
928 u32 wow_enable_disable_wake_event_cmdid;
929 u32 wow_enable_cmdid;
930 u32 wow_hostwakeup_from_sleep_cmdid;
931 u32 rtt_measreq_cmdid;
932 u32 rtt_tsf_cmdid;
933 u32 vdev_spectral_scan_configure_cmdid;
934 u32 vdev_spectral_scan_enable_cmdid;
935 u32 request_stats_cmdid;
936 u32 set_arp_ns_offload_cmdid;
937 u32 network_list_offload_config_cmdid;
938 u32 gtk_offload_cmdid;
939 u32 csa_offload_enable_cmdid;
940 u32 csa_offload_chanswitch_cmdid;
941 u32 chatter_set_mode_cmdid;
942 u32 peer_tid_addba_cmdid;
943 u32 peer_tid_delba_cmdid;
944 u32 sta_dtim_ps_method_cmdid;
945 u32 sta_uapsd_auto_trig_cmdid;
946 u32 sta_keepalive_cmd;
947 u32 echo_cmdid;
948 u32 pdev_utf_cmdid;
949 u32 dbglog_cfg_cmdid;
950 u32 pdev_qvit_cmdid;
951 u32 pdev_ftm_intg_cmdid;
952 u32 vdev_set_keepalive_cmdid;
953 u32 vdev_get_keepalive_cmdid;
954 u32 force_fw_hang_cmdid;
955 u32 gpio_config_cmdid;
956 u32 gpio_output_cmdid;
957 u32 pdev_get_temperature_cmdid;
958 u32 vdev_set_wmm_params_cmdid;
959 u32 tdls_set_state_cmdid;
960 u32 tdls_peer_update_cmdid;
961 u32 adaptive_qcs_cmdid;
962 u32 scan_update_request_cmdid;
963 u32 vdev_standby_response_cmdid;
964 u32 vdev_resume_response_cmdid;
965 u32 wlan_peer_caching_add_peer_cmdid;
966 u32 wlan_peer_caching_evict_peer_cmdid;
967 u32 wlan_peer_caching_restore_peer_cmdid;
968 u32 wlan_peer_caching_print_all_peers_info_cmdid;
969 u32 peer_update_wds_entry_cmdid;
970 u32 peer_add_proxy_sta_entry_cmdid;
971 u32 rtt_keepalive_cmdid;
972 u32 oem_req_cmdid;
973 u32 nan_cmdid;
974 u32 vdev_ratemask_cmdid;
975 u32 qboost_cfg_cmdid;
976 u32 pdev_smart_ant_enable_cmdid;
977 u32 pdev_smart_ant_set_rx_antenna_cmdid;
978 u32 peer_smart_ant_set_tx_antenna_cmdid;
979 u32 peer_smart_ant_set_train_info_cmdid;
980 u32 peer_smart_ant_set_node_config_ops_cmdid;
981 u32 pdev_set_antenna_switch_table_cmdid;
982 u32 pdev_set_ctl_table_cmdid;
983 u32 pdev_set_mimogain_table_cmdid;
984 u32 pdev_ratepwr_table_cmdid;
985 u32 pdev_ratepwr_chainmsk_table_cmdid;
986 u32 pdev_fips_cmdid;
987 u32 tt_set_conf_cmdid;
988 u32 fwtest_cmdid;
989 u32 vdev_atf_request_cmdid;
990 u32 peer_atf_request_cmdid;
991 u32 pdev_get_ani_cck_config_cmdid;
992 u32 pdev_get_ani_ofdm_config_cmdid;
993 u32 pdev_reserve_ast_entry_cmdid;
994 u32 pdev_get_nfcal_power_cmdid;
995 u32 pdev_get_tpc_cmdid;
996 u32 pdev_get_ast_info_cmdid;
997 u32 vdev_set_dscp_tid_map_cmdid;
998 u32 pdev_get_info_cmdid;
999 u32 vdev_get_info_cmdid;
1000 u32 vdev_filter_neighbor_rx_packets_cmdid;
1001 u32 mu_cal_start_cmdid;
1002 u32 set_cca_params_cmdid;
1003 u32 pdev_bss_chan_info_request_cmdid;
1004 u32 pdev_enable_adaptive_cca_cmdid;
1005 u32 ext_resource_cfg_cmdid;
1006 u32 vdev_set_ie_cmdid;
1007 u32 set_lteu_config_cmdid;
1008 u32 atf_ssid_grouping_request_cmdid;
1009 u32 peer_atf_ext_request_cmdid;
1010 u32 set_periodic_channel_stats_cfg_cmdid;
1011 u32 peer_bwf_request_cmdid;
1012 u32 btcoex_cfg_cmdid;
1013 u32 peer_tx_mu_txmit_count_cmdid;
1014 u32 peer_tx_mu_txmit_rstcnt_cmdid;
1015 u32 peer_gid_userpos_list_cmdid;
1016 u32 pdev_check_cal_version_cmdid;
1017 u32 coex_version_cfg_cmid;
1018 u32 pdev_get_rx_filter_cmdid;
1019 u32 pdev_extended_nss_cfg_cmdid;
1020 u32 vdev_set_scan_nac_rssi_cmdid;
1021 u32 prog_gpio_band_select_cmdid;
1022 u32 config_smart_logging_cmdid;
1023 u32 debug_fatal_condition_cmdid;
1024 u32 get_tsf_timer_cmdid;
1025 u32 pdev_get_tpc_table_cmdid;
1026 u32 vdev_sifs_trigger_time_cmdid;
1027 u32 pdev_wds_entry_list_cmdid;
1028 u32 tdls_set_offchan_mode_cmdid;
1029 u32 radar_found_cmdid;
1030 u32 set_bb_timing_cmdid;
1031};
1032
1033
1034
1035
1036enum wmi_cmd_group {
1037
1038 WMI_GRP_START = 0x3,
1039 WMI_GRP_SCAN = WMI_GRP_START,
1040 WMI_GRP_PDEV,
1041 WMI_GRP_VDEV,
1042 WMI_GRP_PEER,
1043 WMI_GRP_MGMT,
1044 WMI_GRP_BA_NEG,
1045 WMI_GRP_STA_PS,
1046 WMI_GRP_DFS,
1047 WMI_GRP_ROAM,
1048 WMI_GRP_OFL_SCAN,
1049 WMI_GRP_P2P,
1050 WMI_GRP_AP_PS,
1051 WMI_GRP_RATE_CTRL,
1052 WMI_GRP_PROFILE,
1053 WMI_GRP_SUSPEND,
1054 WMI_GRP_BCN_FILTER,
1055 WMI_GRP_WOW,
1056 WMI_GRP_RTT,
1057 WMI_GRP_SPECTRAL,
1058 WMI_GRP_STATS,
1059 WMI_GRP_ARP_NS_OFL,
1060 WMI_GRP_NLO_OFL,
1061 WMI_GRP_GTK_OFL,
1062 WMI_GRP_CSA_OFL,
1063 WMI_GRP_CHATTER,
1064 WMI_GRP_TID_ADDBA,
1065 WMI_GRP_MISC,
1066 WMI_GRP_GPIO,
1067};
1068
1069#define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1)
1070#define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1)
1071
1072#define WMI_CMD_UNSUPPORTED 0
1073
1074
1075enum wmi_cmd_id {
1076 WMI_INIT_CMDID = 0x1,
1077
1078
1079 WMI_START_SCAN_CMDID = WMI_CMD_GRP(WMI_GRP_SCAN),
1080 WMI_STOP_SCAN_CMDID,
1081 WMI_SCAN_CHAN_LIST_CMDID,
1082 WMI_SCAN_SCH_PRIO_TBL_CMDID,
1083
1084
1085 WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_CMD_GRP(WMI_GRP_PDEV),
1086 WMI_PDEV_SET_CHANNEL_CMDID,
1087 WMI_PDEV_SET_PARAM_CMDID,
1088 WMI_PDEV_PKTLOG_ENABLE_CMDID,
1089 WMI_PDEV_PKTLOG_DISABLE_CMDID,
1090 WMI_PDEV_SET_WMM_PARAMS_CMDID,
1091 WMI_PDEV_SET_HT_CAP_IE_CMDID,
1092 WMI_PDEV_SET_VHT_CAP_IE_CMDID,
1093 WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
1094 WMI_PDEV_SET_QUIET_MODE_CMDID,
1095 WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1096 WMI_PDEV_GET_TPC_CONFIG_CMDID,
1097 WMI_PDEV_SET_BASE_MACADDR_CMDID,
1098
1099
1100 WMI_VDEV_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_VDEV),
1101 WMI_VDEV_DELETE_CMDID,
1102 WMI_VDEV_START_REQUEST_CMDID,
1103 WMI_VDEV_RESTART_REQUEST_CMDID,
1104 WMI_VDEV_UP_CMDID,
1105 WMI_VDEV_STOP_CMDID,
1106 WMI_VDEV_DOWN_CMDID,
1107 WMI_VDEV_SET_PARAM_CMDID,
1108 WMI_VDEV_INSTALL_KEY_CMDID,
1109
1110
1111 WMI_PEER_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_PEER),
1112 WMI_PEER_DELETE_CMDID,
1113 WMI_PEER_FLUSH_TIDS_CMDID,
1114 WMI_PEER_SET_PARAM_CMDID,
1115 WMI_PEER_ASSOC_CMDID,
1116 WMI_PEER_ADD_WDS_ENTRY_CMDID,
1117 WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
1118 WMI_PEER_MCAST_GROUP_CMDID,
1119
1120
1121 WMI_BCN_TX_CMDID = WMI_CMD_GRP(WMI_GRP_MGMT),
1122 WMI_PDEV_SEND_BCN_CMDID,
1123 WMI_BCN_TMPL_CMDID,
1124 WMI_BCN_FILTER_RX_CMDID,
1125 WMI_PRB_REQ_FILTER_RX_CMDID,
1126 WMI_MGMT_TX_CMDID,
1127 WMI_PRB_TMPL_CMDID,
1128
1129
1130 WMI_ADDBA_CLEAR_RESP_CMDID = WMI_CMD_GRP(WMI_GRP_BA_NEG),
1131 WMI_ADDBA_SEND_CMDID,
1132 WMI_ADDBA_STATUS_CMDID,
1133 WMI_DELBA_SEND_CMDID,
1134 WMI_ADDBA_SET_RESP_CMDID,
1135 WMI_SEND_SINGLEAMSDU_CMDID,
1136
1137
1138 WMI_STA_POWERSAVE_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_STA_PS),
1139 WMI_STA_POWERSAVE_PARAM_CMDID,
1140 WMI_STA_MIMO_PS_MODE_CMDID,
1141
1142
1143 WMI_PDEV_DFS_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_DFS),
1144 WMI_PDEV_DFS_DISABLE_CMDID,
1145
1146
1147 WMI_ROAM_SCAN_MODE = WMI_CMD_GRP(WMI_GRP_ROAM),
1148 WMI_ROAM_SCAN_RSSI_THRESHOLD,
1149 WMI_ROAM_SCAN_PERIOD,
1150 WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1151 WMI_ROAM_AP_PROFILE,
1152
1153
1154 WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_CMD_GRP(WMI_GRP_OFL_SCAN),
1155 WMI_OFL_SCAN_REMOVE_AP_PROFILE,
1156 WMI_OFL_SCAN_PERIOD,
1157
1158
1159 WMI_P2P_DEV_SET_DEVICE_INFO = WMI_CMD_GRP(WMI_GRP_P2P),
1160 WMI_P2P_DEV_SET_DISCOVERABILITY,
1161 WMI_P2P_GO_SET_BEACON_IE,
1162 WMI_P2P_GO_SET_PROBE_RESP_IE,
1163 WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
1164
1165
1166 WMI_AP_PS_PEER_PARAM_CMDID = WMI_CMD_GRP(WMI_GRP_AP_PS),
1167 WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
1168
1169
1170 WMI_PEER_RATE_RETRY_SCHED_CMDID =
1171 WMI_CMD_GRP(WMI_GRP_RATE_CTRL),
1172
1173
1174 WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_CMD_GRP(WMI_GRP_PROFILE),
1175 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1176 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1177 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1178 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1179
1180
1181 WMI_PDEV_SUSPEND_CMDID = WMI_CMD_GRP(WMI_GRP_SUSPEND),
1182 WMI_PDEV_RESUME_CMDID,
1183
1184
1185 WMI_ADD_BCN_FILTER_CMDID = WMI_CMD_GRP(WMI_GRP_BCN_FILTER),
1186 WMI_RMV_BCN_FILTER_CMDID,
1187
1188
1189 WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_CMD_GRP(WMI_GRP_WOW),
1190 WMI_WOW_DEL_WAKE_PATTERN_CMDID,
1191 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1192 WMI_WOW_ENABLE_CMDID,
1193 WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1194
1195
1196 WMI_RTT_MEASREQ_CMDID = WMI_CMD_GRP(WMI_GRP_RTT),
1197 WMI_RTT_TSF_CMDID,
1198
1199
1200 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_CMD_GRP(WMI_GRP_SPECTRAL),
1201 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1202
1203
1204 WMI_REQUEST_STATS_CMDID = WMI_CMD_GRP(WMI_GRP_STATS),
1205
1206
1207 WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_ARP_NS_OFL),
1208
1209
1210 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_NLO_OFL),
1211
1212
1213 WMI_GTK_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_GTK_OFL),
1214
1215
1216 WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_CSA_OFL),
1217 WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
1218
1219
1220 WMI_CHATTER_SET_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_CHATTER),
1221
1222
1223 WMI_PEER_TID_ADDBA_CMDID = WMI_CMD_GRP(WMI_GRP_TID_ADDBA),
1224 WMI_PEER_TID_DELBA_CMDID,
1225
1226
1227 WMI_STA_DTIM_PS_METHOD_CMDID,
1228
1229 WMI_STA_UAPSD_AUTO_TRIG_CMDID,
1230
1231
1232
1233
1234 WMI_STA_KEEPALIVE_CMD,
1235
1236
1237 WMI_ECHO_CMDID = WMI_CMD_GRP(WMI_GRP_MISC),
1238 WMI_PDEV_UTF_CMDID,
1239 WMI_DBGLOG_CFG_CMDID,
1240 WMI_PDEV_QVIT_CMDID,
1241 WMI_PDEV_FTM_INTG_CMDID,
1242 WMI_VDEV_SET_KEEPALIVE_CMDID,
1243 WMI_VDEV_GET_KEEPALIVE_CMDID,
1244 WMI_FORCE_FW_HANG_CMDID,
1245
1246
1247 WMI_GPIO_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_GPIO),
1248 WMI_GPIO_OUTPUT_CMDID,
1249};
1250
1251enum wmi_event_id {
1252 WMI_SERVICE_READY_EVENTID = 0x1,
1253 WMI_READY_EVENTID,
1254 WMI_SERVICE_AVAILABLE_EVENTID,
1255
1256
1257 WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN),
1258
1259
1260 WMI_PDEV_TPC_CONFIG_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PDEV),
1261 WMI_CHAN_INFO_EVENTID,
1262 WMI_PHYERR_EVENTID,
1263
1264
1265 WMI_VDEV_START_RESP_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_VDEV),
1266 WMI_VDEV_STOPPED_EVENTID,
1267 WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID,
1268
1269
1270 WMI_PEER_STA_KICKOUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PEER),
1271
1272
1273 WMI_MGMT_RX_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MGMT),
1274 WMI_HOST_SWBA_EVENTID,
1275 WMI_TBTTOFFSET_UPDATE_EVENTID,
1276
1277
1278 WMI_TX_DELBA_COMPLETE_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_BA_NEG),
1279 WMI_TX_ADDBA_COMPLETE_EVENTID,
1280
1281
1282 WMI_ROAM_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_ROAM),
1283 WMI_PROFILE_MATCH,
1284
1285
1286 WMI_WOW_WAKEUP_HOST_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_WOW),
1287
1288
1289 WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_RTT),
1290 WMI_TSF_MEASUREMENT_REPORT_EVENTID,
1291 WMI_RTT_ERROR_REPORT_EVENTID,
1292
1293
1294 WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GTK_OFL),
1295 WMI_GTK_REKEY_FAIL_EVENTID,
1296
1297
1298 WMI_CSA_HANDLING_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_CSA_OFL),
1299
1300
1301 WMI_ECHO_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MISC),
1302 WMI_PDEV_UTF_EVENTID,
1303 WMI_DEBUG_MESG_EVENTID,
1304 WMI_UPDATE_STATS_EVENTID,
1305 WMI_DEBUG_PRINT_EVENTID,
1306 WMI_DCS_INTERFERENCE_EVENTID,
1307 WMI_PDEV_QVIT_EVENTID,
1308 WMI_WLAN_PROFILE_DATA_EVENTID,
1309 WMI_PDEV_FTM_INTG_EVENTID,
1310 WMI_WLAN_FREQ_AVOID_EVENTID,
1311 WMI_VDEV_GET_KEEPALIVE_EVENTID,
1312
1313
1314 WMI_GPIO_INPUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GPIO),
1315};
1316
1317
1318enum wmi_10x_cmd_id {
1319 WMI_10X_START_CMDID = 0x9000,
1320 WMI_10X_END_CMDID = 0x9FFF,
1321
1322
1323 WMI_10X_INIT_CMDID,
1324
1325
1326
1327 WMI_10X_START_SCAN_CMDID = WMI_10X_START_CMDID,
1328 WMI_10X_STOP_SCAN_CMDID,
1329 WMI_10X_SCAN_CHAN_LIST_CMDID,
1330 WMI_10X_ECHO_CMDID,
1331
1332
1333 WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
1334 WMI_10X_PDEV_SET_CHANNEL_CMDID,
1335 WMI_10X_PDEV_SET_PARAM_CMDID,
1336 WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
1337 WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
1338 WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
1339 WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
1340 WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
1341 WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
1342 WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
1343 WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
1344 WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1345 WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
1346
1347
1348 WMI_10X_VDEV_CREATE_CMDID,
1349 WMI_10X_VDEV_DELETE_CMDID,
1350 WMI_10X_VDEV_START_REQUEST_CMDID,
1351 WMI_10X_VDEV_RESTART_REQUEST_CMDID,
1352 WMI_10X_VDEV_UP_CMDID,
1353 WMI_10X_VDEV_STOP_CMDID,
1354 WMI_10X_VDEV_DOWN_CMDID,
1355 WMI_10X_VDEV_STANDBY_RESPONSE_CMDID,
1356 WMI_10X_VDEV_RESUME_RESPONSE_CMDID,
1357 WMI_10X_VDEV_SET_PARAM_CMDID,
1358 WMI_10X_VDEV_INSTALL_KEY_CMDID,
1359
1360
1361 WMI_10X_PEER_CREATE_CMDID,
1362 WMI_10X_PEER_DELETE_CMDID,
1363 WMI_10X_PEER_FLUSH_TIDS_CMDID,
1364 WMI_10X_PEER_SET_PARAM_CMDID,
1365 WMI_10X_PEER_ASSOC_CMDID,
1366 WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
1367 WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
1368 WMI_10X_PEER_MCAST_GROUP_CMDID,
1369
1370
1371
1372 WMI_10X_BCN_TX_CMDID,
1373 WMI_10X_BCN_PRB_TMPL_CMDID,
1374 WMI_10X_BCN_FILTER_RX_CMDID,
1375 WMI_10X_PRB_REQ_FILTER_RX_CMDID,
1376 WMI_10X_MGMT_TX_CMDID,
1377
1378
1379 WMI_10X_ADDBA_CLEAR_RESP_CMDID,
1380 WMI_10X_ADDBA_SEND_CMDID,
1381 WMI_10X_ADDBA_STATUS_CMDID,
1382 WMI_10X_DELBA_SEND_CMDID,
1383 WMI_10X_ADDBA_SET_RESP_CMDID,
1384 WMI_10X_SEND_SINGLEAMSDU_CMDID,
1385
1386
1387 WMI_10X_STA_POWERSAVE_MODE_CMDID,
1388 WMI_10X_STA_POWERSAVE_PARAM_CMDID,
1389 WMI_10X_STA_MIMO_PS_MODE_CMDID,
1390
1391
1392 WMI_10X_DBGLOG_CFG_CMDID,
1393
1394
1395 WMI_10X_PDEV_DFS_ENABLE_CMDID,
1396 WMI_10X_PDEV_DFS_DISABLE_CMDID,
1397
1398
1399 WMI_10X_PDEV_QVIT_CMDID,
1400
1401
1402 WMI_10X_ROAM_SCAN_MODE,
1403 WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
1404 WMI_10X_ROAM_SCAN_PERIOD,
1405 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1406 WMI_10X_ROAM_AP_PROFILE,
1407 WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
1408 WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
1409 WMI_10X_OFL_SCAN_PERIOD,
1410
1411
1412 WMI_10X_P2P_DEV_SET_DEVICE_INFO,
1413 WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
1414 WMI_10X_P2P_GO_SET_BEACON_IE,
1415 WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
1416
1417
1418 WMI_10X_AP_PS_PEER_PARAM_CMDID,
1419 WMI_10X_AP_PS_PEER_UAPSD_COEX_CMDID,
1420
1421
1422 WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
1423
1424
1425 WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
1426 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1427 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1428 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1429 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1430
1431
1432 WMI_10X_PDEV_SUSPEND_CMDID,
1433 WMI_10X_PDEV_RESUME_CMDID,
1434
1435
1436 WMI_10X_ADD_BCN_FILTER_CMDID,
1437 WMI_10X_RMV_BCN_FILTER_CMDID,
1438
1439
1440 WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
1441 WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
1442 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1443 WMI_10X_WOW_ENABLE_CMDID,
1444 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1445
1446
1447 WMI_10X_RTT_MEASREQ_CMDID,
1448 WMI_10X_RTT_TSF_CMDID,
1449
1450
1451 WMI_10X_PDEV_SEND_BCN_CMDID,
1452
1453
1454 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1455 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1456 WMI_10X_REQUEST_STATS_CMDID,
1457
1458
1459 WMI_10X_GPIO_CONFIG_CMDID,
1460 WMI_10X_GPIO_OUTPUT_CMDID,
1461
1462 WMI_10X_PDEV_UTF_CMDID = WMI_10X_END_CMDID - 1,
1463};
1464
1465enum wmi_10x_event_id {
1466 WMI_10X_SERVICE_READY_EVENTID = 0x8000,
1467 WMI_10X_READY_EVENTID,
1468 WMI_10X_START_EVENTID = 0x9000,
1469 WMI_10X_END_EVENTID = 0x9FFF,
1470
1471
1472 WMI_10X_SCAN_EVENTID = WMI_10X_START_EVENTID,
1473 WMI_10X_ECHO_EVENTID,
1474 WMI_10X_DEBUG_MESG_EVENTID,
1475 WMI_10X_UPDATE_STATS_EVENTID,
1476
1477
1478 WMI_10X_INST_RSSI_STATS_EVENTID,
1479
1480
1481 WMI_10X_VDEV_START_RESP_EVENTID,
1482 WMI_10X_VDEV_STANDBY_REQ_EVENTID,
1483 WMI_10X_VDEV_RESUME_REQ_EVENTID,
1484 WMI_10X_VDEV_STOPPED_EVENTID,
1485
1486
1487 WMI_10X_PEER_STA_KICKOUT_EVENTID,
1488
1489
1490 WMI_10X_HOST_SWBA_EVENTID,
1491 WMI_10X_TBTTOFFSET_UPDATE_EVENTID,
1492 WMI_10X_MGMT_RX_EVENTID,
1493
1494
1495 WMI_10X_CHAN_INFO_EVENTID,
1496
1497
1498 WMI_10X_PHYERR_EVENTID,
1499
1500
1501 WMI_10X_ROAM_EVENTID,
1502
1503
1504 WMI_10X_PROFILE_MATCH,
1505
1506
1507 WMI_10X_DEBUG_PRINT_EVENTID,
1508
1509 WMI_10X_PDEV_QVIT_EVENTID,
1510
1511 WMI_10X_WLAN_PROFILE_DATA_EVENTID,
1512
1513
1514 WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID,
1515 WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID,
1516 WMI_10X_RTT_ERROR_REPORT_EVENTID,
1517
1518 WMI_10X_WOW_WAKEUP_HOST_EVENTID,
1519 WMI_10X_DCS_INTERFERENCE_EVENTID,
1520
1521
1522 WMI_10X_PDEV_TPC_CONFIG_EVENTID,
1523
1524 WMI_10X_GPIO_INPUT_EVENTID,
1525 WMI_10X_PDEV_UTF_EVENTID = WMI_10X_END_EVENTID - 1,
1526};
1527
1528enum wmi_10_2_cmd_id {
1529 WMI_10_2_START_CMDID = 0x9000,
1530 WMI_10_2_END_CMDID = 0x9FFF,
1531 WMI_10_2_INIT_CMDID,
1532 WMI_10_2_START_SCAN_CMDID = WMI_10_2_START_CMDID,
1533 WMI_10_2_STOP_SCAN_CMDID,
1534 WMI_10_2_SCAN_CHAN_LIST_CMDID,
1535 WMI_10_2_ECHO_CMDID,
1536 WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
1537 WMI_10_2_PDEV_SET_CHANNEL_CMDID,
1538 WMI_10_2_PDEV_SET_PARAM_CMDID,
1539 WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
1540 WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
1541 WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
1542 WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
1543 WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
1544 WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
1545 WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
1546 WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1547 WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
1548 WMI_10_2_VDEV_CREATE_CMDID,
1549 WMI_10_2_VDEV_DELETE_CMDID,
1550 WMI_10_2_VDEV_START_REQUEST_CMDID,
1551 WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
1552 WMI_10_2_VDEV_UP_CMDID,
1553 WMI_10_2_VDEV_STOP_CMDID,
1554 WMI_10_2_VDEV_DOWN_CMDID,
1555 WMI_10_2_VDEV_STANDBY_RESPONSE_CMDID,
1556 WMI_10_2_VDEV_RESUME_RESPONSE_CMDID,
1557 WMI_10_2_VDEV_SET_PARAM_CMDID,
1558 WMI_10_2_VDEV_INSTALL_KEY_CMDID,
1559 WMI_10_2_VDEV_SET_DSCP_TID_MAP_CMDID,
1560 WMI_10_2_PEER_CREATE_CMDID,
1561 WMI_10_2_PEER_DELETE_CMDID,
1562 WMI_10_2_PEER_FLUSH_TIDS_CMDID,
1563 WMI_10_2_PEER_SET_PARAM_CMDID,
1564 WMI_10_2_PEER_ASSOC_CMDID,
1565 WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
1566 WMI_10_2_PEER_UPDATE_WDS_ENTRY_CMDID,
1567 WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
1568 WMI_10_2_PEER_MCAST_GROUP_CMDID,
1569 WMI_10_2_BCN_TX_CMDID,
1570 WMI_10_2_BCN_PRB_TMPL_CMDID,
1571 WMI_10_2_BCN_FILTER_RX_CMDID,
1572 WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
1573 WMI_10_2_MGMT_TX_CMDID,
1574 WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
1575 WMI_10_2_ADDBA_SEND_CMDID,
1576 WMI_10_2_ADDBA_STATUS_CMDID,
1577 WMI_10_2_DELBA_SEND_CMDID,
1578 WMI_10_2_ADDBA_SET_RESP_CMDID,
1579 WMI_10_2_SEND_SINGLEAMSDU_CMDID,
1580 WMI_10_2_STA_POWERSAVE_MODE_CMDID,
1581 WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
1582 WMI_10_2_STA_MIMO_PS_MODE_CMDID,
1583 WMI_10_2_DBGLOG_CFG_CMDID,
1584 WMI_10_2_PDEV_DFS_ENABLE_CMDID,
1585 WMI_10_2_PDEV_DFS_DISABLE_CMDID,
1586 WMI_10_2_PDEV_QVIT_CMDID,
1587 WMI_10_2_ROAM_SCAN_MODE,
1588 WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
1589 WMI_10_2_ROAM_SCAN_PERIOD,
1590 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1591 WMI_10_2_ROAM_AP_PROFILE,
1592 WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
1593 WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
1594 WMI_10_2_OFL_SCAN_PERIOD,
1595 WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
1596 WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
1597 WMI_10_2_P2P_GO_SET_BEACON_IE,
1598 WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
1599 WMI_10_2_AP_PS_PEER_PARAM_CMDID,
1600 WMI_10_2_AP_PS_PEER_UAPSD_COEX_CMDID,
1601 WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
1602 WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
1603 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1604 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1605 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1606 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1607 WMI_10_2_PDEV_SUSPEND_CMDID,
1608 WMI_10_2_PDEV_RESUME_CMDID,
1609 WMI_10_2_ADD_BCN_FILTER_CMDID,
1610 WMI_10_2_RMV_BCN_FILTER_CMDID,
1611 WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
1612 WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
1613 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1614 WMI_10_2_WOW_ENABLE_CMDID,
1615 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1616 WMI_10_2_RTT_MEASREQ_CMDID,
1617 WMI_10_2_RTT_TSF_CMDID,
1618 WMI_10_2_RTT_KEEPALIVE_CMDID,
1619 WMI_10_2_PDEV_SEND_BCN_CMDID,
1620 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1621 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1622 WMI_10_2_REQUEST_STATS_CMDID,
1623 WMI_10_2_GPIO_CONFIG_CMDID,
1624 WMI_10_2_GPIO_OUTPUT_CMDID,
1625 WMI_10_2_VDEV_RATEMASK_CMDID,
1626 WMI_10_2_PDEV_SMART_ANT_ENABLE_CMDID,
1627 WMI_10_2_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
1628 WMI_10_2_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
1629 WMI_10_2_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
1630 WMI_10_2_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
1631 WMI_10_2_FORCE_FW_HANG_CMDID,
1632 WMI_10_2_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
1633 WMI_10_2_PDEV_SET_CTL_TABLE_CMDID,
1634 WMI_10_2_PDEV_SET_MIMOGAIN_TABLE_CMDID,
1635 WMI_10_2_PDEV_RATEPWR_TABLE_CMDID,
1636 WMI_10_2_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
1637 WMI_10_2_PDEV_GET_INFO,
1638 WMI_10_2_VDEV_GET_INFO,
1639 WMI_10_2_VDEV_ATF_REQUEST_CMDID,
1640 WMI_10_2_PEER_ATF_REQUEST_CMDID,
1641 WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
1642 WMI_10_2_MU_CAL_START_CMDID,
1643 WMI_10_2_SET_LTEU_CONFIG_CMDID,
1644 WMI_10_2_SET_CCA_PARAMS,
1645 WMI_10_2_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
1646 WMI_10_2_FWTEST_CMDID,
1647 WMI_10_2_PDEV_SET_BB_TIMING_CONFIG_CMDID,
1648 WMI_10_2_PDEV_UTF_CMDID = WMI_10_2_END_CMDID - 1,
1649};
1650
1651enum wmi_10_2_event_id {
1652 WMI_10_2_SERVICE_READY_EVENTID = 0x8000,
1653 WMI_10_2_READY_EVENTID,
1654 WMI_10_2_DEBUG_MESG_EVENTID,
1655 WMI_10_2_START_EVENTID = 0x9000,
1656 WMI_10_2_END_EVENTID = 0x9FFF,
1657 WMI_10_2_SCAN_EVENTID = WMI_10_2_START_EVENTID,
1658 WMI_10_2_ECHO_EVENTID,
1659 WMI_10_2_UPDATE_STATS_EVENTID,
1660 WMI_10_2_INST_RSSI_STATS_EVENTID,
1661 WMI_10_2_VDEV_START_RESP_EVENTID,
1662 WMI_10_2_VDEV_STANDBY_REQ_EVENTID,
1663 WMI_10_2_VDEV_RESUME_REQ_EVENTID,
1664 WMI_10_2_VDEV_STOPPED_EVENTID,
1665 WMI_10_2_PEER_STA_KICKOUT_EVENTID,
1666 WMI_10_2_HOST_SWBA_EVENTID,
1667 WMI_10_2_TBTTOFFSET_UPDATE_EVENTID,
1668 WMI_10_2_MGMT_RX_EVENTID,
1669 WMI_10_2_CHAN_INFO_EVENTID,
1670 WMI_10_2_PHYERR_EVENTID,
1671 WMI_10_2_ROAM_EVENTID,
1672 WMI_10_2_PROFILE_MATCH,
1673 WMI_10_2_DEBUG_PRINT_EVENTID,
1674 WMI_10_2_PDEV_QVIT_EVENTID,
1675 WMI_10_2_WLAN_PROFILE_DATA_EVENTID,
1676 WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID,
1677 WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID,
1678 WMI_10_2_RTT_ERROR_REPORT_EVENTID,
1679 WMI_10_2_RTT_KEEPALIVE_EVENTID,
1680 WMI_10_2_WOW_WAKEUP_HOST_EVENTID,
1681 WMI_10_2_DCS_INTERFERENCE_EVENTID,
1682 WMI_10_2_PDEV_TPC_CONFIG_EVENTID,
1683 WMI_10_2_GPIO_INPUT_EVENTID,
1684 WMI_10_2_PEER_RATECODE_LIST_EVENTID,
1685 WMI_10_2_GENERIC_BUFFER_EVENTID,
1686 WMI_10_2_MCAST_BUF_RELEASE_EVENTID,
1687 WMI_10_2_MCAST_LIST_AGEOUT_EVENTID,
1688 WMI_10_2_WDS_PEER_EVENTID,
1689 WMI_10_2_PEER_STA_PS_STATECHG_EVENTID,
1690 WMI_10_2_PDEV_TEMPERATURE_EVENTID,
1691 WMI_10_2_MU_REPORT_EVENTID,
1692 WMI_10_2_PDEV_BSS_CHAN_INFO_EVENTID,
1693 WMI_10_2_PDEV_UTF_EVENTID = WMI_10_2_END_EVENTID - 1,
1694};
1695
1696enum wmi_10_4_cmd_id {
1697 WMI_10_4_START_CMDID = 0x9000,
1698 WMI_10_4_END_CMDID = 0x9FFF,
1699 WMI_10_4_INIT_CMDID,
1700 WMI_10_4_START_SCAN_CMDID = WMI_10_4_START_CMDID,
1701 WMI_10_4_STOP_SCAN_CMDID,
1702 WMI_10_4_SCAN_CHAN_LIST_CMDID,
1703 WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
1704 WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
1705 WMI_10_4_ECHO_CMDID,
1706 WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
1707 WMI_10_4_PDEV_SET_CHANNEL_CMDID,
1708 WMI_10_4_PDEV_SET_PARAM_CMDID,
1709 WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
1710 WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
1711 WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
1712 WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
1713 WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
1714 WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
1715 WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
1716 WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
1717 WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1718 WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
1719 WMI_10_4_VDEV_CREATE_CMDID,
1720 WMI_10_4_VDEV_DELETE_CMDID,
1721 WMI_10_4_VDEV_START_REQUEST_CMDID,
1722 WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
1723 WMI_10_4_VDEV_UP_CMDID,
1724 WMI_10_4_VDEV_STOP_CMDID,
1725 WMI_10_4_VDEV_DOWN_CMDID,
1726 WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
1727 WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
1728 WMI_10_4_VDEV_SET_PARAM_CMDID,
1729 WMI_10_4_VDEV_INSTALL_KEY_CMDID,
1730 WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
1731 WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
1732 WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
1733 WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
1734 WMI_10_4_PEER_CREATE_CMDID,
1735 WMI_10_4_PEER_DELETE_CMDID,
1736 WMI_10_4_PEER_FLUSH_TIDS_CMDID,
1737 WMI_10_4_PEER_SET_PARAM_CMDID,
1738 WMI_10_4_PEER_ASSOC_CMDID,
1739 WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
1740 WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
1741 WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
1742 WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
1743 WMI_10_4_PEER_MCAST_GROUP_CMDID,
1744 WMI_10_4_BCN_TX_CMDID,
1745 WMI_10_4_PDEV_SEND_BCN_CMDID,
1746 WMI_10_4_BCN_PRB_TMPL_CMDID,
1747 WMI_10_4_BCN_FILTER_RX_CMDID,
1748 WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
1749 WMI_10_4_MGMT_TX_CMDID,
1750 WMI_10_4_PRB_TMPL_CMDID,
1751 WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
1752 WMI_10_4_ADDBA_SEND_CMDID,
1753 WMI_10_4_ADDBA_STATUS_CMDID,
1754 WMI_10_4_DELBA_SEND_CMDID,
1755 WMI_10_4_ADDBA_SET_RESP_CMDID,
1756 WMI_10_4_SEND_SINGLEAMSDU_CMDID,
1757 WMI_10_4_STA_POWERSAVE_MODE_CMDID,
1758 WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
1759 WMI_10_4_STA_MIMO_PS_MODE_CMDID,
1760 WMI_10_4_DBGLOG_CFG_CMDID,
1761 WMI_10_4_PDEV_DFS_ENABLE_CMDID,
1762 WMI_10_4_PDEV_DFS_DISABLE_CMDID,
1763 WMI_10_4_PDEV_QVIT_CMDID,
1764 WMI_10_4_ROAM_SCAN_MODE,
1765 WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
1766 WMI_10_4_ROAM_SCAN_PERIOD,
1767 WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1768 WMI_10_4_ROAM_AP_PROFILE,
1769 WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
1770 WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
1771 WMI_10_4_OFL_SCAN_PERIOD,
1772 WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
1773 WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
1774 WMI_10_4_P2P_GO_SET_BEACON_IE,
1775 WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
1776 WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
1777 WMI_10_4_AP_PS_PEER_PARAM_CMDID,
1778 WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
1779 WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
1780 WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
1781 WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1782 WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1783 WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1784 WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1785 WMI_10_4_PDEV_SUSPEND_CMDID,
1786 WMI_10_4_PDEV_RESUME_CMDID,
1787 WMI_10_4_ADD_BCN_FILTER_CMDID,
1788 WMI_10_4_RMV_BCN_FILTER_CMDID,
1789 WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
1790 WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
1791 WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1792 WMI_10_4_WOW_ENABLE_CMDID,
1793 WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1794 WMI_10_4_RTT_MEASREQ_CMDID,
1795 WMI_10_4_RTT_TSF_CMDID,
1796 WMI_10_4_RTT_KEEPALIVE_CMDID,
1797 WMI_10_4_OEM_REQ_CMDID,
1798 WMI_10_4_NAN_CMDID,
1799 WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1800 WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1801 WMI_10_4_REQUEST_STATS_CMDID,
1802 WMI_10_4_GPIO_CONFIG_CMDID,
1803 WMI_10_4_GPIO_OUTPUT_CMDID,
1804 WMI_10_4_VDEV_RATEMASK_CMDID,
1805 WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
1806 WMI_10_4_GTK_OFFLOAD_CMDID,
1807 WMI_10_4_QBOOST_CFG_CMDID,
1808 WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
1809 WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
1810 WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
1811 WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
1812 WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
1813 WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
1814 WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
1815 WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
1816 WMI_10_4_FORCE_FW_HANG_CMDID,
1817 WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
1818 WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
1819 WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
1820 WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
1821 WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
1822 WMI_10_4_PDEV_FIPS_CMDID,
1823 WMI_10_4_TT_SET_CONF_CMDID,
1824 WMI_10_4_FWTEST_CMDID,
1825 WMI_10_4_VDEV_ATF_REQUEST_CMDID,
1826 WMI_10_4_PEER_ATF_REQUEST_CMDID,
1827 WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
1828 WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
1829 WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
1830 WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
1831 WMI_10_4_PDEV_GET_TPC_CMDID,
1832 WMI_10_4_PDEV_GET_AST_INFO_CMDID,
1833 WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
1834 WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
1835 WMI_10_4_PDEV_GET_INFO_CMDID,
1836 WMI_10_4_VDEV_GET_INFO_CMDID,
1837 WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
1838 WMI_10_4_MU_CAL_START_CMDID,
1839 WMI_10_4_SET_CCA_PARAMS_CMDID,
1840 WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
1841 WMI_10_4_EXT_RESOURCE_CFG_CMDID,
1842 WMI_10_4_VDEV_SET_IE_CMDID,
1843 WMI_10_4_SET_LTEU_CONFIG_CMDID,
1844 WMI_10_4_ATF_SSID_GROUPING_REQUEST_CMDID,
1845 WMI_10_4_PEER_ATF_EXT_REQUEST_CMDID,
1846 WMI_10_4_SET_PERIODIC_CHANNEL_STATS_CONFIG,
1847 WMI_10_4_PEER_BWF_REQUEST_CMDID,
1848 WMI_10_4_BTCOEX_CFG_CMDID,
1849 WMI_10_4_PEER_TX_MU_TXMIT_COUNT_CMDID,
1850 WMI_10_4_PEER_TX_MU_TXMIT_RSTCNT_CMDID,
1851 WMI_10_4_PEER_GID_USERPOS_LIST_CMDID,
1852 WMI_10_4_PDEV_CHECK_CAL_VERSION_CMDID,
1853 WMI_10_4_COEX_VERSION_CFG_CMID,
1854 WMI_10_4_PDEV_GET_RX_FILTER_CMDID,
1855 WMI_10_4_PDEV_EXTENDED_NSS_CFG_CMDID,
1856 WMI_10_4_VDEV_SET_SCAN_NAC_RSSI_CMDID,
1857 WMI_10_4_PROG_GPIO_BAND_SELECT_CMDID,
1858 WMI_10_4_CONFIG_SMART_LOGGING_CMDID,
1859 WMI_10_4_DEBUG_FATAL_CONDITION_CMDID,
1860 WMI_10_4_GET_TSF_TIMER_CMDID,
1861 WMI_10_4_PDEV_GET_TPC_TABLE_CMDID,
1862 WMI_10_4_VDEV_SIFS_TRIGGER_TIME_CMDID,
1863 WMI_10_4_PDEV_WDS_ENTRY_LIST_CMDID,
1864 WMI_10_4_TDLS_SET_STATE_CMDID,
1865 WMI_10_4_TDLS_PEER_UPDATE_CMDID,
1866 WMI_10_4_TDLS_SET_OFFCHAN_MODE_CMDID,
1867 WMI_10_4_PDEV_SEND_FD_CMDID,
1868 WMI_10_4_ENABLE_FILS_CMDID,
1869 WMI_10_4_PDEV_SET_BRIDGE_MACADDR_CMDID,
1870 WMI_10_4_ATF_GROUP_WMM_AC_CONFIG_REQUEST_CMDID,
1871 WMI_10_4_RADAR_FOUND_CMDID,
1872 WMI_10_4_PDEV_UTF_CMDID = WMI_10_4_END_CMDID - 1,
1873};
1874
1875enum wmi_10_4_event_id {
1876 WMI_10_4_SERVICE_READY_EVENTID = 0x8000,
1877 WMI_10_4_READY_EVENTID,
1878 WMI_10_4_DEBUG_MESG_EVENTID,
1879 WMI_10_4_START_EVENTID = 0x9000,
1880 WMI_10_4_END_EVENTID = 0x9FFF,
1881 WMI_10_4_SCAN_EVENTID = WMI_10_4_START_EVENTID,
1882 WMI_10_4_ECHO_EVENTID,
1883 WMI_10_4_UPDATE_STATS_EVENTID,
1884 WMI_10_4_INST_RSSI_STATS_EVENTID,
1885 WMI_10_4_VDEV_START_RESP_EVENTID,
1886 WMI_10_4_VDEV_STANDBY_REQ_EVENTID,
1887 WMI_10_4_VDEV_RESUME_REQ_EVENTID,
1888 WMI_10_4_VDEV_STOPPED_EVENTID,
1889 WMI_10_4_PEER_STA_KICKOUT_EVENTID,
1890 WMI_10_4_HOST_SWBA_EVENTID,
1891 WMI_10_4_TBTTOFFSET_UPDATE_EVENTID,
1892 WMI_10_4_MGMT_RX_EVENTID,
1893 WMI_10_4_CHAN_INFO_EVENTID,
1894 WMI_10_4_PHYERR_EVENTID,
1895 WMI_10_4_ROAM_EVENTID,
1896 WMI_10_4_PROFILE_MATCH,
1897 WMI_10_4_DEBUG_PRINT_EVENTID,
1898 WMI_10_4_PDEV_QVIT_EVENTID,
1899 WMI_10_4_WLAN_PROFILE_DATA_EVENTID,
1900 WMI_10_4_RTT_MEASUREMENT_REPORT_EVENTID,
1901 WMI_10_4_TSF_MEASUREMENT_REPORT_EVENTID,
1902 WMI_10_4_RTT_ERROR_REPORT_EVENTID,
1903 WMI_10_4_RTT_KEEPALIVE_EVENTID,
1904 WMI_10_4_OEM_CAPABILITY_EVENTID,
1905 WMI_10_4_OEM_MEASUREMENT_REPORT_EVENTID,
1906 WMI_10_4_OEM_ERROR_REPORT_EVENTID,
1907 WMI_10_4_NAN_EVENTID,
1908 WMI_10_4_WOW_WAKEUP_HOST_EVENTID,
1909 WMI_10_4_GTK_OFFLOAD_STATUS_EVENTID,
1910 WMI_10_4_GTK_REKEY_FAIL_EVENTID,
1911 WMI_10_4_DCS_INTERFERENCE_EVENTID,
1912 WMI_10_4_PDEV_TPC_CONFIG_EVENTID,
1913 WMI_10_4_CSA_HANDLING_EVENTID,
1914 WMI_10_4_GPIO_INPUT_EVENTID,
1915 WMI_10_4_PEER_RATECODE_LIST_EVENTID,
1916 WMI_10_4_GENERIC_BUFFER_EVENTID,
1917 WMI_10_4_MCAST_BUF_RELEASE_EVENTID,
1918 WMI_10_4_MCAST_LIST_AGEOUT_EVENTID,
1919 WMI_10_4_VDEV_GET_KEEPALIVE_EVENTID,
1920 WMI_10_4_WDS_PEER_EVENTID,
1921 WMI_10_4_PEER_STA_PS_STATECHG_EVENTID,
1922 WMI_10_4_PDEV_FIPS_EVENTID,
1923 WMI_10_4_TT_STATS_EVENTID,
1924 WMI_10_4_PDEV_CHANNEL_HOPPING_EVENTID,
1925 WMI_10_4_PDEV_ANI_CCK_LEVEL_EVENTID,
1926 WMI_10_4_PDEV_ANI_OFDM_LEVEL_EVENTID,
1927 WMI_10_4_PDEV_RESERVE_AST_ENTRY_EVENTID,
1928 WMI_10_4_PDEV_NFCAL_POWER_EVENTID,
1929 WMI_10_4_PDEV_TPC_EVENTID,
1930 WMI_10_4_PDEV_GET_AST_INFO_EVENTID,
1931 WMI_10_4_PDEV_TEMPERATURE_EVENTID,
1932 WMI_10_4_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID,
1933 WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID,
1934 WMI_10_4_MU_REPORT_EVENTID,
1935 WMI_10_4_TX_DATA_TRAFFIC_CTRL_EVENTID,
1936 WMI_10_4_PEER_TX_MU_TXMIT_COUNT_EVENTID,
1937 WMI_10_4_PEER_GID_USERPOS_LIST_EVENTID,
1938 WMI_10_4_PDEV_CHECK_CAL_VERSION_EVENTID,
1939 WMI_10_4_ATF_PEER_STATS_EVENTID,
1940 WMI_10_4_PDEV_GET_RX_FILTER_EVENTID,
1941 WMI_10_4_NAC_RSSI_EVENTID,
1942 WMI_10_4_DEBUG_FATAL_CONDITION_EVENTID,
1943 WMI_10_4_GET_TSF_TIMER_RESP_EVENTID,
1944 WMI_10_4_PDEV_TPC_TABLE_EVENTID,
1945 WMI_10_4_PDEV_WDS_ENTRY_LIST_EVENTID,
1946 WMI_10_4_TDLS_PEER_EVENTID,
1947 WMI_10_4_HOST_SWFDA_EVENTID,
1948 WMI_10_4_ESP_ESTIMATE_EVENTID,
1949 WMI_10_4_DFS_STATUS_CHECK_EVENTID,
1950 WMI_10_4_PDEV_UTF_EVENTID = WMI_10_4_END_EVENTID - 1,
1951};
1952
1953enum wmi_phy_mode {
1954 MODE_11A = 0,
1955 MODE_11G = 1,
1956 MODE_11B = 2,
1957 MODE_11GONLY = 3,
1958 MODE_11NA_HT20 = 4,
1959 MODE_11NG_HT20 = 5,
1960 MODE_11NA_HT40 = 6,
1961 MODE_11NG_HT40 = 7,
1962 MODE_11AC_VHT20 = 8,
1963 MODE_11AC_VHT40 = 9,
1964 MODE_11AC_VHT80 = 10,
1965
1966 MODE_11AC_VHT20_2G = 11,
1967 MODE_11AC_VHT40_2G = 12,
1968 MODE_11AC_VHT80_2G = 13,
1969 MODE_11AC_VHT80_80 = 14,
1970 MODE_11AC_VHT160 = 15,
1971 MODE_UNKNOWN = 16,
1972 MODE_MAX = 16
1973};
1974
1975static inline const char *ath10k_wmi_phymode_str(enum wmi_phy_mode mode)
1976{
1977 switch (mode) {
1978 case MODE_11A:
1979 return "11a";
1980 case MODE_11G:
1981 return "11g";
1982 case MODE_11B:
1983 return "11b";
1984 case MODE_11GONLY:
1985 return "11gonly";
1986 case MODE_11NA_HT20:
1987 return "11na-ht20";
1988 case MODE_11NG_HT20:
1989 return "11ng-ht20";
1990 case MODE_11NA_HT40:
1991 return "11na-ht40";
1992 case MODE_11NG_HT40:
1993 return "11ng-ht40";
1994 case MODE_11AC_VHT20:
1995 return "11ac-vht20";
1996 case MODE_11AC_VHT40:
1997 return "11ac-vht40";
1998 case MODE_11AC_VHT80:
1999 return "11ac-vht80";
2000 case MODE_11AC_VHT160:
2001 return "11ac-vht160";
2002 case MODE_11AC_VHT80_80:
2003 return "11ac-vht80+80";
2004 case MODE_11AC_VHT20_2G:
2005 return "11ac-vht20-2g";
2006 case MODE_11AC_VHT40_2G:
2007 return "11ac-vht40-2g";
2008 case MODE_11AC_VHT80_2G:
2009 return "11ac-vht80-2g";
2010 case MODE_UNKNOWN:
2011
2012 break;
2013
2014
2015
2016
2017 }
2018
2019 return "<unknown>";
2020}
2021
2022#define WMI_CHAN_LIST_TAG 0x1
2023#define WMI_SSID_LIST_TAG 0x2
2024#define WMI_BSSID_LIST_TAG 0x3
2025#define WMI_IE_TAG 0x4
2026
2027struct wmi_channel {
2028 __le32 mhz;
2029 __le32 band_center_freq1;
2030 __le32 band_center_freq2;
2031 union {
2032 __le32 flags;
2033 struct {
2034 u8 mode;
2035 } __packed;
2036 } __packed;
2037 union {
2038 __le32 reginfo0;
2039 struct {
2040
2041 u8 min_power;
2042 u8 max_power;
2043 u8 reg_power;
2044 u8 reg_classid;
2045 } __packed;
2046 } __packed;
2047 union {
2048 __le32 reginfo1;
2049 struct {
2050 u8 antenna_max;
2051 u8 max_tx_power;
2052 } __packed;
2053 } __packed;
2054} __packed;
2055
2056struct wmi_channel_arg {
2057 u32 freq;
2058 u32 band_center_freq1;
2059 u32 band_center_freq2;
2060 bool passive;
2061 bool allow_ibss;
2062 bool allow_ht;
2063 bool allow_vht;
2064 bool ht40plus;
2065 bool chan_radar;
2066
2067 u32 min_power;
2068 u32 max_power;
2069 u32 max_reg_power;
2070 u32 max_antenna_gain;
2071 u32 reg_class_id;
2072 enum wmi_phy_mode mode;
2073};
2074
2075enum wmi_channel_change_cause {
2076 WMI_CHANNEL_CHANGE_CAUSE_NONE = 0,
2077 WMI_CHANNEL_CHANGE_CAUSE_CSA,
2078};
2079
2080#define WMI_CHAN_FLAG_HT40_PLUS (1 << 6)
2081#define WMI_CHAN_FLAG_PASSIVE (1 << 7)
2082#define WMI_CHAN_FLAG_ADHOC_ALLOWED (1 << 8)
2083#define WMI_CHAN_FLAG_AP_DISABLED (1 << 9)
2084#define WMI_CHAN_FLAG_DFS (1 << 10)
2085#define WMI_CHAN_FLAG_ALLOW_HT (1 << 11)
2086#define WMI_CHAN_FLAG_ALLOW_VHT (1 << 12)
2087
2088
2089#define WMI_CHANNEL_CHANGE_CAUSE_CSA (1 << 13)
2090
2091#define WMI_MAX_SPATIAL_STREAM 3
2092
2093
2094#define WMI_HT_CAP_ENABLED 0x0001
2095#define WMI_HT_CAP_HT20_SGI 0x0002
2096#define WMI_HT_CAP_DYNAMIC_SMPS 0x0004
2097#define WMI_HT_CAP_TX_STBC 0x0008
2098#define WMI_HT_CAP_TX_STBC_MASK_SHIFT 3
2099#define WMI_HT_CAP_RX_STBC 0x0030
2100#define WMI_HT_CAP_RX_STBC_MASK_SHIFT 4
2101#define WMI_HT_CAP_LDPC 0x0040
2102#define WMI_HT_CAP_L_SIG_TXOP_PROT 0x0080
2103#define WMI_HT_CAP_MPDU_DENSITY 0x0700
2104#define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT 8
2105#define WMI_HT_CAP_HT40_SGI 0x0800
2106#define WMI_HT_CAP_RX_LDPC 0x1000
2107#define WMI_HT_CAP_TX_LDPC 0x2000
2108
2109#define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED | \
2110 WMI_HT_CAP_HT20_SGI | \
2111 WMI_HT_CAP_HT40_SGI | \
2112 WMI_HT_CAP_TX_STBC | \
2113 WMI_HT_CAP_RX_STBC | \
2114 WMI_HT_CAP_LDPC)
2115
2116
2117
2118
2119
2120
2121
2122
2123#define WMI_VHT_CAP_MAX_MPDU_LEN_MASK 0x00000003
2124#define WMI_VHT_CAP_RX_LDPC 0x00000010
2125#define WMI_VHT_CAP_SGI_80MHZ 0x00000020
2126#define WMI_VHT_CAP_SGI_160MHZ 0x00000040
2127#define WMI_VHT_CAP_TX_STBC 0x00000080
2128#define WMI_VHT_CAP_RX_STBC_MASK 0x00000300
2129#define WMI_VHT_CAP_RX_STBC_MASK_SHIFT 8
2130#define WMI_VHT_CAP_SU_BFER 0x00000800
2131#define WMI_VHT_CAP_SU_BFEE 0x00001000
2132#define WMI_VHT_CAP_MAX_CS_ANT_MASK 0x0000E000
2133#define WMI_VHT_CAP_MAX_CS_ANT_MASK_SHIFT 13
2134#define WMI_VHT_CAP_MAX_SND_DIM_MASK 0x00070000
2135#define WMI_VHT_CAP_MAX_SND_DIM_MASK_SHIFT 16
2136#define WMI_VHT_CAP_MU_BFER 0x00080000
2137#define WMI_VHT_CAP_MU_BFEE 0x00100000
2138#define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP 0x03800000
2139#define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIFT 23
2140#define WMI_VHT_CAP_RX_FIXED_ANT 0x10000000
2141#define WMI_VHT_CAP_TX_FIXED_ANT 0x20000000
2142
2143
2144#define WMI_VHT_CAP_MAX_MPDU_LEN_3839 0x00000000
2145#define WMI_VHT_CAP_MAX_MPDU_LEN_7935 0x00000001
2146#define WMI_VHT_CAP_MAX_MPDU_LEN_11454 0x00000002
2147
2148#define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454 | \
2149 WMI_VHT_CAP_RX_LDPC | \
2150 WMI_VHT_CAP_SGI_80MHZ | \
2151 WMI_VHT_CAP_TX_STBC | \
2152 WMI_VHT_CAP_RX_STBC_MASK | \
2153 WMI_VHT_CAP_MAX_AMPDU_LEN_EXP | \
2154 WMI_VHT_CAP_RX_FIXED_ANT | \
2155 WMI_VHT_CAP_TX_FIXED_ANT)
2156
2157
2158
2159
2160
2161#define WMI_VHT_MAX_MCS_4_SS_MASK(r, ss) ((3 & (r)) << (((ss) - 1) << 1))
2162#define WMI_VHT_MAX_SUPP_RATE_MASK 0x1fff0000
2163#define WMI_VHT_MAX_SUPP_RATE_MASK_SHIFT 16
2164
2165enum {
2166 REGDMN_MODE_11A = 0x00001,
2167 REGDMN_MODE_TURBO = 0x00002,
2168 REGDMN_MODE_11B = 0x00004,
2169 REGDMN_MODE_PUREG = 0x00008,
2170 REGDMN_MODE_11G = 0x00008,
2171 REGDMN_MODE_108G = 0x00020,
2172 REGDMN_MODE_108A = 0x00040,
2173 REGDMN_MODE_XR = 0x00100,
2174 REGDMN_MODE_11A_HALF_RATE = 0x00200,
2175 REGDMN_MODE_11A_QUARTER_RATE = 0x00400,
2176 REGDMN_MODE_11NG_HT20 = 0x00800,
2177 REGDMN_MODE_11NA_HT20 = 0x01000,
2178 REGDMN_MODE_11NG_HT40PLUS = 0x02000,
2179 REGDMN_MODE_11NG_HT40MINUS = 0x04000,
2180 REGDMN_MODE_11NA_HT40PLUS = 0x08000,
2181 REGDMN_MODE_11NA_HT40MINUS = 0x10000,
2182 REGDMN_MODE_11AC_VHT20 = 0x20000,
2183 REGDMN_MODE_11AC_VHT40PLUS = 0x40000,
2184 REGDMN_MODE_11AC_VHT40MINUS = 0x80000,
2185 REGDMN_MODE_11AC_VHT80 = 0x100000,
2186 REGDMN_MODE_11AC_VHT160 = 0x200000,
2187 REGDMN_MODE_11AC_VHT80_80 = 0x400000,
2188 REGDMN_MODE_ALL = 0xffffffff
2189};
2190
2191#define REGDMN_CAP1_CHAN_HALF_RATE 0x00000001
2192#define REGDMN_CAP1_CHAN_QUARTER_RATE 0x00000002
2193#define REGDMN_CAP1_CHAN_HAL49GHZ 0x00000004
2194
2195
2196#define REGDMN_EEPROM_EEREGCAP_EN_FCC_MIDBAND 0x0040
2197#define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_EVEN 0x0080
2198#define REGDMN_EEPROM_EEREGCAP_EN_KK_U2 0x0100
2199#define REGDMN_EEPROM_EEREGCAP_EN_KK_MIDBAND 0x0200
2200#define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_ODD 0x0400
2201#define REGDMN_EEPROM_EEREGCAP_EN_KK_NEW_11A 0x0800
2202
2203struct hal_reg_capabilities {
2204
2205 __le32 eeprom_rd;
2206
2207 __le32 eeprom_rd_ext;
2208
2209 __le32 regcap1;
2210
2211 __le32 regcap2;
2212
2213 __le32 wireless_modes;
2214 __le32 low_2ghz_chan;
2215 __le32 high_2ghz_chan;
2216 __le32 low_5ghz_chan;
2217 __le32 high_5ghz_chan;
2218} __packed;
2219
2220enum wlan_mode_capability {
2221 WHAL_WLAN_11A_CAPABILITY = 0x1,
2222 WHAL_WLAN_11G_CAPABILITY = 0x2,
2223 WHAL_WLAN_11AG_CAPABILITY = 0x3,
2224};
2225
2226
2227struct wlan_host_mem_req {
2228
2229 __le32 req_id;
2230
2231 __le32 unit_size;
2232
2233
2234
2235
2236 __le32 num_unit_info;
2237
2238
2239
2240
2241
2242
2243
2244 __le32 num_units;
2245} __packed;
2246
2247
2248
2249
2250
2251
2252struct wmi_service_ready_event {
2253 __le32 sw_version;
2254 __le32 sw_version_1;
2255 __le32 abi_version;
2256
2257 __le32 phy_capability;
2258
2259 __le32 max_frag_entry;
2260 __le32 wmi_service_bitmap[16];
2261 __le32 num_rf_chains;
2262
2263
2264
2265
2266 __le32 ht_cap_info;
2267 __le32 vht_cap_info;
2268 __le32 vht_supp_mcs;
2269 __le32 hw_min_tx_power;
2270 __le32 hw_max_tx_power;
2271 struct hal_reg_capabilities hal_reg_capabilities;
2272 __le32 sys_cap_info;
2273 __le32 min_pkt_size_enable;
2274
2275
2276
2277
2278 __le32 max_bcn_ie_size;
2279
2280
2281
2282
2283
2284
2285 __le32 num_mem_reqs;
2286 struct wlan_host_mem_req mem_reqs[0];
2287} __packed;
2288
2289
2290struct wmi_10x_service_ready_event {
2291 __le32 sw_version;
2292 __le32 abi_version;
2293
2294
2295 __le32 phy_capability;
2296
2297
2298 __le32 max_frag_entry;
2299 __le32 wmi_service_bitmap[16];
2300 __le32 num_rf_chains;
2301
2302
2303
2304
2305
2306 __le32 ht_cap_info;
2307 __le32 vht_cap_info;
2308 __le32 vht_supp_mcs;
2309 __le32 hw_min_tx_power;
2310 __le32 hw_max_tx_power;
2311
2312 struct hal_reg_capabilities hal_reg_capabilities;
2313
2314 __le32 sys_cap_info;
2315 __le32 min_pkt_size_enable;
2316
2317
2318
2319
2320
2321
2322
2323 __le32 num_mem_reqs;
2324
2325 struct wlan_host_mem_req mem_reqs[0];
2326} __packed;
2327
2328#define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ)
2329#define WMI_UNIFIED_READY_TIMEOUT_HZ (5 * HZ)
2330
2331struct wmi_ready_event {
2332 __le32 sw_version;
2333 __le32 abi_version;
2334 struct wmi_mac_addr mac_addr;
2335 __le32 status;
2336} __packed;
2337
2338struct wmi_resource_config {
2339
2340 __le32 num_vdevs;
2341
2342
2343 __le32 num_peers;
2344
2345
2346
2347
2348
2349
2350
2351
2352 __le32 num_offload_peers;
2353
2354
2355 __le32 num_offload_reorder_bufs;
2356
2357
2358 __le32 num_peer_keys;
2359
2360
2361 __le32 num_tids;
2362
2363
2364
2365
2366
2367
2368
2369
2370
2371
2372
2373 __le32 ast_skid_limit;
2374
2375
2376
2377
2378
2379
2380
2381
2382
2383 __le32 tx_chain_mask;
2384
2385
2386
2387
2388
2389
2390
2391
2392
2393
2394
2395 __le32 rx_chain_mask;
2396
2397
2398
2399
2400
2401
2402
2403
2404
2405
2406
2407 __le32 rx_timeout_pri_vi;
2408 __le32 rx_timeout_pri_vo;
2409 __le32 rx_timeout_pri_be;
2410 __le32 rx_timeout_pri_bk;
2411
2412
2413
2414
2415
2416
2417
2418
2419 __le32 rx_decap_mode;
2420
2421
2422 __le32 scan_max_pending_reqs;
2423
2424
2425 __le32 bmiss_offload_max_vdev;
2426
2427
2428 __le32 roam_offload_max_vdev;
2429
2430
2431 __le32 roam_offload_max_ap_profiles;
2432
2433
2434
2435
2436
2437
2438
2439
2440
2441
2442
2443
2444
2445 __le32 num_mcast_groups;
2446
2447
2448
2449
2450
2451
2452
2453
2454
2455
2456 __le32 num_mcast_table_elems;
2457
2458
2459
2460
2461
2462
2463
2464
2465
2466
2467
2468
2469
2470
2471
2472
2473
2474
2475
2476 __le32 mcast2ucast_mode;
2477
2478
2479
2480
2481
2482
2483
2484
2485 __le32 tx_dbg_log_size;
2486
2487
2488 __le32 num_wds_entries;
2489
2490
2491
2492
2493
2494 __le32 dma_burst_size;
2495
2496
2497
2498
2499
2500 __le32 mac_aggr_delim;
2501
2502
2503
2504
2505
2506
2507
2508
2509
2510
2511 __le32 rx_skip_defrag_timeout_dup_detection_check;
2512
2513
2514
2515
2516
2517
2518 __le32 vow_config;
2519
2520
2521 __le32 gtk_offload_max_vdev;
2522
2523
2524 __le32 num_msdu_desc;
2525
2526
2527
2528
2529
2530
2531
2532 __le32 max_frag_entries;
2533} __packed;
2534
2535struct wmi_resource_config_10x {
2536
2537 __le32 num_vdevs;
2538
2539
2540 __le32 num_peers;
2541
2542
2543 __le32 num_peer_keys;
2544
2545
2546 __le32 num_tids;
2547
2548
2549
2550
2551
2552
2553
2554
2555
2556
2557
2558 __le32 ast_skid_limit;
2559
2560
2561
2562
2563
2564
2565
2566
2567
2568 __le32 tx_chain_mask;
2569
2570
2571
2572
2573
2574
2575
2576
2577
2578
2579
2580 __le32 rx_chain_mask;
2581
2582
2583
2584
2585
2586
2587
2588
2589
2590
2591
2592 __le32 rx_timeout_pri_vi;
2593 __le32 rx_timeout_pri_vo;
2594 __le32 rx_timeout_pri_be;
2595 __le32 rx_timeout_pri_bk;
2596
2597
2598
2599
2600
2601
2602
2603
2604 __le32 rx_decap_mode;
2605
2606
2607 __le32 scan_max_pending_reqs;
2608
2609
2610 __le32 bmiss_offload_max_vdev;
2611
2612
2613 __le32 roam_offload_max_vdev;
2614
2615
2616 __le32 roam_offload_max_ap_profiles;
2617
2618
2619
2620
2621
2622
2623
2624
2625
2626
2627
2628
2629
2630 __le32 num_mcast_groups;
2631
2632
2633
2634
2635
2636
2637
2638
2639
2640
2641 __le32 num_mcast_table_elems;
2642
2643
2644
2645
2646
2647
2648
2649
2650
2651
2652
2653
2654
2655
2656
2657
2658
2659
2660
2661 __le32 mcast2ucast_mode;
2662
2663
2664
2665
2666
2667
2668
2669
2670 __le32 tx_dbg_log_size;
2671
2672
2673 __le32 num_wds_entries;
2674
2675
2676
2677
2678
2679 __le32 dma_burst_size;
2680
2681
2682
2683
2684
2685 __le32 mac_aggr_delim;
2686
2687
2688
2689
2690
2691
2692
2693
2694
2695
2696 __le32 rx_skip_defrag_timeout_dup_detection_check;
2697
2698
2699
2700
2701
2702
2703 __le32 vow_config;
2704
2705
2706 __le32 num_msdu_desc;
2707
2708
2709
2710
2711
2712
2713
2714 __le32 max_frag_entries;
2715} __packed;
2716
2717enum wmi_10_2_feature_mask {
2718 WMI_10_2_RX_BATCH_MODE = BIT(0),
2719 WMI_10_2_ATF_CONFIG = BIT(1),
2720 WMI_10_2_COEX_GPIO = BIT(3),
2721 WMI_10_2_BSS_CHAN_INFO = BIT(6),
2722 WMI_10_2_PEER_STATS = BIT(7),
2723};
2724
2725struct wmi_resource_config_10_2 {
2726 struct wmi_resource_config_10x common;
2727 __le32 max_peer_ext_stats;
2728 __le32 smart_ant_cap;
2729 __le32 bk_min_free;
2730 __le32 be_min_free;
2731 __le32 vi_min_free;
2732 __le32 vo_min_free;
2733 __le32 feature_mask;
2734} __packed;
2735
2736#define NUM_UNITS_IS_NUM_VDEVS BIT(0)
2737#define NUM_UNITS_IS_NUM_PEERS BIT(1)
2738#define NUM_UNITS_IS_NUM_ACTIVE_PEERS BIT(2)
2739
2740struct wmi_resource_config_10_4 {
2741
2742 __le32 num_vdevs;
2743
2744
2745 __le32 num_peers;
2746
2747
2748 __le32 num_active_peers;
2749
2750
2751
2752
2753
2754
2755
2756 __le32 num_offload_peers;
2757
2758
2759
2760
2761 __le32 num_offload_reorder_buffs;
2762
2763
2764 __le32 num_peer_keys;
2765
2766
2767 __le32 num_tids;
2768
2769
2770
2771
2772
2773
2774
2775
2776
2777 __le32 ast_skid_limit;
2778
2779
2780
2781
2782
2783
2784
2785 __le32 tx_chain_mask;
2786
2787
2788
2789
2790
2791
2792
2793
2794
2795 __le32 rx_chain_mask;
2796
2797
2798
2799
2800
2801
2802
2803
2804 __le32 rx_timeout_pri[4];
2805
2806
2807
2808
2809
2810
2811 __le32 rx_decap_mode;
2812
2813 __le32 scan_max_pending_req;
2814
2815 __le32 bmiss_offload_max_vdev;
2816
2817 __le32 roam_offload_max_vdev;
2818
2819 __le32 roam_offload_max_ap_profiles;
2820
2821
2822
2823
2824
2825
2826
2827
2828
2829
2830 __le32 num_mcast_groups;
2831
2832
2833
2834
2835
2836
2837
2838
2839 __le32 num_mcast_table_elems;
2840
2841
2842
2843
2844
2845
2846
2847
2848
2849
2850
2851
2852
2853
2854
2855
2856 __le32 mcast2ucast_mode;
2857
2858
2859
2860
2861
2862
2863 __le32 tx_dbg_log_size;
2864
2865
2866 __le32 num_wds_entries;
2867
2868
2869 __le32 dma_burst_size;
2870
2871
2872
2873
2874 __le32 mac_aggr_delim;
2875
2876
2877
2878
2879
2880
2881
2882
2883 __le32 rx_skip_defrag_timeout_dup_detection_check;
2884
2885
2886
2887
2888 __le32 vow_config;
2889
2890
2891 __le32 gtk_offload_max_vdev;
2892
2893
2894 __le32 num_msdu_desc;
2895
2896
2897
2898
2899
2900
2901 __le32 max_frag_entries;
2902
2903
2904
2905
2906
2907 __le32 max_peer_ext_stats;
2908
2909
2910
2911
2912
2913
2914 __le32 smart_ant_cap;
2915
2916
2917
2918
2919 __le32 bk_minfree;
2920 __le32 be_minfree;
2921 __le32 vi_minfree;
2922 __le32 vo_minfree;
2923
2924
2925
2926
2927
2928 __le32 rx_batchmode;
2929
2930
2931
2932
2933
2934 __le32 tt_support;
2935
2936
2937
2938
2939
2940 __le32 atf_config;
2941
2942
2943
2944
2945
2946 __le32 iphdr_pad_config;
2947
2948
2949
2950
2951
2952
2953
2954
2955
2956
2957 __le32 qwrap_config;
2958} __packed;
2959
2960enum wmi_coex_version {
2961 WMI_NO_COEX_VERSION_SUPPORT = 0,
2962
2963 WMI_COEX_VERSION_1 = 1,
2964
2965 WMI_COEX_VERSION_2 = 2,
2966
2967 WMI_COEX_VERSION_3 = 3,
2968
2969 WMI_COEX_VERSION_4 = 4,
2970};
2971
2972
2973
2974
2975
2976
2977
2978
2979
2980
2981
2982
2983
2984
2985
2986
2987
2988
2989
2990enum wmi_10_4_feature_mask {
2991 WMI_10_4_LTEU_SUPPORT = BIT(0),
2992 WMI_10_4_COEX_GPIO_SUPPORT = BIT(1),
2993 WMI_10_4_AUX_RADIO_SPECTRAL_INTF = BIT(2),
2994 WMI_10_4_AUX_RADIO_CHAN_LOAD_INTF = BIT(3),
2995 WMI_10_4_BSS_CHANNEL_INFO_64 = BIT(4),
2996 WMI_10_4_PEER_STATS = BIT(5),
2997 WMI_10_4_VDEV_STATS = BIT(6),
2998 WMI_10_4_TDLS = BIT(7),
2999 WMI_10_4_TDLS_OFFCHAN = BIT(8),
3000 WMI_10_4_TDLS_UAPSD_BUFFER_STA = BIT(9),
3001 WMI_10_4_TDLS_UAPSD_SLEEP_STA = BIT(10),
3002 WMI_10_4_TDLS_CONN_TRACKER_IN_HOST_MODE = BIT(11),
3003 WMI_10_4_TDLS_EXPLICIT_MODE_ONLY = BIT(12),
3004 WMI_10_4_TX_DATA_ACK_RSSI = BIT(16),
3005 WMI_10_4_EXT_PEER_TID_CONFIGS_SUPPORT = BIT(17),
3006 WMI_10_4_REPORT_AIRTIME = BIT(18),
3007
3008};
3009
3010struct wmi_ext_resource_config_10_4_cmd {
3011
3012 __le32 host_platform_config;
3013
3014 __le32 fw_feature_bitmap;
3015
3016 __le32 wlan_gpio_priority;
3017
3018 __le32 coex_version;
3019
3020 __le32 coex_gpio_pin1;
3021 __le32 coex_gpio_pin2;
3022 __le32 coex_gpio_pin3;
3023
3024 __le32 num_tdls_vdevs;
3025
3026 __le32 num_tdls_conn_table_entries;
3027
3028 __le32 max_tdls_concurrent_sleep_sta;
3029
3030 __le32 max_tdls_concurrent_buffer_sta;
3031};
3032
3033
3034struct host_memory_chunk {
3035
3036 __le32 req_id;
3037
3038 __le32 ptr;
3039
3040 __le32 size;
3041} __packed;
3042
3043struct wmi_host_mem_chunks {
3044 __le32 count;
3045
3046 struct host_memory_chunk items[1];
3047} __packed;
3048
3049struct wmi_init_cmd {
3050 struct wmi_resource_config resource_config;
3051 struct wmi_host_mem_chunks mem_chunks;
3052} __packed;
3053
3054
3055struct wmi_init_cmd_10x {
3056 struct wmi_resource_config_10x resource_config;
3057 struct wmi_host_mem_chunks mem_chunks;
3058} __packed;
3059
3060struct wmi_init_cmd_10_2 {
3061 struct wmi_resource_config_10_2 resource_config;
3062 struct wmi_host_mem_chunks mem_chunks;
3063} __packed;
3064
3065struct wmi_init_cmd_10_4 {
3066 struct wmi_resource_config_10_4 resource_config;
3067 struct wmi_host_mem_chunks mem_chunks;
3068} __packed;
3069
3070struct wmi_chan_list_entry {
3071 __le16 freq;
3072 u8 phy_mode;
3073 u8 reserved;
3074} __packed;
3075
3076
3077struct wmi_chan_list {
3078 __le32 tag;
3079 __le32 num_chan;
3080 struct wmi_chan_list_entry channel_list[0];
3081} __packed;
3082
3083struct wmi_bssid_list {
3084 __le32 tag;
3085 __le32 num_bssid;
3086 struct wmi_mac_addr bssid_list[0];
3087} __packed;
3088
3089struct wmi_ie_data {
3090 __le32 tag;
3091 __le32 ie_len;
3092 u8 ie_data[0];
3093} __packed;
3094
3095struct wmi_ssid {
3096 __le32 ssid_len;
3097 u8 ssid[32];
3098} __packed;
3099
3100struct wmi_ssid_list {
3101 __le32 tag;
3102 __le32 num_ssids;
3103 struct wmi_ssid ssids[0];
3104} __packed;
3105
3106
3107#define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000
3108
3109
3110
3111#define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000
3112
3113#define WLAN_SCAN_PARAMS_MAX_SSID 16
3114#define WLAN_SCAN_PARAMS_MAX_BSSID 4
3115#define WLAN_SCAN_PARAMS_MAX_IE_LEN 256
3116
3117
3118
3119
3120#define WMI_SCAN_CHAN_MIN_TIME_MSEC 40
3121
3122
3123enum wmi_scan_priority {
3124 WMI_SCAN_PRIORITY_VERY_LOW = 0,
3125 WMI_SCAN_PRIORITY_LOW,
3126 WMI_SCAN_PRIORITY_MEDIUM,
3127 WMI_SCAN_PRIORITY_HIGH,
3128 WMI_SCAN_PRIORITY_VERY_HIGH,
3129 WMI_SCAN_PRIORITY_COUNT
3130};
3131
3132struct wmi_start_scan_common {
3133
3134 __le32 scan_id;
3135
3136 __le32 scan_req_id;
3137
3138 __le32 vdev_id;
3139
3140 __le32 scan_priority;
3141
3142 __le32 notify_scan_events;
3143
3144 __le32 dwell_time_active;
3145
3146 __le32 dwell_time_passive;
3147
3148
3149
3150
3151 __le32 min_rest_time;
3152
3153
3154
3155
3156
3157
3158
3159
3160
3161
3162
3163
3164
3165 __le32 max_rest_time;
3166
3167
3168
3169
3170
3171
3172
3173 __le32 repeat_probe_time;
3174
3175 __le32 probe_spacing_time;
3176
3177
3178
3179
3180 __le32 idle_time;
3181
3182 __le32 max_scan_time;
3183
3184
3185
3186
3187 __le32 probe_delay;
3188
3189 __le32 scan_ctrl_flags;
3190} __packed;
3191
3192struct wmi_start_scan_tlvs {
3193
3194
3195
3196 u8 tlvs[0];
3197} __packed;
3198
3199struct wmi_start_scan_cmd {
3200 struct wmi_start_scan_common common;
3201 __le32 burst_duration_ms;
3202 struct wmi_start_scan_tlvs tlvs;
3203} __packed;
3204
3205
3206struct wmi_10x_start_scan_cmd {
3207 struct wmi_start_scan_common common;
3208 struct wmi_start_scan_tlvs tlvs;
3209} __packed;
3210
3211struct wmi_ssid_arg {
3212 int len;
3213 const u8 *ssid;
3214};
3215
3216struct wmi_bssid_arg {
3217 const u8 *bssid;
3218};
3219
3220struct wmi_start_scan_arg {
3221 u32 scan_id;
3222 u32 scan_req_id;
3223 u32 vdev_id;
3224 u32 scan_priority;
3225 u32 notify_scan_events;
3226 u32 dwell_time_active;
3227 u32 dwell_time_passive;
3228 u32 min_rest_time;
3229 u32 max_rest_time;
3230 u32 repeat_probe_time;
3231 u32 probe_spacing_time;
3232 u32 idle_time;
3233 u32 max_scan_time;
3234 u32 probe_delay;
3235 u32 scan_ctrl_flags;
3236 u32 burst_duration_ms;
3237
3238 u32 ie_len;
3239 u32 n_channels;
3240 u32 n_ssids;
3241 u32 n_bssids;
3242
3243 u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN];
3244 u16 channels[64];
3245 struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID];
3246 struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID];
3247 struct wmi_mac_addr mac_addr;
3248 struct wmi_mac_addr mac_mask;
3249};
3250
3251
3252
3253
3254#define WMI_SCAN_FLAG_PASSIVE 0x1
3255
3256#define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2
3257
3258#define WMI_SCAN_ADD_CCK_RATES 0x4
3259
3260#define WMI_SCAN_ADD_OFDM_RATES 0x8
3261
3262#define WMI_SCAN_CHAN_STAT_EVENT 0x10
3263
3264#define WMI_SCAN_FILTER_PROBE_REQ 0x20
3265
3266#define WMI_SCAN_BYPASS_DFS_CHN 0x40
3267
3268
3269
3270#define WMI_SCAN_CONTINUE_ON_ERROR 0x80
3271
3272
3273
3274
3275
3276#define WMI_SCAN_ADD_SPOOFED_MAC_IN_PROBE_REQ 0x1000
3277
3278
3279#define WMI_SCAN_CLASS_MASK 0xFF000000
3280
3281enum wmi_stop_scan_type {
3282 WMI_SCAN_STOP_ONE = 0x00000000,
3283 WMI_SCAN_STOP_VDEV_ALL = 0x01000000,
3284 WMI_SCAN_STOP_ALL = 0x04000000,
3285};
3286
3287struct wmi_stop_scan_cmd {
3288 __le32 scan_req_id;
3289 __le32 scan_id;
3290 __le32 req_type;
3291 __le32 vdev_id;
3292} __packed;
3293
3294struct wmi_stop_scan_arg {
3295 u32 req_id;
3296 enum wmi_stop_scan_type req_type;
3297 union {
3298 u32 scan_id;
3299 u32 vdev_id;
3300 } u;
3301};
3302
3303struct wmi_scan_chan_list_cmd {
3304 __le32 num_scan_chans;
3305 struct wmi_channel chan_info[0];
3306} __packed;
3307
3308struct wmi_scan_chan_list_arg {
3309 u32 n_channels;
3310 struct wmi_channel_arg *channels;
3311};
3312
3313enum wmi_bss_filter {
3314 WMI_BSS_FILTER_NONE = 0,
3315 WMI_BSS_FILTER_ALL,
3316 WMI_BSS_FILTER_PROFILE,
3317 WMI_BSS_FILTER_ALL_BUT_PROFILE,
3318 WMI_BSS_FILTER_CURRENT_BSS,
3319 WMI_BSS_FILTER_ALL_BUT_BSS,
3320 WMI_BSS_FILTER_PROBED_SSID,
3321 WMI_BSS_FILTER_LAST_BSS,
3322};
3323
3324enum wmi_scan_event_type {
3325 WMI_SCAN_EVENT_STARTED = BIT(0),
3326 WMI_SCAN_EVENT_COMPLETED = BIT(1),
3327 WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2),
3328 WMI_SCAN_EVENT_FOREIGN_CHANNEL = BIT(3),
3329 WMI_SCAN_EVENT_DEQUEUED = BIT(4),
3330
3331 WMI_SCAN_EVENT_PREEMPTED = BIT(5),
3332 WMI_SCAN_EVENT_START_FAILED = BIT(6),
3333 WMI_SCAN_EVENT_RESTARTED = BIT(7),
3334 WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT = BIT(8),
3335 WMI_SCAN_EVENT_MAX = BIT(15),
3336};
3337
3338enum wmi_scan_completion_reason {
3339 WMI_SCAN_REASON_COMPLETED,
3340 WMI_SCAN_REASON_CANCELLED,
3341 WMI_SCAN_REASON_PREEMPTED,
3342 WMI_SCAN_REASON_TIMEDOUT,
3343 WMI_SCAN_REASON_INTERNAL_FAILURE,
3344 WMI_SCAN_REASON_MAX,
3345};
3346
3347struct wmi_scan_event {
3348 __le32 event_type;
3349 __le32 reason;
3350 __le32 channel_freq;
3351 __le32 scan_req_id;
3352 __le32 scan_id;
3353 __le32 vdev_id;
3354} __packed;
3355
3356
3357
3358
3359
3360
3361
3362
3363
3364#define WMI_MGMT_RX_HDR_HEADROOM 52
3365
3366
3367
3368
3369
3370
3371
3372
3373struct wmi_mgmt_rx_hdr_v1 {
3374 __le32 channel;
3375 __le32 snr;
3376 __le32 rate;
3377 __le32 phy_mode;
3378 __le32 buf_len;
3379 __le32 status;
3380} __packed;
3381
3382struct wmi_mgmt_rx_hdr_v2 {
3383 struct wmi_mgmt_rx_hdr_v1 v1;
3384 __le32 rssi_ctl[4];
3385} __packed;
3386
3387struct wmi_mgmt_rx_event_v1 {
3388 struct wmi_mgmt_rx_hdr_v1 hdr;
3389 u8 buf[0];
3390} __packed;
3391
3392struct wmi_mgmt_rx_event_v2 {
3393 struct wmi_mgmt_rx_hdr_v2 hdr;
3394 u8 buf[0];
3395} __packed;
3396
3397struct wmi_10_4_mgmt_rx_hdr {
3398 __le32 channel;
3399 __le32 snr;
3400 u8 rssi_ctl[4];
3401 __le32 rate;
3402 __le32 phy_mode;
3403 __le32 buf_len;
3404 __le32 status;
3405} __packed;
3406
3407struct wmi_10_4_mgmt_rx_event {
3408 struct wmi_10_4_mgmt_rx_hdr hdr;
3409 u8 buf[0];
3410} __packed;
3411
3412struct wmi_mgmt_rx_ext_info {
3413 __le64 rx_mac_timestamp;
3414} __packed __aligned(4);
3415
3416#define WMI_RX_STATUS_OK 0x00
3417#define WMI_RX_STATUS_ERR_CRC 0x01
3418#define WMI_RX_STATUS_ERR_DECRYPT 0x08
3419#define WMI_RX_STATUS_ERR_MIC 0x10
3420#define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20
3421
3422#define WMI_RX_STATUS_EXT_INFO 0x40
3423
3424#define PHY_ERROR_GEN_SPECTRAL_SCAN 0x26
3425#define PHY_ERROR_GEN_FALSE_RADAR_EXT 0x24
3426#define PHY_ERROR_GEN_RADAR 0x05
3427
3428#define PHY_ERROR_10_4_RADAR_MASK 0x4
3429#define PHY_ERROR_10_4_SPECTRAL_SCAN_MASK 0x4000000
3430
3431enum phy_err_type {
3432 PHY_ERROR_UNKNOWN,
3433 PHY_ERROR_SPECTRAL_SCAN,
3434 PHY_ERROR_FALSE_RADAR_EXT,
3435 PHY_ERROR_RADAR
3436};
3437
3438struct wmi_phyerr {
3439 __le32 tsf_timestamp;
3440 __le16 freq1;
3441 __le16 freq2;
3442 u8 rssi_combined;
3443 u8 chan_width_mhz;
3444 u8 phy_err_code;
3445 u8 rsvd0;
3446 __le32 rssi_chains[4];
3447 __le16 nf_chains[4];
3448 __le32 buf_len;
3449 u8 buf[0];
3450} __packed;
3451
3452struct wmi_phyerr_event {
3453 __le32 num_phyerrs;
3454 __le32 tsf_l32;
3455 __le32 tsf_u32;
3456 struct wmi_phyerr phyerrs[0];
3457} __packed;
3458
3459struct wmi_10_4_phyerr_event {
3460 __le32 tsf_l32;
3461 __le32 tsf_u32;
3462 __le16 freq1;
3463 __le16 freq2;
3464 u8 rssi_combined;
3465 u8 chan_width_mhz;
3466 u8 phy_err_code;
3467 u8 rsvd0;
3468 __le32 rssi_chains[4];
3469 __le16 nf_chains[4];
3470 __le32 phy_err_mask[2];
3471 __le32 tsf_timestamp;
3472 __le32 buf_len;
3473 u8 buf[0];
3474} __packed;
3475
3476struct wmi_radar_found_info {
3477 __le32 pri_min;
3478 __le32 pri_max;
3479 __le32 width_min;
3480 __le32 width_max;
3481 __le32 sidx_min;
3482 __le32 sidx_max;
3483} __packed;
3484
3485enum wmi_radar_confirmation_status {
3486
3487 WMI_SW_RADAR_DETECTED = 0,
3488
3489 WMI_RADAR_DETECTION_FAIL = 1,
3490
3491
3492 WMI_HW_RADAR_DETECTED = 2,
3493};
3494
3495#define PHYERR_TLV_SIG 0xBB
3496#define PHYERR_TLV_TAG_SEARCH_FFT_REPORT 0xFB
3497#define PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY 0xF8
3498#define PHYERR_TLV_TAG_SPECTRAL_SUMMARY_REPORT 0xF9
3499
3500struct phyerr_radar_report {
3501 __le32 reg0;
3502 __le32 reg1;
3503} __packed;
3504
3505#define RADAR_REPORT_REG0_PULSE_IS_CHIRP_MASK 0x80000000
3506#define RADAR_REPORT_REG0_PULSE_IS_CHIRP_LSB 31
3507
3508#define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_MASK 0x40000000
3509#define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_LSB 30
3510
3511#define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_MASK 0x3FF00000
3512#define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_LSB 20
3513
3514#define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_MASK 0x000F0000
3515#define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_LSB 16
3516
3517#define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_MASK 0x0000FC00
3518#define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_LSB 10
3519
3520#define RADAR_REPORT_REG0_PULSE_SIDX_MASK 0x000003FF
3521#define RADAR_REPORT_REG0_PULSE_SIDX_LSB 0
3522
3523#define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_MASK 0x80000000
3524#define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_LSB 31
3525
3526#define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_MASK 0x7F000000
3527#define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_LSB 24
3528
3529#define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_MASK 0x00FF0000
3530#define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_LSB 16
3531
3532#define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_MASK 0x0000FF00
3533#define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_LSB 8
3534
3535#define RADAR_REPORT_REG1_PULSE_DUR_MASK 0x000000FF
3536#define RADAR_REPORT_REG1_PULSE_DUR_LSB 0
3537
3538struct phyerr_fft_report {
3539 __le32 reg0;
3540 __le32 reg1;
3541} __packed;
3542
3543#define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_MASK 0xFF800000
3544#define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_LSB 23
3545
3546#define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_MASK 0x007FC000
3547#define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_LSB 14
3548
3549#define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_MASK 0x00003000
3550#define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_LSB 12
3551
3552#define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_MASK 0x00000FFF
3553#define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_LSB 0
3554
3555#define SEARCH_FFT_REPORT_REG1_RELPWR_DB_MASK 0xFC000000
3556#define SEARCH_FFT_REPORT_REG1_RELPWR_DB_LSB 26
3557
3558#define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_MASK 0x03FC0000
3559#define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_LSB 18
3560
3561#define SEARCH_FFT_REPORT_REG1_PEAK_MAG_MASK 0x0003FF00
3562#define SEARCH_FFT_REPORT_REG1_PEAK_MAG_LSB 8
3563
3564#define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_MASK 0x000000FF
3565#define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_LSB 0
3566
3567struct phyerr_tlv {
3568 __le16 len;
3569 u8 tag;
3570 u8 sig;
3571} __packed;
3572
3573#define DFS_RSSI_POSSIBLY_FALSE 50
3574#define DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE 40
3575
3576struct wmi_mgmt_tx_hdr {
3577 __le32 vdev_id;
3578 struct wmi_mac_addr peer_macaddr;
3579 __le32 tx_rate;
3580 __le32 tx_power;
3581 __le32 buf_len;
3582} __packed;
3583
3584struct wmi_mgmt_tx_cmd {
3585 struct wmi_mgmt_tx_hdr hdr;
3586 u8 buf[0];
3587} __packed;
3588
3589struct wmi_echo_event {
3590 __le32 value;
3591} __packed;
3592
3593struct wmi_echo_cmd {
3594 __le32 value;
3595} __packed;
3596
3597struct wmi_pdev_set_regdomain_cmd {
3598 __le32 reg_domain;
3599 __le32 reg_domain_2G;
3600 __le32 reg_domain_5G;
3601 __le32 conformance_test_limit_2G;
3602 __le32 conformance_test_limit_5G;
3603} __packed;
3604
3605enum wmi_dfs_region {
3606
3607 WMI_UNINIT_DFS_DOMAIN = 0,
3608
3609
3610 WMI_FCC_DFS_DOMAIN = 1,
3611
3612
3613 WMI_ETSI_DFS_DOMAIN = 2,
3614
3615
3616 WMI_MKK4_DFS_DOMAIN = 3,
3617};
3618
3619struct wmi_pdev_set_regdomain_cmd_10x {
3620 __le32 reg_domain;
3621 __le32 reg_domain_2G;
3622 __le32 reg_domain_5G;
3623 __le32 conformance_test_limit_2G;
3624 __le32 conformance_test_limit_5G;
3625
3626
3627 __le32 dfs_domain;
3628} __packed;
3629
3630
3631struct wmi_pdev_set_quiet_cmd {
3632
3633 __le32 period;
3634
3635
3636 __le32 duration;
3637
3638
3639 __le32 next_start;
3640
3641
3642 __le32 enabled;
3643} __packed;
3644
3645
3646
3647
3648enum ath10k_protmode {
3649 ATH10K_PROT_NONE = 0,
3650 ATH10K_PROT_CTSONLY = 1,
3651 ATH10K_PROT_RTSCTS = 2,
3652};
3653
3654enum wmi_rtscts_profile {
3655 WMI_RTSCTS_FOR_NO_RATESERIES = 0,
3656 WMI_RTSCTS_FOR_SECOND_RATESERIES,
3657 WMI_RTSCTS_ACROSS_SW_RETRIES
3658};
3659
3660#define WMI_RTSCTS_ENABLED 1
3661#define WMI_RTSCTS_SET_MASK 0x0f
3662#define WMI_RTSCTS_SET_LSB 0
3663
3664#define WMI_RTSCTS_PROFILE_MASK 0xf0
3665#define WMI_RTSCTS_PROFILE_LSB 4
3666
3667enum wmi_beacon_gen_mode {
3668 WMI_BEACON_STAGGERED_MODE = 0,
3669 WMI_BEACON_BURST_MODE = 1
3670};
3671
3672enum wmi_csa_event_ies_present_flag {
3673 WMI_CSA_IE_PRESENT = 0x00000001,
3674 WMI_XCSA_IE_PRESENT = 0x00000002,
3675 WMI_WBW_IE_PRESENT = 0x00000004,
3676 WMI_CSWARP_IE_PRESENT = 0x00000008,
3677};
3678
3679
3680struct wmi_csa_event {
3681 __le32 i_fc_dur;
3682
3683
3684 struct wmi_mac_addr i_addr1;
3685 struct wmi_mac_addr i_addr2;
3686 __le32 csa_ie[2];
3687 __le32 xcsa_ie[2];
3688 __le32 wb_ie[2];
3689 __le32 cswarp_ie;
3690 __le32 ies_present_flag;
3691} __packed;
3692
3693
3694#define PDEV_DEFAULT_STATS_UPDATE_PERIOD 500
3695#define VDEV_DEFAULT_STATS_UPDATE_PERIOD 500
3696#define PEER_DEFAULT_STATS_UPDATE_PERIOD 500
3697
3698struct wmi_pdev_param_map {
3699 u32 tx_chain_mask;
3700 u32 rx_chain_mask;
3701 u32 txpower_limit2g;
3702 u32 txpower_limit5g;
3703 u32 txpower_scale;
3704 u32 beacon_gen_mode;
3705 u32 beacon_tx_mode;
3706 u32 resmgr_offchan_mode;
3707 u32 protection_mode;
3708 u32 dynamic_bw;
3709 u32 non_agg_sw_retry_th;
3710 u32 agg_sw_retry_th;
3711 u32 sta_kickout_th;
3712 u32 ac_aggrsize_scaling;
3713 u32 ltr_enable;
3714 u32 ltr_ac_latency_be;
3715 u32 ltr_ac_latency_bk;
3716 u32 ltr_ac_latency_vi;
3717 u32 ltr_ac_latency_vo;
3718 u32 ltr_ac_latency_timeout;
3719 u32 ltr_sleep_override;
3720 u32 ltr_rx_override;
3721 u32 ltr_tx_activity_timeout;
3722 u32 l1ss_enable;
3723 u32 dsleep_enable;
3724 u32 pcielp_txbuf_flush;
3725 u32 pcielp_txbuf_watermark;
3726 u32 pcielp_txbuf_tmo_en;
3727 u32 pcielp_txbuf_tmo_value;
3728 u32 pdev_stats_update_period;
3729 u32 vdev_stats_update_period;
3730 u32 peer_stats_update_period;
3731 u32 bcnflt_stats_update_period;
3732 u32 pmf_qos;
3733 u32 arp_ac_override;
3734 u32 dcs;
3735 u32 ani_enable;
3736 u32 ani_poll_period;
3737 u32 ani_listen_period;
3738 u32 ani_ofdm_level;
3739 u32 ani_cck_level;
3740 u32 dyntxchain;
3741 u32 proxy_sta;
3742 u32 idle_ps_config;
3743 u32 power_gating_sleep;
3744 u32 fast_channel_reset;
3745 u32 burst_dur;
3746 u32 burst_enable;
3747 u32 cal_period;
3748 u32 aggr_burst;
3749 u32 rx_decap_mode;
3750 u32 smart_antenna_default_antenna;
3751 u32 igmpmld_override;
3752 u32 igmpmld_tid;
3753 u32 antenna_gain;
3754 u32 rx_filter;
3755 u32 set_mcast_to_ucast_tid;
3756 u32 proxy_sta_mode;
3757 u32 set_mcast2ucast_mode;
3758 u32 set_mcast2ucast_buffer;
3759 u32 remove_mcast2ucast_buffer;
3760 u32 peer_sta_ps_statechg_enable;
3761 u32 igmpmld_ac_override;
3762 u32 block_interbss;
3763 u32 set_disable_reset_cmdid;
3764 u32 set_msdu_ttl_cmdid;
3765 u32 set_ppdu_duration_cmdid;
3766 u32 txbf_sound_period_cmdid;
3767 u32 set_promisc_mode_cmdid;
3768 u32 set_burst_mode_cmdid;
3769 u32 en_stats;
3770 u32 mu_group_policy;
3771 u32 noise_detection;
3772 u32 noise_threshold;
3773 u32 dpd_enable;
3774 u32 set_mcast_bcast_echo;
3775 u32 atf_strict_sch;
3776 u32 atf_sched_duration;
3777 u32 ant_plzn;
3778 u32 mgmt_retry_limit;
3779 u32 sensitivity_level;
3780 u32 signed_txpower_2g;
3781 u32 signed_txpower_5g;
3782 u32 enable_per_tid_amsdu;
3783 u32 enable_per_tid_ampdu;
3784 u32 cca_threshold;
3785 u32 rts_fixed_rate;
3786 u32 pdev_reset;
3787 u32 wapi_mbssid_offset;
3788 u32 arp_srcaddr;
3789 u32 arp_dstaddr;
3790 u32 enable_btcoex;
3791 u32 rfkill_config;
3792 u32 rfkill_enable;
3793};
3794
3795#define WMI_PDEV_PARAM_UNSUPPORTED 0
3796
3797enum wmi_pdev_param {
3798
3799 WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
3800
3801 WMI_PDEV_PARAM_RX_CHAIN_MASK,
3802
3803 WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
3804
3805 WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
3806
3807 WMI_PDEV_PARAM_TXPOWER_SCALE,
3808
3809 WMI_PDEV_PARAM_BEACON_GEN_MODE,
3810
3811 WMI_PDEV_PARAM_BEACON_TX_MODE,
3812
3813
3814
3815
3816 WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
3817
3818
3819
3820
3821 WMI_PDEV_PARAM_PROTECTION_MODE,
3822
3823
3824
3825
3826
3827
3828 WMI_PDEV_PARAM_DYNAMIC_BW,
3829
3830 WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
3831
3832 WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
3833
3834 WMI_PDEV_PARAM_STA_KICKOUT_TH,
3835
3836 WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
3837
3838 WMI_PDEV_PARAM_LTR_ENABLE,
3839
3840 WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
3841
3842 WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
3843
3844 WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
3845
3846 WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
3847
3848 WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
3849
3850 WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
3851
3852 WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
3853
3854 WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
3855
3856 WMI_PDEV_PARAM_L1SS_ENABLE,
3857
3858 WMI_PDEV_PARAM_DSLEEP_ENABLE,
3859
3860 WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
3861
3862 WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
3863
3864 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
3865
3866 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
3867
3868 WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
3869
3870 WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
3871
3872 WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
3873
3874 WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
3875
3876 WMI_PDEV_PARAM_PMF_QOS,
3877
3878 WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
3879
3880 WMI_PDEV_PARAM_DCS,
3881
3882 WMI_PDEV_PARAM_ANI_ENABLE,
3883
3884 WMI_PDEV_PARAM_ANI_POLL_PERIOD,
3885
3886 WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
3887
3888 WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
3889
3890 WMI_PDEV_PARAM_ANI_CCK_LEVEL,
3891
3892 WMI_PDEV_PARAM_DYNTXCHAIN,
3893
3894 WMI_PDEV_PARAM_PROXY_STA,
3895
3896 WMI_PDEV_PARAM_IDLE_PS_CONFIG,
3897
3898 WMI_PDEV_PARAM_POWER_GATING_SLEEP,
3899};
3900
3901enum wmi_10x_pdev_param {
3902
3903 WMI_10X_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
3904
3905 WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
3906
3907 WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
3908
3909 WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
3910
3911 WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
3912
3913 WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
3914
3915 WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
3916
3917
3918
3919
3920 WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
3921
3922
3923
3924
3925 WMI_10X_PDEV_PARAM_PROTECTION_MODE,
3926
3927 WMI_10X_PDEV_PARAM_DYNAMIC_BW,
3928
3929 WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
3930
3931 WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
3932
3933 WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
3934
3935 WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
3936
3937 WMI_10X_PDEV_PARAM_LTR_ENABLE,
3938
3939 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
3940
3941 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
3942
3943 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
3944
3945 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
3946
3947 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
3948
3949 WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
3950
3951 WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
3952
3953 WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
3954
3955 WMI_10X_PDEV_PARAM_L1SS_ENABLE,
3956
3957 WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
3958
3959 WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
3960
3961 WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
3962
3963 WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
3964
3965 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
3966
3967 WMI_10X_PDEV_PARAM_PMF_QOS,
3968
3969 WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
3970
3971 WMI_10X_PDEV_PARAM_DCS,
3972
3973 WMI_10X_PDEV_PARAM_ANI_ENABLE,
3974
3975 WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
3976
3977 WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
3978
3979 WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
3980
3981 WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
3982
3983 WMI_10X_PDEV_PARAM_DYNTXCHAIN,
3984
3985 WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
3986
3987 WMI_10X_PDEV_PARAM_BURST_DUR,
3988
3989 WMI_10X_PDEV_PARAM_BURST_ENABLE,
3990
3991
3992 WMI_10X_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
3993 WMI_10X_PDEV_PARAM_IGMPMLD_OVERRIDE,
3994 WMI_10X_PDEV_PARAM_IGMPMLD_TID,
3995 WMI_10X_PDEV_PARAM_ANTENNA_GAIN,
3996 WMI_10X_PDEV_PARAM_RX_DECAP_MODE,
3997 WMI_10X_PDEV_PARAM_RX_FILTER,
3998 WMI_10X_PDEV_PARAM_SET_MCAST_TO_UCAST_TID,
3999 WMI_10X_PDEV_PARAM_PROXY_STA_MODE,
4000 WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_MODE,
4001 WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
4002 WMI_10X_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
4003 WMI_10X_PDEV_PARAM_PEER_STA_PS_STATECHG_ENABLE,
4004 WMI_10X_PDEV_PARAM_RTS_FIXED_RATE,
4005 WMI_10X_PDEV_PARAM_CAL_PERIOD,
4006 WMI_10X_PDEV_PARAM_ATF_STRICT_SCH,
4007 WMI_10X_PDEV_PARAM_ATF_SCHED_DURATION,
4008 WMI_10X_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
4009 WMI_10X_PDEV_PARAM_PDEV_RESET
4010};
4011
4012enum wmi_10_4_pdev_param {
4013 WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
4014 WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
4015 WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
4016 WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
4017 WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
4018 WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
4019 WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
4020 WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
4021 WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
4022 WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
4023 WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
4024 WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
4025 WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
4026 WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
4027 WMI_10_4_PDEV_PARAM_LTR_ENABLE,
4028 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
4029 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
4030 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
4031 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
4032 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
4033 WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
4034 WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
4035 WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
4036 WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
4037 WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
4038 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
4039 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
4040 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
4041 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
4042 WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
4043 WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
4044 WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
4045 WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
4046 WMI_10_4_PDEV_PARAM_PMF_QOS,
4047 WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
4048 WMI_10_4_PDEV_PARAM_DCS,
4049 WMI_10_4_PDEV_PARAM_ANI_ENABLE,
4050 WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
4051 WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
4052 WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
4053 WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
4054 WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
4055 WMI_10_4_PDEV_PARAM_PROXY_STA,
4056 WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
4057 WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
4058 WMI_10_4_PDEV_PARAM_AGGR_BURST,
4059 WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
4060 WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
4061 WMI_10_4_PDEV_PARAM_BURST_DUR,
4062 WMI_10_4_PDEV_PARAM_BURST_ENABLE,
4063 WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
4064 WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
4065 WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
4066 WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
4067 WMI_10_4_PDEV_PARAM_RX_FILTER,
4068 WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
4069 WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
4070 WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
4071 WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
4072 WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
4073 WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
4074 WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
4075 WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
4076 WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
4077 WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
4078 WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
4079 WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
4080 WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
4081 WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
4082 WMI_10_4_PDEV_PARAM_EN_STATS,
4083 WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
4084 WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
4085 WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
4086 WMI_10_4_PDEV_PARAM_DPD_ENABLE,
4087 WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
4088 WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
4089 WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
4090 WMI_10_4_PDEV_PARAM_ANT_PLZN,
4091 WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
4092 WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
4093 WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
4094 WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
4095 WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
4096 WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
4097 WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
4098 WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
4099 WMI_10_4_PDEV_PARAM_CAL_PERIOD,
4100 WMI_10_4_PDEV_PARAM_PDEV_RESET,
4101 WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
4102 WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
4103 WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
4104 WMI_10_4_PDEV_PARAM_TXPOWER_DECR_DB,
4105 WMI_10_4_PDEV_PARAM_RX_BATCHMODE,
4106 WMI_10_4_PDEV_PARAM_PACKET_AGGR_DELAY,
4107 WMI_10_4_PDEV_PARAM_ATF_OBSS_NOISE_SCH,
4108 WMI_10_4_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR,
4109 WMI_10_4_PDEV_PARAM_CUST_TXPOWER_SCALE,
4110 WMI_10_4_PDEV_PARAM_ATF_DYNAMIC_ENABLE,
4111 WMI_10_4_PDEV_PARAM_ATF_SSID_GROUP_POLICY,
4112 WMI_10_4_PDEV_PARAM_ENABLE_BTCOEX,
4113};
4114
4115struct wmi_pdev_set_param_cmd {
4116 __le32 param_id;
4117 __le32 param_value;
4118} __packed;
4119
4120struct wmi_pdev_set_base_macaddr_cmd {
4121 struct wmi_mac_addr mac_addr;
4122} __packed;
4123
4124
4125#define WMI_PDEV_PARAM_CAL_PERIOD_MAX 60000
4126
4127struct wmi_pdev_get_tpc_config_cmd {
4128
4129 __le32 param;
4130} __packed;
4131
4132#define WMI_TPC_CONFIG_PARAM 1
4133#define WMI_TPC_FINAL_RATE_MAX 240
4134#define WMI_TPC_TX_N_CHAIN 4
4135#define WMI_TPC_RATE_MAX (WMI_TPC_TX_N_CHAIN * 65)
4136#define WMI_TPC_PREAM_TABLE_MAX 10
4137#define WMI_TPC_FLAG 3
4138#define WMI_TPC_BUF_SIZE 10
4139#define WMI_TPC_BEAMFORMING 2
4140
4141enum wmi_tpc_table_type {
4142 WMI_TPC_TABLE_TYPE_CDD = 0,
4143 WMI_TPC_TABLE_TYPE_STBC = 1,
4144 WMI_TPC_TABLE_TYPE_TXBF = 2,
4145};
4146
4147enum wmi_tpc_config_event_flag {
4148 WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD = 0x1,
4149 WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC = 0x2,
4150 WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF = 0x4,
4151};
4152
4153struct wmi_pdev_tpc_config_event {
4154 __le32 reg_domain;
4155 __le32 chan_freq;
4156 __le32 phy_mode;
4157 __le32 twice_antenna_reduction;
4158 __le32 twice_max_rd_power;
4159 a_sle32 twice_antenna_gain;
4160 __le32 power_limit;
4161 __le32 rate_max;
4162 __le32 num_tx_chain;
4163 __le32 ctl;
4164 __le32 flags;
4165 s8 max_reg_allow_pow[WMI_TPC_TX_N_CHAIN];
4166 s8 max_reg_allow_pow_agcdd[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4167 s8 max_reg_allow_pow_agstbc[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4168 s8 max_reg_allow_pow_agtxbf[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4169 u8 rates_array[WMI_TPC_RATE_MAX];
4170} __packed;
4171
4172
4173enum wmi_tp_scale {
4174 WMI_TP_SCALE_MAX = 0,
4175 WMI_TP_SCALE_50 = 1,
4176 WMI_TP_SCALE_25 = 2,
4177 WMI_TP_SCALE_12 = 3,
4178 WMI_TP_SCALE_MIN = 4,
4179 WMI_TP_SCALE_SIZE = 5,
4180};
4181
4182struct wmi_pdev_tpc_final_table_event {
4183 __le32 reg_domain;
4184 __le32 chan_freq;
4185 __le32 phy_mode;
4186 __le32 twice_antenna_reduction;
4187 __le32 twice_max_rd_power;
4188 a_sle32 twice_antenna_gain;
4189 __le32 power_limit;
4190 __le32 rate_max;
4191 __le32 num_tx_chain;
4192 __le32 ctl;
4193 __le32 flags;
4194 s8 max_reg_allow_pow[WMI_TPC_TX_N_CHAIN];
4195 s8 max_reg_allow_pow_agcdd[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4196 s8 max_reg_allow_pow_agstbc[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4197 s8 max_reg_allow_pow_agtxbf[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4198 u8 rates_array[WMI_TPC_FINAL_RATE_MAX];
4199 u8 ctl_power_table[WMI_TPC_BEAMFORMING][WMI_TPC_TX_N_CHAIN]
4200 [WMI_TPC_TX_N_CHAIN];
4201} __packed;
4202
4203struct wmi_pdev_get_tpc_table_cmd {
4204 __le32 param;
4205} __packed;
4206
4207enum wmi_tpc_pream_2ghz {
4208 WMI_TPC_PREAM_2GHZ_CCK = 0,
4209 WMI_TPC_PREAM_2GHZ_OFDM,
4210 WMI_TPC_PREAM_2GHZ_HT20,
4211 WMI_TPC_PREAM_2GHZ_HT40,
4212 WMI_TPC_PREAM_2GHZ_VHT20,
4213 WMI_TPC_PREAM_2GHZ_VHT40,
4214 WMI_TPC_PREAM_2GHZ_VHT80,
4215};
4216
4217enum wmi_tpc_pream_5ghz {
4218 WMI_TPC_PREAM_5GHZ_OFDM = 1,
4219 WMI_TPC_PREAM_5GHZ_HT20,
4220 WMI_TPC_PREAM_5GHZ_HT40,
4221 WMI_TPC_PREAM_5GHZ_VHT20,
4222 WMI_TPC_PREAM_5GHZ_VHT40,
4223 WMI_TPC_PREAM_5GHZ_VHT80,
4224 WMI_TPC_PREAM_5GHZ_HTCUP,
4225};
4226
4227#define WMI_PEER_PS_STATE_DISABLED 2
4228
4229struct wmi_peer_sta_ps_state_chg_event {
4230 struct wmi_mac_addr peer_macaddr;
4231 __le32 peer_ps_state;
4232} __packed;
4233
4234struct wmi_pdev_chanlist_update_event {
4235
4236 __le32 num_chan;
4237
4238 struct wmi_channel channel_list[1];
4239} __packed;
4240
4241#define WMI_MAX_DEBUG_MESG (sizeof(u32) * 32)
4242
4243struct wmi_debug_mesg_event {
4244
4245 char bufp[WMI_MAX_DEBUG_MESG];
4246} __packed;
4247
4248enum {
4249
4250 VDEV_SUBTYPE_P2PDEV = 0,
4251
4252 VDEV_SUBTYPE_P2PCLI,
4253
4254 VDEV_SUBTYPE_P2PGO,
4255
4256 VDEV_SUBTYPE_BT,
4257};
4258
4259struct wmi_pdev_set_channel_cmd {
4260
4261 struct wmi_channel chan;
4262} __packed;
4263
4264struct wmi_pdev_pktlog_enable_cmd {
4265 __le32 ev_bitmap;
4266} __packed;
4267
4268
4269#define WMI_DSCP_MAP_MAX (64)
4270struct wmi_pdev_set_dscp_tid_map_cmd {
4271
4272 __le32 dscp_to_tid_map[WMI_DSCP_MAP_MAX];
4273} __packed;
4274
4275enum mcast_bcast_rate_id {
4276 WMI_SET_MCAST_RATE,
4277 WMI_SET_BCAST_RATE
4278};
4279
4280struct mcast_bcast_rate {
4281 enum mcast_bcast_rate_id rate_id;
4282 __le32 rate;
4283} __packed;
4284
4285struct wmi_wmm_params {
4286 __le32 cwmin;
4287 __le32 cwmax;
4288 __le32 aifs;
4289 __le32 txop;
4290 __le32 acm;
4291 __le32 no_ack;
4292} __packed;
4293
4294struct wmi_pdev_set_wmm_params {
4295 struct wmi_wmm_params ac_be;
4296 struct wmi_wmm_params ac_bk;
4297 struct wmi_wmm_params ac_vi;
4298 struct wmi_wmm_params ac_vo;
4299} __packed;
4300
4301struct wmi_wmm_params_arg {
4302 u32 cwmin;
4303 u32 cwmax;
4304 u32 aifs;
4305 u32 txop;
4306 u32 acm;
4307 u32 no_ack;
4308};
4309
4310struct wmi_wmm_params_all_arg {
4311 struct wmi_wmm_params_arg ac_be;
4312 struct wmi_wmm_params_arg ac_bk;
4313 struct wmi_wmm_params_arg ac_vi;
4314 struct wmi_wmm_params_arg ac_vo;
4315};
4316
4317struct wmi_pdev_stats_tx {
4318
4319 __le32 comp_queued;
4320
4321
4322 __le32 comp_delivered;
4323
4324
4325 __le32 msdu_enqued;
4326
4327
4328 __le32 mpdu_enqued;
4329
4330
4331 __le32 wmm_drop;
4332
4333
4334 __le32 local_enqued;
4335
4336
4337 __le32 local_freed;
4338
4339
4340 __le32 hw_queued;
4341
4342
4343 __le32 hw_reaped;
4344
4345
4346 __le32 underrun;
4347
4348
4349 __le32 tx_abort;
4350
4351
4352 __le32 mpdus_requed;
4353
4354
4355 __le32 tx_ko;
4356
4357
4358 __le32 data_rc;
4359
4360
4361 __le32 self_triggers;
4362
4363
4364 __le32 sw_retry_failure;
4365
4366
4367 __le32 illgl_rate_phy_err;
4368
4369
4370 __le32 pdev_cont_xretry;
4371
4372
4373 __le32 pdev_tx_timeout;
4374
4375
4376 __le32 pdev_resets;
4377
4378
4379 __le32 stateless_tid_alloc_failure;
4380
4381 __le32 phy_underrun;
4382
4383
4384 __le32 txop_ovf;
4385} __packed;
4386
4387struct wmi_10_4_pdev_stats_tx {
4388
4389 __le32 comp_queued;
4390
4391
4392 __le32 comp_delivered;
4393
4394
4395 __le32 msdu_enqued;
4396
4397
4398 __le32 mpdu_enqued;
4399
4400
4401 __le32 wmm_drop;
4402
4403
4404 __le32 local_enqued;
4405
4406
4407 __le32 local_freed;
4408
4409
4410 __le32 hw_queued;
4411
4412
4413 __le32 hw_reaped;
4414
4415
4416 __le32 underrun;
4417
4418
4419 __le32 hw_paused;
4420
4421
4422 __le32 tx_abort;
4423
4424
4425 __le32 mpdus_requed;
4426
4427
4428 __le32 tx_ko;
4429
4430
4431 __le32 data_rc;
4432
4433
4434 __le32 self_triggers;
4435
4436
4437 __le32 sw_retry_failure;
4438
4439
4440 __le32 illgl_rate_phy_err;
4441
4442
4443 __le32 pdev_cont_xretry;
4444
4445
4446 __le32 pdev_tx_timeout;
4447
4448
4449 __le32 pdev_resets;
4450
4451
4452 __le32 stateless_tid_alloc_failure;
4453
4454 __le32 phy_underrun;
4455
4456
4457 __le32 txop_ovf;
4458
4459
4460 __le32 seq_posted;
4461
4462
4463 __le32 seq_failed_queueing;
4464
4465
4466 __le32 seq_completed;
4467
4468
4469 __le32 seq_restarted;
4470
4471
4472 __le32 mu_seq_posted;
4473
4474
4475 __le32 mpdus_sw_flush;
4476
4477
4478 __le32 mpdus_hw_filter;
4479
4480
4481
4482
4483 __le32 mpdus_truncated;
4484
4485
4486 __le32 mpdus_ack_failed;
4487
4488
4489 __le32 mpdus_expired;
4490} __packed;
4491
4492struct wmi_pdev_stats_rx {
4493
4494 __le32 mid_ppdu_route_change;
4495
4496
4497 __le32 status_rcvd;
4498
4499
4500 __le32 r0_frags;
4501 __le32 r1_frags;
4502 __le32 r2_frags;
4503 __le32 r3_frags;
4504
4505
4506 __le32 htt_msdus;
4507 __le32 htt_mpdus;
4508
4509
4510 __le32 loc_msdus;
4511 __le32 loc_mpdus;
4512
4513
4514 __le32 oversize_amsdu;
4515
4516
4517 __le32 phy_errs;
4518
4519
4520 __le32 phy_err_drop;
4521
4522
4523 __le32 mpdu_errs;
4524} __packed;
4525
4526struct wmi_pdev_stats_peer {
4527
4528 __le32 dummy;
4529} __packed;
4530
4531enum wmi_stats_id {
4532 WMI_STAT_PEER = BIT(0),
4533 WMI_STAT_AP = BIT(1),
4534 WMI_STAT_PDEV = BIT(2),
4535 WMI_STAT_VDEV = BIT(3),
4536 WMI_STAT_BCNFLT = BIT(4),
4537 WMI_STAT_VDEV_RATE = BIT(5),
4538};
4539
4540enum wmi_10_4_stats_id {
4541 WMI_10_4_STAT_PEER = BIT(0),
4542 WMI_10_4_STAT_AP = BIT(1),
4543 WMI_10_4_STAT_INST = BIT(2),
4544 WMI_10_4_STAT_PEER_EXTD = BIT(3),
4545 WMI_10_4_STAT_VDEV_EXTD = BIT(4),
4546};
4547
4548enum wmi_tlv_stats_id {
4549 WMI_TLV_STAT_PEER = BIT(0),
4550 WMI_TLV_STAT_AP = BIT(1),
4551 WMI_TLV_STAT_PDEV = BIT(2),
4552 WMI_TLV_STAT_VDEV = BIT(3),
4553 WMI_TLV_STAT_PEER_EXTD = BIT(10),
4554};
4555
4556struct wlan_inst_rssi_args {
4557 __le16 cfg_retry_count;
4558 __le16 retry_count;
4559};
4560
4561struct wmi_request_stats_cmd {
4562 __le32 stats_id;
4563
4564 __le32 vdev_id;
4565
4566
4567 struct wmi_mac_addr peer_macaddr;
4568
4569
4570 struct wlan_inst_rssi_args inst_rssi_args;
4571} __packed;
4572
4573
4574enum {
4575
4576 WMI_PDEV_SUSPEND,
4577
4578
4579 WMI_PDEV_SUSPEND_AND_DISABLE_INTR,
4580};
4581
4582struct wmi_pdev_suspend_cmd {
4583
4584 __le32 suspend_opt;
4585} __packed;
4586
4587struct wmi_stats_event {
4588 __le32 stats_id;
4589
4590
4591
4592
4593 __le32 num_pdev_stats;
4594
4595
4596
4597
4598 __le32 num_vdev_stats;
4599
4600
4601
4602
4603 __le32 num_peer_stats;
4604 __le32 num_bcnflt_stats;
4605
4606
4607
4608
4609
4610
4611
4612
4613
4614 u8 data[0];
4615} __packed;
4616
4617struct wmi_10_2_stats_event {
4618 __le32 stats_id;
4619 __le32 num_pdev_stats;
4620 __le32 num_pdev_ext_stats;
4621 __le32 num_vdev_stats;
4622 __le32 num_peer_stats;
4623 __le32 num_bcnflt_stats;
4624 u8 data[0];
4625} __packed;
4626
4627
4628
4629
4630
4631struct wmi_pdev_stats_base {
4632 __le32 chan_nf;
4633 __le32 tx_frame_count;
4634 __le32 rx_frame_count;
4635 __le32 rx_clear_count;
4636 __le32 cycle_count;
4637 __le32 phy_err_count;
4638 __le32 chan_tx_pwr;
4639} __packed;
4640
4641struct wmi_pdev_stats {
4642 struct wmi_pdev_stats_base base;
4643 struct wmi_pdev_stats_tx tx;
4644 struct wmi_pdev_stats_rx rx;
4645 struct wmi_pdev_stats_peer peer;
4646} __packed;
4647
4648struct wmi_pdev_stats_extra {
4649 __le32 ack_rx_bad;
4650 __le32 rts_bad;
4651 __le32 rts_good;
4652 __le32 fcs_bad;
4653 __le32 no_beacons;
4654 __le32 mib_int_count;
4655} __packed;
4656
4657struct wmi_10x_pdev_stats {
4658 struct wmi_pdev_stats_base base;
4659 struct wmi_pdev_stats_tx tx;
4660 struct wmi_pdev_stats_rx rx;
4661 struct wmi_pdev_stats_peer peer;
4662 struct wmi_pdev_stats_extra extra;
4663} __packed;
4664
4665struct wmi_pdev_stats_mem {
4666 __le32 dram_free;
4667 __le32 iram_free;
4668} __packed;
4669
4670struct wmi_10_2_pdev_stats {
4671 struct wmi_pdev_stats_base base;
4672 struct wmi_pdev_stats_tx tx;
4673 __le32 mc_drop;
4674 struct wmi_pdev_stats_rx rx;
4675 __le32 pdev_rx_timeout;
4676 struct wmi_pdev_stats_mem mem;
4677 struct wmi_pdev_stats_peer peer;
4678 struct wmi_pdev_stats_extra extra;
4679} __packed;
4680
4681struct wmi_10_4_pdev_stats {
4682 struct wmi_pdev_stats_base base;
4683 struct wmi_10_4_pdev_stats_tx tx;
4684 struct wmi_pdev_stats_rx rx;
4685 __le32 rx_ovfl_errs;
4686 struct wmi_pdev_stats_mem mem;
4687 __le32 sram_free_size;
4688 struct wmi_pdev_stats_extra extra;
4689} __packed;
4690
4691
4692
4693
4694
4695#define WMI_VDEV_STATS_FTM_COUNT_VALID BIT(31)
4696#define WMI_VDEV_STATS_FTM_COUNT_LSB 0
4697#define WMI_VDEV_STATS_FTM_COUNT_MASK 0x7fffffff
4698
4699struct wmi_vdev_stats {
4700 __le32 vdev_id;
4701} __packed;
4702
4703struct wmi_vdev_stats_extd {
4704 __le32 vdev_id;
4705 __le32 ppdu_aggr_cnt;
4706 __le32 ppdu_noack;
4707 __le32 mpdu_queued;
4708 __le32 ppdu_nonaggr_cnt;
4709 __le32 mpdu_sw_requeued;
4710 __le32 mpdu_suc_retry;
4711 __le32 mpdu_suc_multitry;
4712 __le32 mpdu_fail_retry;
4713 __le32 tx_ftm_suc;
4714 __le32 tx_ftm_suc_retry;
4715 __le32 tx_ftm_fail;
4716 __le32 rx_ftmr_cnt;
4717 __le32 rx_ftmr_dup_cnt;
4718 __le32 rx_iftmr_cnt;
4719 __le32 rx_iftmr_dup_cnt;
4720 __le32 reserved[6];
4721} __packed;
4722
4723
4724
4725
4726
4727struct wmi_peer_stats {
4728 struct wmi_mac_addr peer_macaddr;
4729 __le32 peer_rssi;
4730 __le32 peer_tx_rate;
4731} __packed;
4732
4733struct wmi_10x_peer_stats {
4734 struct wmi_peer_stats old;
4735 __le32 peer_rx_rate;
4736} __packed;
4737
4738struct wmi_10_2_peer_stats {
4739 struct wmi_peer_stats old;
4740 __le32 peer_rx_rate;
4741 __le32 current_per;
4742 __le32 retries;
4743 __le32 tx_rate_count;
4744 __le32 max_4ms_frame_len;
4745 __le32 total_sub_frames;
4746 __le32 tx_bytes;
4747 __le32 num_pkt_loss_overflow[4];
4748 __le32 num_pkt_loss_excess_retry[4];
4749} __packed;
4750
4751struct wmi_10_2_4_peer_stats {
4752 struct wmi_10_2_peer_stats common;
4753 __le32 peer_rssi_changed;
4754} __packed;
4755
4756struct wmi_10_2_4_ext_peer_stats {
4757 struct wmi_10_2_peer_stats common;
4758 __le32 peer_rssi_changed;
4759 __le32 rx_duration;
4760} __packed;
4761
4762struct wmi_10_4_peer_stats {
4763 struct wmi_mac_addr peer_macaddr;
4764 __le32 peer_rssi;
4765 __le32 peer_rssi_seq_num;
4766 __le32 peer_tx_rate;
4767 __le32 peer_rx_rate;
4768 __le32 current_per;
4769 __le32 retries;
4770 __le32 tx_rate_count;
4771 __le32 max_4ms_frame_len;
4772 __le32 total_sub_frames;
4773 __le32 tx_bytes;
4774 __le32 num_pkt_loss_overflow[4];
4775 __le32 num_pkt_loss_excess_retry[4];
4776 __le32 peer_rssi_changed;
4777} __packed;
4778
4779struct wmi_10_4_peer_extd_stats {
4780 struct wmi_mac_addr peer_macaddr;
4781 __le32 inactive_time;
4782 __le32 peer_chain_rssi;
4783 __le32 rx_duration;
4784 __le32 reserved[10];
4785} __packed;
4786
4787struct wmi_10_4_bss_bcn_stats {
4788 __le32 vdev_id;
4789 __le32 bss_bcns_dropped;
4790 __le32 bss_bcn_delivered;
4791} __packed;
4792
4793struct wmi_10_4_bss_bcn_filter_stats {
4794 __le32 bcns_dropped;
4795 __le32 bcns_delivered;
4796 __le32 active_filters;
4797 struct wmi_10_4_bss_bcn_stats bss_stats;
4798} __packed;
4799
4800struct wmi_10_2_pdev_ext_stats {
4801 __le32 rx_rssi_comb;
4802 __le32 rx_rssi[4];
4803 __le32 rx_mcs[10];
4804 __le32 tx_mcs[10];
4805 __le32 ack_rssi;
4806} __packed;
4807
4808struct wmi_vdev_create_cmd {
4809 __le32 vdev_id;
4810 __le32 vdev_type;
4811 __le32 vdev_subtype;
4812 struct wmi_mac_addr vdev_macaddr;
4813} __packed;
4814
4815enum wmi_vdev_type {
4816 WMI_VDEV_TYPE_AP = 1,
4817 WMI_VDEV_TYPE_STA = 2,
4818 WMI_VDEV_TYPE_IBSS = 3,
4819 WMI_VDEV_TYPE_MONITOR = 4,
4820};
4821
4822enum wmi_vdev_subtype {
4823 WMI_VDEV_SUBTYPE_NONE,
4824 WMI_VDEV_SUBTYPE_P2P_DEVICE,
4825 WMI_VDEV_SUBTYPE_P2P_CLIENT,
4826 WMI_VDEV_SUBTYPE_P2P_GO,
4827 WMI_VDEV_SUBTYPE_PROXY_STA,
4828 WMI_VDEV_SUBTYPE_MESH_11S,
4829 WMI_VDEV_SUBTYPE_MESH_NON_11S,
4830};
4831
4832enum wmi_vdev_subtype_legacy {
4833 WMI_VDEV_SUBTYPE_LEGACY_NONE = 0,
4834 WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV = 1,
4835 WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI = 2,
4836 WMI_VDEV_SUBTYPE_LEGACY_P2P_GO = 3,
4837 WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA = 4,
4838};
4839
4840enum wmi_vdev_subtype_10_2_4 {
4841 WMI_VDEV_SUBTYPE_10_2_4_NONE = 0,
4842 WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV = 1,
4843 WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI = 2,
4844 WMI_VDEV_SUBTYPE_10_2_4_P2P_GO = 3,
4845 WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA = 4,
4846 WMI_VDEV_SUBTYPE_10_2_4_MESH_11S = 5,
4847};
4848
4849enum wmi_vdev_subtype_10_4 {
4850 WMI_VDEV_SUBTYPE_10_4_NONE = 0,
4851 WMI_VDEV_SUBTYPE_10_4_P2P_DEV = 1,
4852 WMI_VDEV_SUBTYPE_10_4_P2P_CLI = 2,
4853 WMI_VDEV_SUBTYPE_10_4_P2P_GO = 3,
4854 WMI_VDEV_SUBTYPE_10_4_PROXY_STA = 4,
4855 WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S = 5,
4856 WMI_VDEV_SUBTYPE_10_4_MESH_11S = 6,
4857};
4858
4859
4860
4861
4862
4863
4864
4865
4866#define WMI_VDEV_START_HIDDEN_SSID (1 << 0)
4867
4868
4869
4870
4871
4872
4873
4874#define WMI_VDEV_START_PMF_ENABLED (1 << 1)
4875
4876struct wmi_p2p_noa_descriptor {
4877 __le32 type_count;
4878 __le32 duration;
4879 __le32 interval;
4880 __le32 start_time;
4881} __packed;
4882
4883struct wmi_vdev_start_request_cmd {
4884
4885 struct wmi_channel chan;
4886
4887 __le32 vdev_id;
4888
4889 __le32 requestor_id;
4890
4891 __le32 beacon_interval;
4892
4893 __le32 dtim_period;
4894
4895 __le32 flags;
4896
4897 struct wmi_ssid ssid;
4898
4899 __le32 bcn_tx_rate;
4900
4901 __le32 bcn_tx_power;
4902
4903 __le32 num_noa_descriptors;
4904
4905
4906
4907
4908 __le32 disable_hw_ack;
4909
4910 struct wmi_p2p_noa_descriptor noa_descriptors[2];
4911} __packed;
4912
4913struct wmi_vdev_restart_request_cmd {
4914 struct wmi_vdev_start_request_cmd vdev_start_request_cmd;
4915} __packed;
4916
4917struct wmi_vdev_start_request_arg {
4918 u32 vdev_id;
4919 struct wmi_channel_arg channel;
4920 u32 bcn_intval;
4921 u32 dtim_period;
4922 u8 *ssid;
4923 u32 ssid_len;
4924 u32 bcn_tx_rate;
4925 u32 bcn_tx_power;
4926 bool disable_hw_ack;
4927 bool hidden_ssid;
4928 bool pmf_enabled;
4929};
4930
4931struct wmi_vdev_delete_cmd {
4932
4933 __le32 vdev_id;
4934} __packed;
4935
4936struct wmi_vdev_up_cmd {
4937 __le32 vdev_id;
4938 __le32 vdev_assoc_id;
4939 struct wmi_mac_addr vdev_bssid;
4940} __packed;
4941
4942struct wmi_vdev_stop_cmd {
4943 __le32 vdev_id;
4944} __packed;
4945
4946struct wmi_vdev_down_cmd {
4947 __le32 vdev_id;
4948} __packed;
4949
4950struct wmi_vdev_standby_response_cmd {
4951
4952 __le32 vdev_id;
4953} __packed;
4954
4955struct wmi_vdev_resume_response_cmd {
4956
4957 __le32 vdev_id;
4958} __packed;
4959
4960struct wmi_vdev_set_param_cmd {
4961 __le32 vdev_id;
4962 __le32 param_id;
4963 __le32 param_value;
4964} __packed;
4965
4966#define WMI_MAX_KEY_INDEX 3
4967#define WMI_MAX_KEY_LEN 32
4968
4969#define WMI_KEY_PAIRWISE 0x00
4970#define WMI_KEY_GROUP 0x01
4971#define WMI_KEY_TX_USAGE 0x02
4972
4973struct wmi_key_seq_counter {
4974 __le32 key_seq_counter_l;
4975 __le32 key_seq_counter_h;
4976} __packed;
4977
4978enum wmi_cipher_suites {
4979 WMI_CIPHER_NONE,
4980 WMI_CIPHER_WEP,
4981 WMI_CIPHER_TKIP,
4982 WMI_CIPHER_AES_OCB,
4983 WMI_CIPHER_AES_CCM,
4984 WMI_CIPHER_WAPI,
4985 WMI_CIPHER_CKIP,
4986 WMI_CIPHER_AES_CMAC,
4987 WMI_CIPHER_AES_GCM,
4988};
4989
4990enum wmi_tlv_cipher_suites {
4991 WMI_TLV_CIPHER_NONE,
4992 WMI_TLV_CIPHER_WEP,
4993 WMI_TLV_CIPHER_TKIP,
4994 WMI_TLV_CIPHER_AES_OCB,
4995 WMI_TLV_CIPHER_AES_CCM,
4996 WMI_TLV_CIPHER_WAPI,
4997 WMI_TLV_CIPHER_CKIP,
4998 WMI_TLV_CIPHER_AES_CMAC,
4999 WMI_TLV_CIPHER_ANY,
5000 WMI_TLV_CIPHER_AES_GCM,
5001};
5002
5003struct wmi_vdev_install_key_cmd {
5004 __le32 vdev_id;
5005 struct wmi_mac_addr peer_macaddr;
5006 __le32 key_idx;
5007 __le32 key_flags;
5008 __le32 key_cipher;
5009 struct wmi_key_seq_counter key_rsc_counter;
5010 struct wmi_key_seq_counter key_global_rsc_counter;
5011 struct wmi_key_seq_counter key_tsc_counter;
5012 u8 wpi_key_rsc_counter[16];
5013 u8 wpi_key_tsc_counter[16];
5014 __le32 key_len;
5015 __le32 key_txmic_len;
5016 __le32 key_rxmic_len;
5017
5018
5019 u8 key_data[0];
5020} __packed;
5021
5022struct wmi_vdev_install_key_arg {
5023 u32 vdev_id;
5024 const u8 *macaddr;
5025 u32 key_idx;
5026 u32 key_flags;
5027 u32 key_cipher;
5028 u32 key_len;
5029 u32 key_txmic_len;
5030 u32 key_rxmic_len;
5031 const void *key_data;
5032};
5033
5034
5035
5036
5037
5038
5039
5040
5041
5042
5043
5044
5045
5046
5047enum wmi_rate_preamble {
5048 WMI_RATE_PREAMBLE_OFDM,
5049 WMI_RATE_PREAMBLE_CCK,
5050 WMI_RATE_PREAMBLE_HT,
5051 WMI_RATE_PREAMBLE_VHT,
5052};
5053
5054#define ATH10K_HW_NSS(rate) (1 + (((rate) >> 4) & 0x3))
5055#define ATH10K_HW_PREAMBLE(rate) (((rate) >> 6) & 0x3)
5056#define ATH10K_HW_MCS_RATE(rate) ((rate) & 0xf)
5057#define ATH10K_HW_LEGACY_RATE(rate) ((rate) & 0x3f)
5058#define ATH10K_HW_BW(flags) (((flags) >> 3) & 0x3)
5059#define ATH10K_HW_GI(flags) (((flags) >> 5) & 0x1)
5060#define ATH10K_HW_RATECODE(rate, nss, preamble) \
5061 (((preamble) << 6) | ((nss) << 4) | (rate))
5062#define ATH10K_HW_AMPDU(flags) ((flags) & 0x1)
5063#define ATH10K_HW_BA_FAIL(flags) (((flags) >> 1) & 0x3)
5064#define ATH10K_FW_SKIPPED_RATE_CTRL(flags) (((flags) >> 6) & 0x1)
5065
5066#define ATH10K_VHT_MCS_NUM 10
5067#define ATH10K_BW_NUM 6
5068#define ATH10K_NSS_NUM 4
5069#define ATH10K_LEGACY_NUM 12
5070#define ATH10K_GI_NUM 2
5071#define ATH10K_HT_MCS_NUM 32
5072#define ATH10K_RATE_TABLE_NUM 320
5073#define ATH10K_RATE_INFO_FLAGS_SGI_BIT 2
5074
5075
5076#define WMI_FIXED_RATE_NONE (0xff)
5077
5078struct wmi_peer_param_map {
5079 u32 smps_state;
5080 u32 ampdu;
5081 u32 authorize;
5082 u32 chan_width;
5083 u32 nss;
5084 u32 use_4addr;
5085 u32 membership;
5086 u32 use_fixed_power;
5087 u32 user_pos;
5088 u32 crit_proto_hint_enabled;
5089 u32 tx_fail_cnt_thr;
5090 u32 set_hw_retry_cts2s;
5091 u32 ibss_atim_win_len;
5092 u32 debug;
5093 u32 phymode;
5094 u32 dummy_var;
5095};
5096
5097struct wmi_vdev_param_map {
5098 u32 rts_threshold;
5099 u32 fragmentation_threshold;
5100 u32 beacon_interval;
5101 u32 listen_interval;
5102 u32 multicast_rate;
5103 u32 mgmt_tx_rate;
5104 u32 slot_time;
5105 u32 preamble;
5106 u32 swba_time;
5107 u32 wmi_vdev_stats_update_period;
5108 u32 wmi_vdev_pwrsave_ageout_time;
5109 u32 wmi_vdev_host_swba_interval;
5110 u32 dtim_period;
5111 u32 wmi_vdev_oc_scheduler_air_time_limit;
5112 u32 wds;
5113 u32 atim_window;
5114 u32 bmiss_count_max;
5115 u32 bmiss_first_bcnt;
5116 u32 bmiss_final_bcnt;
5117 u32 feature_wmm;
5118 u32 chwidth;
5119 u32 chextoffset;
5120 u32 disable_htprotection;
5121 u32 sta_quickkickout;
5122 u32 mgmt_rate;
5123 u32 protection_mode;
5124 u32 fixed_rate;
5125 u32 sgi;
5126 u32 ldpc;
5127 u32 tx_stbc;
5128 u32 rx_stbc;
5129 u32 intra_bss_fwd;
5130 u32 def_keyid;
5131 u32 nss;
5132 u32 bcast_data_rate;
5133 u32 mcast_data_rate;
5134 u32 mcast_indicate;
5135 u32 dhcp_indicate;
5136 u32 unknown_dest_indicate;
5137 u32 ap_keepalive_min_idle_inactive_time_secs;
5138 u32 ap_keepalive_max_idle_inactive_time_secs;
5139 u32 ap_keepalive_max_unresponsive_time_secs;
5140 u32 ap_enable_nawds;
5141 u32 mcast2ucast_set;
5142 u32 enable_rtscts;
5143 u32 txbf;
5144 u32 packet_powersave;
5145 u32 drop_unencry;
5146 u32 tx_encap_type;
5147 u32 ap_detect_out_of_sync_sleeping_sta_time_secs;
5148 u32 rc_num_retries;
5149 u32 cabq_maxdur;
5150 u32 mfptest_set;
5151 u32 rts_fixed_rate;
5152 u32 vht_sgimask;
5153 u32 vht80_ratemask;
5154 u32 early_rx_adjust_enable;
5155 u32 early_rx_tgt_bmiss_num;
5156 u32 early_rx_bmiss_sample_cycle;
5157 u32 early_rx_slop_step;
5158 u32 early_rx_init_slop;
5159 u32 early_rx_adjust_pause;
5160 u32 proxy_sta;
5161 u32 meru_vc;
5162 u32 rx_decap_type;
5163 u32 bw_nss_ratemask;
5164 u32 inc_tsf;
5165 u32 dec_tsf;
5166 u32 disable_4addr_src_lrn;
5167 u32 rtt_responder_role;
5168};
5169
5170#define WMI_VDEV_PARAM_UNSUPPORTED 0
5171
5172
5173enum wmi_vdev_param {
5174
5175 WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1,
5176
5177 WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
5178
5179 WMI_VDEV_PARAM_BEACON_INTERVAL,
5180
5181 WMI_VDEV_PARAM_LISTEN_INTERVAL,
5182
5183 WMI_VDEV_PARAM_MULTICAST_RATE,
5184
5185 WMI_VDEV_PARAM_MGMT_TX_RATE,
5186
5187 WMI_VDEV_PARAM_SLOT_TIME,
5188
5189 WMI_VDEV_PARAM_PREAMBLE,
5190
5191 WMI_VDEV_PARAM_SWBA_TIME,
5192
5193 WMI_VDEV_STATS_UPDATE_PERIOD,
5194
5195 WMI_VDEV_PWRSAVE_AGEOUT_TIME,
5196
5197
5198
5199
5200 WMI_VDEV_HOST_SWBA_INTERVAL,
5201
5202 WMI_VDEV_PARAM_DTIM_PERIOD,
5203
5204
5205
5206
5207 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
5208
5209 WMI_VDEV_PARAM_WDS,
5210
5211 WMI_VDEV_PARAM_ATIM_WINDOW,
5212
5213 WMI_VDEV_PARAM_BMISS_COUNT_MAX,
5214
5215 WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
5216
5217 WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
5218
5219 WMI_VDEV_PARAM_FEATURE_WMM,
5220
5221 WMI_VDEV_PARAM_CHWIDTH,
5222
5223 WMI_VDEV_PARAM_CHEXTOFFSET,
5224
5225 WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
5226
5227 WMI_VDEV_PARAM_STA_QUICKKICKOUT,
5228
5229 WMI_VDEV_PARAM_MGMT_RATE,
5230
5231 WMI_VDEV_PARAM_PROTECTION_MODE,
5232
5233 WMI_VDEV_PARAM_FIXED_RATE,
5234
5235 WMI_VDEV_PARAM_SGI,
5236
5237 WMI_VDEV_PARAM_LDPC,
5238
5239 WMI_VDEV_PARAM_TX_STBC,
5240
5241 WMI_VDEV_PARAM_RX_STBC,
5242
5243 WMI_VDEV_PARAM_INTRA_BSS_FWD,
5244
5245 WMI_VDEV_PARAM_DEF_KEYID,
5246
5247 WMI_VDEV_PARAM_NSS,
5248
5249 WMI_VDEV_PARAM_BCAST_DATA_RATE,
5250
5251 WMI_VDEV_PARAM_MCAST_DATA_RATE,
5252
5253 WMI_VDEV_PARAM_MCAST_INDICATE,
5254
5255 WMI_VDEV_PARAM_DHCP_INDICATE,
5256
5257 WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
5258
5259
5260 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
5261
5262
5263
5264
5265
5266
5267
5268
5269
5270
5271
5272 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
5273
5274
5275
5276
5277
5278
5279
5280 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
5281
5282
5283 WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
5284
5285 WMI_VDEV_PARAM_ENABLE_RTSCTS,
5286
5287 WMI_VDEV_PARAM_TXBF,
5288
5289
5290 WMI_VDEV_PARAM_PACKET_POWERSAVE,
5291
5292
5293
5294
5295
5296 WMI_VDEV_PARAM_DROP_UNENCRY,
5297
5298
5299
5300
5301 WMI_VDEV_PARAM_TX_ENCAP_TYPE,
5302};
5303
5304
5305enum wmi_10x_vdev_param {
5306
5307 WMI_10X_VDEV_PARAM_RTS_THRESHOLD = 0x1,
5308
5309 WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
5310
5311 WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
5312
5313 WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
5314
5315 WMI_10X_VDEV_PARAM_MULTICAST_RATE,
5316
5317 WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
5318
5319 WMI_10X_VDEV_PARAM_SLOT_TIME,
5320
5321 WMI_10X_VDEV_PARAM_PREAMBLE,
5322
5323 WMI_10X_VDEV_PARAM_SWBA_TIME,
5324
5325 WMI_10X_VDEV_STATS_UPDATE_PERIOD,
5326
5327 WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
5328
5329
5330
5331
5332 WMI_10X_VDEV_HOST_SWBA_INTERVAL,
5333
5334 WMI_10X_VDEV_PARAM_DTIM_PERIOD,
5335
5336
5337
5338
5339 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
5340
5341 WMI_10X_VDEV_PARAM_WDS,
5342
5343 WMI_10X_VDEV_PARAM_ATIM_WINDOW,
5344
5345 WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
5346
5347 WMI_10X_VDEV_PARAM_FEATURE_WMM,
5348
5349 WMI_10X_VDEV_PARAM_CHWIDTH,
5350
5351 WMI_10X_VDEV_PARAM_CHEXTOFFSET,
5352
5353 WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
5354
5355 WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
5356
5357 WMI_10X_VDEV_PARAM_MGMT_RATE,
5358
5359 WMI_10X_VDEV_PARAM_PROTECTION_MODE,
5360
5361 WMI_10X_VDEV_PARAM_FIXED_RATE,
5362
5363 WMI_10X_VDEV_PARAM_SGI,
5364
5365 WMI_10X_VDEV_PARAM_LDPC,
5366
5367 WMI_10X_VDEV_PARAM_TX_STBC,
5368
5369 WMI_10X_VDEV_PARAM_RX_STBC,
5370
5371 WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
5372
5373 WMI_10X_VDEV_PARAM_DEF_KEYID,
5374
5375 WMI_10X_VDEV_PARAM_NSS,
5376
5377 WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
5378
5379 WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
5380
5381 WMI_10X_VDEV_PARAM_MCAST_INDICATE,
5382
5383 WMI_10X_VDEV_PARAM_DHCP_INDICATE,
5384
5385 WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
5386
5387
5388 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
5389
5390
5391
5392
5393
5394
5395
5396
5397
5398
5399
5400 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
5401
5402
5403
5404
5405
5406
5407
5408 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
5409
5410
5411 WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
5412
5413 WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
5414
5415 WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
5416
5417 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
5418
5419
5420 WMI_10X_VDEV_PARAM_TX_ENCAP_TYPE,
5421 WMI_10X_VDEV_PARAM_CABQ_MAXDUR,
5422 WMI_10X_VDEV_PARAM_MFPTEST_SET,
5423 WMI_10X_VDEV_PARAM_RTS_FIXED_RATE,
5424 WMI_10X_VDEV_PARAM_VHT_SGIMASK,
5425 WMI_10X_VDEV_PARAM_VHT80_RATEMASK,
5426 WMI_10X_VDEV_PARAM_TSF_INCREMENT,
5427};
5428
5429enum wmi_10_4_vdev_param {
5430 WMI_10_4_VDEV_PARAM_RTS_THRESHOLD = 0x1,
5431 WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
5432 WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
5433 WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
5434 WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
5435 WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
5436 WMI_10_4_VDEV_PARAM_SLOT_TIME,
5437 WMI_10_4_VDEV_PARAM_PREAMBLE,
5438 WMI_10_4_VDEV_PARAM_SWBA_TIME,
5439 WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
5440 WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
5441 WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
5442 WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
5443 WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
5444 WMI_10_4_VDEV_PARAM_WDS,
5445 WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
5446 WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
5447 WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
5448 WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
5449 WMI_10_4_VDEV_PARAM_FEATURE_WMM,
5450 WMI_10_4_VDEV_PARAM_CHWIDTH,
5451 WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
5452 WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
5453 WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
5454 WMI_10_4_VDEV_PARAM_MGMT_RATE,
5455 WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
5456 WMI_10_4_VDEV_PARAM_FIXED_RATE,
5457 WMI_10_4_VDEV_PARAM_SGI,
5458 WMI_10_4_VDEV_PARAM_LDPC,
5459 WMI_10_4_VDEV_PARAM_TX_STBC,
5460 WMI_10_4_VDEV_PARAM_RX_STBC,
5461 WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
5462 WMI_10_4_VDEV_PARAM_DEF_KEYID,
5463 WMI_10_4_VDEV_PARAM_NSS,
5464 WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
5465 WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
5466 WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
5467 WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
5468 WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
5469 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
5470 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
5471 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
5472 WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
5473 WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
5474 WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
5475 WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
5476 WMI_10_4_VDEV_PARAM_TXBF,
5477 WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
5478 WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
5479 WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
5480 WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
5481 WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
5482 WMI_10_4_VDEV_PARAM_MFPTEST_SET,
5483 WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
5484 WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
5485 WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
5486 WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
5487 WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
5488 WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
5489 WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
5490 WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
5491 WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
5492 WMI_10_4_VDEV_PARAM_PROXY_STA,
5493 WMI_10_4_VDEV_PARAM_MERU_VC,
5494 WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
5495 WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
5496 WMI_10_4_VDEV_PARAM_SENSOR_AP,
5497 WMI_10_4_VDEV_PARAM_BEACON_RATE,
5498 WMI_10_4_VDEV_PARAM_DTIM_ENABLE_CTS,
5499 WMI_10_4_VDEV_PARAM_STA_KICKOUT,
5500 WMI_10_4_VDEV_PARAM_CAPABILITIES,
5501 WMI_10_4_VDEV_PARAM_TSF_INCREMENT,
5502 WMI_10_4_VDEV_PARAM_RX_FILTER,
5503 WMI_10_4_VDEV_PARAM_MGMT_TX_POWER,
5504 WMI_10_4_VDEV_PARAM_ATF_SSID_SCHED_POLICY,
5505 WMI_10_4_VDEV_PARAM_DISABLE_DYN_BW_RTS,
5506 WMI_10_4_VDEV_PARAM_TSF_DECREMENT,
5507 WMI_10_4_VDEV_PARAM_SELFGEN_FIXED_RATE,
5508 WMI_10_4_VDEV_PARAM_AMPDU_SUBFRAME_SIZE_PER_AC,
5509 WMI_10_4_VDEV_PARAM_NSS_VHT160,
5510 WMI_10_4_VDEV_PARAM_NSS_VHT80_80,
5511 WMI_10_4_VDEV_PARAM_AMSDU_SUBFRAME_SIZE_PER_AC,
5512 WMI_10_4_VDEV_PARAM_DISABLE_CABQ,
5513 WMI_10_4_VDEV_PARAM_SIFS_TRIGGER_RATE,
5514 WMI_10_4_VDEV_PARAM_TX_POWER,
5515 WMI_10_4_VDEV_PARAM_ENABLE_DISABLE_RTT_RESPONDER_ROLE,
5516 WMI_10_4_VDEV_PARAM_DISABLE_4_ADDR_SRC_LRN,
5517};
5518
5519#define WMI_VDEV_DISABLE_4_ADDR_SRC_LRN 1
5520
5521#define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0)
5522#define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1)
5523#define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2)
5524#define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3)
5525
5526#define WMI_TXBF_STS_CAP_OFFSET_LSB 4
5527#define WMI_TXBF_STS_CAP_OFFSET_MASK 0x70
5528#define WMI_TXBF_CONF_IMPLICIT_BF BIT(7)
5529#define WMI_BF_SOUND_DIM_OFFSET_LSB 8
5530#define WMI_BF_SOUND_DIM_OFFSET_MASK 0xf00
5531
5532
5533#define WMI_VDEV_SLOT_TIME_LONG 0x1
5534
5535#define WMI_VDEV_SLOT_TIME_SHORT 0x2
5536
5537#define WMI_VDEV_PREAMBLE_LONG 0x1
5538
5539#define WMI_VDEV_PREAMBLE_SHORT 0x2
5540
5541enum wmi_start_event_param {
5542 WMI_VDEV_RESP_START_EVENT = 0,
5543 WMI_VDEV_RESP_RESTART_EVENT,
5544};
5545
5546struct wmi_vdev_start_response_event {
5547 __le32 vdev_id;
5548 __le32 req_id;
5549 __le32 resp_type;
5550 __le32 status;
5551} __packed;
5552
5553struct wmi_vdev_standby_req_event {
5554
5555 __le32 vdev_id;
5556} __packed;
5557
5558struct wmi_vdev_resume_req_event {
5559
5560 __le32 vdev_id;
5561} __packed;
5562
5563struct wmi_vdev_stopped_event {
5564
5565 __le32 vdev_id;
5566} __packed;
5567
5568
5569
5570
5571
5572struct wmi_vdev_simple_event {
5573
5574 __le32 vdev_id;
5575} __packed;
5576
5577
5578
5579#define WMI_INIFIED_VDEV_START_RESPONSE_STATUS_SUCCESS 0x0
5580
5581
5582#define WMI_INIFIED_VDEV_START_RESPONSE_INVALID_VDEVID 0x1
5583
5584
5585#define WMI_INIFIED_VDEV_START_RESPONSE_NOT_SUPPORTED 0x2
5586
5587
5588struct wmi_vdev_spectral_conf_cmd {
5589 __le32 vdev_id;
5590
5591
5592 __le32 scan_count;
5593 __le32 scan_period;
5594 __le32 scan_priority;
5595
5596
5597 __le32 scan_fft_size;
5598 __le32 scan_gc_ena;
5599 __le32 scan_restart_ena;
5600 __le32 scan_noise_floor_ref;
5601 __le32 scan_init_delay;
5602 __le32 scan_nb_tone_thr;
5603 __le32 scan_str_bin_thr;
5604 __le32 scan_wb_rpt_mode;
5605 __le32 scan_rssi_rpt_mode;
5606 __le32 scan_rssi_thr;
5607 __le32 scan_pwr_format;
5608
5609
5610
5611
5612
5613
5614
5615
5616
5617
5618
5619
5620 __le32 scan_rpt_mode;
5621 __le32 scan_bin_scale;
5622 __le32 scan_dbm_adj;
5623 __le32 scan_chn_mask;
5624} __packed;
5625
5626struct wmi_vdev_spectral_conf_arg {
5627 u32 vdev_id;
5628 u32 scan_count;
5629 u32 scan_period;
5630 u32 scan_priority;
5631 u32 scan_fft_size;
5632 u32 scan_gc_ena;
5633 u32 scan_restart_ena;
5634 u32 scan_noise_floor_ref;
5635 u32 scan_init_delay;
5636 u32 scan_nb_tone_thr;
5637 u32 scan_str_bin_thr;
5638 u32 scan_wb_rpt_mode;
5639 u32 scan_rssi_rpt_mode;
5640 u32 scan_rssi_thr;
5641 u32 scan_pwr_format;
5642 u32 scan_rpt_mode;
5643 u32 scan_bin_scale;
5644 u32 scan_dbm_adj;
5645 u32 scan_chn_mask;
5646};
5647
5648#define WMI_SPECTRAL_ENABLE_DEFAULT 0
5649#define WMI_SPECTRAL_COUNT_DEFAULT 0
5650#define WMI_SPECTRAL_PERIOD_DEFAULT 35
5651#define WMI_SPECTRAL_PRIORITY_DEFAULT 1
5652#define WMI_SPECTRAL_FFT_SIZE_DEFAULT 7
5653#define WMI_SPECTRAL_GC_ENA_DEFAULT 1
5654#define WMI_SPECTRAL_RESTART_ENA_DEFAULT 0
5655#define WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96
5656#define WMI_SPECTRAL_INIT_DELAY_DEFAULT 80
5657#define WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12
5658#define WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8
5659#define WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0
5660#define WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0
5661#define WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0
5662#define WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0
5663#define WMI_SPECTRAL_RPT_MODE_DEFAULT 2
5664#define WMI_SPECTRAL_BIN_SCALE_DEFAULT 1
5665#define WMI_SPECTRAL_DBM_ADJ_DEFAULT 1
5666#define WMI_SPECTRAL_CHN_MASK_DEFAULT 1
5667
5668struct wmi_vdev_spectral_enable_cmd {
5669 __le32 vdev_id;
5670 __le32 trigger_cmd;
5671 __le32 enable_cmd;
5672} __packed;
5673
5674#define WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1
5675#define WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2
5676#define WMI_SPECTRAL_ENABLE_CMD_ENABLE 1
5677#define WMI_SPECTRAL_ENABLE_CMD_DISABLE 2
5678
5679
5680struct wmi_bcn_tx_hdr {
5681 __le32 vdev_id;
5682 __le32 tx_rate;
5683 __le32 tx_power;
5684 __le32 bcn_len;
5685} __packed;
5686
5687struct wmi_bcn_tx_cmd {
5688 struct wmi_bcn_tx_hdr hdr;
5689 u8 *bcn[0];
5690} __packed;
5691
5692struct wmi_bcn_tx_arg {
5693 u32 vdev_id;
5694 u32 tx_rate;
5695 u32 tx_power;
5696 u32 bcn_len;
5697 const void *bcn;
5698};
5699
5700enum wmi_bcn_tx_ref_flags {
5701 WMI_BCN_TX_REF_FLAG_DTIM_ZERO = 0x1,
5702 WMI_BCN_TX_REF_FLAG_DELIVER_CAB = 0x2,
5703};
5704
5705
5706
5707
5708#define WMI_BCN_TX_REF_DEF_ANTENNA 0
5709
5710struct wmi_bcn_tx_ref_cmd {
5711 __le32 vdev_id;
5712 __le32 data_len;
5713
5714 __le32 data_ptr;
5715
5716 __le32 msdu_id;
5717
5718 __le32 frame_control;
5719
5720 __le32 flags;
5721
5722 __le32 antenna_mask;
5723} __packed;
5724
5725
5726#define WMI_BCN_FILTER_ALL 0
5727#define WMI_BCN_FILTER_NONE 1
5728#define WMI_BCN_FILTER_RSSI 2
5729#define WMI_BCN_FILTER_BSSID 3
5730#define WMI_BCN_FILTER_SSID 4
5731
5732struct wmi_bcn_filter_rx_cmd {
5733
5734 __le32 bcn_filter_id;
5735
5736 __le32 bcn_filter;
5737
5738 __le32 bcn_filter_len;
5739
5740 u8 *bcn_filter_buf;
5741} __packed;
5742
5743
5744struct wmi_bcn_prb_info {
5745
5746 __le32 caps;
5747
5748 __le32 erp;
5749
5750
5751
5752
5753
5754
5755
5756
5757
5758} __packed;
5759
5760struct wmi_bcn_tmpl_cmd {
5761
5762 __le32 vdev_id;
5763
5764 __le32 tim_ie_offset;
5765
5766 struct wmi_bcn_prb_info bcn_prb_info;
5767
5768 __le32 buf_len;
5769
5770 u8 data[1];
5771} __packed;
5772
5773struct wmi_prb_tmpl_cmd {
5774
5775 __le32 vdev_id;
5776
5777 struct wmi_bcn_prb_info bcn_prb_info;
5778
5779 __le32 buf_len;
5780
5781 u8 data[1];
5782} __packed;
5783
5784enum wmi_sta_ps_mode {
5785
5786 WMI_STA_PS_MODE_DISABLED = 0,
5787
5788 WMI_STA_PS_MODE_ENABLED = 1,
5789};
5790
5791struct wmi_sta_powersave_mode_cmd {
5792
5793 __le32 vdev_id;
5794
5795
5796
5797
5798
5799 __le32 sta_ps_mode;
5800} __packed;
5801
5802enum wmi_csa_offload_en {
5803 WMI_CSA_OFFLOAD_DISABLE = 0,
5804 WMI_CSA_OFFLOAD_ENABLE = 1,
5805};
5806
5807struct wmi_csa_offload_enable_cmd {
5808 __le32 vdev_id;
5809 __le32 csa_offload_enable;
5810} __packed;
5811
5812struct wmi_csa_offload_chanswitch_cmd {
5813 __le32 vdev_id;
5814 struct wmi_channel chan;
5815} __packed;
5816
5817
5818
5819
5820
5821
5822
5823enum wmi_sta_ps_param_rx_wake_policy {
5824
5825
5826
5827
5828
5829
5830 WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0,
5831
5832
5833
5834
5835
5836
5837
5838
5839 WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1,
5840};
5841
5842
5843
5844
5845
5846
5847
5848
5849
5850enum wmi_sta_ps_param_tx_wake_threshold {
5851 WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0,
5852 WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1,
5853
5854
5855
5856
5857
5858};
5859
5860
5861
5862
5863
5864
5865
5866
5867
5868
5869enum wmi_sta_ps_param_pspoll_count {
5870 WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0,
5871
5872
5873
5874
5875
5876
5877
5878
5879
5880
5881 WMI_STA_PS_PSPOLL_COUNT_UAPSD = 3,
5882};
5883
5884
5885
5886
5887
5888
5889
5890#define WMI_UAPSD_AC_TYPE_DELI 0
5891#define WMI_UAPSD_AC_TYPE_TRIG 1
5892
5893#define WMI_UAPSD_AC_BIT_MASK(ac, type) \
5894 (type == WMI_UAPSD_AC_TYPE_DELI ? 1 << (ac << 1) : 1 << ((ac << 1) + 1))
5895
5896enum wmi_sta_ps_param_uapsd {
5897 WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
5898 WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
5899 WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
5900 WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
5901 WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
5902 WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
5903 WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
5904 WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
5905};
5906
5907#define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX
5908
5909struct wmi_sta_uapsd_auto_trig_param {
5910 __le32 wmm_ac;
5911 __le32 user_priority;
5912 __le32 service_interval;
5913 __le32 suspend_interval;
5914 __le32 delay_interval;
5915};
5916
5917struct wmi_sta_uapsd_auto_trig_cmd_fixed_param {
5918 __le32 vdev_id;
5919 struct wmi_mac_addr peer_macaddr;
5920 __le32 num_ac;
5921};
5922
5923struct wmi_sta_uapsd_auto_trig_arg {
5924 u32 wmm_ac;
5925 u32 user_priority;
5926 u32 service_interval;
5927 u32 suspend_interval;
5928 u32 delay_interval;
5929};
5930
5931enum wmi_sta_powersave_param {
5932
5933
5934
5935
5936
5937 WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0,
5938
5939
5940
5941
5942
5943
5944 WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1,
5945
5946
5947
5948
5949
5950
5951
5952 WMI_STA_PS_PARAM_PSPOLL_COUNT = 2,
5953
5954
5955
5956
5957
5958
5959
5960
5961 WMI_STA_PS_PARAM_INACTIVITY_TIME = 3,
5962
5963
5964
5965
5966
5967
5968 WMI_STA_PS_PARAM_UAPSD = 4,
5969};
5970
5971struct wmi_sta_powersave_param_cmd {
5972 __le32 vdev_id;
5973 __le32 param_id;
5974 __le32 param_value;
5975} __packed;
5976
5977
5978#define WMI_STA_MIMO_PS_MODE_DISABLE
5979
5980#define WMI_STA_MIMO_PS_MODE_STATIC
5981
5982#define WMI_STA_MIMO_PS_MODE_DYNAMIC
5983
5984struct wmi_sta_mimo_ps_mode_cmd {
5985
5986 __le32 vdev_id;
5987
5988 __le32 mimo_pwrsave_mode;
5989} __packed;
5990
5991
5992enum wmi_ap_ps_param_uapsd {
5993 WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
5994 WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
5995 WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
5996 WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
5997 WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
5998 WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
5999 WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
6000 WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
6001};
6002
6003
6004enum wmi_ap_ps_peer_param_max_sp {
6005 WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0,
6006 WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1,
6007 WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2,
6008 WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3,
6009 MAX_WMI_AP_PS_PEER_PARAM_MAX_SP,
6010};
6011
6012
6013
6014
6015
6016enum wmi_ap_ps_peer_param {
6017
6018
6019
6020
6021
6022
6023
6024
6025
6026
6027
6028 WMI_AP_PS_PEER_PARAM_UAPSD = 0,
6029
6030
6031
6032
6033
6034
6035
6036
6037 WMI_AP_PS_PEER_PARAM_MAX_SP = 1,
6038
6039
6040 WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2,
6041};
6042
6043struct wmi_ap_ps_peer_cmd {
6044
6045 __le32 vdev_id;
6046
6047
6048 struct wmi_mac_addr peer_macaddr;
6049
6050
6051 __le32 param_id;
6052
6053
6054 __le32 param_value;
6055} __packed;
6056
6057
6058#define WMI_TIM_BITMAP_ARRAY_SIZE 4
6059
6060struct wmi_tim_info {
6061 __le32 tim_len;
6062 __le32 tim_mcast;
6063 __le32 tim_bitmap[WMI_TIM_BITMAP_ARRAY_SIZE];
6064 __le32 tim_changed;
6065 __le32 tim_num_ps_pending;
6066} __packed;
6067
6068struct wmi_tim_info_arg {
6069 __le32 tim_len;
6070 __le32 tim_mcast;
6071 const __le32 *tim_bitmap;
6072 __le32 tim_changed;
6073 __le32 tim_num_ps_pending;
6074} __packed;
6075
6076
6077#define WMI_P2P_MAX_NOA_DESCRIPTORS 4
6078#define WMI_P2P_OPPPS_ENABLE_BIT BIT(0)
6079#define WMI_P2P_OPPPS_CTWINDOW_OFFSET 1
6080#define WMI_P2P_NOA_CHANGED_BIT BIT(0)
6081
6082struct wmi_p2p_noa_info {
6083
6084
6085
6086 u8 changed;
6087
6088 u8 index;
6089
6090
6091
6092 u8 ctwindow_oppps;
6093
6094 u8 num_descriptors;
6095
6096 struct wmi_p2p_noa_descriptor descriptors[WMI_P2P_MAX_NOA_DESCRIPTORS];
6097} __packed;
6098
6099struct wmi_bcn_info {
6100 struct wmi_tim_info tim_info;
6101 struct wmi_p2p_noa_info p2p_noa_info;
6102} __packed;
6103
6104struct wmi_host_swba_event {
6105 __le32 vdev_map;
6106 struct wmi_bcn_info bcn_info[0];
6107} __packed;
6108
6109struct wmi_10_2_4_bcn_info {
6110 struct wmi_tim_info tim_info;
6111
6112} __packed;
6113
6114struct wmi_10_2_4_host_swba_event {
6115 __le32 vdev_map;
6116 struct wmi_10_2_4_bcn_info bcn_info[0];
6117} __packed;
6118
6119
6120#define WMI_10_4_TIM_BITMAP_ARRAY_SIZE 17
6121
6122struct wmi_10_4_tim_info {
6123 __le32 tim_len;
6124 __le32 tim_mcast;
6125 __le32 tim_bitmap[WMI_10_4_TIM_BITMAP_ARRAY_SIZE];
6126 __le32 tim_changed;
6127 __le32 tim_num_ps_pending;
6128} __packed;
6129
6130#define WMI_10_4_P2P_MAX_NOA_DESCRIPTORS 1
6131
6132struct wmi_10_4_p2p_noa_info {
6133
6134
6135
6136 u8 changed;
6137
6138 u8 index;
6139
6140
6141
6142 u8 ctwindow_oppps;
6143
6144 u8 num_descriptors;
6145
6146 struct wmi_p2p_noa_descriptor
6147 noa_descriptors[WMI_10_4_P2P_MAX_NOA_DESCRIPTORS];
6148} __packed;
6149
6150struct wmi_10_4_bcn_info {
6151 struct wmi_10_4_tim_info tim_info;
6152 struct wmi_10_4_p2p_noa_info p2p_noa_info;
6153} __packed;
6154
6155struct wmi_10_4_host_swba_event {
6156 __le32 vdev_map;
6157 struct wmi_10_4_bcn_info bcn_info[0];
6158} __packed;
6159
6160#define WMI_MAX_AP_VDEV 16
6161
6162struct wmi_tbtt_offset_event {
6163 __le32 vdev_map;
6164 __le32 tbttoffset_list[WMI_MAX_AP_VDEV];
6165} __packed;
6166
6167struct wmi_peer_create_cmd {
6168 __le32 vdev_id;
6169 struct wmi_mac_addr peer_macaddr;
6170 __le32 peer_type;
6171} __packed;
6172
6173enum wmi_peer_type {
6174 WMI_PEER_TYPE_DEFAULT = 0,
6175 WMI_PEER_TYPE_BSS = 1,
6176 WMI_PEER_TYPE_TDLS = 2,
6177};
6178
6179struct wmi_peer_delete_cmd {
6180 __le32 vdev_id;
6181 struct wmi_mac_addr peer_macaddr;
6182} __packed;
6183
6184struct wmi_peer_flush_tids_cmd {
6185 __le32 vdev_id;
6186 struct wmi_mac_addr peer_macaddr;
6187 __le32 peer_tid_bitmap;
6188} __packed;
6189
6190struct wmi_fixed_rate {
6191
6192
6193
6194
6195
6196
6197 __le32 rate_mode;
6198
6199
6200
6201
6202 __le32 rate_series;
6203
6204
6205
6206
6207
6208 __le32 rate_retries;
6209} __packed;
6210
6211struct wmi_peer_fixed_rate_cmd {
6212
6213 __le32 vdev_id;
6214
6215 struct wmi_mac_addr peer_macaddr;
6216
6217 struct wmi_fixed_rate peer_fixed_rate;
6218} __packed;
6219
6220#define WMI_MGMT_TID 17
6221
6222struct wmi_addba_clear_resp_cmd {
6223
6224 __le32 vdev_id;
6225
6226 struct wmi_mac_addr peer_macaddr;
6227} __packed;
6228
6229struct wmi_addba_send_cmd {
6230
6231 __le32 vdev_id;
6232
6233 struct wmi_mac_addr peer_macaddr;
6234
6235 __le32 tid;
6236
6237 __le32 buffersize;
6238} __packed;
6239
6240struct wmi_delba_send_cmd {
6241
6242 __le32 vdev_id;
6243
6244 struct wmi_mac_addr peer_macaddr;
6245
6246 __le32 tid;
6247
6248 __le32 initiator;
6249
6250 __le32 reasoncode;
6251} __packed;
6252
6253struct wmi_addba_setresponse_cmd {
6254
6255 __le32 vdev_id;
6256
6257 struct wmi_mac_addr peer_macaddr;
6258
6259 __le32 tid;
6260
6261 __le32 statuscode;
6262} __packed;
6263
6264struct wmi_send_singleamsdu_cmd {
6265
6266 __le32 vdev_id;
6267
6268 struct wmi_mac_addr peer_macaddr;
6269
6270 __le32 tid;
6271} __packed;
6272
6273enum wmi_peer_smps_state {
6274 WMI_PEER_SMPS_PS_NONE = 0x0,
6275 WMI_PEER_SMPS_STATIC = 0x1,
6276 WMI_PEER_SMPS_DYNAMIC = 0x2
6277};
6278
6279enum wmi_peer_chwidth {
6280 WMI_PEER_CHWIDTH_20MHZ = 0,
6281 WMI_PEER_CHWIDTH_40MHZ = 1,
6282 WMI_PEER_CHWIDTH_80MHZ = 2,
6283 WMI_PEER_CHWIDTH_160MHZ = 3,
6284};
6285
6286enum wmi_peer_param {
6287 WMI_PEER_SMPS_STATE = 0x1,
6288 WMI_PEER_AMPDU = 0x2,
6289 WMI_PEER_AUTHORIZE = 0x3,
6290 WMI_PEER_CHAN_WIDTH = 0x4,
6291 WMI_PEER_NSS = 0x5,
6292 WMI_PEER_USE_4ADDR = 0x6,
6293 WMI_PEER_USE_FIXED_PWR = 0x8,
6294 WMI_PEER_PARAM_FIXED_RATE = 0x9,
6295 WMI_PEER_DEBUG = 0xa,
6296 WMI_PEER_PHYMODE = 0xd,
6297 WMI_PEER_DUMMY_VAR = 0xff,
6298};
6299
6300struct wmi_peer_set_param_cmd {
6301 __le32 vdev_id;
6302 struct wmi_mac_addr peer_macaddr;
6303 __le32 param_id;
6304 __le32 param_value;
6305} __packed;
6306
6307#define MAX_SUPPORTED_RATES 128
6308
6309struct wmi_rate_set {
6310
6311 __le32 num_rates;
6312
6313
6314
6315
6316
6317 __le32 rates[(MAX_SUPPORTED_RATES / 4) + 1];
6318} __packed;
6319
6320struct wmi_rate_set_arg {
6321 unsigned int num_rates;
6322 u8 rates[MAX_SUPPORTED_RATES];
6323};
6324
6325
6326
6327
6328
6329
6330struct wmi_vht_rate_set {
6331 __le32 rx_max_rate;
6332 __le32 rx_mcs_set;
6333 __le32 tx_max_rate;
6334 __le32 tx_mcs_set;
6335} __packed;
6336
6337struct wmi_vht_rate_set_arg {
6338 u32 rx_max_rate;
6339 u32 rx_mcs_set;
6340 u32 tx_max_rate;
6341 u32 tx_mcs_set;
6342};
6343
6344struct wmi_peer_set_rates_cmd {
6345
6346 struct wmi_mac_addr peer_macaddr;
6347
6348 struct wmi_rate_set peer_legacy_rates;
6349
6350 struct wmi_rate_set peer_ht_rates;
6351} __packed;
6352
6353struct wmi_peer_set_q_empty_callback_cmd {
6354
6355 __le32 vdev_id;
6356
6357 struct wmi_mac_addr peer_macaddr;
6358 __le32 callback_enable;
6359} __packed;
6360
6361struct wmi_peer_flags_map {
6362 u32 auth;
6363 u32 qos;
6364 u32 need_ptk_4_way;
6365 u32 need_gtk_2_way;
6366 u32 apsd;
6367 u32 ht;
6368 u32 bw40;
6369 u32 stbc;
6370 u32 ldbc;
6371 u32 dyn_mimops;
6372 u32 static_mimops;
6373 u32 spatial_mux;
6374 u32 vht;
6375 u32 bw80;
6376 u32 vht_2g;
6377 u32 pmf;
6378 u32 bw160;
6379};
6380
6381enum wmi_peer_flags {
6382 WMI_PEER_AUTH = 0x00000001,
6383 WMI_PEER_QOS = 0x00000002,
6384 WMI_PEER_NEED_PTK_4_WAY = 0x00000004,
6385 WMI_PEER_NEED_GTK_2_WAY = 0x00000010,
6386 WMI_PEER_APSD = 0x00000800,
6387 WMI_PEER_HT = 0x00001000,
6388 WMI_PEER_40MHZ = 0x00002000,
6389 WMI_PEER_STBC = 0x00008000,
6390 WMI_PEER_LDPC = 0x00010000,
6391 WMI_PEER_DYN_MIMOPS = 0x00020000,
6392 WMI_PEER_STATIC_MIMOPS = 0x00040000,
6393 WMI_PEER_SPATIAL_MUX = 0x00200000,
6394 WMI_PEER_VHT = 0x02000000,
6395 WMI_PEER_80MHZ = 0x04000000,
6396 WMI_PEER_VHT_2G = 0x08000000,
6397 WMI_PEER_PMF = 0x10000000,
6398 WMI_PEER_160MHZ = 0x20000000
6399};
6400
6401enum wmi_10x_peer_flags {
6402 WMI_10X_PEER_AUTH = 0x00000001,
6403 WMI_10X_PEER_QOS = 0x00000002,
6404 WMI_10X_PEER_NEED_PTK_4_WAY = 0x00000004,
6405 WMI_10X_PEER_NEED_GTK_2_WAY = 0x00000010,
6406 WMI_10X_PEER_APSD = 0x00000800,
6407 WMI_10X_PEER_HT = 0x00001000,
6408 WMI_10X_PEER_40MHZ = 0x00002000,
6409 WMI_10X_PEER_STBC = 0x00008000,
6410 WMI_10X_PEER_LDPC = 0x00010000,
6411 WMI_10X_PEER_DYN_MIMOPS = 0x00020000,
6412 WMI_10X_PEER_STATIC_MIMOPS = 0x00040000,
6413 WMI_10X_PEER_SPATIAL_MUX = 0x00200000,
6414 WMI_10X_PEER_VHT = 0x02000000,
6415 WMI_10X_PEER_80MHZ = 0x04000000,
6416 WMI_10X_PEER_160MHZ = 0x20000000
6417};
6418
6419enum wmi_10_2_peer_flags {
6420 WMI_10_2_PEER_AUTH = 0x00000001,
6421 WMI_10_2_PEER_QOS = 0x00000002,
6422 WMI_10_2_PEER_NEED_PTK_4_WAY = 0x00000004,
6423 WMI_10_2_PEER_NEED_GTK_2_WAY = 0x00000010,
6424 WMI_10_2_PEER_APSD = 0x00000800,
6425 WMI_10_2_PEER_HT = 0x00001000,
6426 WMI_10_2_PEER_40MHZ = 0x00002000,
6427 WMI_10_2_PEER_STBC = 0x00008000,
6428 WMI_10_2_PEER_LDPC = 0x00010000,
6429 WMI_10_2_PEER_DYN_MIMOPS = 0x00020000,
6430 WMI_10_2_PEER_STATIC_MIMOPS = 0x00040000,
6431 WMI_10_2_PEER_SPATIAL_MUX = 0x00200000,
6432 WMI_10_2_PEER_VHT = 0x02000000,
6433 WMI_10_2_PEER_80MHZ = 0x04000000,
6434 WMI_10_2_PEER_VHT_2G = 0x08000000,
6435 WMI_10_2_PEER_PMF = 0x10000000,
6436 WMI_10_2_PEER_160MHZ = 0x20000000
6437};
6438
6439
6440
6441
6442
6443
6444
6445
6446#define WMI_RC_DS_FLAG 0x01
6447#define WMI_RC_CW40_FLAG 0x02
6448#define WMI_RC_SGI_FLAG 0x04
6449#define WMI_RC_HT_FLAG 0x08
6450#define WMI_RC_RTSCTS_FLAG 0x10
6451#define WMI_RC_TX_STBC_FLAG 0x20
6452#define WMI_RC_RX_STBC_FLAG 0xC0
6453#define WMI_RC_RX_STBC_FLAG_S 6
6454#define WMI_RC_WEP_TKIP_FLAG 0x100
6455#define WMI_RC_TS_FLAG 0x200
6456#define WMI_RC_UAPSD_FLAG 0x400
6457
6458
6459#define ATH10K_MAX_HW_LISTEN_INTERVAL 5
6460
6461struct wmi_common_peer_assoc_complete_cmd {
6462 struct wmi_mac_addr peer_macaddr;
6463 __le32 vdev_id;
6464 __le32 peer_new_assoc;
6465 __le32 peer_associd;
6466 __le32 peer_flags;
6467 __le32 peer_caps;
6468 __le32 peer_listen_intval;
6469 __le32 peer_ht_caps;
6470 __le32 peer_max_mpdu;
6471 __le32 peer_mpdu_density;
6472 __le32 peer_rate_caps;
6473 struct wmi_rate_set peer_legacy_rates;
6474 struct wmi_rate_set peer_ht_rates;
6475 __le32 peer_nss;
6476 __le32 peer_vht_caps;
6477 __le32 peer_phymode;
6478 struct wmi_vht_rate_set peer_vht_rates;
6479};
6480
6481struct wmi_main_peer_assoc_complete_cmd {
6482 struct wmi_common_peer_assoc_complete_cmd cmd;
6483
6484
6485
6486
6487 __le32 peer_ht_info[2];
6488} __packed;
6489
6490struct wmi_10_1_peer_assoc_complete_cmd {
6491 struct wmi_common_peer_assoc_complete_cmd cmd;
6492} __packed;
6493
6494#define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_LSB 0
6495#define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_MASK 0x0f
6496#define WMI_PEER_ASSOC_INFO0_MAX_NSS_LSB 4
6497#define WMI_PEER_ASSOC_INFO0_MAX_NSS_MASK 0xf0
6498
6499struct wmi_10_2_peer_assoc_complete_cmd {
6500 struct wmi_common_peer_assoc_complete_cmd cmd;
6501 __le32 info0;
6502} __packed;
6503
6504#define PEER_BW_RXNSS_OVERRIDE_OFFSET 31
6505
6506struct wmi_10_4_peer_assoc_complete_cmd {
6507 struct wmi_10_2_peer_assoc_complete_cmd cmd;
6508 __le32 peer_bw_rxnss_override;
6509} __packed;
6510
6511struct wmi_peer_assoc_complete_arg {
6512 u8 addr[ETH_ALEN];
6513 u32 vdev_id;
6514 bool peer_reassoc;
6515 u16 peer_aid;
6516 u32 peer_flags;
6517 u16 peer_caps;
6518 u32 peer_listen_intval;
6519 u32 peer_ht_caps;
6520 u32 peer_max_mpdu;
6521 u32 peer_mpdu_density;
6522 u32 peer_rate_caps;
6523 struct wmi_rate_set_arg peer_legacy_rates;
6524 struct wmi_rate_set_arg peer_ht_rates;
6525 u32 peer_num_spatial_streams;
6526 u32 peer_vht_caps;
6527 enum wmi_phy_mode peer_phymode;
6528 struct wmi_vht_rate_set_arg peer_vht_rates;
6529 u32 peer_bw_rxnss_override;
6530};
6531
6532struct wmi_peer_add_wds_entry_cmd {
6533
6534 struct wmi_mac_addr peer_macaddr;
6535
6536 struct wmi_mac_addr wds_macaddr;
6537} __packed;
6538
6539struct wmi_peer_remove_wds_entry_cmd {
6540
6541 struct wmi_mac_addr wds_macaddr;
6542} __packed;
6543
6544struct wmi_peer_q_empty_callback_event {
6545
6546 struct wmi_mac_addr peer_macaddr;
6547} __packed;
6548
6549
6550
6551
6552struct wmi_chan_info_event {
6553 __le32 err_code;
6554 __le32 freq;
6555 __le32 cmd_flags;
6556 __le32 noise_floor;
6557 __le32 rx_clear_count;
6558 __le32 cycle_count;
6559} __packed;
6560
6561struct wmi_10_4_chan_info_event {
6562 __le32 err_code;
6563 __le32 freq;
6564 __le32 cmd_flags;
6565 __le32 noise_floor;
6566 __le32 rx_clear_count;
6567 __le32 cycle_count;
6568 __le32 chan_tx_pwr_range;
6569 __le32 chan_tx_pwr_tp;
6570 __le32 rx_frame_count;
6571} __packed;
6572
6573struct wmi_peer_sta_kickout_event {
6574 struct wmi_mac_addr peer_macaddr;
6575} __packed;
6576
6577#define WMI_CHAN_INFO_FLAG_COMPLETE BIT(0)
6578#define WMI_CHAN_INFO_FLAG_PRE_COMPLETE BIT(1)
6579
6580
6581#define BCN_FLT_MAX_SUPPORTED_IES 256
6582#define BCN_FLT_MAX_ELEMS_IE_LIST (BCN_FLT_MAX_SUPPORTED_IES / 32)
6583
6584struct bss_bcn_stats {
6585 __le32 vdev_id;
6586 __le32 bss_bcnsdropped;
6587 __le32 bss_bcnsdelivered;
6588} __packed;
6589
6590struct bcn_filter_stats {
6591 __le32 bcns_dropped;
6592 __le32 bcns_delivered;
6593 __le32 activefilters;
6594 struct bss_bcn_stats bss_stats;
6595} __packed;
6596
6597struct wmi_add_bcn_filter_cmd {
6598 u32 vdev_id;
6599 u32 ie_map[BCN_FLT_MAX_ELEMS_IE_LIST];
6600} __packed;
6601
6602enum wmi_sta_keepalive_method {
6603 WMI_STA_KEEPALIVE_METHOD_NULL_FRAME = 1,
6604 WMI_STA_KEEPALIVE_METHOD_UNSOLICITATED_ARP_RESPONSE = 2,
6605};
6606
6607#define WMI_STA_KEEPALIVE_INTERVAL_DISABLE 0
6608
6609
6610#define WMI_STA_KEEPALIVE_INTERVAL_MAX_SECONDS 0xffff
6611
6612
6613struct wmi_sta_keepalive_arp_resp {
6614 __be32 src_ip4_addr;
6615 __be32 dest_ip4_addr;
6616 struct wmi_mac_addr dest_mac_addr;
6617} __packed;
6618
6619struct wmi_sta_keepalive_cmd {
6620 __le32 vdev_id;
6621 __le32 enabled;
6622 __le32 method;
6623 __le32 interval;
6624 struct wmi_sta_keepalive_arp_resp arp_resp;
6625} __packed;
6626
6627struct wmi_sta_keepalive_arg {
6628 u32 vdev_id;
6629 u32 enabled;
6630 u32 method;
6631 u32 interval;
6632 __be32 src_ip4_addr;
6633 __be32 dest_ip4_addr;
6634 const u8 dest_mac_addr[ETH_ALEN];
6635};
6636
6637enum wmi_force_fw_hang_type {
6638 WMI_FORCE_FW_HANG_ASSERT = 1,
6639 WMI_FORCE_FW_HANG_NO_DETECT,
6640 WMI_FORCE_FW_HANG_CTRL_EP_FULL,
6641 WMI_FORCE_FW_HANG_EMPTY_POINT,
6642 WMI_FORCE_FW_HANG_STACK_OVERFLOW,
6643 WMI_FORCE_FW_HANG_INFINITE_LOOP,
6644};
6645
6646#define WMI_FORCE_FW_HANG_RANDOM_TIME 0xFFFFFFFF
6647
6648struct wmi_force_fw_hang_cmd {
6649 __le32 type;
6650 __le32 delay_ms;
6651} __packed;
6652
6653enum wmi_pdev_reset_mode_type {
6654 WMI_RST_MODE_TX_FLUSH = 1,
6655 WMI_RST_MODE_WARM_RESET,
6656 WMI_RST_MODE_COLD_RESET,
6657 WMI_RST_MODE_WARM_RESET_RESTORE_CAL,
6658 WMI_RST_MODE_COLD_RESET_RESTORE_CAL,
6659 WMI_RST_MODE_MAX,
6660};
6661
6662enum ath10k_dbglog_level {
6663 ATH10K_DBGLOG_LEVEL_VERBOSE = 0,
6664 ATH10K_DBGLOG_LEVEL_INFO = 1,
6665 ATH10K_DBGLOG_LEVEL_WARN = 2,
6666 ATH10K_DBGLOG_LEVEL_ERR = 3,
6667};
6668
6669
6670#define ATH10K_DBGLOG_CFG_VAP_LOG_LSB 0
6671#define ATH10K_DBGLOG_CFG_VAP_LOG_MASK 0x0000ffff
6672
6673
6674#define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_LSB 16
6675#define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_MASK 0x00010000
6676
6677
6678#define ATH10K_DBGLOG_CFG_RESOLUTION_LSB 17
6679#define ATH10K_DBGLOG_CFG_RESOLUTION_MASK 0x000E0000
6680
6681
6682#define ATH10K_DBGLOG_CFG_REPORT_SIZE_LSB 20
6683#define ATH10K_DBGLOG_CFG_REPORT_SIZE_MASK 0x0ff00000
6684
6685
6686
6687
6688
6689#define ATH10K_DBGLOG_CFG_LOG_LVL_LSB 28
6690#define ATH10K_DBGLOG_CFG_LOG_LVL_MASK 0x70000000
6691
6692
6693
6694
6695
6696struct wmi_dbglog_cfg_cmd {
6697
6698 __le32 module_enable;
6699
6700
6701 __le32 config_enable;
6702
6703
6704 __le32 module_valid;
6705
6706
6707 __le32 config_valid;
6708} __packed;
6709
6710struct wmi_10_4_dbglog_cfg_cmd {
6711
6712 __le64 module_enable;
6713
6714
6715 __le32 config_enable;
6716
6717
6718 __le64 module_valid;
6719
6720
6721 __le32 config_valid;
6722} __packed;
6723
6724enum wmi_roam_reason {
6725 WMI_ROAM_REASON_BETTER_AP = 1,
6726 WMI_ROAM_REASON_BEACON_MISS = 2,
6727 WMI_ROAM_REASON_LOW_RSSI = 3,
6728 WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4,
6729 WMI_ROAM_REASON_HO_FAILED = 5,
6730
6731
6732 WMI_ROAM_REASON_MAX,
6733};
6734
6735struct wmi_roam_ev {
6736 __le32 vdev_id;
6737 __le32 reason;
6738} __packed;
6739
6740#define ATH10K_FRAGMT_THRESHOLD_MIN 540
6741#define ATH10K_FRAGMT_THRESHOLD_MAX 2346
6742
6743#define WMI_MAX_EVENT 0x1000
6744
6745#define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr)
6746
6747
6748#define ATH10K_DEFAULT_ATIM 0
6749
6750#define WMI_MAX_MEM_REQS 16
6751
6752struct wmi_scan_ev_arg {
6753 __le32 event_type;
6754 __le32 reason;
6755 __le32 channel_freq;
6756 __le32 scan_req_id;
6757 __le32 scan_id;
6758 __le32 vdev_id;
6759};
6760
6761struct mgmt_tx_compl_params {
6762 u32 desc_id;
6763 u32 status;
6764 u32 ppdu_id;
6765 int ack_rssi;
6766};
6767
6768struct wmi_tlv_mgmt_tx_compl_ev_arg {
6769 __le32 desc_id;
6770 __le32 status;
6771 __le32 pdev_id;
6772 __le32 ppdu_id;
6773 __le32 ack_rssi;
6774};
6775
6776struct wmi_tlv_mgmt_tx_bundle_compl_ev_arg {
6777 __le32 num_reports;
6778 const __le32 *desc_ids;
6779 const __le32 *status;
6780 const __le32 *ppdu_ids;
6781 const __le32 *ack_rssi;
6782};
6783
6784struct wmi_peer_delete_resp_ev_arg {
6785 __le32 vdev_id;
6786 struct wmi_mac_addr peer_addr;
6787};
6788
6789#define WMI_MGMT_RX_NUM_RSSI 4
6790struct wmi_mgmt_rx_ev_arg {
6791 __le32 channel;
6792 __le32 snr;
6793 __le32 rate;
6794 __le32 phy_mode;
6795 __le32 buf_len;
6796 __le32 status;
6797 struct wmi_mgmt_rx_ext_info ext_info;
6798 __le32 rssi[WMI_MGMT_RX_NUM_RSSI];
6799};
6800
6801struct wmi_ch_info_ev_arg {
6802 __le32 err_code;
6803 __le32 freq;
6804 __le32 cmd_flags;
6805 __le32 noise_floor;
6806 __le32 rx_clear_count;
6807 __le32 cycle_count;
6808 __le32 chan_tx_pwr_range;
6809 __le32 chan_tx_pwr_tp;
6810 __le32 rx_frame_count;
6811 __le32 my_bss_rx_cycle_count;
6812 __le32 rx_11b_mode_data_duration;
6813 __le32 tx_frame_cnt;
6814 __le32 mac_clk_mhz;
6815};
6816
6817
6818enum wmi_vdev_start_status {
6819 WMI_VDEV_START_OK = 0,
6820 WMI_VDEV_START_CHAN_INVALID,
6821};
6822
6823struct wmi_vdev_start_ev_arg {
6824 __le32 vdev_id;
6825 __le32 req_id;
6826 __le32 resp_type;
6827 __le32 status;
6828};
6829
6830struct wmi_peer_kick_ev_arg {
6831 const u8 *mac_addr;
6832};
6833
6834struct wmi_swba_ev_arg {
6835 __le32 vdev_map;
6836 struct wmi_tim_info_arg tim_info[WMI_MAX_AP_VDEV];
6837 const struct wmi_p2p_noa_info *noa_info[WMI_MAX_AP_VDEV];
6838};
6839
6840struct wmi_phyerr_ev_arg {
6841 u32 tsf_timestamp;
6842 u16 freq1;
6843 u16 freq2;
6844 u8 rssi_combined;
6845 u8 chan_width_mhz;
6846 u8 phy_err_code;
6847 u16 nf_chains[4];
6848 u32 buf_len;
6849 const u8 *buf;
6850 u8 hdr_len;
6851};
6852
6853struct wmi_phyerr_hdr_arg {
6854 u32 num_phyerrs;
6855 u32 tsf_l32;
6856 u32 tsf_u32;
6857 u32 buf_len;
6858 const void *phyerrs;
6859};
6860
6861struct wmi_dfs_status_ev_arg {
6862 u32 status;
6863};
6864
6865struct wmi_svc_rdy_ev_arg {
6866 __le32 min_tx_power;
6867 __le32 max_tx_power;
6868 __le32 ht_cap;
6869 __le32 vht_cap;
6870 __le32 vht_supp_mcs;
6871 __le32 sw_ver0;
6872 __le32 sw_ver1;
6873 __le32 fw_build;
6874 __le32 phy_capab;
6875 __le32 num_rf_chains;
6876 __le32 eeprom_rd;
6877 __le32 num_mem_reqs;
6878 __le32 low_2ghz_chan;
6879 __le32 high_2ghz_chan;
6880 __le32 low_5ghz_chan;
6881 __le32 high_5ghz_chan;
6882 __le32 sys_cap_info;
6883 const __le32 *service_map;
6884 size_t service_map_len;
6885 const struct wlan_host_mem_req *mem_reqs[WMI_MAX_MEM_REQS];
6886};
6887
6888struct wmi_svc_avail_ev_arg {
6889 __le32 service_map_ext_len;
6890 const __le32 *service_map_ext;
6891};
6892
6893struct wmi_rdy_ev_arg {
6894 __le32 sw_version;
6895 __le32 abi_version;
6896 __le32 status;
6897 const u8 *mac_addr;
6898};
6899
6900struct wmi_roam_ev_arg {
6901 __le32 vdev_id;
6902 __le32 reason;
6903 __le32 rssi;
6904};
6905
6906struct wmi_echo_ev_arg {
6907 __le32 value;
6908};
6909
6910struct wmi_pdev_temperature_event {
6911
6912 __le32 temperature;
6913} __packed;
6914
6915struct wmi_pdev_bss_chan_info_event {
6916 __le32 freq;
6917 __le32 noise_floor;
6918 __le64 cycle_busy;
6919 __le64 cycle_total;
6920 __le64 cycle_tx;
6921 __le64 cycle_rx;
6922 __le64 cycle_rx_bss;
6923 __le32 reserved;
6924} __packed;
6925
6926
6927enum wmi_wow_wakeup_event {
6928 WOW_BMISS_EVENT = 0,
6929 WOW_BETTER_AP_EVENT,
6930 WOW_DEAUTH_RECVD_EVENT,
6931 WOW_MAGIC_PKT_RECVD_EVENT,
6932 WOW_GTK_ERR_EVENT,
6933 WOW_FOURWAY_HSHAKE_EVENT,
6934 WOW_EAPOL_RECVD_EVENT,
6935 WOW_NLO_DETECTED_EVENT,
6936 WOW_DISASSOC_RECVD_EVENT,
6937 WOW_PATTERN_MATCH_EVENT,
6938 WOW_CSA_IE_EVENT,
6939 WOW_PROBE_REQ_WPS_IE_EVENT,
6940 WOW_AUTH_REQ_EVENT,
6941 WOW_ASSOC_REQ_EVENT,
6942 WOW_HTT_EVENT,
6943 WOW_RA_MATCH_EVENT,
6944 WOW_HOST_AUTO_SHUTDOWN_EVENT,
6945 WOW_IOAC_MAGIC_EVENT,
6946 WOW_IOAC_SHORT_EVENT,
6947 WOW_IOAC_EXTEND_EVENT,
6948 WOW_IOAC_TIMER_EVENT,
6949 WOW_DFS_PHYERR_RADAR_EVENT,
6950 WOW_BEACON_EVENT,
6951 WOW_CLIENT_KICKOUT_EVENT,
6952 WOW_EVENT_MAX,
6953};
6954
6955#define C2S(x) case x: return #x
6956
6957static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev)
6958{
6959 switch (ev) {
6960 C2S(WOW_BMISS_EVENT);
6961 C2S(WOW_BETTER_AP_EVENT);
6962 C2S(WOW_DEAUTH_RECVD_EVENT);
6963 C2S(WOW_MAGIC_PKT_RECVD_EVENT);
6964 C2S(WOW_GTK_ERR_EVENT);
6965 C2S(WOW_FOURWAY_HSHAKE_EVENT);
6966 C2S(WOW_EAPOL_RECVD_EVENT);
6967 C2S(WOW_NLO_DETECTED_EVENT);
6968 C2S(WOW_DISASSOC_RECVD_EVENT);
6969 C2S(WOW_PATTERN_MATCH_EVENT);
6970 C2S(WOW_CSA_IE_EVENT);
6971 C2S(WOW_PROBE_REQ_WPS_IE_EVENT);
6972 C2S(WOW_AUTH_REQ_EVENT);
6973 C2S(WOW_ASSOC_REQ_EVENT);
6974 C2S(WOW_HTT_EVENT);
6975 C2S(WOW_RA_MATCH_EVENT);
6976 C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT);
6977 C2S(WOW_IOAC_MAGIC_EVENT);
6978 C2S(WOW_IOAC_SHORT_EVENT);
6979 C2S(WOW_IOAC_EXTEND_EVENT);
6980 C2S(WOW_IOAC_TIMER_EVENT);
6981 C2S(WOW_DFS_PHYERR_RADAR_EVENT);
6982 C2S(WOW_BEACON_EVENT);
6983 C2S(WOW_CLIENT_KICKOUT_EVENT);
6984 C2S(WOW_EVENT_MAX);
6985 default:
6986 return NULL;
6987 }
6988}
6989
6990enum wmi_wow_wake_reason {
6991 WOW_REASON_UNSPECIFIED = -1,
6992 WOW_REASON_NLOD = 0,
6993 WOW_REASON_AP_ASSOC_LOST,
6994 WOW_REASON_LOW_RSSI,
6995 WOW_REASON_DEAUTH_RECVD,
6996 WOW_REASON_DISASSOC_RECVD,
6997 WOW_REASON_GTK_HS_ERR,
6998 WOW_REASON_EAP_REQ,
6999 WOW_REASON_FOURWAY_HS_RECV,
7000 WOW_REASON_TIMER_INTR_RECV,
7001 WOW_REASON_PATTERN_MATCH_FOUND,
7002 WOW_REASON_RECV_MAGIC_PATTERN,
7003 WOW_REASON_P2P_DISC,
7004 WOW_REASON_WLAN_HB,
7005 WOW_REASON_CSA_EVENT,
7006 WOW_REASON_PROBE_REQ_WPS_IE_RECV,
7007 WOW_REASON_AUTH_REQ_RECV,
7008 WOW_REASON_ASSOC_REQ_RECV,
7009 WOW_REASON_HTT_EVENT,
7010 WOW_REASON_RA_MATCH,
7011 WOW_REASON_HOST_AUTO_SHUTDOWN,
7012 WOW_REASON_IOAC_MAGIC_EVENT,
7013 WOW_REASON_IOAC_SHORT_EVENT,
7014 WOW_REASON_IOAC_EXTEND_EVENT,
7015 WOW_REASON_IOAC_TIMER_EVENT,
7016 WOW_REASON_ROAM_HO,
7017 WOW_REASON_DFS_PHYERR_RADADR_EVENT,
7018 WOW_REASON_BEACON_RECV,
7019 WOW_REASON_CLIENT_KICKOUT_EVENT,
7020 WOW_REASON_DEBUG_TEST = 0xFF,
7021};
7022
7023static inline const char *wow_reason(enum wmi_wow_wake_reason reason)
7024{
7025 switch (reason) {
7026 C2S(WOW_REASON_UNSPECIFIED);
7027 C2S(WOW_REASON_NLOD);
7028 C2S(WOW_REASON_AP_ASSOC_LOST);
7029 C2S(WOW_REASON_LOW_RSSI);
7030 C2S(WOW_REASON_DEAUTH_RECVD);
7031 C2S(WOW_REASON_DISASSOC_RECVD);
7032 C2S(WOW_REASON_GTK_HS_ERR);
7033 C2S(WOW_REASON_EAP_REQ);
7034 C2S(WOW_REASON_FOURWAY_HS_RECV);
7035 C2S(WOW_REASON_TIMER_INTR_RECV);
7036 C2S(WOW_REASON_PATTERN_MATCH_FOUND);
7037 C2S(WOW_REASON_RECV_MAGIC_PATTERN);
7038 C2S(WOW_REASON_P2P_DISC);
7039 C2S(WOW_REASON_WLAN_HB);
7040 C2S(WOW_REASON_CSA_EVENT);
7041 C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV);
7042 C2S(WOW_REASON_AUTH_REQ_RECV);
7043 C2S(WOW_REASON_ASSOC_REQ_RECV);
7044 C2S(WOW_REASON_HTT_EVENT);
7045 C2S(WOW_REASON_RA_MATCH);
7046 C2S(WOW_REASON_HOST_AUTO_SHUTDOWN);
7047 C2S(WOW_REASON_IOAC_MAGIC_EVENT);
7048 C2S(WOW_REASON_IOAC_SHORT_EVENT);
7049 C2S(WOW_REASON_IOAC_EXTEND_EVENT);
7050 C2S(WOW_REASON_IOAC_TIMER_EVENT);
7051 C2S(WOW_REASON_ROAM_HO);
7052 C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT);
7053 C2S(WOW_REASON_BEACON_RECV);
7054 C2S(WOW_REASON_CLIENT_KICKOUT_EVENT);
7055 C2S(WOW_REASON_DEBUG_TEST);
7056 default:
7057 return NULL;
7058 }
7059}
7060
7061#undef C2S
7062
7063struct wmi_wow_ev_arg {
7064 u32 vdev_id;
7065 u32 flag;
7066 enum wmi_wow_wake_reason wake_reason;
7067 u32 data_len;
7068};
7069
7070#define WOW_MIN_PATTERN_SIZE 1
7071#define WOW_MAX_PATTERN_SIZE 148
7072#define WOW_MAX_PKT_OFFSET 128
7073#define WOW_HDR_LEN (sizeof(struct ieee80211_hdr_3addr) + \
7074 sizeof(struct rfc1042_hdr))
7075#define WOW_MAX_REDUCE (WOW_HDR_LEN - sizeof(struct ethhdr) - \
7076 offsetof(struct ieee80211_hdr_3addr, addr1))
7077
7078enum wmi_tdls_state {
7079 WMI_TDLS_DISABLE,
7080 WMI_TDLS_ENABLE_PASSIVE,
7081 WMI_TDLS_ENABLE_ACTIVE,
7082 WMI_TDLS_ENABLE_ACTIVE_EXTERNAL_CONTROL,
7083};
7084
7085enum wmi_tdls_peer_state {
7086 WMI_TDLS_PEER_STATE_PEERING,
7087 WMI_TDLS_PEER_STATE_CONNECTED,
7088 WMI_TDLS_PEER_STATE_TEARDOWN,
7089};
7090
7091struct wmi_tdls_peer_update_cmd_arg {
7092 u32 vdev_id;
7093 enum wmi_tdls_peer_state peer_state;
7094 u8 addr[ETH_ALEN];
7095};
7096
7097#define WMI_TDLS_MAX_SUPP_OPER_CLASSES 32
7098
7099#define WMI_TDLS_PEER_SP_MASK 0x60
7100#define WMI_TDLS_PEER_SP_LSB 5
7101
7102enum wmi_tdls_options {
7103 WMI_TDLS_OFFCHAN_EN = BIT(0),
7104 WMI_TDLS_BUFFER_STA_EN = BIT(1),
7105 WMI_TDLS_SLEEP_STA_EN = BIT(2),
7106};
7107
7108enum {
7109 WMI_TDLS_PEER_QOS_AC_VO = BIT(0),
7110 WMI_TDLS_PEER_QOS_AC_VI = BIT(1),
7111 WMI_TDLS_PEER_QOS_AC_BK = BIT(2),
7112 WMI_TDLS_PEER_QOS_AC_BE = BIT(3),
7113};
7114
7115struct wmi_tdls_peer_capab_arg {
7116 u8 peer_uapsd_queues;
7117 u8 peer_max_sp;
7118 u32 buff_sta_support;
7119 u32 off_chan_support;
7120 u32 peer_curr_operclass;
7121 u32 self_curr_operclass;
7122 u32 peer_chan_len;
7123 u32 peer_operclass_len;
7124 u8 peer_operclass[WMI_TDLS_MAX_SUPP_OPER_CLASSES];
7125 u32 is_peer_responder;
7126 u32 pref_offchan_num;
7127 u32 pref_offchan_bw;
7128};
7129
7130struct wmi_10_4_tdls_set_state_cmd {
7131 __le32 vdev_id;
7132 __le32 state;
7133 __le32 notification_interval_ms;
7134 __le32 tx_discovery_threshold;
7135 __le32 tx_teardown_threshold;
7136 __le32 rssi_teardown_threshold;
7137 __le32 rssi_delta;
7138 __le32 tdls_options;
7139 __le32 tdls_peer_traffic_ind_window;
7140 __le32 tdls_peer_traffic_response_timeout_ms;
7141 __le32 tdls_puapsd_mask;
7142 __le32 tdls_puapsd_inactivity_time_ms;
7143 __le32 tdls_puapsd_rx_frame_threshold;
7144 __le32 teardown_notification_ms;
7145 __le32 tdls_peer_kickout_threshold;
7146} __packed;
7147
7148struct wmi_tdls_peer_capabilities {
7149 __le32 peer_qos;
7150 __le32 buff_sta_support;
7151 __le32 off_chan_support;
7152 __le32 peer_curr_operclass;
7153 __le32 self_curr_operclass;
7154 __le32 peer_chan_len;
7155 __le32 peer_operclass_len;
7156 u8 peer_operclass[WMI_TDLS_MAX_SUPP_OPER_CLASSES];
7157 __le32 is_peer_responder;
7158 __le32 pref_offchan_num;
7159 __le32 pref_offchan_bw;
7160 struct wmi_channel peer_chan_list[1];
7161} __packed;
7162
7163struct wmi_10_4_tdls_peer_update_cmd {
7164 __le32 vdev_id;
7165 struct wmi_mac_addr peer_macaddr;
7166 __le32 peer_state;
7167 __le32 reserved[4];
7168 struct wmi_tdls_peer_capabilities peer_capab;
7169} __packed;
7170
7171enum wmi_tdls_peer_reason {
7172 WMI_TDLS_TEARDOWN_REASON_TX,
7173 WMI_TDLS_TEARDOWN_REASON_RSSI,
7174 WMI_TDLS_TEARDOWN_REASON_SCAN,
7175 WMI_TDLS_DISCONNECTED_REASON_PEER_DELETE,
7176 WMI_TDLS_TEARDOWN_REASON_PTR_TIMEOUT,
7177 WMI_TDLS_TEARDOWN_REASON_BAD_PTR,
7178 WMI_TDLS_TEARDOWN_REASON_NO_RESPONSE,
7179 WMI_TDLS_ENTER_BUF_STA,
7180 WMI_TDLS_EXIT_BUF_STA,
7181 WMI_TDLS_ENTER_BT_BUSY_MODE,
7182 WMI_TDLS_EXIT_BT_BUSY_MODE,
7183 WMI_TDLS_SCAN_STARTED_EVENT,
7184 WMI_TDLS_SCAN_COMPLETED_EVENT,
7185};
7186
7187enum wmi_tdls_peer_notification {
7188 WMI_TDLS_SHOULD_DISCOVER,
7189 WMI_TDLS_SHOULD_TEARDOWN,
7190 WMI_TDLS_PEER_DISCONNECTED,
7191 WMI_TDLS_CONNECTION_TRACKER_NOTIFICATION,
7192};
7193
7194struct wmi_tdls_peer_event {
7195 struct wmi_mac_addr peer_macaddr;
7196
7197 __le32 peer_status;
7198
7199 __le32 peer_reason;
7200 __le32 vdev_id;
7201} __packed;
7202
7203enum wmi_txbf_conf {
7204 WMI_TXBF_CONF_UNSUPPORTED,
7205 WMI_TXBF_CONF_BEFORE_ASSOC,
7206 WMI_TXBF_CONF_AFTER_ASSOC,
7207};
7208
7209#define WMI_CCA_DETECT_LEVEL_AUTO 0
7210#define WMI_CCA_DETECT_MARGIN_AUTO 0
7211
7212struct wmi_pdev_set_adaptive_cca_params {
7213 __le32 enable;
7214 __le32 cca_detect_level;
7215 __le32 cca_detect_margin;
7216} __packed;
7217
7218#define WMI_PNO_MAX_SCHED_SCAN_PLANS 2
7219#define WMI_PNO_MAX_SCHED_SCAN_PLAN_INT 7200
7220#define WMI_PNO_MAX_SCHED_SCAN_PLAN_ITRNS 100
7221#define WMI_PNO_MAX_NETW_CHANNELS 26
7222#define WMI_PNO_MAX_NETW_CHANNELS_EX 60
7223#define WMI_PNO_MAX_SUPP_NETWORKS WLAN_SCAN_PARAMS_MAX_SSID
7224#define WMI_PNO_MAX_IE_LENGTH WLAN_SCAN_PARAMS_MAX_IE_LEN
7225
7226
7227#define WMI_PNO_MAX_PB_REQ_SIZE 450
7228
7229#define WMI_PNO_24G_DEFAULT_CH 1
7230#define WMI_PNO_5G_DEFAULT_CH 36
7231
7232#define WMI_ACTIVE_MAX_CHANNEL_TIME 40
7233#define WMI_PASSIVE_MAX_CHANNEL_TIME 110
7234
7235
7236enum wmi_SSID_bcast_type {
7237 BCAST_UNKNOWN = 0,
7238 BCAST_NORMAL = 1,
7239 BCAST_HIDDEN = 2,
7240};
7241
7242struct wmi_network_type {
7243 struct wmi_ssid ssid;
7244 u32 authentication;
7245 u32 encryption;
7246 u32 bcast_nw_type;
7247 u8 channel_count;
7248 u16 channels[WMI_PNO_MAX_NETW_CHANNELS_EX];
7249 s32 rssi_threshold;
7250} __packed;
7251
7252struct wmi_pno_scan_req {
7253 u8 enable;
7254 u8 vdev_id;
7255 u8 uc_networks_count;
7256 struct wmi_network_type a_networks[WMI_PNO_MAX_SUPP_NETWORKS];
7257 u32 fast_scan_period;
7258 u32 slow_scan_period;
7259 u8 fast_scan_max_cycles;
7260
7261 bool do_passive_scan;
7262
7263 u32 delay_start_time;
7264 u32 active_min_time;
7265 u32 active_max_time;
7266 u32 passive_min_time;
7267 u32 passive_max_time;
7268
7269
7270 u32 enable_pno_scan_randomization;
7271 u8 mac_addr[ETH_ALEN];
7272 u8 mac_addr_mask[ETH_ALEN];
7273} __packed;
7274
7275enum wmi_host_platform_type {
7276 WMI_HOST_PLATFORM_HIGH_PERF,
7277 WMI_HOST_PLATFORM_LOW_PERF,
7278};
7279
7280enum wmi_bss_survey_req_type {
7281 WMI_BSS_SURVEY_REQ_TYPE_READ = 1,
7282 WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR,
7283};
7284
7285struct wmi_pdev_chan_info_req_cmd {
7286 __le32 type;
7287 __le32 reserved;
7288} __packed;
7289
7290
7291struct wmi_bb_timing_cfg_arg {
7292
7293 u32 bb_tx_timing;
7294
7295
7296 u32 bb_xpa_timing;
7297};
7298
7299struct wmi_pdev_bb_timing_cfg_cmd {
7300
7301 __le32 bb_tx_timing;
7302
7303
7304 __le32 bb_xpa_timing;
7305} __packed;
7306
7307struct ath10k;
7308struct ath10k_vif;
7309struct ath10k_fw_stats_pdev;
7310struct ath10k_fw_stats_peer;
7311struct ath10k_fw_stats;
7312
7313int ath10k_wmi_attach(struct ath10k *ar);
7314void ath10k_wmi_detach(struct ath10k *ar);
7315void ath10k_wmi_free_host_mem(struct ath10k *ar);
7316int ath10k_wmi_wait_for_service_ready(struct ath10k *ar);
7317int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar);
7318
7319struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len);
7320int ath10k_wmi_connect(struct ath10k *ar);
7321
7322struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len);
7323int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id);
7324int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
7325 u32 cmd_id);
7326void ath10k_wmi_start_scan_init(struct ath10k *ar, struct wmi_start_scan_arg *arg);
7327
7328void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
7329 struct ath10k_fw_stats_pdev *dst);
7330void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
7331 struct ath10k_fw_stats_pdev *dst);
7332void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
7333 struct ath10k_fw_stats_pdev *dst);
7334void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
7335 struct ath10k_fw_stats_pdev *dst);
7336void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
7337 struct ath10k_fw_stats_peer *dst);
7338void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
7339 struct wmi_host_mem_chunks *chunks);
7340void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
7341 const struct wmi_start_scan_arg *arg);
7342void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
7343 const struct wmi_wmm_params_arg *arg);
7344void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch,
7345 const struct wmi_channel_arg *arg);
7346int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg);
7347
7348int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb);
7349int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb);
7350int ath10k_wmi_event_mgmt_tx_compl(struct ath10k *ar, struct sk_buff *skb);
7351int ath10k_wmi_event_mgmt_tx_bundle_compl(struct ath10k *ar, struct sk_buff *skb);
7352void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb);
7353void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb);
7354int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb);
7355void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb);
7356void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb);
7357void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb);
7358void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb);
7359void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb);
7360void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb);
7361void ath10k_wmi_event_dfs(struct ath10k *ar,
7362 struct wmi_phyerr_ev_arg *phyerr, u64 tsf);
7363void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
7364 struct wmi_phyerr_ev_arg *phyerr,
7365 u64 tsf);
7366void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb);
7367void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb);
7368void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb);
7369void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb);
7370void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb);
7371void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb);
7372void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
7373 struct sk_buff *skb);
7374void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
7375 struct sk_buff *skb);
7376void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb);
7377void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb);
7378void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb);
7379void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb);
7380void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb);
7381void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar,
7382 struct sk_buff *skb);
7383void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb);
7384void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb);
7385void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb);
7386void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
7387 struct sk_buff *skb);
7388void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb);
7389void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb);
7390void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb);
7391void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb);
7392int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb);
7393void ath10k_wmi_event_service_available(struct ath10k *ar, struct sk_buff *skb);
7394int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar, const void *phyerr_buf,
7395 int left_len, struct wmi_phyerr_ev_arg *arg);
7396void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
7397 struct ath10k_fw_stats *fw_stats,
7398 char *buf);
7399void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
7400 struct ath10k_fw_stats *fw_stats,
7401 char *buf);
7402size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head);
7403size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head);
7404void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
7405 struct ath10k_fw_stats *fw_stats,
7406 char *buf);
7407int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar,
7408 enum wmi_vdev_subtype subtype);
7409int ath10k_wmi_barrier(struct ath10k *ar);
7410void ath10k_wmi_tpc_config_get_rate_code(u8 *rate_code, u16 *pream_table,
7411 u32 num_tx_chain);
7412void ath10k_wmi_event_tpc_final_table(struct ath10k *ar, struct sk_buff *skb);
7413
7414#endif
7415
