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5
6#ifndef ATH11K_MAC_H
7#define ATH11K_MAC_H
8
9#include <net/mac80211.h>
10#include <net/cfg80211.h>
11
12struct ath11k;
13struct ath11k_base;
14
15struct ath11k_generic_iter {
16 struct ath11k *ar;
17 int ret;
18};
19
20
21#define ATH11K_KICKOUT_THRESHOLD (20 * 16)
22
23
24
25
26
27#define ATH11K_KEEPALIVE_MIN_IDLE 3747
28#define ATH11K_KEEPALIVE_MAX_IDLE 3895
29#define ATH11K_KEEPALIVE_MAX_UNRESPONSIVE 3900
30
31#define WMI_HOST_RC_DS_FLAG 0x01
32#define WMI_HOST_RC_CW40_FLAG 0x02
33#define WMI_HOST_RC_SGI_FLAG 0x04
34#define WMI_HOST_RC_HT_FLAG 0x08
35#define WMI_HOST_RC_RTSCTS_FLAG 0x10
36#define WMI_HOST_RC_TX_STBC_FLAG 0x20
37#define WMI_HOST_RC_RX_STBC_FLAG 0xC0
38#define WMI_HOST_RC_RX_STBC_FLAG_S 6
39#define WMI_HOST_RC_WEP_TKIP_FLAG 0x100
40#define WMI_HOST_RC_TS_FLAG 0x200
41#define WMI_HOST_RC_UAPSD_FLAG 0x400
42
43#define WMI_HT_CAP_ENABLED 0x0001
44#define WMI_HT_CAP_HT20_SGI 0x0002
45#define WMI_HT_CAP_DYNAMIC_SMPS 0x0004
46#define WMI_HT_CAP_TX_STBC 0x0008
47#define WMI_HT_CAP_TX_STBC_MASK_SHIFT 3
48#define WMI_HT_CAP_RX_STBC 0x0030
49#define WMI_HT_CAP_RX_STBC_MASK_SHIFT 4
50#define WMI_HT_CAP_LDPC 0x0040
51#define WMI_HT_CAP_L_SIG_TXOP_PROT 0x0080
52#define WMI_HT_CAP_MPDU_DENSITY 0x0700
53#define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT 8
54#define WMI_HT_CAP_HT40_SGI 0x0800
55#define WMI_HT_CAP_RX_LDPC 0x1000
56#define WMI_HT_CAP_TX_LDPC 0x2000
57#define WMI_HT_CAP_IBF_BFER 0x4000
58
59
60
61
62#define WMI_HT_CAP_RX_STBC_1SS 0x0010
63#define WMI_HT_CAP_RX_STBC_2SS 0x0020
64#define WMI_HT_CAP_RX_STBC_3SS 0x0030
65
66#define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED | \
67 WMI_HT_CAP_HT20_SGI | \
68 WMI_HT_CAP_HT40_SGI | \
69 WMI_HT_CAP_TX_STBC | \
70 WMI_HT_CAP_RX_STBC | \
71 WMI_HT_CAP_LDPC)
72
73#define WMI_VHT_CAP_MAX_MPDU_LEN_MASK 0x00000003
74#define WMI_VHT_CAP_RX_LDPC 0x00000010
75#define WMI_VHT_CAP_SGI_80MHZ 0x00000020
76#define WMI_VHT_CAP_SGI_160MHZ 0x00000040
77#define WMI_VHT_CAP_TX_STBC 0x00000080
78#define WMI_VHT_CAP_RX_STBC_MASK 0x00000300
79#define WMI_VHT_CAP_RX_STBC_MASK_SHIFT 8
80#define WMI_VHT_CAP_SU_BFER 0x00000800
81#define WMI_VHT_CAP_SU_BFEE 0x00001000
82#define WMI_VHT_CAP_MAX_CS_ANT_MASK 0x0000E000
83#define WMI_VHT_CAP_MAX_CS_ANT_MASK_SHIFT 13
84#define WMI_VHT_CAP_MAX_SND_DIM_MASK 0x00070000
85#define WMI_VHT_CAP_MAX_SND_DIM_MASK_SHIFT 16
86#define WMI_VHT_CAP_MU_BFER 0x00080000
87#define WMI_VHT_CAP_MU_BFEE 0x00100000
88#define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP 0x03800000
89#define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIT 23
90#define WMI_VHT_CAP_RX_FIXED_ANT 0x10000000
91#define WMI_VHT_CAP_TX_FIXED_ANT 0x20000000
92
93#define WMI_VHT_CAP_MAX_MPDU_LEN_11454 0x00000002
94
95
96
97
98#define WMI_VHT_CAP_RX_STBC_1SS 0x00000100
99#define WMI_VHT_CAP_RX_STBC_2SS 0x00000200
100#define WMI_VHT_CAP_RX_STBC_3SS 0x00000300
101
102#define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454 | \
103 WMI_VHT_CAP_SGI_80MHZ | \
104 WMI_VHT_CAP_TX_STBC | \
105 WMI_VHT_CAP_RX_STBC_MASK | \
106 WMI_VHT_CAP_RX_LDPC | \
107 WMI_VHT_CAP_MAX_AMPDU_LEN_EXP | \
108 WMI_VHT_CAP_RX_FIXED_ANT | \
109 WMI_VHT_CAP_TX_FIXED_ANT)
110
111
112#define IEEE80211_VHT_MCS_SUPPORT_0_11_MASK GENMASK(23, 16)
113#define IEEE80211_DISABLE_VHT_MCS_SUPPORT_0_11 BIT(24)
114
115#define WMI_MAX_SPATIAL_STREAM 3
116
117#define ATH11K_CHAN_WIDTH_NUM 8
118
119extern const struct htt_rx_ring_tlv_filter ath11k_mac_mon_status_filter_default;
120
121void ath11k_mac_destroy(struct ath11k_base *ab);
122void ath11k_mac_unregister(struct ath11k_base *ab);
123int ath11k_mac_register(struct ath11k_base *ab);
124int ath11k_mac_allocate(struct ath11k_base *ab);
125int ath11k_mac_hw_ratecode_to_legacy_rate(u8 hw_rc, u8 preamble, u8 *rateidx,
126 u16 *rate);
127u8 ath11k_mac_bitrate_to_idx(const struct ieee80211_supported_band *sband,
128 u32 bitrate);
129u8 ath11k_mac_hw_rate_to_idx(const struct ieee80211_supported_band *sband,
130 u8 hw_rate, bool cck);
131
132void __ath11k_mac_scan_finish(struct ath11k *ar);
133void ath11k_mac_scan_finish(struct ath11k *ar);
134
135struct ath11k_vif *ath11k_mac_get_arvif(struct ath11k *ar, u32 vdev_id);
136struct ath11k_vif *ath11k_mac_get_arvif_by_vdev_id(struct ath11k_base *ab,
137 u32 vdev_id);
138struct ath11k *ath11k_mac_get_ar_by_vdev_id(struct ath11k_base *ab, u32 vdev_id);
139struct ath11k *ath11k_mac_get_ar_by_pdev_id(struct ath11k_base *ab, u32 pdev_id);
140struct ath11k *ath11k_mac_get_ar_vdev_stop_status(struct ath11k_base *ab,
141 u32 vdev_id);
142
143void ath11k_mac_drain_tx(struct ath11k *ar);
144void ath11k_mac_peer_cleanup_all(struct ath11k *ar);
145int ath11k_mac_tx_mgmt_pending_free(int buf_id, void *skb, void *ctx);
146u8 ath11k_mac_bw_to_mac80211_bw(u8 bw);
147#endif
148
