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12#include <linux/module.h>
13#include <linux/string.h>
14#include <linux/slab.h>
15#include <linux/init.h>
16#include <linux/err.h>
17#include <linux/platform_device.h>
18#include <linux/of.h>
19#include <linux/of_device.h>
20#include <linux/regulator/driver.h>
21#include <linux/regulator/machine.h>
22#include <linux/regulator/of_regulator.h>
23#include <linux/mfd/twl.h>
24#include <linux/delay.h>
25
26
27
28
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30
31
32
33
34
35
36
37struct twlreg_info {
38
39 u8 base;
40
41
42 u8 id;
43
44
45 u8 table_len;
46 const u16 *table;
47
48
49 u8 remap;
50
51
52 struct regulator_desc desc;
53
54
55 unsigned long features;
56
57
58 void *data;
59};
60
61
62
63
64
65
66
67#define VREG_GRP 0
68
69#define VREG_TYPE 1
70#define VREG_REMAP 2
71#define VREG_DEDICATED 3
72#define VREG_VOLTAGE_SMPS_4030 9
73
74#define VREG_TRANS 1
75#define VREG_STATE 2
76#define VREG_VOLTAGE 3
77#define VREG_VOLTAGE_SMPS 4
78
79static inline int
80twlreg_read(struct twlreg_info *info, unsigned slave_subgp, unsigned offset)
81{
82 u8 value;
83 int status;
84
85 status = twl_i2c_read_u8(slave_subgp,
86 &value, info->base + offset);
87 return (status < 0) ? status : value;
88}
89
90static inline int
91twlreg_write(struct twlreg_info *info, unsigned slave_subgp, unsigned offset,
92 u8 value)
93{
94 return twl_i2c_write_u8(slave_subgp,
95 value, info->base + offset);
96}
97
98
99
100
101
102static int twlreg_grp(struct regulator_dev *rdev)
103{
104 return twlreg_read(rdev_get_drvdata(rdev), TWL_MODULE_PM_RECEIVER,
105 VREG_GRP);
106}
107
108
109
110
111
112
113#define P3_GRP_4030 BIT(7)
114#define P2_GRP_4030 BIT(6)
115#define P1_GRP_4030 BIT(5)
116
117#define P3_GRP_6030 BIT(2)
118#define P2_GRP_6030 BIT(1)
119#define P1_GRP_6030 BIT(0)
120
121static int twl4030reg_is_enabled(struct regulator_dev *rdev)
122{
123 int state = twlreg_grp(rdev);
124
125 if (state < 0)
126 return state;
127
128 return state & P1_GRP_4030;
129}
130
131#define PB_I2C_BUSY BIT(0)
132#define PB_I2C_BWEN BIT(1)
133
134
135static int twl4030_wait_pb_ready(void)
136{
137
138 int ret;
139 int timeout = 10;
140 u8 val;
141
142 do {
143 ret = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &val,
144 TWL4030_PM_MASTER_PB_CFG);
145 if (ret < 0)
146 return ret;
147
148 if (!(val & PB_I2C_BUSY))
149 return 0;
150
151 mdelay(1);
152 timeout--;
153 } while (timeout);
154
155 return -ETIMEDOUT;
156}
157
158
159static int twl4030_send_pb_msg(unsigned msg)
160{
161 u8 val;
162 int ret;
163
164
165 ret = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &val,
166 TWL4030_PM_MASTER_PB_CFG);
167 if (ret < 0)
168 return ret;
169
170
171 ret = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, val | PB_I2C_BWEN,
172 TWL4030_PM_MASTER_PB_CFG);
173 if (ret < 0)
174 return ret;
175
176 ret = twl4030_wait_pb_ready();
177 if (ret < 0)
178 return ret;
179
180 ret = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, msg >> 8,
181 TWL4030_PM_MASTER_PB_WORD_MSB);
182 if (ret < 0)
183 return ret;
184
185 ret = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, msg & 0xff,
186 TWL4030_PM_MASTER_PB_WORD_LSB);
187 if (ret < 0)
188 return ret;
189
190 ret = twl4030_wait_pb_ready();
191 if (ret < 0)
192 return ret;
193
194
195 return twl_i2c_write_u8(TWL_MODULE_PM_MASTER, val,
196 TWL4030_PM_MASTER_PB_CFG);
197}
198
199static int twl4030reg_enable(struct regulator_dev *rdev)
200{
201 struct twlreg_info *info = rdev_get_drvdata(rdev);
202 int grp;
203 int ret;
204
205 grp = twlreg_grp(rdev);
206 if (grp < 0)
207 return grp;
208
209 grp |= P1_GRP_4030;
210
211 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
212
213 return ret;
214}
215
216static int twl4030reg_disable(struct regulator_dev *rdev)
217{
218 struct twlreg_info *info = rdev_get_drvdata(rdev);
219 int grp;
220 int ret;
221
222 grp = twlreg_grp(rdev);
223 if (grp < 0)
224 return grp;
225
226 grp &= ~(P1_GRP_4030 | P2_GRP_4030 | P3_GRP_4030);
227
228 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
229
230 return ret;
231}
232
233static int twl4030reg_get_status(struct regulator_dev *rdev)
234{
235 int state = twlreg_grp(rdev);
236
237 if (state < 0)
238 return state;
239 state &= 0x0f;
240
241
242 if (!state)
243 return REGULATOR_STATUS_OFF;
244 return (state & BIT(3))
245 ? REGULATOR_STATUS_NORMAL
246 : REGULATOR_STATUS_STANDBY;
247}
248
249static int twl4030reg_set_mode(struct regulator_dev *rdev, unsigned mode)
250{
251 struct twlreg_info *info = rdev_get_drvdata(rdev);
252 unsigned message;
253
254
255 switch (mode) {
256 case REGULATOR_MODE_NORMAL:
257 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_ACTIVE);
258 break;
259 case REGULATOR_MODE_STANDBY:
260 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_SLEEP);
261 break;
262 default:
263 return -EINVAL;
264 }
265
266 return twl4030_send_pb_msg(message);
267}
268
269static inline unsigned int twl4030reg_map_mode(unsigned int mode)
270{
271 switch (mode) {
272 case RES_STATE_ACTIVE:
273 return REGULATOR_MODE_NORMAL;
274 case RES_STATE_SLEEP:
275 return REGULATOR_MODE_STANDBY;
276 default:
277 return REGULATOR_MODE_INVALID;
278 }
279}
280
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295
296
297
298#define UNSUP_MASK 0x8000
299
300#define UNSUP(x) (UNSUP_MASK | (x))
301#define IS_UNSUP(info, x) \
302 ((UNSUP_MASK & (x)) && \
303 !((info)->features & TWL4030_ALLOW_UNSUPPORTED))
304#define LDO_MV(x) (~UNSUP_MASK & (x))
305
306
307static const u16 VAUX1_VSEL_table[] = {
308 UNSUP(1500), UNSUP(1800), 2500, 2800,
309 3000, 3000, 3000, 3000,
310};
311static const u16 VAUX2_4030_VSEL_table[] = {
312 UNSUP(1000), UNSUP(1000), UNSUP(1200), 1300,
313 1500, 1800, UNSUP(1850), 2500,
314 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
315 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
316};
317static const u16 VAUX2_VSEL_table[] = {
318 1700, 1700, 1900, 1300,
319 1500, 1800, 2000, 2500,
320 2100, 2800, 2200, 2300,
321 2400, 2400, 2400, 2400,
322};
323static const u16 VAUX3_VSEL_table[] = {
324 1500, 1800, 2500, 2800,
325 3000, 3000, 3000, 3000,
326};
327static const u16 VAUX4_VSEL_table[] = {
328 700, 1000, 1200, UNSUP(1300),
329 1500, 1800, UNSUP(1850), 2500,
330 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
331 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
332};
333static const u16 VMMC1_VSEL_table[] = {
334 1850, 2850, 3000, 3150,
335};
336static const u16 VMMC2_VSEL_table[] = {
337 UNSUP(1000), UNSUP(1000), UNSUP(1200), UNSUP(1300),
338 UNSUP(1500), UNSUP(1800), 1850, UNSUP(2500),
339 2600, 2800, 2850, 3000,
340 3150, 3150, 3150, 3150,
341};
342static const u16 VPLL1_VSEL_table[] = {
343 1000, 1200, 1300, 1800,
344 UNSUP(2800), UNSUP(3000), UNSUP(3000), UNSUP(3000),
345};
346static const u16 VPLL2_VSEL_table[] = {
347 700, 1000, 1200, 1300,
348 UNSUP(1500), 1800, UNSUP(1850), UNSUP(2500),
349 UNSUP(2600), UNSUP(2800), UNSUP(2850), UNSUP(3000),
350 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
351};
352static const u16 VSIM_VSEL_table[] = {
353 UNSUP(1000), UNSUP(1200), UNSUP(1300), 1800,
354 2800, 3000, 3000, 3000,
355};
356static const u16 VDAC_VSEL_table[] = {
357 1200, 1300, 1800, 1800,
358};
359static const u16 VIO_VSEL_table[] = {
360 1800, 1850,
361};
362static const u16 VINTANA2_VSEL_table[] = {
363 2500, 2750,
364};
365
366static int twl4030ldo_list_voltage(struct regulator_dev *rdev, unsigned index)
367{
368 struct twlreg_info *info = rdev_get_drvdata(rdev);
369 int mV = info->table[index];
370
371 return IS_UNSUP(info, mV) ? 0 : (LDO_MV(mV) * 1000);
372}
373
374static int
375twl4030ldo_set_voltage_sel(struct regulator_dev *rdev, unsigned selector)
376{
377 struct twlreg_info *info = rdev_get_drvdata(rdev);
378
379 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE,
380 selector);
381}
382
383static int twl4030ldo_get_voltage_sel(struct regulator_dev *rdev)
384{
385 struct twlreg_info *info = rdev_get_drvdata(rdev);
386 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE);
387
388 if (vsel < 0)
389 return vsel;
390
391 vsel &= info->table_len - 1;
392 return vsel;
393}
394
395static struct regulator_ops twl4030ldo_ops = {
396 .list_voltage = twl4030ldo_list_voltage,
397
398 .set_voltage_sel = twl4030ldo_set_voltage_sel,
399 .get_voltage_sel = twl4030ldo_get_voltage_sel,
400
401 .enable = twl4030reg_enable,
402 .disable = twl4030reg_disable,
403 .is_enabled = twl4030reg_is_enabled,
404
405 .set_mode = twl4030reg_set_mode,
406
407 .get_status = twl4030reg_get_status,
408};
409
410static int
411twl4030smps_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
412 unsigned *selector)
413{
414 struct twlreg_info *info = rdev_get_drvdata(rdev);
415 int vsel = DIV_ROUND_UP(min_uV - 600000, 12500);
416
417 twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS_4030, vsel);
418
419 return 0;
420}
421
422static int twl4030smps_get_voltage(struct regulator_dev *rdev)
423{
424 struct twlreg_info *info = rdev_get_drvdata(rdev);
425 int vsel;
426
427 vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
428 VREG_VOLTAGE_SMPS_4030);
429
430 return vsel * 12500 + 600000;
431}
432
433static struct regulator_ops twl4030smps_ops = {
434 .set_voltage = twl4030smps_set_voltage,
435 .get_voltage = twl4030smps_get_voltage,
436};
437
438
439
440static struct regulator_ops twl4030fixed_ops = {
441 .list_voltage = regulator_list_voltage_linear,
442
443 .enable = twl4030reg_enable,
444 .disable = twl4030reg_disable,
445 .is_enabled = twl4030reg_is_enabled,
446
447 .set_mode = twl4030reg_set_mode,
448
449 .get_status = twl4030reg_get_status,
450};
451
452
453
454#define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) \
455static const struct twlreg_info TWL4030_INFO_##label = { \
456 .base = offset, \
457 .id = num, \
458 .table_len = ARRAY_SIZE(label##_VSEL_table), \
459 .table = label##_VSEL_table, \
460 .remap = remap_conf, \
461 .desc = { \
462 .name = #label, \
463 .id = TWL4030_REG_##label, \
464 .n_voltages = ARRAY_SIZE(label##_VSEL_table), \
465 .ops = &twl4030ldo_ops, \
466 .type = REGULATOR_VOLTAGE, \
467 .owner = THIS_MODULE, \
468 .enable_time = turnon_delay, \
469 .of_map_mode = twl4030reg_map_mode, \
470 }, \
471 }
472
473#define TWL4030_ADJUSTABLE_SMPS(label, offset, num, turnon_delay, remap_conf) \
474static const struct twlreg_info TWL4030_INFO_##label = { \
475 .base = offset, \
476 .id = num, \
477 .remap = remap_conf, \
478 .desc = { \
479 .name = #label, \
480 .id = TWL4030_REG_##label, \
481 .ops = &twl4030smps_ops, \
482 .type = REGULATOR_VOLTAGE, \
483 .owner = THIS_MODULE, \
484 .enable_time = turnon_delay, \
485 .of_map_mode = twl4030reg_map_mode, \
486 }, \
487 }
488
489#define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
490 remap_conf) \
491static const struct twlreg_info TWLFIXED_INFO_##label = { \
492 .base = offset, \
493 .id = num, \
494 .remap = remap_conf, \
495 .desc = { \
496 .name = #label, \
497 .id = TWL4030##_REG_##label, \
498 .n_voltages = 1, \
499 .ops = &twl4030fixed_ops, \
500 .type = REGULATOR_VOLTAGE, \
501 .owner = THIS_MODULE, \
502 .min_uV = mVolts * 1000, \
503 .enable_time = turnon_delay, \
504 .of_map_mode = twl4030reg_map_mode, \
505 }, \
506 }
507
508
509
510
511
512TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08);
513TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08);
514TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08);
515TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08);
516TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08);
517TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08);
518TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08);
519TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00);
520TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08);
521TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00);
522TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08);
523TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08);
524TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08);
525TWL4030_ADJUSTABLE_SMPS(VDD1, 0x55, 15, 1000, 0x08);
526TWL4030_ADJUSTABLE_SMPS(VDD2, 0x63, 16, 1000, 0x08);
527
528TWL4030_FIXED_LDO(VINTANA1, 0x3f, 1500, 11, 100, 0x08);
529TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08);
530TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08);
531TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08);
532TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08);
533
534#define TWL_OF_MATCH(comp, family, label) \
535 { \
536 .compatible = comp, \
537 .data = &family##_INFO_##label, \
538 }
539
540#define TWL4030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL4030, label)
541#define TWL6030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6030, label)
542#define TWL6032_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6032, label)
543#define TWLFIXED_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLFIXED, label)
544#define TWLSMPS_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLSMPS, label)
545
546static const struct of_device_id twl_of_match[] = {
547 TWL4030_OF_MATCH("ti,twl4030-vaux1", VAUX1),
548 TWL4030_OF_MATCH("ti,twl4030-vaux2", VAUX2_4030),
549 TWL4030_OF_MATCH("ti,twl5030-vaux2", VAUX2),
550 TWL4030_OF_MATCH("ti,twl4030-vaux3", VAUX3),
551 TWL4030_OF_MATCH("ti,twl4030-vaux4", VAUX4),
552 TWL4030_OF_MATCH("ti,twl4030-vmmc1", VMMC1),
553 TWL4030_OF_MATCH("ti,twl4030-vmmc2", VMMC2),
554 TWL4030_OF_MATCH("ti,twl4030-vpll1", VPLL1),
555 TWL4030_OF_MATCH("ti,twl4030-vpll2", VPLL2),
556 TWL4030_OF_MATCH("ti,twl4030-vsim", VSIM),
557 TWL4030_OF_MATCH("ti,twl4030-vdac", VDAC),
558 TWL4030_OF_MATCH("ti,twl4030-vintana2", VINTANA2),
559 TWL4030_OF_MATCH("ti,twl4030-vio", VIO),
560 TWL4030_OF_MATCH("ti,twl4030-vdd1", VDD1),
561 TWL4030_OF_MATCH("ti,twl4030-vdd2", VDD2),
562 TWLFIXED_OF_MATCH("ti,twl4030-vintana1", VINTANA1),
563 TWLFIXED_OF_MATCH("ti,twl4030-vintdig", VINTDIG),
564 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v5", VUSB1V5),
565 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v8", VUSB1V8),
566 TWLFIXED_OF_MATCH("ti,twl4030-vusb3v1", VUSB3V1),
567 {},
568};
569MODULE_DEVICE_TABLE(of, twl_of_match);
570
571static int twlreg_probe(struct platform_device *pdev)
572{
573 int id;
574 struct twlreg_info *info;
575 const struct twlreg_info *template;
576 struct regulator_init_data *initdata;
577 struct regulation_constraints *c;
578 struct regulator_dev *rdev;
579 const struct of_device_id *match;
580 struct regulator_config config = { };
581
582 match = of_match_device(twl_of_match, &pdev->dev);
583 if (!match)
584 return -ENODEV;
585
586 template = match->data;
587 if (!template)
588 return -ENODEV;
589
590 id = template->desc.id;
591 initdata = of_get_regulator_init_data(&pdev->dev, pdev->dev.of_node,
592 &template->desc);
593 if (!initdata)
594 return -EINVAL;
595
596 info = devm_kmemdup(&pdev->dev, template, sizeof(*info), GFP_KERNEL);
597 if (!info)
598 return -ENOMEM;
599
600
601
602
603 c = &initdata->constraints;
604 c->valid_modes_mask &= REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY;
605 c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE
606 | REGULATOR_CHANGE_MODE
607 | REGULATOR_CHANGE_STATUS;
608 switch (id) {
609 case TWL4030_REG_VIO:
610 case TWL4030_REG_VDD1:
611 case TWL4030_REG_VDD2:
612 case TWL4030_REG_VPLL1:
613 case TWL4030_REG_VINTANA1:
614 case TWL4030_REG_VINTANA2:
615 case TWL4030_REG_VINTDIG:
616 c->always_on = true;
617 break;
618 default:
619 break;
620 }
621
622 config.dev = &pdev->dev;
623 config.init_data = initdata;
624 config.driver_data = info;
625 config.of_node = pdev->dev.of_node;
626
627 rdev = devm_regulator_register(&pdev->dev, &info->desc, &config);
628 if (IS_ERR(rdev)) {
629 dev_err(&pdev->dev, "can't register %s, %ld\n",
630 info->desc.name, PTR_ERR(rdev));
631 return PTR_ERR(rdev);
632 }
633 platform_set_drvdata(pdev, rdev);
634
635 twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP, info->remap);
636
637
638
639
640
641
642
643
644
645 return 0;
646}
647
648MODULE_ALIAS("platform:twl4030_reg");
649
650static struct platform_driver twlreg_driver = {
651 .probe = twlreg_probe,
652
653
654
655 .driver = {
656 .name = "twl4030_reg",
657 .of_match_table = of_match_ptr(twl_of_match),
658 },
659};
660
661static int __init twlreg_init(void)
662{
663 return platform_driver_register(&twlreg_driver);
664}
665subsys_initcall(twlreg_init);
666
667static void __exit twlreg_exit(void)
668{
669 platform_driver_unregister(&twlreg_driver);
670}
671module_exit(twlreg_exit)
672
673MODULE_DESCRIPTION("TWL4030 regulator driver");
674MODULE_LICENSE("GPL");
675