linux/drivers/tty/serial/amba-pl010.c
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   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 *  Driver for AMBA serial ports
   4 *
   5 *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
   6 *
   7 *  Copyright 1999 ARM Limited
   8 *  Copyright (C) 2000 Deep Blue Solutions Ltd.
   9 *
  10 * This is a generic driver for ARM AMBA-type serial ports.  They
  11 * have a lot of 16550-like features, but are not register compatible.
  12 * Note that although they do have CTS, DCD and DSR inputs, they do
  13 * not have an RI input, nor do they have DTR or RTS outputs.  If
  14 * required, these have to be supplied via some other means (eg, GPIO)
  15 * and hooked into this driver.
  16 */
  17
  18#if defined(CONFIG_SERIAL_AMBA_PL010_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  19#define SUPPORT_SYSRQ
  20#endif
  21
  22#include <linux/module.h>
  23#include <linux/ioport.h>
  24#include <linux/init.h>
  25#include <linux/console.h>
  26#include <linux/sysrq.h>
  27#include <linux/device.h>
  28#include <linux/tty.h>
  29#include <linux/tty_flip.h>
  30#include <linux/serial_core.h>
  31#include <linux/serial.h>
  32#include <linux/amba/bus.h>
  33#include <linux/amba/serial.h>
  34#include <linux/clk.h>
  35#include <linux/slab.h>
  36#include <linux/io.h>
  37
  38#define UART_NR         8
  39
  40#define SERIAL_AMBA_MAJOR       204
  41#define SERIAL_AMBA_MINOR       16
  42#define SERIAL_AMBA_NR          UART_NR
  43
  44#define AMBA_ISR_PASS_LIMIT     256
  45
  46#define UART_RX_DATA(s)         (((s) & UART01x_FR_RXFE) == 0)
  47#define UART_TX_READY(s)        (((s) & UART01x_FR_TXFF) == 0)
  48
  49#define UART_DUMMY_RSR_RX       256
  50#define UART_PORT_SIZE          64
  51
  52/*
  53 * We wrap our port structure around the generic uart_port.
  54 */
  55struct uart_amba_port {
  56        struct uart_port        port;
  57        struct clk              *clk;
  58        struct amba_device      *dev;
  59        struct amba_pl010_data  *data;
  60        unsigned int            old_status;
  61};
  62
  63static void pl010_stop_tx(struct uart_port *port)
  64{
  65        struct uart_amba_port *uap =
  66                container_of(port, struct uart_amba_port, port);
  67        unsigned int cr;
  68
  69        cr = readb(uap->port.membase + UART010_CR);
  70        cr &= ~UART010_CR_TIE;
  71        writel(cr, uap->port.membase + UART010_CR);
  72}
  73
  74static void pl010_start_tx(struct uart_port *port)
  75{
  76        struct uart_amba_port *uap =
  77                container_of(port, struct uart_amba_port, port);
  78        unsigned int cr;
  79
  80        cr = readb(uap->port.membase + UART010_CR);
  81        cr |= UART010_CR_TIE;
  82        writel(cr, uap->port.membase + UART010_CR);
  83}
  84
  85static void pl010_stop_rx(struct uart_port *port)
  86{
  87        struct uart_amba_port *uap =
  88                container_of(port, struct uart_amba_port, port);
  89        unsigned int cr;
  90
  91        cr = readb(uap->port.membase + UART010_CR);
  92        cr &= ~(UART010_CR_RIE | UART010_CR_RTIE);
  93        writel(cr, uap->port.membase + UART010_CR);
  94}
  95
  96static void pl010_disable_ms(struct uart_port *port)
  97{
  98        struct uart_amba_port *uap = (struct uart_amba_port *)port;
  99        unsigned int cr;
 100
 101        cr = readb(uap->port.membase + UART010_CR);
 102        cr &= ~UART010_CR_MSIE;
 103        writel(cr, uap->port.membase + UART010_CR);
 104}
 105
 106static void pl010_enable_ms(struct uart_port *port)
 107{
 108        struct uart_amba_port *uap =
 109                container_of(port, struct uart_amba_port, port);
 110        unsigned int cr;
 111
 112        cr = readb(uap->port.membase + UART010_CR);
 113        cr |= UART010_CR_MSIE;
 114        writel(cr, uap->port.membase + UART010_CR);
 115}
 116
 117static void pl010_rx_chars(struct uart_amba_port *uap)
 118{
 119        unsigned int status, ch, flag, rsr, max_count = 256;
 120
 121        status = readb(uap->port.membase + UART01x_FR);
 122        while (UART_RX_DATA(status) && max_count--) {
 123                ch = readb(uap->port.membase + UART01x_DR);
 124                flag = TTY_NORMAL;
 125
 126                uap->port.icount.rx++;
 127
 128                /*
 129                 * Note that the error handling code is
 130                 * out of the main execution path
 131                 */
 132                rsr = readb(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
 133                if (unlikely(rsr & UART01x_RSR_ANY)) {
 134                        writel(0, uap->port.membase + UART01x_ECR);
 135
 136                        if (rsr & UART01x_RSR_BE) {
 137                                rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
 138                                uap->port.icount.brk++;
 139                                if (uart_handle_break(&uap->port))
 140                                        goto ignore_char;
 141                        } else if (rsr & UART01x_RSR_PE)
 142                                uap->port.icount.parity++;
 143                        else if (rsr & UART01x_RSR_FE)
 144                                uap->port.icount.frame++;
 145                        if (rsr & UART01x_RSR_OE)
 146                                uap->port.icount.overrun++;
 147
 148                        rsr &= uap->port.read_status_mask;
 149
 150                        if (rsr & UART01x_RSR_BE)
 151                                flag = TTY_BREAK;
 152                        else if (rsr & UART01x_RSR_PE)
 153                                flag = TTY_PARITY;
 154                        else if (rsr & UART01x_RSR_FE)
 155                                flag = TTY_FRAME;
 156                }
 157
 158                if (uart_handle_sysrq_char(&uap->port, ch))
 159                        goto ignore_char;
 160
 161                uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag);
 162
 163        ignore_char:
 164                status = readb(uap->port.membase + UART01x_FR);
 165        }
 166        spin_unlock(&uap->port.lock);
 167        tty_flip_buffer_push(&uap->port.state->port);
 168        spin_lock(&uap->port.lock);
 169}
 170
 171static void pl010_tx_chars(struct uart_amba_port *uap)
 172{
 173        struct circ_buf *xmit = &uap->port.state->xmit;
 174        int count;
 175
 176        if (uap->port.x_char) {
 177                writel(uap->port.x_char, uap->port.membase + UART01x_DR);
 178                uap->port.icount.tx++;
 179                uap->port.x_char = 0;
 180                return;
 181        }
 182        if (uart_circ_empty(xmit) || uart_tx_stopped(&uap->port)) {
 183                pl010_stop_tx(&uap->port);
 184                return;
 185        }
 186
 187        count = uap->port.fifosize >> 1;
 188        do {
 189                writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
 190                xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 191                uap->port.icount.tx++;
 192                if (uart_circ_empty(xmit))
 193                        break;
 194        } while (--count > 0);
 195
 196        if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 197                uart_write_wakeup(&uap->port);
 198
 199        if (uart_circ_empty(xmit))
 200                pl010_stop_tx(&uap->port);
 201}
 202
 203static void pl010_modem_status(struct uart_amba_port *uap)
 204{
 205        unsigned int status, delta;
 206
 207        writel(0, uap->port.membase + UART010_ICR);
 208
 209        status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
 210
 211        delta = status ^ uap->old_status;
 212        uap->old_status = status;
 213
 214        if (!delta)
 215                return;
 216
 217        if (delta & UART01x_FR_DCD)
 218                uart_handle_dcd_change(&uap->port, status & UART01x_FR_DCD);
 219
 220        if (delta & UART01x_FR_DSR)
 221                uap->port.icount.dsr++;
 222
 223        if (delta & UART01x_FR_CTS)
 224                uart_handle_cts_change(&uap->port, status & UART01x_FR_CTS);
 225
 226        wake_up_interruptible(&uap->port.state->port.delta_msr_wait);
 227}
 228
 229static irqreturn_t pl010_int(int irq, void *dev_id)
 230{
 231        struct uart_amba_port *uap = dev_id;
 232        unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;
 233        int handled = 0;
 234
 235        spin_lock(&uap->port.lock);
 236
 237        status = readb(uap->port.membase + UART010_IIR);
 238        if (status) {
 239                do {
 240                        if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))
 241                                pl010_rx_chars(uap);
 242                        if (status & UART010_IIR_MIS)
 243                                pl010_modem_status(uap);
 244                        if (status & UART010_IIR_TIS)
 245                                pl010_tx_chars(uap);
 246
 247                        if (pass_counter-- == 0)
 248                                break;
 249
 250                        status = readb(uap->port.membase + UART010_IIR);
 251                } while (status & (UART010_IIR_RTIS | UART010_IIR_RIS |
 252                                   UART010_IIR_TIS));
 253                handled = 1;
 254        }
 255
 256        spin_unlock(&uap->port.lock);
 257
 258        return IRQ_RETVAL(handled);
 259}
 260
 261static unsigned int pl010_tx_empty(struct uart_port *port)
 262{
 263        struct uart_amba_port *uap =
 264                container_of(port, struct uart_amba_port, port);
 265        unsigned int status = readb(uap->port.membase + UART01x_FR);
 266        return status & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
 267}
 268
 269static unsigned int pl010_get_mctrl(struct uart_port *port)
 270{
 271        struct uart_amba_port *uap =
 272                container_of(port, struct uart_amba_port, port);
 273        unsigned int result = 0;
 274        unsigned int status;
 275
 276        status = readb(uap->port.membase + UART01x_FR);
 277        if (status & UART01x_FR_DCD)
 278                result |= TIOCM_CAR;
 279        if (status & UART01x_FR_DSR)
 280                result |= TIOCM_DSR;
 281        if (status & UART01x_FR_CTS)
 282                result |= TIOCM_CTS;
 283
 284        return result;
 285}
 286
 287static void pl010_set_mctrl(struct uart_port *port, unsigned int mctrl)
 288{
 289        struct uart_amba_port *uap =
 290                container_of(port, struct uart_amba_port, port);
 291
 292        if (uap->data)
 293                uap->data->set_mctrl(uap->dev, uap->port.membase, mctrl);
 294}
 295
 296static void pl010_break_ctl(struct uart_port *port, int break_state)
 297{
 298        struct uart_amba_port *uap =
 299                container_of(port, struct uart_amba_port, port);
 300        unsigned long flags;
 301        unsigned int lcr_h;
 302
 303        spin_lock_irqsave(&uap->port.lock, flags);
 304        lcr_h = readb(uap->port.membase + UART010_LCRH);
 305        if (break_state == -1)
 306                lcr_h |= UART01x_LCRH_BRK;
 307        else
 308                lcr_h &= ~UART01x_LCRH_BRK;
 309        writel(lcr_h, uap->port.membase + UART010_LCRH);
 310        spin_unlock_irqrestore(&uap->port.lock, flags);
 311}
 312
 313static int pl010_startup(struct uart_port *port)
 314{
 315        struct uart_amba_port *uap =
 316                container_of(port, struct uart_amba_port, port);
 317        int retval;
 318
 319        /*
 320         * Try to enable the clock producer.
 321         */
 322        retval = clk_prepare_enable(uap->clk);
 323        if (retval)
 324                goto out;
 325
 326        uap->port.uartclk = clk_get_rate(uap->clk);
 327
 328        /*
 329         * Allocate the IRQ
 330         */
 331        retval = request_irq(uap->port.irq, pl010_int, 0, "uart-pl010", uap);
 332        if (retval)
 333                goto clk_dis;
 334
 335        /*
 336         * initialise the old status of the modem signals
 337         */
 338        uap->old_status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
 339
 340        /*
 341         * Finally, enable interrupts
 342         */
 343        writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
 344               uap->port.membase + UART010_CR);
 345
 346        return 0;
 347
 348 clk_dis:
 349        clk_disable_unprepare(uap->clk);
 350 out:
 351        return retval;
 352}
 353
 354static void pl010_shutdown(struct uart_port *port)
 355{
 356        struct uart_amba_port *uap =
 357                container_of(port, struct uart_amba_port, port);
 358
 359        /*
 360         * Free the interrupt
 361         */
 362        free_irq(uap->port.irq, uap);
 363
 364        /*
 365         * disable all interrupts, disable the port
 366         */
 367        writel(0, uap->port.membase + UART010_CR);
 368
 369        /* disable break condition and fifos */
 370        writel(readb(uap->port.membase + UART010_LCRH) &
 371                ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN),
 372               uap->port.membase + UART010_LCRH);
 373
 374        /*
 375         * Shut down the clock producer
 376         */
 377        clk_disable_unprepare(uap->clk);
 378}
 379
 380static void
 381pl010_set_termios(struct uart_port *port, struct ktermios *termios,
 382                     struct ktermios *old)
 383{
 384        struct uart_amba_port *uap =
 385                container_of(port, struct uart_amba_port, port);
 386        unsigned int lcr_h, old_cr;
 387        unsigned long flags;
 388        unsigned int baud, quot;
 389
 390        /*
 391         * Ask the core to calculate the divisor for us.
 392         */
 393        baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16); 
 394        quot = uart_get_divisor(port, baud);
 395
 396        switch (termios->c_cflag & CSIZE) {
 397        case CS5:
 398                lcr_h = UART01x_LCRH_WLEN_5;
 399                break;
 400        case CS6:
 401                lcr_h = UART01x_LCRH_WLEN_6;
 402                break;
 403        case CS7:
 404                lcr_h = UART01x_LCRH_WLEN_7;
 405                break;
 406        default: // CS8
 407                lcr_h = UART01x_LCRH_WLEN_8;
 408                break;
 409        }
 410        if (termios->c_cflag & CSTOPB)
 411                lcr_h |= UART01x_LCRH_STP2;
 412        if (termios->c_cflag & PARENB) {
 413                lcr_h |= UART01x_LCRH_PEN;
 414                if (!(termios->c_cflag & PARODD))
 415                        lcr_h |= UART01x_LCRH_EPS;
 416        }
 417        if (uap->port.fifosize > 1)
 418                lcr_h |= UART01x_LCRH_FEN;
 419
 420        spin_lock_irqsave(&uap->port.lock, flags);
 421
 422        /*
 423         * Update the per-port timeout.
 424         */
 425        uart_update_timeout(port, termios->c_cflag, baud);
 426
 427        uap->port.read_status_mask = UART01x_RSR_OE;
 428        if (termios->c_iflag & INPCK)
 429                uap->port.read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
 430        if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
 431                uap->port.read_status_mask |= UART01x_RSR_BE;
 432
 433        /*
 434         * Characters to ignore
 435         */
 436        uap->port.ignore_status_mask = 0;
 437        if (termios->c_iflag & IGNPAR)
 438                uap->port.ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
 439        if (termios->c_iflag & IGNBRK) {
 440                uap->port.ignore_status_mask |= UART01x_RSR_BE;
 441                /*
 442                 * If we're ignoring parity and break indicators,
 443                 * ignore overruns too (for real raw support).
 444                 */
 445                if (termios->c_iflag & IGNPAR)
 446                        uap->port.ignore_status_mask |= UART01x_RSR_OE;
 447        }
 448
 449        /*
 450         * Ignore all characters if CREAD is not set.
 451         */
 452        if ((termios->c_cflag & CREAD) == 0)
 453                uap->port.ignore_status_mask |= UART_DUMMY_RSR_RX;
 454
 455        /* first, disable everything */
 456        old_cr = readb(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
 457
 458        if (UART_ENABLE_MS(port, termios->c_cflag))
 459                old_cr |= UART010_CR_MSIE;
 460
 461        writel(0, uap->port.membase + UART010_CR);
 462
 463        /* Set baud rate */
 464        quot -= 1;
 465        writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
 466        writel(quot & 0xff, uap->port.membase + UART010_LCRL);
 467
 468        /*
 469         * ----------v----------v----------v----------v-----
 470         * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
 471         * ----------^----------^----------^----------^-----
 472         */
 473        writel(lcr_h, uap->port.membase + UART010_LCRH);
 474        writel(old_cr, uap->port.membase + UART010_CR);
 475
 476        spin_unlock_irqrestore(&uap->port.lock, flags);
 477}
 478
 479static void pl010_set_ldisc(struct uart_port *port, struct ktermios *termios)
 480{
 481        if (termios->c_line == N_PPS) {
 482                port->flags |= UPF_HARDPPS_CD;
 483                spin_lock_irq(&port->lock);
 484                pl010_enable_ms(port);
 485                spin_unlock_irq(&port->lock);
 486        } else {
 487                port->flags &= ~UPF_HARDPPS_CD;
 488                if (!UART_ENABLE_MS(port, termios->c_cflag)) {
 489                        spin_lock_irq(&port->lock);
 490                        pl010_disable_ms(port);
 491                        spin_unlock_irq(&port->lock);
 492                }
 493        }
 494}
 495
 496static const char *pl010_type(struct uart_port *port)
 497{
 498        return port->type == PORT_AMBA ? "AMBA" : NULL;
 499}
 500
 501/*
 502 * Release the memory region(s) being used by 'port'
 503 */
 504static void pl010_release_port(struct uart_port *port)
 505{
 506        release_mem_region(port->mapbase, UART_PORT_SIZE);
 507}
 508
 509/*
 510 * Request the memory region(s) being used by 'port'
 511 */
 512static int pl010_request_port(struct uart_port *port)
 513{
 514        return request_mem_region(port->mapbase, UART_PORT_SIZE, "uart-pl010")
 515                        != NULL ? 0 : -EBUSY;
 516}
 517
 518/*
 519 * Configure/autoconfigure the port.
 520 */
 521static void pl010_config_port(struct uart_port *port, int flags)
 522{
 523        if (flags & UART_CONFIG_TYPE) {
 524                port->type = PORT_AMBA;
 525                pl010_request_port(port);
 526        }
 527}
 528
 529/*
 530 * verify the new serial_struct (for TIOCSSERIAL).
 531 */
 532static int pl010_verify_port(struct uart_port *port, struct serial_struct *ser)
 533{
 534        int ret = 0;
 535        if (ser->type != PORT_UNKNOWN && ser->type != PORT_AMBA)
 536                ret = -EINVAL;
 537        if (ser->irq < 0 || ser->irq >= nr_irqs)
 538                ret = -EINVAL;
 539        if (ser->baud_base < 9600)
 540                ret = -EINVAL;
 541        return ret;
 542}
 543
 544static const struct uart_ops amba_pl010_pops = {
 545        .tx_empty       = pl010_tx_empty,
 546        .set_mctrl      = pl010_set_mctrl,
 547        .get_mctrl      = pl010_get_mctrl,
 548        .stop_tx        = pl010_stop_tx,
 549        .start_tx       = pl010_start_tx,
 550        .stop_rx        = pl010_stop_rx,
 551        .enable_ms      = pl010_enable_ms,
 552        .break_ctl      = pl010_break_ctl,
 553        .startup        = pl010_startup,
 554        .shutdown       = pl010_shutdown,
 555        .set_termios    = pl010_set_termios,
 556        .set_ldisc      = pl010_set_ldisc,
 557        .type           = pl010_type,
 558        .release_port   = pl010_release_port,
 559        .request_port   = pl010_request_port,
 560        .config_port    = pl010_config_port,
 561        .verify_port    = pl010_verify_port,
 562};
 563
 564static struct uart_amba_port *amba_ports[UART_NR];
 565
 566#ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
 567
 568static void pl010_console_putchar(struct uart_port *port, int ch)
 569{
 570        struct uart_amba_port *uap =
 571                container_of(port, struct uart_amba_port, port);
 572        unsigned int status;
 573
 574        do {
 575                status = readb(uap->port.membase + UART01x_FR);
 576                barrier();
 577        } while (!UART_TX_READY(status));
 578        writel(ch, uap->port.membase + UART01x_DR);
 579}
 580
 581static void
 582pl010_console_write(struct console *co, const char *s, unsigned int count)
 583{
 584        struct uart_amba_port *uap = amba_ports[co->index];
 585        unsigned int status, old_cr;
 586
 587        clk_enable(uap->clk);
 588
 589        /*
 590         *      First save the CR then disable the interrupts
 591         */
 592        old_cr = readb(uap->port.membase + UART010_CR);
 593        writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
 594
 595        uart_console_write(&uap->port, s, count, pl010_console_putchar);
 596
 597        /*
 598         *      Finally, wait for transmitter to become empty
 599         *      and restore the TCR
 600         */
 601        do {
 602                status = readb(uap->port.membase + UART01x_FR);
 603                barrier();
 604        } while (status & UART01x_FR_BUSY);
 605        writel(old_cr, uap->port.membase + UART010_CR);
 606
 607        clk_disable(uap->clk);
 608}
 609
 610static void __init
 611pl010_console_get_options(struct uart_amba_port *uap, int *baud,
 612                             int *parity, int *bits)
 613{
 614        if (readb(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
 615                unsigned int lcr_h, quot;
 616                lcr_h = readb(uap->port.membase + UART010_LCRH);
 617
 618                *parity = 'n';
 619                if (lcr_h & UART01x_LCRH_PEN) {
 620                        if (lcr_h & UART01x_LCRH_EPS)
 621                                *parity = 'e';
 622                        else
 623                                *parity = 'o';
 624                }
 625
 626                if ((lcr_h & 0x60) == UART01x_LCRH_WLEN_7)
 627                        *bits = 7;
 628                else
 629                        *bits = 8;
 630
 631                quot = readb(uap->port.membase + UART010_LCRL) |
 632                       readb(uap->port.membase + UART010_LCRM) << 8;
 633                *baud = uap->port.uartclk / (16 * (quot + 1));
 634        }
 635}
 636
 637static int __init pl010_console_setup(struct console *co, char *options)
 638{
 639        struct uart_amba_port *uap;
 640        int baud = 38400;
 641        int bits = 8;
 642        int parity = 'n';
 643        int flow = 'n';
 644        int ret;
 645
 646        /*
 647         * Check whether an invalid uart number has been specified, and
 648         * if so, search for the first available port that does have
 649         * console support.
 650         */
 651        if (co->index >= UART_NR)
 652                co->index = 0;
 653        uap = amba_ports[co->index];
 654        if (!uap)
 655                return -ENODEV;
 656
 657        ret = clk_prepare(uap->clk);
 658        if (ret)
 659                return ret;
 660
 661        uap->port.uartclk = clk_get_rate(uap->clk);
 662
 663        if (options)
 664                uart_parse_options(options, &baud, &parity, &bits, &flow);
 665        else
 666                pl010_console_get_options(uap, &baud, &parity, &bits);
 667
 668        return uart_set_options(&uap->port, co, baud, parity, bits, flow);
 669}
 670
 671static struct uart_driver amba_reg;
 672static struct console amba_console = {
 673        .name           = "ttyAM",
 674        .write          = pl010_console_write,
 675        .device         = uart_console_device,
 676        .setup          = pl010_console_setup,
 677        .flags          = CON_PRINTBUFFER,
 678        .index          = -1,
 679        .data           = &amba_reg,
 680};
 681
 682#define AMBA_CONSOLE    &amba_console
 683#else
 684#define AMBA_CONSOLE    NULL
 685#endif
 686
 687static DEFINE_MUTEX(amba_reg_lock);
 688static struct uart_driver amba_reg = {
 689        .owner                  = THIS_MODULE,
 690        .driver_name            = "ttyAM",
 691        .dev_name               = "ttyAM",
 692        .major                  = SERIAL_AMBA_MAJOR,
 693        .minor                  = SERIAL_AMBA_MINOR,
 694        .nr                     = UART_NR,
 695        .cons                   = AMBA_CONSOLE,
 696};
 697
 698static int pl010_probe(struct amba_device *dev, const struct amba_id *id)
 699{
 700        struct uart_amba_port *uap;
 701        void __iomem *base;
 702        int i, ret;
 703
 704        for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
 705                if (amba_ports[i] == NULL)
 706                        break;
 707
 708        if (i == ARRAY_SIZE(amba_ports))
 709                return -EBUSY;
 710
 711        uap = devm_kzalloc(&dev->dev, sizeof(struct uart_amba_port),
 712                           GFP_KERNEL);
 713        if (!uap)
 714                return -ENOMEM;
 715
 716        base = devm_ioremap(&dev->dev, dev->res.start,
 717                            resource_size(&dev->res));
 718        if (!base)
 719                return -ENOMEM;
 720
 721        uap->clk = devm_clk_get(&dev->dev, NULL);
 722        if (IS_ERR(uap->clk))
 723                return PTR_ERR(uap->clk);
 724
 725        uap->port.dev = &dev->dev;
 726        uap->port.mapbase = dev->res.start;
 727        uap->port.membase = base;
 728        uap->port.iotype = UPIO_MEM;
 729        uap->port.irq = dev->irq[0];
 730        uap->port.fifosize = 16;
 731        uap->port.ops = &amba_pl010_pops;
 732        uap->port.flags = UPF_BOOT_AUTOCONF;
 733        uap->port.line = i;
 734        uap->dev = dev;
 735        uap->data = dev_get_platdata(&dev->dev);
 736
 737        amba_ports[i] = uap;
 738
 739        amba_set_drvdata(dev, uap);
 740
 741        mutex_lock(&amba_reg_lock);
 742        if (!amba_reg.state) {
 743                ret = uart_register_driver(&amba_reg);
 744                if (ret < 0) {
 745                        mutex_unlock(&amba_reg_lock);
 746                        dev_err(uap->port.dev,
 747                                "Failed to register AMBA-PL010 driver\n");
 748                        return ret;
 749                }
 750        }
 751        mutex_unlock(&amba_reg_lock);
 752
 753        ret = uart_add_one_port(&amba_reg, &uap->port);
 754        if (ret)
 755                amba_ports[i] = NULL;
 756
 757        return ret;
 758}
 759
 760static int pl010_remove(struct amba_device *dev)
 761{
 762        struct uart_amba_port *uap = amba_get_drvdata(dev);
 763        int i;
 764        bool busy = false;
 765
 766        uart_remove_one_port(&amba_reg, &uap->port);
 767
 768        for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
 769                if (amba_ports[i] == uap)
 770                        amba_ports[i] = NULL;
 771                else if (amba_ports[i])
 772                        busy = true;
 773
 774        if (!busy)
 775                uart_unregister_driver(&amba_reg);
 776
 777        return 0;
 778}
 779
 780#ifdef CONFIG_PM_SLEEP
 781static int pl010_suspend(struct device *dev)
 782{
 783        struct uart_amba_port *uap = dev_get_drvdata(dev);
 784
 785        if (uap)
 786                uart_suspend_port(&amba_reg, &uap->port);
 787
 788        return 0;
 789}
 790
 791static int pl010_resume(struct device *dev)
 792{
 793        struct uart_amba_port *uap = dev_get_drvdata(dev);
 794
 795        if (uap)
 796                uart_resume_port(&amba_reg, &uap->port);
 797
 798        return 0;
 799}
 800#endif
 801
 802static SIMPLE_DEV_PM_OPS(pl010_dev_pm_ops, pl010_suspend, pl010_resume);
 803
 804static const struct amba_id pl010_ids[] = {
 805        {
 806                .id     = 0x00041010,
 807                .mask   = 0x000fffff,
 808        },
 809        { 0, 0 },
 810};
 811
 812MODULE_DEVICE_TABLE(amba, pl010_ids);
 813
 814static struct amba_driver pl010_driver = {
 815        .drv = {
 816                .name   = "uart-pl010",
 817                .pm     = &pl010_dev_pm_ops,
 818        },
 819        .id_table       = pl010_ids,
 820        .probe          = pl010_probe,
 821        .remove         = pl010_remove,
 822};
 823
 824static int __init pl010_init(void)
 825{
 826        printk(KERN_INFO "Serial: AMBA driver\n");
 827
 828        return  amba_driver_register(&pl010_driver);
 829}
 830
 831static void __exit pl010_exit(void)
 832{
 833        amba_driver_unregister(&pl010_driver);
 834}
 835
 836module_init(pl010_init);
 837module_exit(pl010_exit);
 838
 839MODULE_AUTHOR("ARM Ltd/Deep Blue Solutions Ltd");
 840MODULE_DESCRIPTION("ARM AMBA serial port driver");
 841MODULE_LICENSE("GPL");
 842