LXR linux/include/uapi/linux/serial.h

   1/* SPDX-License-Identifier: GPL-1.0+ WITH Linux-syscall-note */
   2/*
   3 * include/linux/serial.h
   4 *
   5 * Copyright (C) 1992 by Theodore Ts'o.
   6 * 
   7 * Redistribution of this file is permitted under the terms of the GNU 
   8 * Public License (GPL)
   9 */
  10
  11#ifndef _UAPI_LINUX_SERIAL_H
  12#define _UAPI_LINUX_SERIAL_H
  13
  14#include <linux/types.h>
  15
  16#include <linux/tty_flags.h>
  17
  18
  19struct serial_struct {
  20        int     type;
  21        int     line;
  22        unsigned int    port;
  23        int     irq;
  24        int     flags;
  25        int     xmit_fifo_size;
  26        int     custom_divisor;
  27        int     baud_base;
  28        unsigned short  close_delay;
  29        char    io_type;
  30        char    reserved_char[1];
  31        int     hub6;
  32        unsigned short  closing_wait; /* time to wait before closing */
  33        unsigned short  closing_wait2; /* no longer used... */
  34        unsigned char   *iomem_base;
  35        unsigned short  iomem_reg_shift;
  36        unsigned int    port_high;
  37        unsigned long   iomap_base;     /* cookie passed into ioremap */
  38};
  39
  40/*
  41 * For the close wait times, 0 means wait forever for serial port to
  42 * flush its output.  65535 means don't wait at all.
  43 */
  44#define ASYNC_CLOSING_WAIT_INF  0
  45#define ASYNC_CLOSING_WAIT_NONE 65535
  46
  47/*
  48 * These are the supported serial types.
  49 */
  50#define PORT_UNKNOWN    0
  51#define PORT_8250       1
  52#define PORT_16450      2
  53#define PORT_16550      3
  54#define PORT_16550A     4
  55#define PORT_CIRRUS     5       /* usurped by cyclades.c */
  56#define PORT_16650      6
  57#define PORT_16650V2    7
  58#define PORT_16750      8
  59#define PORT_STARTECH   9       /* usurped by cyclades.c */
  60#define PORT_16C950     10      /* Oxford Semiconductor */
  61#define PORT_16654      11
  62#define PORT_16850      12
  63#define PORT_RSA        13      /* RSA-DV II/S card */
  64#define PORT_MAX        13
  65
  66#define SERIAL_IO_PORT  0
  67#define SERIAL_IO_HUB6  1
  68#define SERIAL_IO_MEM   2
  69#define SERIAL_IO_MEM32   3
  70#define SERIAL_IO_AU      4
  71#define SERIAL_IO_TSI     5
  72#define SERIAL_IO_MEM32BE 6
  73#define SERIAL_IO_MEM16 7
  74
  75#define UART_CLEAR_FIFO         0x01
  76#define UART_USE_FIFO           0x02
  77#define UART_STARTECH           0x04
  78#define UART_NATSEMI            0x08
  79
  80
  81/*
  82 * Multiport serial configuration structure --- external structure
  83 */
  84struct serial_multiport_struct {
  85        int             irq;
  86        int             port1;
  87        unsigned char   mask1, match1;
  88        int             port2;
  89        unsigned char   mask2, match2;
  90        int             port3;
  91        unsigned char   mask3, match3;
  92        int             port4;
  93        unsigned char   mask4, match4;
  94        int             port_monitor;
  95        int     reserved[32];
  96};
  97
  98/*
  99 * Serial input interrupt line counters -- external structure
 100 * Four lines can interrupt: CTS, DSR, RI, DCD
 101 */
 102struct serial_icounter_struct {
 103        int cts, dsr, rng, dcd;
 104        int rx, tx;
 105        int frame, overrun, parity, brk;
 106        int buf_overrun;
 107        int reserved[9];
 108};
 109
 110/*
 111 * Serial interface for controlling RS485 settings on chips with suitable
 112 * support. Set with TIOCSRS485 and get with TIOCGRS485 if supported by your
 113 * platform. The set function returns the new state, with any unsupported bits
 114 * reverted appropriately.
 115 */
 116
 117struct serial_rs485 {
 118        __u32   flags;                  /* RS485 feature flags */
 119#define SER_RS485_ENABLED               (1 << 0)        /* If enabled */
 120#define SER_RS485_RTS_ON_SEND           (1 << 1)        /* Logical level for
 121                                                           RTS pin when
 122                                                           sending */
 123#define SER_RS485_RTS_AFTER_SEND        (1 << 2)        /* Logical level for
 124                                                           RTS pin after sent*/
 125#define SER_RS485_RX_DURING_TX          (1 << 4)
 126#define SER_RS485_TERMINATE_BUS         (1 << 5)        /* Enable bus
 127                                                           termination
 128                                                           (if supported) */
 129        __u32   delay_rts_before_send;  /* Delay before send (milliseconds) */
 130        __u32   delay_rts_after_send;   /* Delay after send (milliseconds) */
 131        __u32   padding[5];             /* Memory is cheap, new structs
 132                                           are a royal PITA .. */
 133};
 134
 135#endif /* _UAPI_LINUX_SERIAL_H */
 136