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11#include <linux/module.h>
12#include <linux/percpu.h>
13#include <asm/sn/simulator.h>
14#include <asm/uv/uv_mmrs.h>
15#include <asm/uv/uv_hub.h>
16
17DEFINE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
18EXPORT_PER_CPU_SYMBOL_GPL(__uv_hub_info);
19
20#ifdef CONFIG_IA64_SGI_UV
21int sn_prom_type;
22long sn_coherency_id;
23EXPORT_SYMBOL_GPL(sn_coherency_id);
24#endif
25
26struct redir_addr {
27 unsigned long redirect;
28 unsigned long alias;
29};
30
31#define DEST_SHIFT UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR_DEST_BASE_SHFT
32
33static __initdata struct redir_addr redir_addrs[] = {
34 {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR, UVH_SI_ALIAS0_OVERLAY_CONFIG},
35 {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_1_MMR, UVH_SI_ALIAS1_OVERLAY_CONFIG},
36 {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_2_MMR, UVH_SI_ALIAS2_OVERLAY_CONFIG},
37};
38
39static __init void get_lowmem_redirect(unsigned long *base, unsigned long *size)
40{
41 union uvh_si_alias0_overlay_config_u alias;
42 union uvh_rh_gam_alias210_redirect_config_2_mmr_u redirect;
43 int i;
44
45 for (i = 0; i < ARRAY_SIZE(redir_addrs); i++) {
46 alias.v = uv_read_local_mmr(redir_addrs[i].alias);
47 if (alias.s.base == 0) {
48 *size = (1UL << alias.s.m_alias);
49 redirect.v = uv_read_local_mmr(redir_addrs[i].redirect);
50 *base = (unsigned long)redirect.s.dest_base << DEST_SHIFT;
51 return;
52 }
53 }
54 BUG();
55}
56
57void __init uv_setup(char **cmdline_p)
58{
59 union uvh_si_addr_map_config_u m_n_config;
60 union uvh_node_id_u node_id;
61 unsigned long gnode_upper;
62 int nid, cpu, m_val, n_val;
63 unsigned long mmr_base, lowmem_redir_base, lowmem_redir_size;
64
65 if (IS_MEDUSA()) {
66 lowmem_redir_base = 0;
67 lowmem_redir_size = 0;
68 node_id.v = 0;
69 m_n_config.s.m_skt = 37;
70 m_n_config.s.n_skt = 0;
71 mmr_base = 0;
72#if 0
73
74 if (!ia64_sn_is_fake_prom())
75 sn_prom_type = 1;
76 else
77#endif
78 sn_prom_type = 2;
79 printk(KERN_INFO "Running on medusa with %s PROM\n",
80 (sn_prom_type == 1) ? "real" : "fake");
81 } else {
82 get_lowmem_redirect(&lowmem_redir_base, &lowmem_redir_size);
83 node_id.v = uv_read_local_mmr(UVH_NODE_ID);
84 m_n_config.v = uv_read_local_mmr(UVH_SI_ADDR_MAP_CONFIG);
85 mmr_base =
86 uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR) &
87 ~UV_MMR_ENABLE;
88 }
89
90 m_val = m_n_config.s.m_skt;
91 n_val = m_n_config.s.n_skt;
92 printk(KERN_DEBUG "UV: global MMR base 0x%lx\n", mmr_base);
93
94 gnode_upper = (((unsigned long)node_id.s.node_id) &
95 ~((1 << n_val) - 1)) << m_val;
96
97 for_each_present_cpu(cpu) {
98 nid = cpu_to_node(cpu);
99 uv_cpu_hub_info(cpu)->lowmem_remap_base = lowmem_redir_base;
100 uv_cpu_hub_info(cpu)->lowmem_remap_top =
101 lowmem_redir_base + lowmem_redir_size;
102 uv_cpu_hub_info(cpu)->m_val = m_val;
103 uv_cpu_hub_info(cpu)->n_val = n_val;
104 uv_cpu_hub_info(cpu)->pnode_mask = (1 << n_val) -1;
105 uv_cpu_hub_info(cpu)->gpa_mask = (1 << (m_val + n_val)) - 1;
106 uv_cpu_hub_info(cpu)->gnode_upper = gnode_upper;
107 uv_cpu_hub_info(cpu)->global_mmr_base = mmr_base;
108 uv_cpu_hub_info(cpu)->coherency_domain_number = 0;
109 printk(KERN_DEBUG "UV cpu %d, nid %d\n", cpu, nid);
110 }
111}
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