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17#include <linux/kvm_host.h>
18#include <linux/err.h>
19#include <linux/export.h>
20#include <linux/slab.h>
21#include <linux/module.h>
22#include <linux/miscdevice.h>
23#include <linux/gfp.h>
24#include <linux/sched.h>
25#include <linux/vmalloc.h>
26#include <linux/highmem.h>
27
28#include <asm/reg.h>
29#include <asm/cputable.h>
30#include <asm/cacheflush.h>
31#include <asm/tlbflush.h>
32#include <linux/uaccess.h>
33#include <asm/io.h>
34#include <asm/kvm_ppc.h>
35#include <asm/kvm_book3s.h>
36#include <asm/mmu_context.h>
37#include <asm/page.h>
38#include <asm/xive.h>
39
40#include "book3s.h"
41#include "trace.h"
42
43
44
45struct kvm_stats_debugfs_item debugfs_entries[] = {
46 VCPU_STAT("exits", sum_exits),
47 VCPU_STAT("mmio", mmio_exits),
48 VCPU_STAT("sig", signal_exits),
49 VCPU_STAT("sysc", syscall_exits),
50 VCPU_STAT("inst_emu", emulated_inst_exits),
51 VCPU_STAT("dec", dec_exits),
52 VCPU_STAT("ext_intr", ext_intr_exits),
53 VCPU_STAT("queue_intr", queue_intr),
54 VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns),
55 VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns),
56 VCPU_STAT("halt_wait_ns", halt_wait_ns),
57 VCPU_STAT("halt_successful_poll", halt_successful_poll),
58 VCPU_STAT("halt_attempted_poll", halt_attempted_poll),
59 VCPU_STAT("halt_successful_wait", halt_successful_wait),
60 VCPU_STAT("halt_poll_invalid", halt_poll_invalid),
61 VCPU_STAT("halt_wakeup", halt_wakeup),
62 VCPU_STAT("pf_storage", pf_storage),
63 VCPU_STAT("sp_storage", sp_storage),
64 VCPU_STAT("pf_instruc", pf_instruc),
65 VCPU_STAT("sp_instruc", sp_instruc),
66 VCPU_STAT("ld", ld),
67 VCPU_STAT("ld_slow", ld_slow),
68 VCPU_STAT("st", st),
69 VCPU_STAT("st_slow", st_slow),
70 VCPU_STAT("pthru_all", pthru_all),
71 VCPU_STAT("pthru_host", pthru_host),
72 VCPU_STAT("pthru_bad_aff", pthru_bad_aff),
73 VM_STAT("largepages_2M", num_2M_pages, .mode = 0444),
74 VM_STAT("largepages_1G", num_1G_pages, .mode = 0444),
75 { NULL }
76};
77
78static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
79 unsigned long pending_now, unsigned long old_pending)
80{
81 if (is_kvmppc_hv_enabled(vcpu->kvm))
82 return;
83 if (pending_now)
84 kvmppc_set_int_pending(vcpu, 1);
85 else if (old_pending)
86 kvmppc_set_int_pending(vcpu, 0);
87}
88
89static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
90{
91 ulong crit_raw;
92 ulong crit_r1;
93 bool crit;
94
95 if (is_kvmppc_hv_enabled(vcpu->kvm))
96 return false;
97
98 crit_raw = kvmppc_get_critical(vcpu);
99 crit_r1 = kvmppc_get_gpr(vcpu, 1);
100
101
102 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) {
103 crit_raw &= 0xffffffff;
104 crit_r1 &= 0xffffffff;
105 }
106
107
108 crit = (crit_raw == crit_r1);
109
110 crit = crit && !(kvmppc_get_msr(vcpu) & MSR_PR);
111
112 return crit;
113}
114
115void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags)
116{
117 vcpu->kvm->arch.kvm_ops->inject_interrupt(vcpu, vec, flags);
118}
119
120static int kvmppc_book3s_vec2irqprio(unsigned int vec)
121{
122 unsigned int prio;
123
124 switch (vec) {
125 case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET; break;
126 case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK; break;
127 case 0x300: prio = BOOK3S_IRQPRIO_DATA_STORAGE; break;
128 case 0x380: prio = BOOK3S_IRQPRIO_DATA_SEGMENT; break;
129 case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE; break;
130 case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT; break;
131 case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL; break;
132 case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT; break;
133 case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM; break;
134 case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL; break;
135 case 0x900: prio = BOOK3S_IRQPRIO_DECREMENTER; break;
136 case 0xc00: prio = BOOK3S_IRQPRIO_SYSCALL; break;
137 case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG; break;
138 case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC; break;
139 case 0xf40: prio = BOOK3S_IRQPRIO_VSX; break;
140 case 0xf60: prio = BOOK3S_IRQPRIO_FAC_UNAVAIL; break;
141 default: prio = BOOK3S_IRQPRIO_MAX; break;
142 }
143
144 return prio;
145}
146
147void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu,
148 unsigned int vec)
149{
150 unsigned long old_pending = vcpu->arch.pending_exceptions;
151
152 clear_bit(kvmppc_book3s_vec2irqprio(vec),
153 &vcpu->arch.pending_exceptions);
154
155 kvmppc_update_int_pending(vcpu, vcpu->arch.pending_exceptions,
156 old_pending);
157}
158
159void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec)
160{
161 vcpu->stat.queue_intr++;
162
163 set_bit(kvmppc_book3s_vec2irqprio(vec),
164 &vcpu->arch.pending_exceptions);
165#ifdef EXIT_DEBUG
166 printk(KERN_INFO "Queueing interrupt %x\n", vec);
167#endif
168}
169EXPORT_SYMBOL_GPL(kvmppc_book3s_queue_irqprio);
170
171void kvmppc_core_queue_machine_check(struct kvm_vcpu *vcpu, ulong flags)
172{
173
174 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_MACHINE_CHECK, flags);
175}
176EXPORT_SYMBOL_GPL(kvmppc_core_queue_machine_check);
177
178void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags)
179{
180
181 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, flags);
182}
183EXPORT_SYMBOL_GPL(kvmppc_core_queue_program);
184
185void kvmppc_core_queue_fpunavail(struct kvm_vcpu *vcpu)
186{
187
188 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, 0);
189}
190
191void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu)
192{
193
194 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_ALTIVEC, 0);
195}
196
197void kvmppc_core_queue_vsx_unavail(struct kvm_vcpu *vcpu)
198{
199
200 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_VSX, 0);
201}
202
203void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
204{
205 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
206}
207EXPORT_SYMBOL_GPL(kvmppc_core_queue_dec);
208
209int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
210{
211 return test_bit(BOOK3S_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
212}
213EXPORT_SYMBOL_GPL(kvmppc_core_pending_dec);
214
215void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
216{
217 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
218}
219EXPORT_SYMBOL_GPL(kvmppc_core_dequeue_dec);
220
221void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
222 struct kvm_interrupt *irq)
223{
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243
244 if (irq->irq == KVM_INTERRUPT_SET)
245 vcpu->arch.external_oneshot = 1;
246
247 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
248}
249
250void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
251{
252 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
253}
254
255void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, ulong dar,
256 ulong flags)
257{
258 kvmppc_set_dar(vcpu, dar);
259 kvmppc_set_dsisr(vcpu, flags);
260 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE, 0);
261}
262EXPORT_SYMBOL_GPL(kvmppc_core_queue_data_storage);
263
264void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong flags)
265{
266 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_INST_STORAGE, flags);
267}
268EXPORT_SYMBOL_GPL(kvmppc_core_queue_inst_storage);
269
270static int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu,
271 unsigned int priority)
272{
273 int deliver = 1;
274 int vec = 0;
275 bool crit = kvmppc_critical_section(vcpu);
276
277 switch (priority) {
278 case BOOK3S_IRQPRIO_DECREMENTER:
279 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
280 vec = BOOK3S_INTERRUPT_DECREMENTER;
281 break;
282 case BOOK3S_IRQPRIO_EXTERNAL:
283 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
284 vec = BOOK3S_INTERRUPT_EXTERNAL;
285 break;
286 case BOOK3S_IRQPRIO_SYSTEM_RESET:
287 vec = BOOK3S_INTERRUPT_SYSTEM_RESET;
288 break;
289 case BOOK3S_IRQPRIO_MACHINE_CHECK:
290 vec = BOOK3S_INTERRUPT_MACHINE_CHECK;
291 break;
292 case BOOK3S_IRQPRIO_DATA_STORAGE:
293 vec = BOOK3S_INTERRUPT_DATA_STORAGE;
294 break;
295 case BOOK3S_IRQPRIO_INST_STORAGE:
296 vec = BOOK3S_INTERRUPT_INST_STORAGE;
297 break;
298 case BOOK3S_IRQPRIO_DATA_SEGMENT:
299 vec = BOOK3S_INTERRUPT_DATA_SEGMENT;
300 break;
301 case BOOK3S_IRQPRIO_INST_SEGMENT:
302 vec = BOOK3S_INTERRUPT_INST_SEGMENT;
303 break;
304 case BOOK3S_IRQPRIO_ALIGNMENT:
305 vec = BOOK3S_INTERRUPT_ALIGNMENT;
306 break;
307 case BOOK3S_IRQPRIO_PROGRAM:
308 vec = BOOK3S_INTERRUPT_PROGRAM;
309 break;
310 case BOOK3S_IRQPRIO_VSX:
311 vec = BOOK3S_INTERRUPT_VSX;
312 break;
313 case BOOK3S_IRQPRIO_ALTIVEC:
314 vec = BOOK3S_INTERRUPT_ALTIVEC;
315 break;
316 case BOOK3S_IRQPRIO_FP_UNAVAIL:
317 vec = BOOK3S_INTERRUPT_FP_UNAVAIL;
318 break;
319 case BOOK3S_IRQPRIO_SYSCALL:
320 vec = BOOK3S_INTERRUPT_SYSCALL;
321 break;
322 case BOOK3S_IRQPRIO_DEBUG:
323 vec = BOOK3S_INTERRUPT_TRACE;
324 break;
325 case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR:
326 vec = BOOK3S_INTERRUPT_PERFMON;
327 break;
328 case BOOK3S_IRQPRIO_FAC_UNAVAIL:
329 vec = BOOK3S_INTERRUPT_FAC_UNAVAIL;
330 break;
331 default:
332 deliver = 0;
333 printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority);
334 break;
335 }
336
337#if 0
338 printk(KERN_INFO "Deliver interrupt 0x%x? %x\n", vec, deliver);
339#endif
340
341 if (deliver)
342 kvmppc_inject_interrupt(vcpu, vec, 0);
343
344 return deliver;
345}
346
347
348
349
350static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority)
351{
352 switch (priority) {
353 case BOOK3S_IRQPRIO_DECREMENTER:
354
355 return false;
356 case BOOK3S_IRQPRIO_EXTERNAL:
357
358
359
360
361
362 if (vcpu->arch.external_oneshot) {
363 vcpu->arch.external_oneshot = 0;
364 return true;
365 }
366 return false;
367 }
368
369 return true;
370}
371
372int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
373{
374 unsigned long *pending = &vcpu->arch.pending_exceptions;
375 unsigned long old_pending = vcpu->arch.pending_exceptions;
376 unsigned int priority;
377
378#ifdef EXIT_DEBUG
379 if (vcpu->arch.pending_exceptions)
380 printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions);
381#endif
382 priority = __ffs(*pending);
383 while (priority < BOOK3S_IRQPRIO_MAX) {
384 if (kvmppc_book3s_irqprio_deliver(vcpu, priority) &&
385 clear_irqprio(vcpu, priority)) {
386 clear_bit(priority, &vcpu->arch.pending_exceptions);
387 break;
388 }
389
390 priority = find_next_bit(pending,
391 BITS_PER_BYTE * sizeof(*pending),
392 priority + 1);
393 }
394
395
396 kvmppc_update_int_pending(vcpu, *pending, old_pending);
397
398 return 0;
399}
400EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter);
401
402kvm_pfn_t kvmppc_gpa_to_pfn(struct kvm_vcpu *vcpu, gpa_t gpa, bool writing,
403 bool *writable)
404{
405 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM;
406 gfn_t gfn = gpa >> PAGE_SHIFT;
407
408 if (!(kvmppc_get_msr(vcpu) & MSR_SF))
409 mp_pa = (uint32_t)mp_pa;
410
411
412 gpa &= ~0xFFFULL;
413 if (unlikely(mp_pa) && unlikely((gpa & KVM_PAM) == mp_pa)) {
414 ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK;
415 kvm_pfn_t pfn;
416
417 pfn = (kvm_pfn_t)virt_to_phys((void*)shared_page) >> PAGE_SHIFT;
418 get_page(pfn_to_page(pfn));
419 if (writable)
420 *writable = true;
421 return pfn;
422 }
423
424 return gfn_to_pfn_prot(vcpu->kvm, gfn, writing, writable);
425}
426EXPORT_SYMBOL_GPL(kvmppc_gpa_to_pfn);
427
428int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid,
429 enum xlate_readwrite xlrw, struct kvmppc_pte *pte)
430{
431 bool data = (xlid == XLATE_DATA);
432 bool iswrite = (xlrw == XLATE_WRITE);
433 int relocated = (kvmppc_get_msr(vcpu) & (data ? MSR_DR : MSR_IR));
434 int r;
435
436 if (relocated) {
437 r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data, iswrite);
438 } else {
439 pte->eaddr = eaddr;
440 pte->raddr = eaddr & KVM_PAM;
441 pte->vpage = VSID_REAL | eaddr >> 12;
442 pte->may_read = true;
443 pte->may_write = true;
444 pte->may_execute = true;
445 r = 0;
446
447 if ((kvmppc_get_msr(vcpu) & (MSR_IR | MSR_DR)) == MSR_DR &&
448 !data) {
449 if ((vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) &&
450 ((eaddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS))
451 pte->raddr &= ~SPLIT_HACK_MASK;
452 }
453 }
454
455 return r;
456}
457
458int kvmppc_load_last_inst(struct kvm_vcpu *vcpu,
459 enum instruction_fetch_type type, u32 *inst)
460{
461 ulong pc = kvmppc_get_pc(vcpu);
462 int r;
463
464 if (type == INST_SC)
465 pc -= 4;
466
467 r = kvmppc_ld(vcpu, &pc, sizeof(u32), inst, false);
468 if (r == EMULATE_DONE)
469 return r;
470 else
471 return EMULATE_AGAIN;
472}
473EXPORT_SYMBOL_GPL(kvmppc_load_last_inst);
474
475int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
476{
477 return 0;
478}
479
480void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
481{
482}
483
484int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
485 struct kvm_sregs *sregs)
486{
487 int ret;
488
489 vcpu_load(vcpu);
490 ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
491 vcpu_put(vcpu);
492
493 return ret;
494}
495
496int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
497 struct kvm_sregs *sregs)
498{
499 int ret;
500
501 vcpu_load(vcpu);
502 ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
503 vcpu_put(vcpu);
504
505 return ret;
506}
507
508int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
509{
510 int i;
511
512 regs->pc = kvmppc_get_pc(vcpu);
513 regs->cr = kvmppc_get_cr(vcpu);
514 regs->ctr = kvmppc_get_ctr(vcpu);
515 regs->lr = kvmppc_get_lr(vcpu);
516 regs->xer = kvmppc_get_xer(vcpu);
517 regs->msr = kvmppc_get_msr(vcpu);
518 regs->srr0 = kvmppc_get_srr0(vcpu);
519 regs->srr1 = kvmppc_get_srr1(vcpu);
520 regs->pid = vcpu->arch.pid;
521 regs->sprg0 = kvmppc_get_sprg0(vcpu);
522 regs->sprg1 = kvmppc_get_sprg1(vcpu);
523 regs->sprg2 = kvmppc_get_sprg2(vcpu);
524 regs->sprg3 = kvmppc_get_sprg3(vcpu);
525 regs->sprg4 = kvmppc_get_sprg4(vcpu);
526 regs->sprg5 = kvmppc_get_sprg5(vcpu);
527 regs->sprg6 = kvmppc_get_sprg6(vcpu);
528 regs->sprg7 = kvmppc_get_sprg7(vcpu);
529
530 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
531 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
532
533 return 0;
534}
535
536int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
537{
538 int i;
539
540 kvmppc_set_pc(vcpu, regs->pc);
541 kvmppc_set_cr(vcpu, regs->cr);
542 kvmppc_set_ctr(vcpu, regs->ctr);
543 kvmppc_set_lr(vcpu, regs->lr);
544 kvmppc_set_xer(vcpu, regs->xer);
545 kvmppc_set_msr(vcpu, regs->msr);
546 kvmppc_set_srr0(vcpu, regs->srr0);
547 kvmppc_set_srr1(vcpu, regs->srr1);
548 kvmppc_set_sprg0(vcpu, regs->sprg0);
549 kvmppc_set_sprg1(vcpu, regs->sprg1);
550 kvmppc_set_sprg2(vcpu, regs->sprg2);
551 kvmppc_set_sprg3(vcpu, regs->sprg3);
552 kvmppc_set_sprg4(vcpu, regs->sprg4);
553 kvmppc_set_sprg5(vcpu, regs->sprg5);
554 kvmppc_set_sprg6(vcpu, regs->sprg6);
555 kvmppc_set_sprg7(vcpu, regs->sprg7);
556
557 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
558 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
559
560 return 0;
561}
562
563int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
564{
565 return -EOPNOTSUPP;
566}
567
568int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
569{
570 return -EOPNOTSUPP;
571}
572
573int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id,
574 union kvmppc_one_reg *val)
575{
576 int r = 0;
577 long int i;
578
579 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val);
580 if (r == -EINVAL) {
581 r = 0;
582 switch (id) {
583 case KVM_REG_PPC_DAR:
584 *val = get_reg_val(id, kvmppc_get_dar(vcpu));
585 break;
586 case KVM_REG_PPC_DSISR:
587 *val = get_reg_val(id, kvmppc_get_dsisr(vcpu));
588 break;
589 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
590 i = id - KVM_REG_PPC_FPR0;
591 *val = get_reg_val(id, VCPU_FPR(vcpu, i));
592 break;
593 case KVM_REG_PPC_FPSCR:
594 *val = get_reg_val(id, vcpu->arch.fp.fpscr);
595 break;
596#ifdef CONFIG_VSX
597 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
598 if (cpu_has_feature(CPU_FTR_VSX)) {
599 i = id - KVM_REG_PPC_VSR0;
600 val->vsxval[0] = vcpu->arch.fp.fpr[i][0];
601 val->vsxval[1] = vcpu->arch.fp.fpr[i][1];
602 } else {
603 r = -ENXIO;
604 }
605 break;
606#endif
607 case KVM_REG_PPC_DEBUG_INST:
608 *val = get_reg_val(id, INS_TW);
609 break;
610#ifdef CONFIG_KVM_XICS
611 case KVM_REG_PPC_ICP_STATE:
612 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) {
613 r = -ENXIO;
614 break;
615 }
616 if (xics_on_xive())
617 *val = get_reg_val(id, kvmppc_xive_get_icp(vcpu));
618 else
619 *val = get_reg_val(id, kvmppc_xics_get_icp(vcpu));
620 break;
621#endif
622#ifdef CONFIG_KVM_XIVE
623 case KVM_REG_PPC_VP_STATE:
624 if (!vcpu->arch.xive_vcpu) {
625 r = -ENXIO;
626 break;
627 }
628 if (xive_enabled())
629 r = kvmppc_xive_native_get_vp(vcpu, val);
630 else
631 r = -ENXIO;
632 break;
633#endif
634 case KVM_REG_PPC_FSCR:
635 *val = get_reg_val(id, vcpu->arch.fscr);
636 break;
637 case KVM_REG_PPC_TAR:
638 *val = get_reg_val(id, vcpu->arch.tar);
639 break;
640 case KVM_REG_PPC_EBBHR:
641 *val = get_reg_val(id, vcpu->arch.ebbhr);
642 break;
643 case KVM_REG_PPC_EBBRR:
644 *val = get_reg_val(id, vcpu->arch.ebbrr);
645 break;
646 case KVM_REG_PPC_BESCR:
647 *val = get_reg_val(id, vcpu->arch.bescr);
648 break;
649 case KVM_REG_PPC_IC:
650 *val = get_reg_val(id, vcpu->arch.ic);
651 break;
652 default:
653 r = -EINVAL;
654 break;
655 }
656 }
657
658 return r;
659}
660
661int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id,
662 union kvmppc_one_reg *val)
663{
664 int r = 0;
665 long int i;
666
667 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val);
668 if (r == -EINVAL) {
669 r = 0;
670 switch (id) {
671 case KVM_REG_PPC_DAR:
672 kvmppc_set_dar(vcpu, set_reg_val(id, *val));
673 break;
674 case KVM_REG_PPC_DSISR:
675 kvmppc_set_dsisr(vcpu, set_reg_val(id, *val));
676 break;
677 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
678 i = id - KVM_REG_PPC_FPR0;
679 VCPU_FPR(vcpu, i) = set_reg_val(id, *val);
680 break;
681 case KVM_REG_PPC_FPSCR:
682 vcpu->arch.fp.fpscr = set_reg_val(id, *val);
683 break;
684#ifdef CONFIG_VSX
685 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
686 if (cpu_has_feature(CPU_FTR_VSX)) {
687 i = id - KVM_REG_PPC_VSR0;
688 vcpu->arch.fp.fpr[i][0] = val->vsxval[0];
689 vcpu->arch.fp.fpr[i][1] = val->vsxval[1];
690 } else {
691 r = -ENXIO;
692 }
693 break;
694#endif
695#ifdef CONFIG_KVM_XICS
696 case KVM_REG_PPC_ICP_STATE:
697 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) {
698 r = -ENXIO;
699 break;
700 }
701 if (xics_on_xive())
702 r = kvmppc_xive_set_icp(vcpu, set_reg_val(id, *val));
703 else
704 r = kvmppc_xics_set_icp(vcpu, set_reg_val(id, *val));
705 break;
706#endif
707#ifdef CONFIG_KVM_XIVE
708 case KVM_REG_PPC_VP_STATE:
709 if (!vcpu->arch.xive_vcpu) {
710 r = -ENXIO;
711 break;
712 }
713 if (xive_enabled())
714 r = kvmppc_xive_native_set_vp(vcpu, val);
715 else
716 r = -ENXIO;
717 break;
718#endif
719 case KVM_REG_PPC_FSCR:
720 vcpu->arch.fscr = set_reg_val(id, *val);
721 break;
722 case KVM_REG_PPC_TAR:
723 vcpu->arch.tar = set_reg_val(id, *val);
724 break;
725 case KVM_REG_PPC_EBBHR:
726 vcpu->arch.ebbhr = set_reg_val(id, *val);
727 break;
728 case KVM_REG_PPC_EBBRR:
729 vcpu->arch.ebbrr = set_reg_val(id, *val);
730 break;
731 case KVM_REG_PPC_BESCR:
732 vcpu->arch.bescr = set_reg_val(id, *val);
733 break;
734 case KVM_REG_PPC_IC:
735 vcpu->arch.ic = set_reg_val(id, *val);
736 break;
737 default:
738 r = -EINVAL;
739 break;
740 }
741 }
742
743 return r;
744}
745
746void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
747{
748 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
749}
750
751void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
752{
753 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);
754}
755
756void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)
757{
758 vcpu->kvm->arch.kvm_ops->set_msr(vcpu, msr);
759}
760EXPORT_SYMBOL_GPL(kvmppc_set_msr);
761
762int kvmppc_vcpu_run(struct kvm_vcpu *vcpu)
763{
764 return vcpu->kvm->arch.kvm_ops->vcpu_run(vcpu);
765}
766
767int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
768 struct kvm_translation *tr)
769{
770 return 0;
771}
772
773int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
774 struct kvm_guest_debug *dbg)
775{
776 vcpu_load(vcpu);
777 vcpu->guest_debug = dbg->control;
778 vcpu_put(vcpu);
779 return 0;
780}
781
782void kvmppc_decrementer_func(struct kvm_vcpu *vcpu)
783{
784 kvmppc_core_queue_dec(vcpu);
785 kvm_vcpu_kick(vcpu);
786}
787
788int kvmppc_core_vcpu_create(struct kvm_vcpu *vcpu)
789{
790 return vcpu->kvm->arch.kvm_ops->vcpu_create(vcpu);
791}
792
793void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
794{
795 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
796}
797
798int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
799{
800 return vcpu->kvm->arch.kvm_ops->check_requests(vcpu);
801}
802
803void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
804{
805
806}
807
808int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
809{
810 return kvm->arch.kvm_ops->get_dirty_log(kvm, log);
811}
812
813void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
814{
815 kvm->arch.kvm_ops->free_memslot(slot);
816}
817
818void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
819{
820 kvm->arch.kvm_ops->flush_memslot(kvm, memslot);
821}
822
823int kvmppc_core_prepare_memory_region(struct kvm *kvm,
824 struct kvm_memory_slot *memslot,
825 const struct kvm_userspace_memory_region *mem,
826 enum kvm_mr_change change)
827{
828 return kvm->arch.kvm_ops->prepare_memory_region(kvm, memslot, mem,
829 change);
830}
831
832void kvmppc_core_commit_memory_region(struct kvm *kvm,
833 const struct kvm_userspace_memory_region *mem,
834 const struct kvm_memory_slot *old,
835 const struct kvm_memory_slot *new,
836 enum kvm_mr_change change)
837{
838 kvm->arch.kvm_ops->commit_memory_region(kvm, mem, old, new, change);
839}
840
841int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
842{
843 return kvm->arch.kvm_ops->unmap_hva_range(kvm, start, end);
844}
845
846int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
847{
848 return kvm->arch.kvm_ops->age_hva(kvm, start, end);
849}
850
851int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
852{
853 return kvm->arch.kvm_ops->test_age_hva(kvm, hva);
854}
855
856int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
857{
858 kvm->arch.kvm_ops->set_spte_hva(kvm, hva, pte);
859 return 0;
860}
861
862int kvmppc_core_init_vm(struct kvm *kvm)
863{
864
865#ifdef CONFIG_PPC64
866 INIT_LIST_HEAD_RCU(&kvm->arch.spapr_tce_tables);
867 INIT_LIST_HEAD(&kvm->arch.rtas_tokens);
868 mutex_init(&kvm->arch.rtas_token_lock);
869#endif
870
871 return kvm->arch.kvm_ops->init_vm(kvm);
872}
873
874void kvmppc_core_destroy_vm(struct kvm *kvm)
875{
876 kvm->arch.kvm_ops->destroy_vm(kvm);
877
878#ifdef CONFIG_PPC64
879 kvmppc_rtas_tokens_free(kvm);
880 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
881#endif
882
883#ifdef CONFIG_KVM_XICS
884
885
886
887
888 kfree(kvm->arch.xive_devices.native);
889 kvm->arch.xive_devices.native = NULL;
890 kfree(kvm->arch.xive_devices.xics_on_xive);
891 kvm->arch.xive_devices.xics_on_xive = NULL;
892 kfree(kvm->arch.xics_device);
893 kvm->arch.xics_device = NULL;
894#endif
895}
896
897int kvmppc_h_logical_ci_load(struct kvm_vcpu *vcpu)
898{
899 unsigned long size = kvmppc_get_gpr(vcpu, 4);
900 unsigned long addr = kvmppc_get_gpr(vcpu, 5);
901 u64 buf;
902 int srcu_idx;
903 int ret;
904
905 if (!is_power_of_2(size) || (size > sizeof(buf)))
906 return H_TOO_HARD;
907
908 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
909 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, size, &buf);
910 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
911 if (ret != 0)
912 return H_TOO_HARD;
913
914 switch (size) {
915 case 1:
916 kvmppc_set_gpr(vcpu, 4, *(u8 *)&buf);
917 break;
918
919 case 2:
920 kvmppc_set_gpr(vcpu, 4, be16_to_cpu(*(__be16 *)&buf));
921 break;
922
923 case 4:
924 kvmppc_set_gpr(vcpu, 4, be32_to_cpu(*(__be32 *)&buf));
925 break;
926
927 case 8:
928 kvmppc_set_gpr(vcpu, 4, be64_to_cpu(*(__be64 *)&buf));
929 break;
930
931 default:
932 BUG();
933 }
934
935 return H_SUCCESS;
936}
937EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_load);
938
939int kvmppc_h_logical_ci_store(struct kvm_vcpu *vcpu)
940{
941 unsigned long size = kvmppc_get_gpr(vcpu, 4);
942 unsigned long addr = kvmppc_get_gpr(vcpu, 5);
943 unsigned long val = kvmppc_get_gpr(vcpu, 6);
944 u64 buf;
945 int srcu_idx;
946 int ret;
947
948 switch (size) {
949 case 1:
950 *(u8 *)&buf = val;
951 break;
952
953 case 2:
954 *(__be16 *)&buf = cpu_to_be16(val);
955 break;
956
957 case 4:
958 *(__be32 *)&buf = cpu_to_be32(val);
959 break;
960
961 case 8:
962 *(__be64 *)&buf = cpu_to_be64(val);
963 break;
964
965 default:
966 return H_TOO_HARD;
967 }
968
969 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
970 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, size, &buf);
971 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
972 if (ret != 0)
973 return H_TOO_HARD;
974
975 return H_SUCCESS;
976}
977EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_store);
978
979int kvmppc_core_check_processor_compat(void)
980{
981
982
983
984
985
986 return 0;
987}
988
989int kvmppc_book3s_hcall_implemented(struct kvm *kvm, unsigned long hcall)
990{
991 return kvm->arch.kvm_ops->hcall_implemented(hcall);
992}
993
994#ifdef CONFIG_KVM_XICS
995int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level,
996 bool line_status)
997{
998 if (xics_on_xive())
999 return kvmppc_xive_set_irq(kvm, irq_source_id, irq, level,
1000 line_status);
1001 else
1002 return kvmppc_xics_set_irq(kvm, irq_source_id, irq, level,
1003 line_status);
1004}
1005
1006int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *irq_entry,
1007 struct kvm *kvm, int irq_source_id,
1008 int level, bool line_status)
1009{
1010 return kvm_set_irq(kvm, irq_source_id, irq_entry->gsi,
1011 level, line_status);
1012}
1013static int kvmppc_book3s_set_irq(struct kvm_kernel_irq_routing_entry *e,
1014 struct kvm *kvm, int irq_source_id, int level,
1015 bool line_status)
1016{
1017 return kvm_set_irq(kvm, irq_source_id, e->gsi, level, line_status);
1018}
1019
1020int kvm_irq_map_gsi(struct kvm *kvm,
1021 struct kvm_kernel_irq_routing_entry *entries, int gsi)
1022{
1023 entries->gsi = gsi;
1024 entries->type = KVM_IRQ_ROUTING_IRQCHIP;
1025 entries->set = kvmppc_book3s_set_irq;
1026 entries->irqchip.irqchip = 0;
1027 entries->irqchip.pin = gsi;
1028 return 1;
1029}
1030
1031int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin)
1032{
1033 return pin;
1034}
1035
1036#endif
1037
1038static int kvmppc_book3s_init(void)
1039{
1040 int r;
1041
1042 r = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
1043 if (r)
1044 return r;
1045#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1046 r = kvmppc_book3s_init_pr();
1047#endif
1048
1049#ifdef CONFIG_KVM_XICS
1050#ifdef CONFIG_KVM_XIVE
1051 if (xics_on_xive()) {
1052 kvmppc_xive_init_module();
1053 kvm_register_device_ops(&kvm_xive_ops, KVM_DEV_TYPE_XICS);
1054 if (kvmppc_xive_native_supported()) {
1055 kvmppc_xive_native_init_module();
1056 kvm_register_device_ops(&kvm_xive_native_ops,
1057 KVM_DEV_TYPE_XIVE);
1058 }
1059 } else
1060#endif
1061 kvm_register_device_ops(&kvm_xics_ops, KVM_DEV_TYPE_XICS);
1062#endif
1063 return r;
1064}
1065
1066static void kvmppc_book3s_exit(void)
1067{
1068#ifdef CONFIG_KVM_XICS
1069 if (xics_on_xive()) {
1070 kvmppc_xive_exit_module();
1071 kvmppc_xive_native_exit_module();
1072 }
1073#endif
1074#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1075 kvmppc_book3s_exit_pr();
1076#endif
1077 kvm_exit();
1078}
1079
1080module_init(kvmppc_book3s_init);
1081module_exit(kvmppc_book3s_exit);
1082
1083
1084#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1085MODULE_ALIAS_MISCDEV(KVM_MINOR);
1086MODULE_ALIAS("devname:kvm");
1087#endif
1088
