1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20#include <linux/types.h>
21#include <linux/string.h>
22#include <linux/kvm.h>
23#include <linux/kvm_host.h>
24#include <linux/highmem.h>
25
26#include <asm/tlbflush.h>
27#include <asm/kvm_ppc.h>
28#include <asm/kvm_book3s.h>
29
30
31
32
33
34#ifdef DEBUG_MMU
35#define dprintk(X...) printk(KERN_INFO X)
36#else
37#define dprintk(X...) do { } while(0)
38#endif
39
40#ifdef DEBUG_MMU_PTE
41#define dprintk_pte(X...) printk(KERN_INFO X)
42#else
43#define dprintk_pte(X...) do { } while(0)
44#endif
45
46#define PTEG_FLAG_ACCESSED 0x00000100
47#define PTEG_FLAG_DIRTY 0x00000080
48#ifndef SID_SHIFT
49#define SID_SHIFT 28
50#endif
51
52static inline bool check_debug_ip(struct kvm_vcpu *vcpu)
53{
54#ifdef DEBUG_MMU_PTE_IP
55 return vcpu->arch.regs.nip == DEBUG_MMU_PTE_IP;
56#else
57 return true;
58#endif
59}
60
61static inline u32 sr_vsid(u32 sr_raw)
62{
63 return sr_raw & 0x0fffffff;
64}
65
66static inline bool sr_valid(u32 sr_raw)
67{
68 return (sr_raw & 0x80000000) ? false : true;
69}
70
71static inline bool sr_ks(u32 sr_raw)
72{
73 return (sr_raw & 0x40000000) ? true: false;
74}
75
76static inline bool sr_kp(u32 sr_raw)
77{
78 return (sr_raw & 0x20000000) ? true: false;
79}
80
81static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr,
82 struct kvmppc_pte *pte, bool data,
83 bool iswrite);
84static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
85 u64 *vsid);
86
87static u32 find_sr(struct kvm_vcpu *vcpu, gva_t eaddr)
88{
89 return kvmppc_get_sr(vcpu, (eaddr >> 28) & 0xf);
90}
91
92static u64 kvmppc_mmu_book3s_32_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr,
93 bool data)
94{
95 u64 vsid;
96 struct kvmppc_pte pte;
97
98 if (!kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, &pte, data, false))
99 return pte.vpage;
100
101 kvmppc_mmu_book3s_32_esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid);
102 return (((u64)eaddr >> 12) & 0xffff) | (vsid << 16);
103}
104
105static hva_t kvmppc_mmu_book3s_32_get_pteg(struct kvm_vcpu *vcpu,
106 u32 sre, gva_t eaddr,
107 bool primary)
108{
109 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
110 u32 page, hash, pteg, htabmask;
111 hva_t r;
112
113 page = (eaddr & 0x0FFFFFFF) >> 12;
114 htabmask = ((vcpu_book3s->sdr1 & 0x1FF) << 16) | 0xFFC0;
115
116 hash = ((sr_vsid(sre) ^ page) << 6);
117 if (!primary)
118 hash = ~hash;
119 hash &= htabmask;
120
121 pteg = (vcpu_book3s->sdr1 & 0xffff0000) | hash;
122
123 dprintk("MMU: pc=0x%lx eaddr=0x%lx sdr1=0x%llx pteg=0x%x vsid=0x%x\n",
124 kvmppc_get_pc(vcpu), eaddr, vcpu_book3s->sdr1, pteg,
125 sr_vsid(sre));
126
127 r = gfn_to_hva(vcpu->kvm, pteg >> PAGE_SHIFT);
128 if (kvm_is_error_hva(r))
129 return r;
130 return r | (pteg & ~PAGE_MASK);
131}
132
133static u32 kvmppc_mmu_book3s_32_get_ptem(u32 sre, gva_t eaddr, bool primary)
134{
135 return ((eaddr & 0x0fffffff) >> 22) | (sr_vsid(sre) << 7) |
136 (primary ? 0 : 0x40) | 0x80000000;
137}
138
139static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr,
140 struct kvmppc_pte *pte, bool data,
141 bool iswrite)
142{
143 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
144 struct kvmppc_bat *bat;
145 int i;
146
147 for (i = 0; i < 8; i++) {
148 if (data)
149 bat = &vcpu_book3s->dbat[i];
150 else
151 bat = &vcpu_book3s->ibat[i];
152
153 if (kvmppc_get_msr(vcpu) & MSR_PR) {
154 if (!bat->vp)
155 continue;
156 } else {
157 if (!bat->vs)
158 continue;
159 }
160
161 if (check_debug_ip(vcpu))
162 {
163 dprintk_pte("%cBAT %02d: 0x%lx - 0x%x (0x%x)\n",
164 data ? 'd' : 'i', i, eaddr, bat->bepi,
165 bat->bepi_mask);
166 }
167 if ((eaddr & bat->bepi_mask) == bat->bepi) {
168 u64 vsid;
169 kvmppc_mmu_book3s_32_esid_to_vsid(vcpu,
170 eaddr >> SID_SHIFT, &vsid);
171 vsid <<= 16;
172 pte->vpage = (((u64)eaddr >> 12) & 0xffff) | vsid;
173
174 pte->raddr = bat->brpn | (eaddr & ~bat->bepi_mask);
175 pte->may_read = bat->pp;
176 pte->may_write = bat->pp > 1;
177 pte->may_execute = true;
178 if (!pte->may_read) {
179 printk(KERN_INFO "BAT is not readable!\n");
180 continue;
181 }
182 if (iswrite && !pte->may_write) {
183 dprintk_pte("BAT is read-only!\n");
184 continue;
185 }
186
187 return 0;
188 }
189 }
190
191 return -ENOENT;
192}
193
194static int kvmppc_mmu_book3s_32_xlate_pte(struct kvm_vcpu *vcpu, gva_t eaddr,
195 struct kvmppc_pte *pte, bool data,
196 bool iswrite, bool primary)
197{
198 u32 sre;
199 hva_t ptegp;
200 u32 pteg[16];
201 u32 pte0, pte1;
202 u32 ptem = 0;
203 int i;
204 int found = 0;
205
206 sre = find_sr(vcpu, eaddr);
207
208 dprintk_pte("SR 0x%lx: vsid=0x%x, raw=0x%x\n", eaddr >> 28,
209 sr_vsid(sre), sre);
210
211 pte->vpage = kvmppc_mmu_book3s_32_ea_to_vp(vcpu, eaddr, data);
212
213 ptegp = kvmppc_mmu_book3s_32_get_pteg(vcpu, sre, eaddr, primary);
214 if (kvm_is_error_hva(ptegp)) {
215 printk(KERN_INFO "KVM: Invalid PTEG!\n");
216 goto no_page_found;
217 }
218
219 ptem = kvmppc_mmu_book3s_32_get_ptem(sre, eaddr, primary);
220
221 if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) {
222 printk_ratelimited(KERN_ERR
223 "KVM: Can't copy data from 0x%lx!\n", ptegp);
224 goto no_page_found;
225 }
226
227 for (i=0; i<16; i+=2) {
228 pte0 = be32_to_cpu(pteg[i]);
229 pte1 = be32_to_cpu(pteg[i + 1]);
230 if (ptem == pte0) {
231 u8 pp;
232
233 pte->raddr = (pte1 & ~(0xFFFULL)) | (eaddr & 0xFFF);
234 pp = pte1 & 3;
235
236 if ((sr_kp(sre) && (kvmppc_get_msr(vcpu) & MSR_PR)) ||
237 (sr_ks(sre) && !(kvmppc_get_msr(vcpu) & MSR_PR)))
238 pp |= 4;
239
240 pte->may_write = false;
241 pte->may_read = false;
242 pte->may_execute = true;
243 switch (pp) {
244 case 0:
245 case 1:
246 case 2:
247 case 6:
248 pte->may_write = true;
249
250 case 3:
251 case 5:
252 case 7:
253 pte->may_read = true;
254 break;
255 }
256
257 dprintk_pte("MMU: Found PTE -> %x %x - %x\n",
258 pte0, pte1, pp);
259 found = 1;
260 break;
261 }
262 }
263
264
265
266 if (found) {
267 u32 pte_r = pte1;
268 char __user *addr = (char __user *) (ptegp + (i+1) * sizeof(u32));
269
270
271
272
273
274 if (pte->may_read && !(pte_r & PTEG_FLAG_ACCESSED)) {
275 pte_r |= PTEG_FLAG_ACCESSED;
276 put_user(pte_r >> 8, addr + 2);
277 }
278 if (iswrite && pte->may_write && !(pte_r & PTEG_FLAG_DIRTY)) {
279 pte_r |= PTEG_FLAG_DIRTY;
280 put_user(pte_r, addr + 3);
281 }
282 if (!pte->may_read || (iswrite && !pte->may_write))
283 return -EPERM;
284 return 0;
285 }
286
287no_page_found:
288
289 if (check_debug_ip(vcpu)) {
290 dprintk_pte("KVM MMU: No PTE found (sdr1=0x%llx ptegp=0x%lx)\n",
291 to_book3s(vcpu)->sdr1, ptegp);
292 for (i=0; i<16; i+=2) {
293 dprintk_pte(" %02d: 0x%x - 0x%x (0x%x)\n",
294 i, be32_to_cpu(pteg[i]),
295 be32_to_cpu(pteg[i+1]), ptem);
296 }
297 }
298
299 return -ENOENT;
300}
301
302static int kvmppc_mmu_book3s_32_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
303 struct kvmppc_pte *pte, bool data,
304 bool iswrite)
305{
306 int r;
307 ulong mp_ea = vcpu->arch.magic_page_ea;
308
309 pte->eaddr = eaddr;
310 pte->page_size = MMU_PAGE_4K;
311
312
313 if (unlikely(mp_ea) &&
314 unlikely((eaddr & ~0xfffULL) == (mp_ea & ~0xfffULL)) &&
315 !(kvmppc_get_msr(vcpu) & MSR_PR)) {
316 pte->vpage = kvmppc_mmu_book3s_32_ea_to_vp(vcpu, eaddr, data);
317 pte->raddr = vcpu->arch.magic_page_pa | (pte->raddr & 0xfff);
318 pte->raddr &= KVM_PAM;
319 pte->may_execute = true;
320 pte->may_read = true;
321 pte->may_write = true;
322
323 return 0;
324 }
325
326 r = kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, pte, data, iswrite);
327 if (r < 0)
328 r = kvmppc_mmu_book3s_32_xlate_pte(vcpu, eaddr, pte,
329 data, iswrite, true);
330 if (r == -ENOENT)
331 r = kvmppc_mmu_book3s_32_xlate_pte(vcpu, eaddr, pte,
332 data, iswrite, false);
333
334 return r;
335}
336
337
338static u32 kvmppc_mmu_book3s_32_mfsrin(struct kvm_vcpu *vcpu, u32 srnum)
339{
340 return kvmppc_get_sr(vcpu, srnum);
341}
342
343static void kvmppc_mmu_book3s_32_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
344 ulong value)
345{
346 kvmppc_set_sr(vcpu, srnum, value);
347 kvmppc_mmu_map_segment(vcpu, srnum << SID_SHIFT);
348}
349
350static void kvmppc_mmu_book3s_32_tlbie(struct kvm_vcpu *vcpu, ulong ea, bool large)
351{
352 int i;
353 struct kvm_vcpu *v;
354
355
356 kvm_for_each_vcpu(i, v, vcpu->kvm)
357 kvmppc_mmu_pte_flush(v, ea, 0x0FFFF000);
358}
359
360static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
361 u64 *vsid)
362{
363 ulong ea = esid << SID_SHIFT;
364 u32 sr;
365 u64 gvsid = esid;
366 u64 msr = kvmppc_get_msr(vcpu);
367
368 if (msr & (MSR_DR|MSR_IR)) {
369 sr = find_sr(vcpu, ea);
370 if (sr_valid(sr))
371 gvsid = sr_vsid(sr);
372 }
373
374
375
376
377 switch (msr & (MSR_DR|MSR_IR)) {
378 case 0:
379 *vsid = VSID_REAL | esid;
380 break;
381 case MSR_IR:
382 *vsid = VSID_REAL_IR | gvsid;
383 break;
384 case MSR_DR:
385 *vsid = VSID_REAL_DR | gvsid;
386 break;
387 case MSR_DR|MSR_IR:
388 if (sr_valid(sr))
389 *vsid = sr_vsid(sr);
390 else
391 *vsid = VSID_BAT | gvsid;
392 break;
393 default:
394 BUG();
395 }
396
397 if (msr & MSR_PR)
398 *vsid |= VSID_PR;
399
400 return 0;
401}
402
403static bool kvmppc_mmu_book3s_32_is_dcbz32(struct kvm_vcpu *vcpu)
404{
405 return true;
406}
407
408
409void kvmppc_mmu_book3s_32_init(struct kvm_vcpu *vcpu)
410{
411 struct kvmppc_mmu *mmu = &vcpu->arch.mmu;
412
413 mmu->mtsrin = kvmppc_mmu_book3s_32_mtsrin;
414 mmu->mfsrin = kvmppc_mmu_book3s_32_mfsrin;
415 mmu->xlate = kvmppc_mmu_book3s_32_xlate;
416 mmu->tlbie = kvmppc_mmu_book3s_32_tlbie;
417 mmu->esid_to_vsid = kvmppc_mmu_book3s_32_esid_to_vsid;
418 mmu->ea_to_vp = kvmppc_mmu_book3s_32_ea_to_vp;
419 mmu->is_dcbz32 = kvmppc_mmu_book3s_32_is_dcbz32;
420
421 mmu->slbmte = NULL;
422 mmu->slbmfee = NULL;
423 mmu->slbmfev = NULL;
424 mmu->slbfee = NULL;
425 mmu->slbie = NULL;
426 mmu->slbia = NULL;
427}
428
