1
2#ifndef _ASM_X86_PARAVIRT_H
3#define _ASM_X86_PARAVIRT_H
4
5
6
7#ifdef CONFIG_PARAVIRT
8#include <asm/pgtable_types.h>
9#include <asm/asm.h>
10#include <asm/nospec-branch.h>
11
12#include <asm/paravirt_types.h>
13
14#ifndef __ASSEMBLY__
15#include <linux/bug.h>
16#include <linux/types.h>
17#include <linux/cpumask.h>
18#include <asm/frame.h>
19
20static inline void load_sp0(unsigned long sp0)
21{
22 PVOP_VCALL1(pv_cpu_ops.load_sp0, sp0);
23}
24
25
26static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
27 unsigned int *ecx, unsigned int *edx)
28{
29 PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
30}
31
32
33
34
35static inline unsigned long paravirt_get_debugreg(int reg)
36{
37 return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
38}
39#define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
40static inline void set_debugreg(unsigned long val, int reg)
41{
42 PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
43}
44
45static inline unsigned long read_cr0(void)
46{
47 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
48}
49
50static inline void write_cr0(unsigned long x)
51{
52 PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
53}
54
55static inline unsigned long read_cr2(void)
56{
57 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
58}
59
60static inline void write_cr2(unsigned long x)
61{
62 PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
63}
64
65static inline unsigned long __read_cr3(void)
66{
67 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
68}
69
70static inline void write_cr3(unsigned long x)
71{
72 PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
73}
74
75static inline void __write_cr4(unsigned long x)
76{
77 PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
78}
79
80#ifdef CONFIG_X86_64
81static inline unsigned long read_cr8(void)
82{
83 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
84}
85
86static inline void write_cr8(unsigned long x)
87{
88 PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
89}
90#endif
91
92static inline void arch_safe_halt(void)
93{
94 PVOP_VCALL0(pv_irq_ops.safe_halt);
95}
96
97static inline void halt(void)
98{
99 PVOP_VCALL0(pv_irq_ops.halt);
100}
101
102static inline void wbinvd(void)
103{
104 PVOP_VCALL0(pv_cpu_ops.wbinvd);
105}
106
107#define get_kernel_rpl() (pv_info.kernel_rpl)
108
109static inline u64 paravirt_read_msr(unsigned msr)
110{
111 return PVOP_CALL1(u64, pv_cpu_ops.read_msr, msr);
112}
113
114static inline void paravirt_write_msr(unsigned msr,
115 unsigned low, unsigned high)
116{
117 PVOP_VCALL3(pv_cpu_ops.write_msr, msr, low, high);
118}
119
120static inline u64 paravirt_read_msr_safe(unsigned msr, int *err)
121{
122 return PVOP_CALL2(u64, pv_cpu_ops.read_msr_safe, msr, err);
123}
124
125static inline int paravirt_write_msr_safe(unsigned msr,
126 unsigned low, unsigned high)
127{
128 return PVOP_CALL3(int, pv_cpu_ops.write_msr_safe, msr, low, high);
129}
130
131#define rdmsr(msr, val1, val2) \
132do { \
133 u64 _l = paravirt_read_msr(msr); \
134 val1 = (u32)_l; \
135 val2 = _l >> 32; \
136} while (0)
137
138#define wrmsr(msr, val1, val2) \
139do { \
140 paravirt_write_msr(msr, val1, val2); \
141} while (0)
142
143#define rdmsrl(msr, val) \
144do { \
145 val = paravirt_read_msr(msr); \
146} while (0)
147
148static inline void wrmsrl(unsigned msr, u64 val)
149{
150 wrmsr(msr, (u32)val, (u32)(val>>32));
151}
152
153#define wrmsr_safe(msr, a, b) paravirt_write_msr_safe(msr, a, b)
154
155
156#define rdmsr_safe(msr, a, b) \
157({ \
158 int _err; \
159 u64 _l = paravirt_read_msr_safe(msr, &_err); \
160 (*a) = (u32)_l; \
161 (*b) = _l >> 32; \
162 _err; \
163})
164
165static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
166{
167 int err;
168
169 *p = paravirt_read_msr_safe(msr, &err);
170 return err;
171}
172
173static inline unsigned long long paravirt_sched_clock(void)
174{
175 return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
176}
177
178struct static_key;
179extern struct static_key paravirt_steal_enabled;
180extern struct static_key paravirt_steal_rq_enabled;
181
182__visible void __native_queued_spin_unlock(struct qspinlock *lock);
183bool pv_is_native_spin_unlock(void);
184__visible bool __native_vcpu_is_preempted(long cpu);
185bool pv_is_native_vcpu_is_preempted(void);
186
187static inline u64 paravirt_steal_clock(int cpu)
188{
189 return PVOP_CALL1(u64, pv_time_ops.steal_clock, cpu);
190}
191
192static inline unsigned long long paravirt_read_pmc(int counter)
193{
194 return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
195}
196
197#define rdpmc(counter, low, high) \
198do { \
199 u64 _l = paravirt_read_pmc(counter); \
200 low = (u32)_l; \
201 high = _l >> 32; \
202} while (0)
203
204#define rdpmcl(counter, val) ((val) = paravirt_read_pmc(counter))
205
206static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
207{
208 PVOP_VCALL2(pv_cpu_ops.alloc_ldt, ldt, entries);
209}
210
211static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
212{
213 PVOP_VCALL2(pv_cpu_ops.free_ldt, ldt, entries);
214}
215
216static inline void load_TR_desc(void)
217{
218 PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
219}
220static inline void load_gdt(const struct desc_ptr *dtr)
221{
222 PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
223}
224static inline void load_idt(const struct desc_ptr *dtr)
225{
226 PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
227}
228static inline void set_ldt(const void *addr, unsigned entries)
229{
230 PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
231}
232static inline unsigned long paravirt_store_tr(void)
233{
234 return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
235}
236#define store_tr(tr) ((tr) = paravirt_store_tr())
237static inline void load_TLS(struct thread_struct *t, unsigned cpu)
238{
239 PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
240}
241
242#ifdef CONFIG_X86_64
243static inline void load_gs_index(unsigned int gs)
244{
245 PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
246}
247#endif
248
249static inline void write_ldt_entry(struct desc_struct *dt, int entry,
250 const void *desc)
251{
252 PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
253}
254
255static inline void write_gdt_entry(struct desc_struct *dt, int entry,
256 void *desc, int type)
257{
258 PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
259}
260
261static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
262{
263 PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
264}
265static inline void set_iopl_mask(unsigned mask)
266{
267 PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
268}
269
270
271static inline void slow_down_io(void)
272{
273 pv_cpu_ops.io_delay();
274#ifdef REALLY_SLOW_IO
275 pv_cpu_ops.io_delay();
276 pv_cpu_ops.io_delay();
277 pv_cpu_ops.io_delay();
278#endif
279}
280
281static inline void paravirt_activate_mm(struct mm_struct *prev,
282 struct mm_struct *next)
283{
284 PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
285}
286
287static inline void paravirt_arch_dup_mmap(struct mm_struct *oldmm,
288 struct mm_struct *mm)
289{
290 PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
291}
292
293static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
294{
295 PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
296}
297
298static inline void __flush_tlb(void)
299{
300 PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
301}
302static inline void __flush_tlb_global(void)
303{
304 PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
305}
306static inline void __flush_tlb_one_user(unsigned long addr)
307{
308 PVOP_VCALL1(pv_mmu_ops.flush_tlb_one_user, addr);
309}
310
311static inline void flush_tlb_others(const struct cpumask *cpumask,
312 const struct flush_tlb_info *info)
313{
314 PVOP_VCALL2(pv_mmu_ops.flush_tlb_others, cpumask, info);
315}
316
317static inline void paravirt_tlb_remove_table(struct mmu_gather *tlb, void *table)
318{
319 PVOP_VCALL2(pv_mmu_ops.tlb_remove_table, tlb, table);
320}
321
322static inline int paravirt_pgd_alloc(struct mm_struct *mm)
323{
324 return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
325}
326
327static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
328{
329 PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
330}
331
332static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
333{
334 PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
335}
336static inline void paravirt_release_pte(unsigned long pfn)
337{
338 PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
339}
340
341static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
342{
343 PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
344}
345
346static inline void paravirt_release_pmd(unsigned long pfn)
347{
348 PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
349}
350
351static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
352{
353 PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
354}
355static inline void paravirt_release_pud(unsigned long pfn)
356{
357 PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
358}
359
360static inline void paravirt_alloc_p4d(struct mm_struct *mm, unsigned long pfn)
361{
362 PVOP_VCALL2(pv_mmu_ops.alloc_p4d, mm, pfn);
363}
364
365static inline void paravirt_release_p4d(unsigned long pfn)
366{
367 PVOP_VCALL1(pv_mmu_ops.release_p4d, pfn);
368}
369
370static inline pte_t __pte(pteval_t val)
371{
372 pteval_t ret;
373
374 if (sizeof(pteval_t) > sizeof(long))
375 ret = PVOP_CALLEE2(pteval_t,
376 pv_mmu_ops.make_pte,
377 val, (u64)val >> 32);
378 else
379 ret = PVOP_CALLEE1(pteval_t,
380 pv_mmu_ops.make_pte,
381 val);
382
383 return (pte_t) { .pte = ret };
384}
385
386static inline pteval_t pte_val(pte_t pte)
387{
388 pteval_t ret;
389
390 if (sizeof(pteval_t) > sizeof(long))
391 ret = PVOP_CALLEE2(pteval_t, pv_mmu_ops.pte_val,
392 pte.pte, (u64)pte.pte >> 32);
393 else
394 ret = PVOP_CALLEE1(pteval_t, pv_mmu_ops.pte_val,
395 pte.pte);
396
397 return ret;
398}
399
400static inline pgd_t __pgd(pgdval_t val)
401{
402 pgdval_t ret;
403
404 if (sizeof(pgdval_t) > sizeof(long))
405 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.make_pgd,
406 val, (u64)val >> 32);
407 else
408 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.make_pgd,
409 val);
410
411 return (pgd_t) { ret };
412}
413
414static inline pgdval_t pgd_val(pgd_t pgd)
415{
416 pgdval_t ret;
417
418 if (sizeof(pgdval_t) > sizeof(long))
419 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.pgd_val,
420 pgd.pgd, (u64)pgd.pgd >> 32);
421 else
422 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.pgd_val,
423 pgd.pgd);
424
425 return ret;
426}
427
428#define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
429static inline pte_t ptep_modify_prot_start(struct vm_area_struct *vma, unsigned long addr,
430 pte_t *ptep)
431{
432 pteval_t ret;
433
434 ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start, vma, addr, ptep);
435
436 return (pte_t) { .pte = ret };
437}
438
439static inline void ptep_modify_prot_commit(struct vm_area_struct *vma, unsigned long addr,
440 pte_t *ptep, pte_t old_pte, pte_t pte)
441{
442
443 if (sizeof(pteval_t) > sizeof(long))
444
445 pv_mmu_ops.ptep_modify_prot_commit(vma, addr, ptep, pte);
446 else
447 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
448 vma, addr, ptep, pte.pte);
449}
450
451static inline void set_pte(pte_t *ptep, pte_t pte)
452{
453 if (sizeof(pteval_t) > sizeof(long))
454 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
455 pte.pte, (u64)pte.pte >> 32);
456 else
457 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
458 pte.pte);
459}
460
461static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
462 pte_t *ptep, pte_t pte)
463{
464 if (sizeof(pteval_t) > sizeof(long))
465
466 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
467 else
468 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
469}
470
471static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
472{
473 pmdval_t val = native_pmd_val(pmd);
474
475 if (sizeof(pmdval_t) > sizeof(long))
476 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
477 else
478 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
479}
480
481#if CONFIG_PGTABLE_LEVELS >= 3
482static inline pmd_t __pmd(pmdval_t val)
483{
484 pmdval_t ret;
485
486 if (sizeof(pmdval_t) > sizeof(long))
487 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.make_pmd,
488 val, (u64)val >> 32);
489 else
490 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.make_pmd,
491 val);
492
493 return (pmd_t) { ret };
494}
495
496static inline pmdval_t pmd_val(pmd_t pmd)
497{
498 pmdval_t ret;
499
500 if (sizeof(pmdval_t) > sizeof(long))
501 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.pmd_val,
502 pmd.pmd, (u64)pmd.pmd >> 32);
503 else
504 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.pmd_val,
505 pmd.pmd);
506
507 return ret;
508}
509
510static inline void set_pud(pud_t *pudp, pud_t pud)
511{
512 pudval_t val = native_pud_val(pud);
513
514 if (sizeof(pudval_t) > sizeof(long))
515 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
516 val, (u64)val >> 32);
517 else
518 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
519 val);
520}
521#if CONFIG_PGTABLE_LEVELS >= 4
522static inline pud_t __pud(pudval_t val)
523{
524 pudval_t ret;
525
526 if (sizeof(pudval_t) > sizeof(long))
527 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.make_pud,
528 val, (u64)val >> 32);
529 else
530 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.make_pud,
531 val);
532
533 return (pud_t) { ret };
534}
535
536static inline pudval_t pud_val(pud_t pud)
537{
538 pudval_t ret;
539
540 if (sizeof(pudval_t) > sizeof(long))
541 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.pud_val,
542 pud.pud, (u64)pud.pud >> 32);
543 else
544 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.pud_val,
545 pud.pud);
546
547 return ret;
548}
549
550static inline void pud_clear(pud_t *pudp)
551{
552 set_pud(pudp, __pud(0));
553}
554
555static inline void set_p4d(p4d_t *p4dp, p4d_t p4d)
556{
557 p4dval_t val = native_p4d_val(p4d);
558
559 if (sizeof(p4dval_t) > sizeof(long))
560 PVOP_VCALL3(pv_mmu_ops.set_p4d, p4dp,
561 val, (u64)val >> 32);
562 else
563 PVOP_VCALL2(pv_mmu_ops.set_p4d, p4dp,
564 val);
565}
566
567#if CONFIG_PGTABLE_LEVELS >= 5
568
569static inline p4d_t __p4d(p4dval_t val)
570{
571 p4dval_t ret = PVOP_CALLEE1(p4dval_t, pv_mmu_ops.make_p4d, val);
572
573 return (p4d_t) { ret };
574}
575
576static inline p4dval_t p4d_val(p4d_t p4d)
577{
578 return PVOP_CALLEE1(p4dval_t, pv_mmu_ops.p4d_val, p4d.p4d);
579}
580
581static inline void __set_pgd(pgd_t *pgdp, pgd_t pgd)
582{
583 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp, native_pgd_val(pgd));
584}
585
586#define set_pgd(pgdp, pgdval) do { \
587 if (pgtable_l5_enabled()) \
588 __set_pgd(pgdp, pgdval); \
589 else \
590 set_p4d((p4d_t *)(pgdp), (p4d_t) { (pgdval).pgd }); \
591} while (0)
592
593#define pgd_clear(pgdp) do { \
594 if (pgtable_l5_enabled()) \
595 set_pgd(pgdp, __pgd(0)); \
596} while (0)
597
598#endif
599
600static inline void p4d_clear(p4d_t *p4dp)
601{
602 set_p4d(p4dp, __p4d(0));
603}
604
605#endif
606
607#endif
608
609#ifdef CONFIG_X86_PAE
610
611
612static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
613{
614 PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
615 pte.pte, pte.pte >> 32);
616}
617
618static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
619 pte_t *ptep)
620{
621 PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
622}
623
624static inline void pmd_clear(pmd_t *pmdp)
625{
626 PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
627}
628#else
629static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
630{
631 set_pte(ptep, pte);
632}
633
634static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
635 pte_t *ptep)
636{
637 set_pte_at(mm, addr, ptep, __pte(0));
638}
639
640static inline void pmd_clear(pmd_t *pmdp)
641{
642 set_pmd(pmdp, __pmd(0));
643}
644#endif
645
646#define __HAVE_ARCH_START_CONTEXT_SWITCH
647static inline void arch_start_context_switch(struct task_struct *prev)
648{
649 PVOP_VCALL1(pv_cpu_ops.start_context_switch, prev);
650}
651
652static inline void arch_end_context_switch(struct task_struct *next)
653{
654 PVOP_VCALL1(pv_cpu_ops.end_context_switch, next);
655}
656
657#define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
658static inline void arch_enter_lazy_mmu_mode(void)
659{
660 PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
661}
662
663static inline void arch_leave_lazy_mmu_mode(void)
664{
665 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
666}
667
668static inline void arch_flush_lazy_mmu_mode(void)
669{
670 PVOP_VCALL0(pv_mmu_ops.lazy_mode.flush);
671}
672
673static inline void __set_fixmap(unsigned idx,
674 phys_addr_t phys, pgprot_t flags)
675{
676 pv_mmu_ops.set_fixmap(idx, phys, flags);
677}
678
679#if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
680
681static __always_inline void pv_queued_spin_lock_slowpath(struct qspinlock *lock,
682 u32 val)
683{
684 PVOP_VCALL2(pv_lock_ops.queued_spin_lock_slowpath, lock, val);
685}
686
687static __always_inline void pv_queued_spin_unlock(struct qspinlock *lock)
688{
689 PVOP_VCALLEE1(pv_lock_ops.queued_spin_unlock, lock);
690}
691
692static __always_inline void pv_wait(u8 *ptr, u8 val)
693{
694 PVOP_VCALL2(pv_lock_ops.wait, ptr, val);
695}
696
697static __always_inline void pv_kick(int cpu)
698{
699 PVOP_VCALL1(pv_lock_ops.kick, cpu);
700}
701
702static __always_inline bool pv_vcpu_is_preempted(long cpu)
703{
704 return PVOP_CALLEE1(bool, pv_lock_ops.vcpu_is_preempted, cpu);
705}
706
707#endif
708
709#ifdef CONFIG_X86_32
710#define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
711#define PV_RESTORE_REGS "popl %edx; popl %ecx;"
712
713
714#define PV_SAVE_ALL_CALLER_REGS "pushl %ecx;"
715#define PV_RESTORE_ALL_CALLER_REGS "popl %ecx;"
716
717#define PV_FLAGS_ARG "0"
718#define PV_EXTRA_CLOBBERS
719#define PV_VEXTRA_CLOBBERS
720#else
721
722#define PV_SAVE_ALL_CALLER_REGS \
723 "push %rcx;" \
724 "push %rdx;" \
725 "push %rsi;" \
726 "push %rdi;" \
727 "push %r8;" \
728 "push %r9;" \
729 "push %r10;" \
730 "push %r11;"
731#define PV_RESTORE_ALL_CALLER_REGS \
732 "pop %r11;" \
733 "pop %r10;" \
734 "pop %r9;" \
735 "pop %r8;" \
736 "pop %rdi;" \
737 "pop %rsi;" \
738 "pop %rdx;" \
739 "pop %rcx;"
740
741
742
743#define PV_SAVE_REGS "pushq %%rdi;"
744#define PV_RESTORE_REGS "popq %%rdi;"
745#define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
746#define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
747#define PV_FLAGS_ARG "D"
748#endif
749
750
751
752
753
754
755
756
757
758
759
760
761
762#define PV_THUNK_NAME(func) "__raw_callee_save_" #func
763#define PV_CALLEE_SAVE_REGS_THUNK(func) \
764 extern typeof(func) __raw_callee_save_##func; \
765 \
766 asm(".pushsection .text;" \
767 ".globl " PV_THUNK_NAME(func) ";" \
768 ".type " PV_THUNK_NAME(func) ", @function;" \
769 PV_THUNK_NAME(func) ":" \
770 FRAME_BEGIN \
771 PV_SAVE_ALL_CALLER_REGS \
772 "call " #func ";" \
773 PV_RESTORE_ALL_CALLER_REGS \
774 FRAME_END \
775 "ret;" \
776 ".size " PV_THUNK_NAME(func) ", .-" PV_THUNK_NAME(func) ";" \
777 ".popsection")
778
779
780#define PV_CALLEE_SAVE(func) \
781 ((struct paravirt_callee_save) { __raw_callee_save_##func })
782
783
784#define __PV_IS_CALLEE_SAVE(func) \
785 ((struct paravirt_callee_save) { func })
786
787static inline notrace unsigned long arch_local_save_flags(void)
788{
789 return PVOP_CALLEE0(unsigned long, pv_irq_ops.save_fl);
790}
791
792static inline notrace void arch_local_irq_restore(unsigned long f)
793{
794 PVOP_VCALLEE1(pv_irq_ops.restore_fl, f);
795}
796
797static inline notrace void arch_local_irq_disable(void)
798{
799 PVOP_VCALLEE0(pv_irq_ops.irq_disable);
800}
801
802static inline notrace void arch_local_irq_enable(void)
803{
804 PVOP_VCALLEE0(pv_irq_ops.irq_enable);
805}
806
807static inline notrace unsigned long arch_local_irq_save(void)
808{
809 unsigned long f;
810
811 f = arch_local_save_flags();
812 arch_local_irq_disable();
813 return f;
814}
815
816
817
818#undef PARAVIRT_CALL
819#undef __PVOP_CALL
820#undef __PVOP_VCALL
821#undef PVOP_VCALL0
822#undef PVOP_CALL0
823#undef PVOP_VCALL1
824#undef PVOP_CALL1
825#undef PVOP_VCALL2
826#undef PVOP_CALL2
827#undef PVOP_VCALL3
828#undef PVOP_CALL3
829#undef PVOP_VCALL4
830#undef PVOP_CALL4
831
832extern void default_banner(void);
833
834#else
835
836#define _PVSITE(ptype, clobbers, ops, word, algn) \
837771:; \
838 ops; \
839772:; \
840 .pushsection .parainstructions,"a"; \
841 .align algn; \
842 word 771b; \
843 .byte ptype; \
844 .byte 772b-771b; \
845 .short clobbers; \
846 .popsection
847
848
849#define COND_PUSH(set, mask, reg) \
850 .if ((~(set)) & mask); push %reg; .endif
851#define COND_POP(set, mask, reg) \
852 .if ((~(set)) & mask); pop %reg; .endif
853
854#ifdef CONFIG_X86_64
855
856#define PV_SAVE_REGS(set) \
857 COND_PUSH(set, CLBR_RAX, rax); \
858 COND_PUSH(set, CLBR_RCX, rcx); \
859 COND_PUSH(set, CLBR_RDX, rdx); \
860 COND_PUSH(set, CLBR_RSI, rsi); \
861 COND_PUSH(set, CLBR_RDI, rdi); \
862 COND_PUSH(set, CLBR_R8, r8); \
863 COND_PUSH(set, CLBR_R9, r9); \
864 COND_PUSH(set, CLBR_R10, r10); \
865 COND_PUSH(set, CLBR_R11, r11)
866#define PV_RESTORE_REGS(set) \
867 COND_POP(set, CLBR_R11, r11); \
868 COND_POP(set, CLBR_R10, r10); \
869 COND_POP(set, CLBR_R9, r9); \
870 COND_POP(set, CLBR_R8, r8); \
871 COND_POP(set, CLBR_RDI, rdi); \
872 COND_POP(set, CLBR_RSI, rsi); \
873 COND_POP(set, CLBR_RDX, rdx); \
874 COND_POP(set, CLBR_RCX, rcx); \
875 COND_POP(set, CLBR_RAX, rax)
876
877#define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
878#define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
879#define PARA_INDIRECT(addr) *addr(%rip)
880#else
881#define PV_SAVE_REGS(set) \
882 COND_PUSH(set, CLBR_EAX, eax); \
883 COND_PUSH(set, CLBR_EDI, edi); \
884 COND_PUSH(set, CLBR_ECX, ecx); \
885 COND_PUSH(set, CLBR_EDX, edx)
886#define PV_RESTORE_REGS(set) \
887 COND_POP(set, CLBR_EDX, edx); \
888 COND_POP(set, CLBR_ECX, ecx); \
889 COND_POP(set, CLBR_EDI, edi); \
890 COND_POP(set, CLBR_EAX, eax)
891
892#define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
893#define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
894#define PARA_INDIRECT(addr) *%cs:addr
895#endif
896
897#define INTERRUPT_RETURN \
898 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
899 ANNOTATE_RETPOLINE_SAFE; \
900 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret);)
901
902#define DISABLE_INTERRUPTS(clobbers) \
903 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
904 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
905 ANNOTATE_RETPOLINE_SAFE; \
906 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \
907 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
908
909#define ENABLE_INTERRUPTS(clobbers) \
910 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
911 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
912 ANNOTATE_RETPOLINE_SAFE; \
913 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \
914 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
915
916#ifdef CONFIG_X86_32
917#define GET_CR0_INTO_EAX \
918 push %ecx; push %edx; \
919 ANNOTATE_RETPOLINE_SAFE; \
920 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
921 pop %edx; pop %ecx
922#else
923
924
925
926
927
928
929#define SWAPGS_UNSAFE_STACK \
930 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
931 swapgs)
932
933
934
935
936
937
938
939#define SWAPGS \
940 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
941 ANNOTATE_RETPOLINE_SAFE; \
942 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs); \
943 )
944
945#define GET_CR2_INTO_RAX \
946 ANNOTATE_RETPOLINE_SAFE; \
947 call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2);
948
949#define USERGS_SYSRET64 \
950 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64), \
951 CLBR_NONE, \
952 ANNOTATE_RETPOLINE_SAFE; \
953 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64);)
954
955#ifdef CONFIG_DEBUG_ENTRY
956#define SAVE_FLAGS(clobbers) \
957 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_save_fl), clobbers, \
958 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
959 ANNOTATE_RETPOLINE_SAFE; \
960 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_save_fl); \
961 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
962#endif
963
964#endif
965
966#endif
967#else
968# define default_banner x86_init_noop
969#ifndef __ASSEMBLY__
970static inline void paravirt_arch_dup_mmap(struct mm_struct *oldmm,
971 struct mm_struct *mm)
972{
973}
974
975static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
976{
977}
978#endif
979#endif
980#endif
981
