LXR linux/drivers/edac/skx

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/*
   3 * Common codes for both the skx_edac driver and Intel 10nm server EDAC driver.
   4 * Originally split out from the skx_edac driver.
   5 *
   6 * Copyright (c) 2018, Intel Corporation.
   7 */
   8
   9#ifndef _SKX_COMM_EDAC_H
  10#define _SKX_COMM_EDAC_H
  11
  12#define MSG_SIZE                1024
  13
  14/*
  15 * Debug macros
  16 */
  17#define skx_printk(level, fmt, arg...)                  \
  18        edac_printk(level, "skx", fmt, ##arg)
  19
  20#define skx_mc_printk(mci, level, fmt, arg...)          \
  21        edac_mc_chipset_printk(mci, level, "skx", fmt, ##arg)
  22
  23/*
  24 * Get a bit field at register value <v>, from bit <lo> to bit <hi>
  25 */
  26#define GET_BITFIELD(v, lo, hi) \
  27        (((v) & GENMASK_ULL((hi), (lo))) >> (lo))
  28
  29#define SKX_NUM_IMC             2       /* Memory controllers per socket */
  30#define SKX_NUM_CHANNELS        3       /* Channels per memory controller */
  31#define SKX_NUM_DIMMS           2       /* Max DIMMS per channel */
  32
  33#define I10NM_NUM_IMC           4
  34#define I10NM_NUM_CHANNELS      2
  35#define I10NM_NUM_DIMMS         2
  36
  37#define MAX(a, b)       ((a) > (b) ? (a) : (b))
  38#define NUM_IMC         MAX(SKX_NUM_IMC, I10NM_NUM_IMC)
  39#define NUM_CHANNELS    MAX(SKX_NUM_CHANNELS, I10NM_NUM_CHANNELS)
  40#define NUM_DIMMS       MAX(SKX_NUM_DIMMS, I10NM_NUM_DIMMS)
  41
  42#define IS_DIMM_PRESENT(r)              GET_BITFIELD(r, 15, 15)
  43#define IS_NVDIMM_PRESENT(r, i)         GET_BITFIELD(r, i, i)
  44
  45/*
  46 * Each cpu socket contains some pci devices that provide global
  47 * information, and also some that are local to each of the two
  48 * memory controllers on the die.
  49 */
  50struct skx_dev {
  51        struct list_head list;
  52        u8 bus[4];
  53        int seg;
  54        struct pci_dev *sad_all;
  55        struct pci_dev *util_all;
  56        struct pci_dev *uracu; /* for i10nm CPU */
  57        u32 mcroute;
  58        struct skx_imc {
  59                struct mem_ctl_info *mci;
  60                struct pci_dev *mdev; /* for i10nm CPU */
  61                void __iomem *mbase;  /* for i10nm CPU */
  62                u8 mc;  /* system wide mc# */
  63                u8 lmc; /* socket relative mc# */
  64                u8 src_id, node_id;
  65                struct skx_channel {
  66                        struct pci_dev  *cdev;
  67                        struct skx_dimm {
  68                                u8 close_pg;
  69                                u8 bank_xor_enable;
  70                                u8 fine_grain_bank;
  71                                u8 rowbits;
  72                                u8 colbits;
  73                        } dimms[NUM_DIMMS];
  74                } chan[NUM_CHANNELS];
  75        } imc[NUM_IMC];
  76};
  77
  78struct skx_pvt {
  79        struct skx_imc  *imc;
  80};
  81
  82enum type {
  83        SKX,
  84        I10NM
  85};
  86
  87enum {
  88        INDEX_SOCKET,
  89        INDEX_MEMCTRL,
  90        INDEX_CHANNEL,
  91        INDEX_DIMM,
  92        INDEX_MAX
  93};
  94
  95struct decoded_addr {
  96        struct skx_dev *dev;
  97        u64     addr;
  98        int     socket;
  99        int     imc;
 100        int     channel;
 101        u64     chan_addr;
 102        int     sktways;
 103        int     chanways;
 104        int     dimm;
 105        int     rank;
 106        int     channel_rank;
 107        u64     rank_address;
 108        int     row;
 109        int     column;
 110        int     bank_address;
 111        int     bank_group;
 112};
 113
 114struct res_config {
 115        enum type type;
 116        /* Configuration agent device ID */
 117        unsigned int decs_did;
 118        /* Default bus number configuration register offset */
 119        int busno_cfg_offset;
 120};
 121
 122typedef int (*get_dimm_config_f)(struct mem_ctl_info *mci);
 123typedef bool (*skx_decode_f)(struct decoded_addr *res);
 124
 125int __init skx_adxl_get(void);
 126void __exit skx_adxl_put(void);
 127void skx_set_decode(skx_decode_f decode);
 128
 129int skx_get_src_id(struct skx_dev *d, int off, u8 *id);
 130int skx_get_node_id(struct skx_dev *d, u8 *id);
 131
 132int skx_get_all_bus_mappings(struct res_config *cfg, struct list_head **list);
 133
 134int skx_get_hi_lo(unsigned int did, int off[], u64 *tolm, u64 *tohm);
 135
 136int skx_get_dimm_info(u32 mtr, u32 amap, struct dimm_info *dimm,
 137                      struct skx_imc *imc, int chan, int dimmno);
 138
 139int skx_get_nvdimm_info(struct dimm_info *dimm, struct skx_imc *imc,
 140                        int chan, int dimmno, const char *mod_str);
 141
 142int skx_register_mci(struct skx_imc *imc, struct pci_dev *pdev,
 143                     const char *ctl_name, const char *mod_str,
 144                     get_dimm_config_f get_dimm_config);
 145
 146int skx_mce_check_error(struct notifier_block *nb, unsigned long val,
 147                        void *data);
 148
 149void skx_remove(void);
 150
 151#endif /* _SKX_COMM_EDAC_H */
 152