linux/drivers/gpu/drm/rcar-du/rcar_lvds_regs.h
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   1/*
   2 * rcar_lvds_regs.h  --  R-Car LVDS Interface Registers Definitions
   3 *
   4 * Copyright (C) 2013-2015 Renesas Electronics Corporation
   5 *
   6 * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
   7 *
   8 * This program is free software; you can redistribute it and/or modify
   9 * it under the terms of the GNU General Public License version 2
  10 * as published by the Free Software Foundation.
  11 */
  12
  13#ifndef __RCAR_LVDS_REGS_H__
  14#define __RCAR_LVDS_REGS_H__
  15
  16#define LVDCR0                          0x0000
  17#define LVDCR0_DUSEL                    (1 << 15)
  18#define LVDCR0_DMD                      (1 << 12)               /* Gen2 only */
  19#define LVDCR0_LVMD_MASK                (0xf << 8)
  20#define LVDCR0_LVMD_SHIFT               8
  21#define LVDCR0_PLLON                    (1 << 4)
  22#define LVDCR0_PWD                      (1 << 2)                /* Gen3 only */
  23#define LVDCR0_BEN                      (1 << 2)                /* Gen2 only */
  24#define LVDCR0_LVEN                     (1 << 1)                /* Gen2 only */
  25#define LVDCR0_LVRES                    (1 << 0)
  26
  27#define LVDCR1                          0x0004
  28#define LVDCR1_CKSEL                    (1 << 15)               /* Gen2 only */
  29#define LVDCR1_CHSTBY(n)                (3 << (2 + (n) * 2))
  30#define LVDCR1_CLKSTBY                  (3 << 0)
  31
  32#define LVDPLLCR                        0x0008
  33#define LVDPLLCR_CEEN                   (1 << 14)
  34#define LVDPLLCR_FBEN                   (1 << 13)
  35#define LVDPLLCR_COSEL                  (1 << 12)
  36/* Gen2 */
  37#define LVDPLLCR_PLLDLYCNT_150M         (0x1bf << 0)
  38#define LVDPLLCR_PLLDLYCNT_121M         (0x22c << 0)
  39#define LVDPLLCR_PLLDLYCNT_60M          (0x77b << 0)
  40#define LVDPLLCR_PLLDLYCNT_38M          (0x69a << 0)
  41#define LVDPLLCR_PLLDLYCNT_MASK         (0x7ff << 0)
  42/* Gen3 */
  43#define LVDPLLCR_PLLDIVCNT_42M          (0x014cb << 0)
  44#define LVDPLLCR_PLLDIVCNT_85M          (0x00a45 << 0)
  45#define LVDPLLCR_PLLDIVCNT_128M         (0x006c3 << 0)
  46#define LVDPLLCR_PLLDIVCNT_148M         (0x046c1 << 0)
  47#define LVDPLLCR_PLLDIVCNT_MASK         (0x7ffff << 0)
  48
  49#define LVDCTRCR                        0x000c
  50#define LVDCTRCR_CTR3SEL_ZERO           (0 << 12)
  51#define LVDCTRCR_CTR3SEL_ODD            (1 << 12)
  52#define LVDCTRCR_CTR3SEL_CDE            (2 << 12)
  53#define LVDCTRCR_CTR3SEL_MASK           (7 << 12)
  54#define LVDCTRCR_CTR2SEL_DISP           (0 << 8)
  55#define LVDCTRCR_CTR2SEL_ODD            (1 << 8)
  56#define LVDCTRCR_CTR2SEL_CDE            (2 << 8)
  57#define LVDCTRCR_CTR2SEL_HSYNC          (3 << 8)
  58#define LVDCTRCR_CTR2SEL_VSYNC          (4 << 8)
  59#define LVDCTRCR_CTR2SEL_MASK           (7 << 8)
  60#define LVDCTRCR_CTR1SEL_VSYNC          (0 << 4)
  61#define LVDCTRCR_CTR1SEL_DISP           (1 << 4)
  62#define LVDCTRCR_CTR1SEL_ODD            (2 << 4)
  63#define LVDCTRCR_CTR1SEL_CDE            (3 << 4)
  64#define LVDCTRCR_CTR1SEL_HSYNC          (4 << 4)
  65#define LVDCTRCR_CTR1SEL_MASK           (7 << 4)
  66#define LVDCTRCR_CTR0SEL_HSYNC          (0 << 0)
  67#define LVDCTRCR_CTR0SEL_VSYNC          (1 << 0)
  68#define LVDCTRCR_CTR0SEL_DISP           (2 << 0)
  69#define LVDCTRCR_CTR0SEL_ODD            (3 << 0)
  70#define LVDCTRCR_CTR0SEL_CDE            (4 << 0)
  71#define LVDCTRCR_CTR0SEL_MASK           (7 << 0)
  72
  73#define LVDCHCR                         0x0010
  74#define LVDCHCR_CHSEL_CH(n, c)          ((((c) - (n)) & 3) << ((n) * 4))
  75#define LVDCHCR_CHSEL_MASK(n)           (3 << ((n) * 4))
  76
  77#endif /* __RCAR_LVDS_REGS_H__ */
  78