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8#include <asm/local.h>
9#include <linux/kernel.h>
10#include <linux/init.h>
11#include <linux/types.h>
12#include <linux/device.h>
13#include <linux/io.h>
14#include <linux/err.h>
15#include <linux/fs.h>
16#include <linux/miscdevice.h>
17#include <linux/uaccess.h>
18#include <linux/slab.h>
19#include <linux/spinlock.h>
20#include <linux/pm_runtime.h>
21#include <linux/seq_file.h>
22#include <linux/coresight.h>
23#include <linux/amba/bus.h>
24#include <linux/clk.h>
25#include <linux/circ_buf.h>
26#include <linux/mm.h>
27#include <linux/perf_event.h>
28
29
30#include "coresight-priv.h"
31
32#define ETB_RAM_DEPTH_REG 0x004
33#define ETB_STATUS_REG 0x00c
34#define ETB_RAM_READ_DATA_REG 0x010
35#define ETB_RAM_READ_POINTER 0x014
36#define ETB_RAM_WRITE_POINTER 0x018
37#define ETB_TRG 0x01c
38#define ETB_CTL_REG 0x020
39#define ETB_RWD_REG 0x024
40#define ETB_FFSR 0x300
41#define ETB_FFCR 0x304
42#define ETB_ITMISCOP0 0xee0
43#define ETB_ITTRFLINACK 0xee4
44#define ETB_ITTRFLIN 0xee8
45#define ETB_ITATBDATA0 0xeeC
46#define ETB_ITATBCTR2 0xef0
47#define ETB_ITATBCTR1 0xef4
48#define ETB_ITATBCTR0 0xef8
49
50
51
52#define ETB_STATUS_RAM_FULL BIT(0)
53
54#define ETB_CTL_CAPT_EN BIT(0)
55
56#define ETB_FFCR_EN_FTC BIT(0)
57#define ETB_FFCR_FON_MAN BIT(6)
58#define ETB_FFCR_STOP_FI BIT(12)
59#define ETB_FFCR_STOP_TRIGGER BIT(13)
60
61#define ETB_FFCR_BIT 6
62#define ETB_FFSR_BIT 1
63#define ETB_FRAME_SIZE_WORDS 4
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79struct etb_drvdata {
80 void __iomem *base;
81 struct device *dev;
82 struct clk *atclk;
83 struct coresight_device *csdev;
84 struct miscdevice miscdev;
85 spinlock_t spinlock;
86 local_t reading;
87 local_t mode;
88 u8 *buf;
89 u32 buffer_depth;
90 u32 trigger_cntr;
91};
92
93static unsigned int etb_get_buffer_depth(struct etb_drvdata *drvdata)
94{
95 u32 depth = 0;
96
97 pm_runtime_get_sync(drvdata->dev);
98
99
100 depth = readl_relaxed(drvdata->base + ETB_RAM_DEPTH_REG);
101
102 pm_runtime_put(drvdata->dev);
103 return depth;
104}
105
106static void etb_enable_hw(struct etb_drvdata *drvdata)
107{
108 int i;
109 u32 depth;
110
111 CS_UNLOCK(drvdata->base);
112
113 depth = drvdata->buffer_depth;
114
115 writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER);
116
117 for (i = 0; i < depth; i++)
118 writel_relaxed(0x0, drvdata->base + ETB_RWD_REG);
119
120
121 writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER);
122
123 writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER);
124
125 writel_relaxed(drvdata->trigger_cntr, drvdata->base + ETB_TRG);
126 writel_relaxed(ETB_FFCR_EN_FTC | ETB_FFCR_STOP_TRIGGER,
127 drvdata->base + ETB_FFCR);
128
129 writel_relaxed(ETB_CTL_CAPT_EN, drvdata->base + ETB_CTL_REG);
130
131 CS_LOCK(drvdata->base);
132}
133
134static int etb_enable(struct coresight_device *csdev, u32 mode)
135{
136 u32 val;
137 unsigned long flags;
138 struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
139
140 val = local_cmpxchg(&drvdata->mode,
141 CS_MODE_DISABLED, mode);
142
143
144
145
146
147 if (val == CS_MODE_PERF)
148 return -EBUSY;
149
150
151 if (val == CS_MODE_SYSFS)
152 goto out;
153
154 spin_lock_irqsave(&drvdata->spinlock, flags);
155 etb_enable_hw(drvdata);
156 spin_unlock_irqrestore(&drvdata->spinlock, flags);
157
158out:
159 dev_info(drvdata->dev, "ETB enabled\n");
160 return 0;
161}
162
163static void etb_disable_hw(struct etb_drvdata *drvdata)
164{
165 u32 ffcr;
166
167 CS_UNLOCK(drvdata->base);
168
169 ffcr = readl_relaxed(drvdata->base + ETB_FFCR);
170
171 ffcr |= ETB_FFCR_STOP_FI;
172 writel_relaxed(ffcr, drvdata->base + ETB_FFCR);
173
174 ffcr |= ETB_FFCR_FON_MAN;
175 writel_relaxed(ffcr, drvdata->base + ETB_FFCR);
176
177 if (coresight_timeout(drvdata->base, ETB_FFCR, ETB_FFCR_BIT, 0)) {
178 dev_err(drvdata->dev,
179 "timeout while waiting for completion of Manual Flush\n");
180 }
181
182
183 writel_relaxed(0x0, drvdata->base + ETB_CTL_REG);
184
185 if (coresight_timeout(drvdata->base, ETB_FFSR, ETB_FFSR_BIT, 1)) {
186 dev_err(drvdata->dev,
187 "timeout while waiting for Formatter to Stop\n");
188 }
189
190 CS_LOCK(drvdata->base);
191}
192
193static void etb_dump_hw(struct etb_drvdata *drvdata)
194{
195 bool lost = false;
196 int i;
197 u8 *buf_ptr;
198 const u32 *barrier;
199 u32 read_data, depth;
200 u32 read_ptr, write_ptr;
201 u32 frame_off, frame_endoff;
202
203 CS_UNLOCK(drvdata->base);
204
205 read_ptr = readl_relaxed(drvdata->base + ETB_RAM_READ_POINTER);
206 write_ptr = readl_relaxed(drvdata->base + ETB_RAM_WRITE_POINTER);
207
208 frame_off = write_ptr % ETB_FRAME_SIZE_WORDS;
209 frame_endoff = ETB_FRAME_SIZE_WORDS - frame_off;
210 if (frame_off) {
211 dev_err(drvdata->dev,
212 "write_ptr: %lu not aligned to formatter frame size\n",
213 (unsigned long)write_ptr);
214 dev_err(drvdata->dev, "frameoff: %lu, frame_endoff: %lu\n",
215 (unsigned long)frame_off, (unsigned long)frame_endoff);
216 write_ptr += frame_endoff;
217 }
218
219 if ((readl_relaxed(drvdata->base + ETB_STATUS_REG)
220 & ETB_STATUS_RAM_FULL) == 0) {
221 writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER);
222 } else {
223 writel_relaxed(write_ptr, drvdata->base + ETB_RAM_READ_POINTER);
224 lost = true;
225 }
226
227 depth = drvdata->buffer_depth;
228 buf_ptr = drvdata->buf;
229 barrier = barrier_pkt;
230 for (i = 0; i < depth; i++) {
231 read_data = readl_relaxed(drvdata->base +
232 ETB_RAM_READ_DATA_REG);
233 if (lost && *barrier) {
234 read_data = *barrier;
235 barrier++;
236 }
237
238 *(u32 *)buf_ptr = read_data;
239 buf_ptr += 4;
240 }
241
242 if (frame_off) {
243 buf_ptr -= (frame_endoff * 4);
244 for (i = 0; i < frame_endoff; i++) {
245 *buf_ptr++ = 0x0;
246 *buf_ptr++ = 0x0;
247 *buf_ptr++ = 0x0;
248 *buf_ptr++ = 0x0;
249 }
250 }
251
252 writel_relaxed(read_ptr, drvdata->base + ETB_RAM_READ_POINTER);
253
254 CS_LOCK(drvdata->base);
255}
256
257static void etb_disable(struct coresight_device *csdev)
258{
259 struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
260 unsigned long flags;
261
262 spin_lock_irqsave(&drvdata->spinlock, flags);
263 etb_disable_hw(drvdata);
264 etb_dump_hw(drvdata);
265 spin_unlock_irqrestore(&drvdata->spinlock, flags);
266
267 local_set(&drvdata->mode, CS_MODE_DISABLED);
268
269 dev_info(drvdata->dev, "ETB disabled\n");
270}
271
272static void *etb_alloc_buffer(struct coresight_device *csdev, int cpu,
273 void **pages, int nr_pages, bool overwrite)
274{
275 int node;
276 struct cs_buffers *buf;
277
278 if (cpu == -1)
279 cpu = smp_processor_id();
280 node = cpu_to_node(cpu);
281
282 buf = kzalloc_node(sizeof(struct cs_buffers), GFP_KERNEL, node);
283 if (!buf)
284 return NULL;
285
286 buf->snapshot = overwrite;
287 buf->nr_pages = nr_pages;
288 buf->data_pages = pages;
289
290 return buf;
291}
292
293static void etb_free_buffer(void *config)
294{
295 struct cs_buffers *buf = config;
296
297 kfree(buf);
298}
299
300static int etb_set_buffer(struct coresight_device *csdev,
301 struct perf_output_handle *handle,
302 void *sink_config)
303{
304 int ret = 0;
305 unsigned long head;
306 struct cs_buffers *buf = sink_config;
307
308
309 head = handle->head & ((buf->nr_pages << PAGE_SHIFT) - 1);
310
311
312 buf->cur = head / PAGE_SIZE;
313
314
315 buf->offset = head % PAGE_SIZE;
316
317 local_set(&buf->data_size, 0);
318
319 return ret;
320}
321
322static unsigned long etb_reset_buffer(struct coresight_device *csdev,
323 struct perf_output_handle *handle,
324 void *sink_config)
325{
326 unsigned long size = 0;
327 struct cs_buffers *buf = sink_config;
328
329 if (buf) {
330
331
332
333
334
335 if (buf->snapshot)
336 handle->head = local_xchg(&buf->data_size,
337 buf->nr_pages << PAGE_SHIFT);
338
339
340
341
342
343
344
345
346 size = local_xchg(&buf->data_size, 0);
347 }
348
349 return size;
350}
351
352static void etb_update_buffer(struct coresight_device *csdev,
353 struct perf_output_handle *handle,
354 void *sink_config)
355{
356 bool lost = false;
357 int i, cur;
358 u8 *buf_ptr;
359 const u32 *barrier;
360 u32 read_ptr, write_ptr, capacity;
361 u32 status, read_data, to_read;
362 unsigned long offset;
363 struct cs_buffers *buf = sink_config;
364 struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
365
366 if (!buf)
367 return;
368
369 capacity = drvdata->buffer_depth * ETB_FRAME_SIZE_WORDS;
370
371 etb_disable_hw(drvdata);
372 CS_UNLOCK(drvdata->base);
373
374
375 read_ptr = readl_relaxed(drvdata->base + ETB_RAM_READ_POINTER);
376 write_ptr = readl_relaxed(drvdata->base + ETB_RAM_WRITE_POINTER);
377
378
379
380
381
382
383 if (write_ptr % ETB_FRAME_SIZE_WORDS) {
384 dev_err(drvdata->dev,
385 "write_ptr: %lu not aligned to formatter frame size\n",
386 (unsigned long)write_ptr);
387
388 write_ptr &= ~(ETB_FRAME_SIZE_WORDS - 1);
389 lost = true;
390 }
391
392
393
394
395
396
397
398 status = readl_relaxed(drvdata->base + ETB_STATUS_REG);
399 if (status & ETB_STATUS_RAM_FULL) {
400 lost = true;
401 to_read = capacity;
402 read_ptr = write_ptr;
403 } else {
404 to_read = CIRC_CNT(write_ptr, read_ptr, drvdata->buffer_depth);
405 to_read *= ETB_FRAME_SIZE_WORDS;
406 }
407
408
409
410
411
412
413
414
415
416
417
418 if (!buf->snapshot && to_read > handle->size) {
419 u32 mask = ~(ETB_FRAME_SIZE_WORDS - 1);
420
421
422 to_read = handle->size & mask;
423
424
425
426
427 read_ptr = (write_ptr + drvdata->buffer_depth) -
428 to_read / ETB_FRAME_SIZE_WORDS;
429
430 if (read_ptr > (drvdata->buffer_depth - 1))
431 read_ptr -= drvdata->buffer_depth;
432
433 lost = true;
434 }
435
436 if (lost)
437 perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED);
438
439
440 writel_relaxed(read_ptr, drvdata->base + ETB_RAM_READ_POINTER);
441
442 cur = buf->cur;
443 offset = buf->offset;
444 barrier = barrier_pkt;
445
446 for (i = 0; i < to_read; i += 4) {
447 buf_ptr = buf->data_pages[cur] + offset;
448 read_data = readl_relaxed(drvdata->base +
449 ETB_RAM_READ_DATA_REG);
450 if (lost && *barrier) {
451 read_data = *barrier;
452 barrier++;
453 }
454
455 *(u32 *)buf_ptr = read_data;
456 buf_ptr += 4;
457
458 offset += 4;
459 if (offset >= PAGE_SIZE) {
460 offset = 0;
461 cur++;
462
463 cur &= buf->nr_pages - 1;
464 }
465 }
466
467
468 writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER);
469 writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER);
470
471
472
473
474
475
476
477 if (buf->snapshot)
478 local_set(&buf->data_size, (cur * PAGE_SIZE) + offset);
479 else
480 local_add(to_read, &buf->data_size);
481
482 etb_enable_hw(drvdata);
483 CS_LOCK(drvdata->base);
484}
485
486static const struct coresight_ops_sink etb_sink_ops = {
487 .enable = etb_enable,
488 .disable = etb_disable,
489 .alloc_buffer = etb_alloc_buffer,
490 .free_buffer = etb_free_buffer,
491 .set_buffer = etb_set_buffer,
492 .reset_buffer = etb_reset_buffer,
493 .update_buffer = etb_update_buffer,
494};
495
496static const struct coresight_ops etb_cs_ops = {
497 .sink_ops = &etb_sink_ops,
498};
499
500static void etb_dump(struct etb_drvdata *drvdata)
501{
502 unsigned long flags;
503
504 spin_lock_irqsave(&drvdata->spinlock, flags);
505 if (local_read(&drvdata->mode) == CS_MODE_SYSFS) {
506 etb_disable_hw(drvdata);
507 etb_dump_hw(drvdata);
508 etb_enable_hw(drvdata);
509 }
510 spin_unlock_irqrestore(&drvdata->spinlock, flags);
511
512 dev_info(drvdata->dev, "ETB dumped\n");
513}
514
515static int etb_open(struct inode *inode, struct file *file)
516{
517 struct etb_drvdata *drvdata = container_of(file->private_data,
518 struct etb_drvdata, miscdev);
519
520 if (local_cmpxchg(&drvdata->reading, 0, 1))
521 return -EBUSY;
522
523 dev_dbg(drvdata->dev, "%s: successfully opened\n", __func__);
524 return 0;
525}
526
527static ssize_t etb_read(struct file *file, char __user *data,
528 size_t len, loff_t *ppos)
529{
530 u32 depth;
531 struct etb_drvdata *drvdata = container_of(file->private_data,
532 struct etb_drvdata, miscdev);
533
534 etb_dump(drvdata);
535
536 depth = drvdata->buffer_depth;
537 if (*ppos + len > depth * 4)
538 len = depth * 4 - *ppos;
539
540 if (copy_to_user(data, drvdata->buf + *ppos, len)) {
541 dev_dbg(drvdata->dev, "%s: copy_to_user failed\n", __func__);
542 return -EFAULT;
543 }
544
545 *ppos += len;
546
547 dev_dbg(drvdata->dev, "%s: %zu bytes copied, %d bytes left\n",
548 __func__, len, (int)(depth * 4 - *ppos));
549 return len;
550}
551
552static int etb_release(struct inode *inode, struct file *file)
553{
554 struct etb_drvdata *drvdata = container_of(file->private_data,
555 struct etb_drvdata, miscdev);
556 local_set(&drvdata->reading, 0);
557
558 dev_dbg(drvdata->dev, "%s: released\n", __func__);
559 return 0;
560}
561
562static const struct file_operations etb_fops = {
563 .owner = THIS_MODULE,
564 .open = etb_open,
565 .read = etb_read,
566 .release = etb_release,
567 .llseek = no_llseek,
568};
569
570#define coresight_etb10_reg(name, offset) \
571 coresight_simple_reg32(struct etb_drvdata, name, offset)
572
573coresight_etb10_reg(rdp, ETB_RAM_DEPTH_REG);
574coresight_etb10_reg(sts, ETB_STATUS_REG);
575coresight_etb10_reg(rrp, ETB_RAM_READ_POINTER);
576coresight_etb10_reg(rwp, ETB_RAM_WRITE_POINTER);
577coresight_etb10_reg(trg, ETB_TRG);
578coresight_etb10_reg(ctl, ETB_CTL_REG);
579coresight_etb10_reg(ffsr, ETB_FFSR);
580coresight_etb10_reg(ffcr, ETB_FFCR);
581
582static struct attribute *coresight_etb_mgmt_attrs[] = {
583 &dev_attr_rdp.attr,
584 &dev_attr_sts.attr,
585 &dev_attr_rrp.attr,
586 &dev_attr_rwp.attr,
587 &dev_attr_trg.attr,
588 &dev_attr_ctl.attr,
589 &dev_attr_ffsr.attr,
590 &dev_attr_ffcr.attr,
591 NULL,
592};
593
594static ssize_t trigger_cntr_show(struct device *dev,
595 struct device_attribute *attr, char *buf)
596{
597 struct etb_drvdata *drvdata = dev_get_drvdata(dev->parent);
598 unsigned long val = drvdata->trigger_cntr;
599
600 return sprintf(buf, "%#lx\n", val);
601}
602
603static ssize_t trigger_cntr_store(struct device *dev,
604 struct device_attribute *attr,
605 const char *buf, size_t size)
606{
607 int ret;
608 unsigned long val;
609 struct etb_drvdata *drvdata = dev_get_drvdata(dev->parent);
610
611 ret = kstrtoul(buf, 16, &val);
612 if (ret)
613 return ret;
614
615 drvdata->trigger_cntr = val;
616 return size;
617}
618static DEVICE_ATTR_RW(trigger_cntr);
619
620static struct attribute *coresight_etb_attrs[] = {
621 &dev_attr_trigger_cntr.attr,
622 NULL,
623};
624
625static const struct attribute_group coresight_etb_group = {
626 .attrs = coresight_etb_attrs,
627};
628
629static const struct attribute_group coresight_etb_mgmt_group = {
630 .attrs = coresight_etb_mgmt_attrs,
631 .name = "mgmt",
632};
633
634const struct attribute_group *coresight_etb_groups[] = {
635 &coresight_etb_group,
636 &coresight_etb_mgmt_group,
637 NULL,
638};
639
640static int etb_probe(struct amba_device *adev, const struct amba_id *id)
641{
642 int ret;
643 void __iomem *base;
644 struct device *dev = &adev->dev;
645 struct coresight_platform_data *pdata = NULL;
646 struct etb_drvdata *drvdata;
647 struct resource *res = &adev->res;
648 struct coresight_desc desc = { 0 };
649 struct device_node *np = adev->dev.of_node;
650
651 if (np) {
652 pdata = of_get_coresight_platform_data(dev, np);
653 if (IS_ERR(pdata))
654 return PTR_ERR(pdata);
655 adev->dev.platform_data = pdata;
656 }
657
658 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
659 if (!drvdata)
660 return -ENOMEM;
661
662 drvdata->dev = &adev->dev;
663 drvdata->atclk = devm_clk_get(&adev->dev, "atclk");
664 if (!IS_ERR(drvdata->atclk)) {
665 ret = clk_prepare_enable(drvdata->atclk);
666 if (ret)
667 return ret;
668 }
669 dev_set_drvdata(dev, drvdata);
670
671
672 base = devm_ioremap_resource(dev, res);
673 if (IS_ERR(base))
674 return PTR_ERR(base);
675
676 drvdata->base = base;
677
678 spin_lock_init(&drvdata->spinlock);
679
680 drvdata->buffer_depth = etb_get_buffer_depth(drvdata);
681 pm_runtime_put(&adev->dev);
682
683 if (drvdata->buffer_depth & 0x80000000)
684 return -EINVAL;
685
686 drvdata->buf = devm_kcalloc(dev,
687 drvdata->buffer_depth, 4, GFP_KERNEL);
688 if (!drvdata->buf)
689 return -ENOMEM;
690
691 desc.type = CORESIGHT_DEV_TYPE_SINK;
692 desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER;
693 desc.ops = &etb_cs_ops;
694 desc.pdata = pdata;
695 desc.dev = dev;
696 desc.groups = coresight_etb_groups;
697 drvdata->csdev = coresight_register(&desc);
698 if (IS_ERR(drvdata->csdev))
699 return PTR_ERR(drvdata->csdev);
700
701 drvdata->miscdev.name = pdata->name;
702 drvdata->miscdev.minor = MISC_DYNAMIC_MINOR;
703 drvdata->miscdev.fops = &etb_fops;
704 ret = misc_register(&drvdata->miscdev);
705 if (ret)
706 goto err_misc_register;
707
708 return 0;
709
710err_misc_register:
711 coresight_unregister(drvdata->csdev);
712 return ret;
713}
714
715#ifdef CONFIG_PM
716static int etb_runtime_suspend(struct device *dev)
717{
718 struct etb_drvdata *drvdata = dev_get_drvdata(dev);
719
720 if (drvdata && !IS_ERR(drvdata->atclk))
721 clk_disable_unprepare(drvdata->atclk);
722
723 return 0;
724}
725
726static int etb_runtime_resume(struct device *dev)
727{
728 struct etb_drvdata *drvdata = dev_get_drvdata(dev);
729
730 if (drvdata && !IS_ERR(drvdata->atclk))
731 clk_prepare_enable(drvdata->atclk);
732
733 return 0;
734}
735#endif
736
737static const struct dev_pm_ops etb_dev_pm_ops = {
738 SET_RUNTIME_PM_OPS(etb_runtime_suspend, etb_runtime_resume, NULL)
739};
740
741static const struct amba_id etb_ids[] = {
742 {
743 .id = 0x000bb907,
744 .mask = 0x000fffff,
745 },
746 { 0, 0},
747};
748
749static struct amba_driver etb_driver = {
750 .drv = {
751 .name = "coresight-etb10",
752 .owner = THIS_MODULE,
753 .pm = &etb_dev_pm_ops,
754 .suppress_bind_attrs = true,
755
756 },
757 .probe = etb_probe,
758 .id_table = etb_ids,
759};
760builtin_amba_driver(etb_driver);
761