1
2
3
4#ifndef _MLXSW_CORE_H
5#define _MLXSW_CORE_H
6
7#include <linux/module.h>
8#include <linux/device.h>
9#include <linux/slab.h>
10#include <linux/gfp.h>
11#include <linux/types.h>
12#include <linux/skbuff.h>
13#include <linux/workqueue.h>
14#include <linux/net_namespace.h>
15#include <net/devlink.h>
16
17#include "trap.h"
18#include "reg.h"
19#include "cmd.h"
20#include "resources.h"
21
22struct mlxsw_core;
23struct mlxsw_core_port;
24struct mlxsw_driver;
25struct mlxsw_bus;
26struct mlxsw_bus_info;
27struct mlxsw_fw_rev;
28
29unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core);
30
31void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core);
32
33bool mlxsw_core_res_query_enabled(const struct mlxsw_core *mlxsw_core);
34
35bool mlxsw_core_temp_warn_enabled(const struct mlxsw_core *mlxsw_core);
36
37bool
38mlxsw_core_fw_rev_minor_subminor_validate(const struct mlxsw_fw_rev *rev,
39 const struct mlxsw_fw_rev *req_rev);
40
41int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver);
42void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver);
43
44int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
45 const struct mlxsw_bus *mlxsw_bus,
46 void *bus_priv, bool reload,
47 struct devlink *devlink,
48 struct netlink_ext_ack *extack);
49void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core, bool reload);
50
51struct mlxsw_tx_info {
52 u8 local_port;
53 bool is_emad;
54};
55
56bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core,
57 const struct mlxsw_tx_info *tx_info);
58int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
59 const struct mlxsw_tx_info *tx_info);
60void mlxsw_core_ptp_transmitted(struct mlxsw_core *mlxsw_core,
61 struct sk_buff *skb, u8 local_port);
62
63struct mlxsw_rx_listener {
64 void (*func)(struct sk_buff *skb, u8 local_port, void *priv);
65 u8 local_port;
66 u8 mirror_reason;
67 u16 trap_id;
68};
69
70struct mlxsw_event_listener {
71 void (*func)(const struct mlxsw_reg_info *reg,
72 char *payload, void *priv);
73 enum mlxsw_event_trap_id trap_id;
74};
75
76struct mlxsw_listener {
77 u16 trap_id;
78 union {
79 struct mlxsw_rx_listener rx_listener;
80 struct mlxsw_event_listener event_listener;
81 };
82 enum mlxsw_reg_hpkt_action en_action;
83 enum mlxsw_reg_hpkt_action dis_action;
84 u8 en_trap_group;
85 u8 dis_trap_group;
86 u8 is_ctrl:1,
87 is_event:1,
88 enabled_on_register:1;
89
90
91};
92
93#define __MLXSW_RXL(_func, _trap_id, _en_action, _is_ctrl, _en_trap_group, \
94 _dis_action, _enabled_on_register, _dis_trap_group, \
95 _mirror_reason) \
96 { \
97 .trap_id = MLXSW_TRAP_ID_##_trap_id, \
98 .rx_listener = \
99 { \
100 .func = _func, \
101 .local_port = MLXSW_PORT_DONT_CARE, \
102 .mirror_reason = _mirror_reason, \
103 .trap_id = MLXSW_TRAP_ID_##_trap_id, \
104 }, \
105 .en_action = MLXSW_REG_HPKT_ACTION_##_en_action, \
106 .dis_action = MLXSW_REG_HPKT_ACTION_##_dis_action, \
107 .en_trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_en_trap_group, \
108 .dis_trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_dis_trap_group, \
109 .is_ctrl = _is_ctrl, \
110 .enabled_on_register = _enabled_on_register, \
111 }
112
113#define MLXSW_RXL(_func, _trap_id, _en_action, _is_ctrl, _trap_group, \
114 _dis_action) \
115 __MLXSW_RXL(_func, _trap_id, _en_action, _is_ctrl, _trap_group, \
116 _dis_action, true, _trap_group, 0)
117
118#define MLXSW_RXL_DIS(_func, _trap_id, _en_action, _is_ctrl, _en_trap_group, \
119 _dis_action, _dis_trap_group) \
120 __MLXSW_RXL(_func, _trap_id, _en_action, _is_ctrl, _en_trap_group, \
121 _dis_action, false, _dis_trap_group, 0)
122
123#define MLXSW_RXL_MIRROR(_func, _session_id, _trap_group, _mirror_reason) \
124 __MLXSW_RXL(_func, MIRROR_SESSION##_session_id, TRAP_TO_CPU, false, \
125 _trap_group, TRAP_TO_CPU, true, _trap_group, \
126 _mirror_reason)
127
128#define MLXSW_EVENTL(_func, _trap_id, _trap_group) \
129 { \
130 .trap_id = MLXSW_TRAP_ID_##_trap_id, \
131 .event_listener = \
132 { \
133 .func = _func, \
134 .trap_id = MLXSW_TRAP_ID_##_trap_id, \
135 }, \
136 .en_action = MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU, \
137 .en_trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_trap_group, \
138 .is_event = true, \
139 .enabled_on_register = true, \
140 }
141
142int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core,
143 const struct mlxsw_rx_listener *rxl,
144 void *priv, bool enabled);
145void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core,
146 const struct mlxsw_rx_listener *rxl);
147
148int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core,
149 const struct mlxsw_event_listener *el,
150 void *priv);
151void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core,
152 const struct mlxsw_event_listener *el);
153
154int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core,
155 const struct mlxsw_listener *listener,
156 void *priv);
157void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core,
158 const struct mlxsw_listener *listener,
159 void *priv);
160int mlxsw_core_trap_state_set(struct mlxsw_core *mlxsw_core,
161 const struct mlxsw_listener *listener,
162 bool enabled);
163
164typedef void mlxsw_reg_trans_cb_t(struct mlxsw_core *mlxsw_core, char *payload,
165 size_t payload_len, unsigned long cb_priv);
166
167int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core,
168 const struct mlxsw_reg_info *reg, char *payload,
169 struct list_head *bulk_list,
170 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv);
171int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core,
172 const struct mlxsw_reg_info *reg, char *payload,
173 struct list_head *bulk_list,
174 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv);
175int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list);
176
177int mlxsw_reg_query(struct mlxsw_core *mlxsw_core,
178 const struct mlxsw_reg_info *reg, char *payload);
179int mlxsw_reg_write(struct mlxsw_core *mlxsw_core,
180 const struct mlxsw_reg_info *reg, char *payload);
181
182struct mlxsw_rx_info {
183 bool is_lag;
184 union {
185 u16 sys_port;
186 u16 lag_id;
187 } u;
188 u8 lag_port_index;
189 u8 mirror_reason;
190 int trap_id;
191};
192
193void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
194 struct mlxsw_rx_info *rx_info);
195
196void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core,
197 u16 lag_id, u8 port_index, u8 local_port);
198u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core,
199 u16 lag_id, u8 port_index);
200void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
201 u16 lag_id, u8 local_port);
202
203void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port);
204int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port,
205 u32 port_number, bool split, u32 split_port_subnumber,
206 bool splittable, u32 lanes,
207 const unsigned char *switch_id,
208 unsigned char switch_id_len);
209void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port);
210int mlxsw_core_cpu_port_init(struct mlxsw_core *mlxsw_core,
211 void *port_driver_priv,
212 const unsigned char *switch_id,
213 unsigned char switch_id_len);
214void mlxsw_core_cpu_port_fini(struct mlxsw_core *mlxsw_core);
215void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port,
216 void *port_driver_priv, struct net_device *dev);
217void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port,
218 void *port_driver_priv);
219void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port,
220 void *port_driver_priv);
221enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core,
222 u8 local_port);
223struct devlink_port *
224mlxsw_core_port_devlink_port_get(struct mlxsw_core *mlxsw_core,
225 u8 local_port);
226struct mlxsw_env *mlxsw_core_env(const struct mlxsw_core *mlxsw_core);
227bool mlxsw_core_is_initialized(const struct mlxsw_core *mlxsw_core);
228int mlxsw_core_module_max_width(struct mlxsw_core *mlxsw_core, u8 module);
229
230int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay);
231bool mlxsw_core_schedule_work(struct work_struct *work);
232void mlxsw_core_flush_owq(void);
233int mlxsw_core_resources_query(struct mlxsw_core *mlxsw_core, char *mbox,
234 struct mlxsw_res *res);
235
236#define MLXSW_CONFIG_PROFILE_SWID_COUNT 8
237
238struct mlxsw_swid_config {
239 u8 used_type:1,
240 used_properties:1;
241 u8 type;
242 u8 properties;
243};
244
245struct mlxsw_config_profile {
246 u16 used_max_vepa_channels:1,
247 used_max_mid:1,
248 used_max_pgt:1,
249 used_max_system_port:1,
250 used_max_vlan_groups:1,
251 used_max_regions:1,
252 used_flood_tables:1,
253 used_flood_mode:1,
254 used_max_ib_mc:1,
255 used_max_pkey:1,
256 used_ar_sec:1,
257 used_adaptive_routing_group_cap:1,
258 used_kvd_sizes:1;
259 u8 max_vepa_channels;
260 u16 max_mid;
261 u16 max_pgt;
262 u16 max_system_port;
263 u16 max_vlan_groups;
264 u16 max_regions;
265 u8 max_flood_tables;
266 u8 max_vid_flood_tables;
267 u8 flood_mode;
268 u8 max_fid_offset_flood_tables;
269 u16 fid_offset_flood_table_size;
270 u8 max_fid_flood_tables;
271 u16 fid_flood_table_size;
272 u16 max_ib_mc;
273 u16 max_pkey;
274 u8 ar_sec;
275 u16 adaptive_routing_group_cap;
276 u8 arn;
277 u32 kvd_linear_size;
278 u8 kvd_hash_single_parts;
279 u8 kvd_hash_double_parts;
280 struct mlxsw_swid_config swid_config[MLXSW_CONFIG_PROFILE_SWID_COUNT];
281};
282
283struct mlxsw_driver {
284 struct list_head list;
285 const char *kind;
286 size_t priv_size;
287 const struct mlxsw_fw_rev *fw_req_rev;
288 const char *fw_filename;
289 int (*init)(struct mlxsw_core *mlxsw_core,
290 const struct mlxsw_bus_info *mlxsw_bus_info,
291 struct netlink_ext_ack *extack);
292 void (*fini)(struct mlxsw_core *mlxsw_core);
293 int (*basic_trap_groups_set)(struct mlxsw_core *mlxsw_core);
294 int (*port_type_set)(struct mlxsw_core *mlxsw_core, u8 local_port,
295 enum devlink_port_type new_type);
296 int (*port_split)(struct mlxsw_core *mlxsw_core, u8 local_port,
297 unsigned int count, struct netlink_ext_ack *extack);
298 int (*port_unsplit)(struct mlxsw_core *mlxsw_core, u8 local_port,
299 struct netlink_ext_ack *extack);
300 int (*sb_pool_get)(struct mlxsw_core *mlxsw_core,
301 unsigned int sb_index, u16 pool_index,
302 struct devlink_sb_pool_info *pool_info);
303 int (*sb_pool_set)(struct mlxsw_core *mlxsw_core,
304 unsigned int sb_index, u16 pool_index, u32 size,
305 enum devlink_sb_threshold_type threshold_type,
306 struct netlink_ext_ack *extack);
307 int (*sb_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port,
308 unsigned int sb_index, u16 pool_index,
309 u32 *p_threshold);
310 int (*sb_port_pool_set)(struct mlxsw_core_port *mlxsw_core_port,
311 unsigned int sb_index, u16 pool_index,
312 u32 threshold, struct netlink_ext_ack *extack);
313 int (*sb_tc_pool_bind_get)(struct mlxsw_core_port *mlxsw_core_port,
314 unsigned int sb_index, u16 tc_index,
315 enum devlink_sb_pool_type pool_type,
316 u16 *p_pool_index, u32 *p_threshold);
317 int (*sb_tc_pool_bind_set)(struct mlxsw_core_port *mlxsw_core_port,
318 unsigned int sb_index, u16 tc_index,
319 enum devlink_sb_pool_type pool_type,
320 u16 pool_index, u32 threshold,
321 struct netlink_ext_ack *extack);
322 int (*sb_occ_snapshot)(struct mlxsw_core *mlxsw_core,
323 unsigned int sb_index);
324 int (*sb_occ_max_clear)(struct mlxsw_core *mlxsw_core,
325 unsigned int sb_index);
326 int (*sb_occ_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port,
327 unsigned int sb_index, u16 pool_index,
328 u32 *p_cur, u32 *p_max);
329 int (*sb_occ_tc_port_bind_get)(struct mlxsw_core_port *mlxsw_core_port,
330 unsigned int sb_index, u16 tc_index,
331 enum devlink_sb_pool_type pool_type,
332 u32 *p_cur, u32 *p_max);
333 int (*trap_init)(struct mlxsw_core *mlxsw_core,
334 const struct devlink_trap *trap, void *trap_ctx);
335 void (*trap_fini)(struct mlxsw_core *mlxsw_core,
336 const struct devlink_trap *trap, void *trap_ctx);
337 int (*trap_action_set)(struct mlxsw_core *mlxsw_core,
338 const struct devlink_trap *trap,
339 enum devlink_trap_action action,
340 struct netlink_ext_ack *extack);
341 int (*trap_group_init)(struct mlxsw_core *mlxsw_core,
342 const struct devlink_trap_group *group);
343 int (*trap_group_set)(struct mlxsw_core *mlxsw_core,
344 const struct devlink_trap_group *group,
345 const struct devlink_trap_policer *policer,
346 struct netlink_ext_ack *extack);
347 int (*trap_policer_init)(struct mlxsw_core *mlxsw_core,
348 const struct devlink_trap_policer *policer);
349 void (*trap_policer_fini)(struct mlxsw_core *mlxsw_core,
350 const struct devlink_trap_policer *policer);
351 int (*trap_policer_set)(struct mlxsw_core *mlxsw_core,
352 const struct devlink_trap_policer *policer,
353 u64 rate, u64 burst,
354 struct netlink_ext_ack *extack);
355 int (*trap_policer_counter_get)(struct mlxsw_core *mlxsw_core,
356 const struct devlink_trap_policer *policer,
357 u64 *p_drops);
358 void (*txhdr_construct)(struct sk_buff *skb,
359 const struct mlxsw_tx_info *tx_info);
360 int (*resources_register)(struct mlxsw_core *mlxsw_core);
361 int (*kvd_sizes_get)(struct mlxsw_core *mlxsw_core,
362 const struct mlxsw_config_profile *profile,
363 u64 *p_single_size, u64 *p_double_size,
364 u64 *p_linear_size);
365 int (*params_register)(struct mlxsw_core *mlxsw_core);
366 void (*params_unregister)(struct mlxsw_core *mlxsw_core);
367
368
369
370
371 void (*ptp_transmitted)(struct mlxsw_core *mlxsw_core,
372 struct sk_buff *skb, u8 local_port);
373
374 u8 txhdr_len;
375 const struct mlxsw_config_profile *profile;
376 bool res_query_enabled;
377 bool fw_fatal_enabled;
378 bool temp_warn_enabled;
379};
380
381int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core,
382 const struct mlxsw_config_profile *profile,
383 u64 *p_single_size, u64 *p_double_size,
384 u64 *p_linear_size);
385
386u32 mlxsw_core_read_frc_h(struct mlxsw_core *mlxsw_core);
387u32 mlxsw_core_read_frc_l(struct mlxsw_core *mlxsw_core);
388
389void mlxsw_core_emad_string_tlv_enable(struct mlxsw_core *mlxsw_core);
390
391bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core,
392 enum mlxsw_res_id res_id);
393
394#define MLXSW_CORE_RES_VALID(mlxsw_core, short_res_id) \
395 mlxsw_core_res_valid(mlxsw_core, MLXSW_RES_ID_##short_res_id)
396
397u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core,
398 enum mlxsw_res_id res_id);
399
400#define MLXSW_CORE_RES_GET(mlxsw_core, short_res_id) \
401 mlxsw_core_res_get(mlxsw_core, MLXSW_RES_ID_##short_res_id)
402
403static inline struct net *mlxsw_core_net(struct mlxsw_core *mlxsw_core)
404{
405 return devlink_net(priv_to_devlink(mlxsw_core));
406}
407
408#define MLXSW_BUS_F_TXRX BIT(0)
409#define MLXSW_BUS_F_RESET BIT(1)
410
411struct mlxsw_bus {
412 const char *kind;
413 int (*init)(void *bus_priv, struct mlxsw_core *mlxsw_core,
414 const struct mlxsw_config_profile *profile,
415 struct mlxsw_res *res);
416 void (*fini)(void *bus_priv);
417 bool (*skb_transmit_busy)(void *bus_priv,
418 const struct mlxsw_tx_info *tx_info);
419 int (*skb_transmit)(void *bus_priv, struct sk_buff *skb,
420 const struct mlxsw_tx_info *tx_info);
421 int (*cmd_exec)(void *bus_priv, u16 opcode, u8 opcode_mod,
422 u32 in_mod, bool out_mbox_direct,
423 char *in_mbox, size_t in_mbox_size,
424 char *out_mbox, size_t out_mbox_size,
425 u8 *p_status);
426 u32 (*read_frc_h)(void *bus_priv);
427 u32 (*read_frc_l)(void *bus_priv);
428 u8 features;
429};
430
431struct mlxsw_fw_rev {
432 u16 major;
433 u16 minor;
434 u16 subminor;
435 u16 can_reset_minor;
436};
437
438struct mlxsw_bus_info {
439 const char *device_kind;
440 const char *device_name;
441 struct device *dev;
442 struct mlxsw_fw_rev fw_rev;
443 u8 vsd[MLXSW_CMD_BOARDINFO_VSD_LEN];
444 u8 psid[MLXSW_CMD_BOARDINFO_PSID_LEN];
445 u8 low_frequency:1,
446 read_frc_capable:1;
447};
448
449struct mlxsw_hwmon;
450
451#ifdef CONFIG_MLXSW_CORE_HWMON
452
453int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core,
454 const struct mlxsw_bus_info *mlxsw_bus_info,
455 struct mlxsw_hwmon **p_hwmon);
456void mlxsw_hwmon_fini(struct mlxsw_hwmon *mlxsw_hwmon);
457
458#else
459
460static inline int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core,
461 const struct mlxsw_bus_info *mlxsw_bus_info,
462 struct mlxsw_hwmon **p_hwmon)
463{
464 return 0;
465}
466
467static inline void mlxsw_hwmon_fini(struct mlxsw_hwmon *mlxsw_hwmon)
468{
469}
470
471#endif
472
473struct mlxsw_thermal;
474
475#ifdef CONFIG_MLXSW_CORE_THERMAL
476
477int mlxsw_thermal_init(struct mlxsw_core *mlxsw_core,
478 const struct mlxsw_bus_info *mlxsw_bus_info,
479 struct mlxsw_thermal **p_thermal);
480void mlxsw_thermal_fini(struct mlxsw_thermal *thermal);
481
482#else
483
484static inline int mlxsw_thermal_init(struct mlxsw_core *mlxsw_core,
485 const struct mlxsw_bus_info *mlxsw_bus_info,
486 struct mlxsw_thermal **p_thermal)
487{
488 return 0;
489}
490
491static inline void mlxsw_thermal_fini(struct mlxsw_thermal *thermal)
492{
493}
494
495#endif
496
497enum mlxsw_devlink_param_id {
498 MLXSW_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX,
499 MLXSW_DEVLINK_PARAM_ID_ACL_REGION_REHASH_INTERVAL,
500};
501
502struct mlxsw_skb_cb {
503 union {
504 struct mlxsw_tx_info tx_info;
505 u32 cookie_index;
506 };
507};
508
509static inline struct mlxsw_skb_cb *mlxsw_skb_cb(struct sk_buff *skb)
510{
511 BUILD_BUG_ON(sizeof(mlxsw_skb_cb) > sizeof(skb->cb));
512 return (struct mlxsw_skb_cb *) skb->cb;
513}
514
515#endif
516
