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13#include <linux/init.h>
14#include <linux/pci.h>
15#include <linux/workqueue.h>
16#include <linux/interrupt.h>
17#include <linux/delay.h>
18#include <linux/module.h>
19#include <linux/io.h>
20#include <linux/slab.h>
21
22#include <pcmcia/ss.h>
23
24#include "yenta_socket.h"
25#include "i82365.h"
26
27static bool disable_clkrun;
28module_param(disable_clkrun, bool, 0444);
29MODULE_PARM_DESC(disable_clkrun, "If PC card doesn't function properly, please try this option");
30
31static bool isa_probe = 1;
32module_param(isa_probe, bool, 0444);
33MODULE_PARM_DESC(isa_probe, "If set ISA interrupts are probed (default). Set to N to disable probing");
34
35static bool pwr_irqs_off;
36module_param(pwr_irqs_off, bool, 0644);
37MODULE_PARM_DESC(pwr_irqs_off, "Force IRQs off during power-on of slot. Use only when seeing IRQ storms!");
38
39static char o2_speedup[] = "default";
40module_param_string(o2_speedup, o2_speedup, sizeof(o2_speedup), 0444);
41MODULE_PARM_DESC(o2_speedup, "Use prefetch/burst for O2-bridges: 'on', 'off' "
42 "or 'default' (uses recommended behaviour for the detected bridge)");
43
44
45
46
47
48
49
50
51
52
53static u32 isa_interrupts = 0x0ef8;
54
55
56#define debug(x, s, args...) dev_dbg(&s->dev->dev, x, ##args)
57
58
59#define to_cycles(ns) ((ns)/120)
60#define to_ns(cycles) ((cycles)*120)
61
62
63
64
65
66#ifdef CONFIG_YENTA_TI
67static int yenta_probe_cb_irq(struct yenta_socket *socket);
68static unsigned int yenta_probe_irq(struct yenta_socket *socket,
69 u32 isa_irq_mask);
70#endif
71
72
73static unsigned int override_bios;
74module_param(override_bios, uint, 0000);
75MODULE_PARM_DESC(override_bios, "yenta ignore bios resource allocation");
76
77
78
79
80
81
82static inline u32 cb_readl(struct yenta_socket *socket, unsigned reg)
83{
84 u32 val = readl(socket->base + reg);
85 debug("%04x %08x\n", socket, reg, val);
86 return val;
87}
88
89static inline void cb_writel(struct yenta_socket *socket, unsigned reg, u32 val)
90{
91 debug("%04x %08x\n", socket, reg, val);
92 writel(val, socket->base + reg);
93 readl(socket->base + reg);
94}
95
96static inline u8 config_readb(struct yenta_socket *socket, unsigned offset)
97{
98 u8 val;
99 pci_read_config_byte(socket->dev, offset, &val);
100 debug("%04x %02x\n", socket, offset, val);
101 return val;
102}
103
104static inline u16 config_readw(struct yenta_socket *socket, unsigned offset)
105{
106 u16 val;
107 pci_read_config_word(socket->dev, offset, &val);
108 debug("%04x %04x\n", socket, offset, val);
109 return val;
110}
111
112static inline u32 config_readl(struct yenta_socket *socket, unsigned offset)
113{
114 u32 val;
115 pci_read_config_dword(socket->dev, offset, &val);
116 debug("%04x %08x\n", socket, offset, val);
117 return val;
118}
119
120static inline void config_writeb(struct yenta_socket *socket, unsigned offset, u8 val)
121{
122 debug("%04x %02x\n", socket, offset, val);
123 pci_write_config_byte(socket->dev, offset, val);
124}
125
126static inline void config_writew(struct yenta_socket *socket, unsigned offset, u16 val)
127{
128 debug("%04x %04x\n", socket, offset, val);
129 pci_write_config_word(socket->dev, offset, val);
130}
131
132static inline void config_writel(struct yenta_socket *socket, unsigned offset, u32 val)
133{
134 debug("%04x %08x\n", socket, offset, val);
135 pci_write_config_dword(socket->dev, offset, val);
136}
137
138static inline u8 exca_readb(struct yenta_socket *socket, unsigned reg)
139{
140 u8 val = readb(socket->base + 0x800 + reg);
141 debug("%04x %02x\n", socket, reg, val);
142 return val;
143}
144
145static inline u8 exca_readw(struct yenta_socket *socket, unsigned reg)
146{
147 u16 val;
148 val = readb(socket->base + 0x800 + reg);
149 val |= readb(socket->base + 0x800 + reg + 1) << 8;
150 debug("%04x %04x\n", socket, reg, val);
151 return val;
152}
153
154static inline void exca_writeb(struct yenta_socket *socket, unsigned reg, u8 val)
155{
156 debug("%04x %02x\n", socket, reg, val);
157 writeb(val, socket->base + 0x800 + reg);
158 readb(socket->base + 0x800 + reg);
159}
160
161static void exca_writew(struct yenta_socket *socket, unsigned reg, u16 val)
162{
163 debug("%04x %04x\n", socket, reg, val);
164 writeb(val, socket->base + 0x800 + reg);
165 writeb(val >> 8, socket->base + 0x800 + reg + 1);
166
167
168 readb(socket->base + 0x800 + reg);
169 readb(socket->base + 0x800 + reg + 1);
170}
171
172static ssize_t show_yenta_registers(struct device *yentadev, struct device_attribute *attr, char *buf)
173{
174 struct pci_dev *dev = to_pci_dev(yentadev);
175 struct yenta_socket *socket = pci_get_drvdata(dev);
176 int offset = 0, i;
177
178 offset = snprintf(buf, PAGE_SIZE, "CB registers:");
179 for (i = 0; i < 0x24; i += 4) {
180 unsigned val;
181 if (!(i & 15))
182 offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i);
183 val = cb_readl(socket, i);
184 offset += snprintf(buf + offset, PAGE_SIZE - offset, " %08x", val);
185 }
186
187 offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n\nExCA registers:");
188 for (i = 0; i < 0x45; i++) {
189 unsigned char val;
190 if (!(i & 7)) {
191 if (i & 8) {
192 memcpy(buf + offset, " -", 2);
193 offset += 2;
194 } else
195 offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i);
196 }
197 val = exca_readb(socket, i);
198 offset += snprintf(buf + offset, PAGE_SIZE - offset, " %02x", val);
199 }
200 buf[offset++] = '\n';
201 return offset;
202}
203
204static DEVICE_ATTR(yenta_registers, S_IRUSR, show_yenta_registers, NULL);
205
206
207
208
209
210static int yenta_get_status(struct pcmcia_socket *sock, unsigned int *value)
211{
212 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
213 unsigned int val;
214 u32 state = cb_readl(socket, CB_SOCKET_STATE);
215
216 val = (state & CB_3VCARD) ? SS_3VCARD : 0;
217 val |= (state & CB_XVCARD) ? SS_XVCARD : 0;
218 val |= (state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ? 0 : SS_PENDING;
219 val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? SS_PENDING : 0;
220
221
222 if (state & CB_CBCARD) {
223 val |= SS_CARDBUS;
224 val |= (state & CB_CARDSTS) ? SS_STSCHG : 0;
225 val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? 0 : SS_DETECT;
226 val |= (state & CB_PWRCYCLE) ? SS_POWERON | SS_READY : 0;
227 } else if (state & CB_16BITCARD) {
228 u8 status = exca_readb(socket, I365_STATUS);
229 val |= ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0;
230 if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
231 val |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG;
232 } else {
233 val |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD;
234 val |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN;
235 }
236 val |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0;
237 val |= (status & I365_CS_READY) ? SS_READY : 0;
238 val |= (status & I365_CS_POWERON) ? SS_POWERON : 0;
239 }
240
241 *value = val;
242 return 0;
243}
244
245static void yenta_set_power(struct yenta_socket *socket, socket_state_t *state)
246{
247
248 if (!(cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) &&
249 (socket->flags & YENTA_16BIT_POWER_EXCA)) {
250 u8 reg, old;
251 reg = old = exca_readb(socket, I365_POWER);
252 reg &= ~(I365_VCC_MASK | I365_VPP1_MASK | I365_VPP2_MASK);
253
254
255 if (socket->flags & YENTA_16BIT_POWER_DF) {
256 switch (state->Vcc) {
257 case 33:
258 reg |= I365_VCC_3V;
259 break;
260 case 50:
261 reg |= I365_VCC_5V;
262 break;
263 default:
264 reg = 0;
265 break;
266 }
267 switch (state->Vpp) {
268 case 33:
269 case 50:
270 reg |= I365_VPP1_5V;
271 break;
272 case 120:
273 reg |= I365_VPP1_12V;
274 break;
275 }
276 } else {
277
278 switch (state->Vcc) {
279 case 50:
280 reg |= I365_VCC_5V;
281 break;
282 default:
283 reg = 0;
284 break;
285 }
286 switch (state->Vpp) {
287 case 50:
288 reg |= I365_VPP1_5V | I365_VPP2_5V;
289 break;
290 case 120:
291 reg |= I365_VPP1_12V | I365_VPP2_12V;
292 break;
293 }
294 }
295
296 if (reg != old)
297 exca_writeb(socket, I365_POWER, reg);
298 } else {
299 u32 reg = 0;
300 switch (state->Vcc) {
301 case 33:
302 reg = CB_SC_VCC_3V;
303 break;
304 case 50:
305 reg = CB_SC_VCC_5V;
306 break;
307 default:
308 reg = 0;
309 break;
310 }
311 switch (state->Vpp) {
312 case 33:
313 reg |= CB_SC_VPP_3V;
314 break;
315 case 50:
316 reg |= CB_SC_VPP_5V;
317 break;
318 case 120:
319 reg |= CB_SC_VPP_12V;
320 break;
321 }
322 if (reg != cb_readl(socket, CB_SOCKET_CONTROL))
323 cb_writel(socket, CB_SOCKET_CONTROL, reg);
324 }
325}
326
327static int yenta_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
328{
329 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
330 u16 bridge;
331
332
333 if (state->Vcc == 0)
334 yenta_set_power(socket, state);
335
336 socket->io_irq = state->io_irq;
337 bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~(CB_BRIDGE_CRST | CB_BRIDGE_INTR);
338 if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) {
339 u8 intr;
340 bridge |= (state->flags & SS_RESET) ? CB_BRIDGE_CRST : 0;
341
342
343 intr = exca_readb(socket, I365_INTCTL);
344 intr = (intr & ~0xf);
345 if (!socket->dev->irq) {
346 intr |= socket->cb_irq ? socket->cb_irq : state->io_irq;
347 bridge |= CB_BRIDGE_INTR;
348 }
349 exca_writeb(socket, I365_INTCTL, intr);
350 } else {
351 u8 reg;
352
353 reg = exca_readb(socket, I365_INTCTL) & (I365_RING_ENA | I365_INTR_ENA);
354 reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET;
355 reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0;
356 if (state->io_irq != socket->dev->irq) {
357 reg |= state->io_irq;
358 bridge |= CB_BRIDGE_INTR;
359 }
360 exca_writeb(socket, I365_INTCTL, reg);
361
362 reg = exca_readb(socket, I365_POWER) & (I365_VCC_MASK|I365_VPP1_MASK);
363 reg |= I365_PWR_NORESET;
364 if (state->flags & SS_PWR_AUTO)
365 reg |= I365_PWR_AUTO;
366 if (state->flags & SS_OUTPUT_ENA)
367 reg |= I365_PWR_OUT;
368 if (exca_readb(socket, I365_POWER) != reg)
369 exca_writeb(socket, I365_POWER, reg);
370
371
372 reg = exca_readb(socket, I365_CSCINT);
373 reg &= I365_CSC_IRQ_MASK;
374 reg |= I365_CSC_DETECT;
375 if (state->flags & SS_IOCARD) {
376 if (state->csc_mask & SS_STSCHG)
377 reg |= I365_CSC_STSCHG;
378 } else {
379 if (state->csc_mask & SS_BATDEAD)
380 reg |= I365_CSC_BVD1;
381 if (state->csc_mask & SS_BATWARN)
382 reg |= I365_CSC_BVD2;
383 if (state->csc_mask & SS_READY)
384 reg |= I365_CSC_READY;
385 }
386 exca_writeb(socket, I365_CSCINT, reg);
387 exca_readb(socket, I365_CSC);
388 if (sock->zoom_video)
389 sock->zoom_video(sock, state->flags & SS_ZVCARD);
390 }
391 config_writew(socket, CB_BRIDGE_CONTROL, bridge);
392
393 cb_writel(socket, CB_SOCKET_EVENT, -1);
394 cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
395
396
397 if (state->Vcc != 0)
398 yenta_set_power(socket, state);
399 return 0;
400}
401
402static int yenta_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
403{
404 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
405 int map;
406 unsigned char ioctl, addr, enable;
407
408 map = io->map;
409
410 if (map > 1)
411 return -EINVAL;
412
413 enable = I365_ENA_IO(map);
414 addr = exca_readb(socket, I365_ADDRWIN);
415
416
417 if (addr & enable) {
418 addr &= ~enable;
419 exca_writeb(socket, I365_ADDRWIN, addr);
420 }
421
422 exca_writew(socket, I365_IO(map)+I365_W_START, io->start);
423 exca_writew(socket, I365_IO(map)+I365_W_STOP, io->stop);
424
425 ioctl = exca_readb(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map);
426 if (io->flags & MAP_0WS)
427 ioctl |= I365_IOCTL_0WS(map);
428 if (io->flags & MAP_16BIT)
429 ioctl |= I365_IOCTL_16BIT(map);
430 if (io->flags & MAP_AUTOSZ)
431 ioctl |= I365_IOCTL_IOCS16(map);
432 exca_writeb(socket, I365_IOCTL, ioctl);
433
434 if (io->flags & MAP_ACTIVE)
435 exca_writeb(socket, I365_ADDRWIN, addr | enable);
436 return 0;
437}
438
439static int yenta_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem)
440{
441 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
442 struct pci_bus_region region;
443 int map;
444 unsigned char addr, enable;
445 unsigned int start, stop, card_start;
446 unsigned short word;
447
448 pcibios_resource_to_bus(socket->dev->bus, ®ion, mem->res);
449
450 map = mem->map;
451 start = region.start;
452 stop = region.end;
453 card_start = mem->card_start;
454
455 if (map > 4 || start > stop || ((start ^ stop) >> 24) ||
456 (card_start >> 26) || mem->speed > 1000)
457 return -EINVAL;
458
459 enable = I365_ENA_MEM(map);
460 addr = exca_readb(socket, I365_ADDRWIN);
461 if (addr & enable) {
462 addr &= ~enable;
463 exca_writeb(socket, I365_ADDRWIN, addr);
464 }
465
466 exca_writeb(socket, CB_MEM_PAGE(map), start >> 24);
467
468 word = (start >> 12) & 0x0fff;
469 if (mem->flags & MAP_16BIT)
470 word |= I365_MEM_16BIT;
471 if (mem->flags & MAP_0WS)
472 word |= I365_MEM_0WS;
473 exca_writew(socket, I365_MEM(map) + I365_W_START, word);
474
475 word = (stop >> 12) & 0x0fff;
476 switch (to_cycles(mem->speed)) {
477 case 0:
478 break;
479 case 1:
480 word |= I365_MEM_WS0;
481 break;
482 case 2:
483 word |= I365_MEM_WS1;
484 break;
485 default:
486 word |= I365_MEM_WS1 | I365_MEM_WS0;
487 break;
488 }
489 exca_writew(socket, I365_MEM(map) + I365_W_STOP, word);
490
491 word = ((card_start - start) >> 12) & 0x3fff;
492 if (mem->flags & MAP_WRPROT)
493 word |= I365_MEM_WRPROT;
494 if (mem->flags & MAP_ATTRIB)
495 word |= I365_MEM_REG;
496 exca_writew(socket, I365_MEM(map) + I365_W_OFF, word);
497
498 if (mem->flags & MAP_ACTIVE)
499 exca_writeb(socket, I365_ADDRWIN, addr | enable);
500 return 0;
501}
502
503
504
505static irqreturn_t yenta_interrupt(int irq, void *dev_id)
506{
507 unsigned int events;
508 struct yenta_socket *socket = (struct yenta_socket *) dev_id;
509 u8 csc;
510 u32 cb_event;
511
512
513 cb_event = cb_readl(socket, CB_SOCKET_EVENT);
514 cb_writel(socket, CB_SOCKET_EVENT, cb_event);
515
516 csc = exca_readb(socket, I365_CSC);
517
518 if (!(cb_event || csc))
519 return IRQ_NONE;
520
521 events = (cb_event & (CB_CD1EVENT | CB_CD2EVENT)) ? SS_DETECT : 0 ;
522 events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0;
523 if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
524 events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
525 } else {
526 events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
527 events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
528 events |= (csc & I365_CSC_READY) ? SS_READY : 0;
529 }
530
531 if (events)
532 pcmcia_parse_events(&socket->socket, events);
533
534 return IRQ_HANDLED;
535}
536
537static void yenta_interrupt_wrapper(struct timer_list *t)
538{
539 struct yenta_socket *socket = from_timer(socket, t, poll_timer);
540
541 yenta_interrupt(0, (void *)socket);
542 socket->poll_timer.expires = jiffies + HZ;
543 add_timer(&socket->poll_timer);
544}
545
546static void yenta_clear_maps(struct yenta_socket *socket)
547{
548 int i;
549 struct resource res = { .start = 0, .end = 0x0fff };
550 pccard_io_map io = { 0, 0, 0, 0, 1 };
551 pccard_mem_map mem = { .res = &res, };
552
553 yenta_set_socket(&socket->socket, &dead_socket);
554 for (i = 0; i < 2; i++) {
555 io.map = i;
556 yenta_set_io_map(&socket->socket, &io);
557 }
558 for (i = 0; i < 5; i++) {
559 mem.map = i;
560 yenta_set_mem_map(&socket->socket, &mem);
561 }
562}
563
564
565static void yenta_interrogate(struct yenta_socket *socket)
566{
567 u32 state;
568
569 state = cb_readl(socket, CB_SOCKET_STATE);
570 if (!(state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ||
571 (state & (CB_CDETECT1 | CB_CDETECT2 | CB_NOTACARD | CB_BADVCCREQ)) ||
572 ((state & (CB_16BITCARD | CB_CBCARD)) == (CB_16BITCARD | CB_CBCARD)))
573 cb_writel(socket, CB_SOCKET_FORCE, CB_CVSTEST);
574}
575
576
577static int yenta_sock_init(struct pcmcia_socket *sock)
578{
579 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
580
581 exca_writeb(socket, I365_GBLCTL, 0x00);
582 exca_writeb(socket, I365_GENCTL, 0x00);
583
584
585 yenta_interrogate(socket);
586
587 yenta_clear_maps(socket);
588
589 if (socket->type && socket->type->sock_init)
590 socket->type->sock_init(socket);
591
592
593 cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
594
595 return 0;
596}
597
598static int yenta_sock_suspend(struct pcmcia_socket *sock)
599{
600 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
601
602
603 cb_writel(socket, CB_SOCKET_MASK, 0x0);
604
605 return 0;
606}
607
608
609
610
611
612
613
614
615#define BRIDGE_MEM_MAX (4*1024*1024)
616#define BRIDGE_MEM_ACC (128*1024)
617#define BRIDGE_MEM_MIN (16*1024)
618
619#define BRIDGE_IO_MAX 512
620#define BRIDGE_IO_ACC 256
621#define BRIDGE_IO_MIN 32
622
623#ifndef PCIBIOS_MIN_CARDBUS_IO
624#define PCIBIOS_MIN_CARDBUS_IO PCIBIOS_MIN_IO
625#endif
626
627static int yenta_search_one_res(struct resource *root, struct resource *res,
628 u32 min)
629{
630 u32 align, size, start, end;
631
632 if (res->flags & IORESOURCE_IO) {
633 align = 1024;
634 size = BRIDGE_IO_MAX;
635 start = PCIBIOS_MIN_CARDBUS_IO;
636 end = ~0U;
637 } else {
638 unsigned long avail = root->end - root->start;
639 int i;
640 size = BRIDGE_MEM_MAX;
641 if (size > avail/8) {
642 size = (avail+1)/8;
643
644 i = 0;
645 while ((size /= 2) != 0)
646 i++;
647 size = 1 << i;
648 }
649 if (size < min)
650 size = min;
651 align = size;
652 start = PCIBIOS_MIN_MEM;
653 end = ~0U;
654 }
655
656 do {
657 if (allocate_resource(root, res, size, start, end, align,
658 NULL, NULL) == 0) {
659 return 1;
660 }
661 size = size/2;
662 align = size;
663 } while (size >= min);
664
665 return 0;
666}
667
668
669static int yenta_search_res(struct yenta_socket *socket, struct resource *res,
670 u32 min)
671{
672 struct resource *root;
673 int i;
674
675 pci_bus_for_each_resource(socket->dev->bus, root, i) {
676 if (!root)
677 continue;
678
679 if ((res->flags ^ root->flags) &
680 (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH))
681 continue;
682
683 if (yenta_search_one_res(root, res, min))
684 return 1;
685 }
686 return 0;
687}
688
689static int yenta_allocate_res(struct yenta_socket *socket, int nr, unsigned type, int addr_start, int addr_end)
690{
691 struct pci_dev *dev = socket->dev;
692 struct resource *res;
693 struct pci_bus_region region;
694 unsigned mask;
695
696 res = &dev->resource[nr];
697
698 if (res->parent)
699 return 0;
700
701
702 mask = ~0xfff;
703 if (type & IORESOURCE_IO)
704 mask = ~3;
705
706 res->name = dev->subordinate->name;
707 res->flags = type;
708
709 region.start = config_readl(socket, addr_start) & mask;
710 region.end = config_readl(socket, addr_end) | ~mask;
711 if (region.start && region.end > region.start && !override_bios) {
712 pcibios_bus_to_resource(dev->bus, res, ®ion);
713 if (pci_claim_resource(dev, nr) == 0)
714 return 0;
715 dev_info(&dev->dev,
716 "Preassigned resource %d busy or not available, reconfiguring...\n",
717 nr);
718 }
719
720 if (type & IORESOURCE_IO) {
721 if ((yenta_search_res(socket, res, BRIDGE_IO_MAX)) ||
722 (yenta_search_res(socket, res, BRIDGE_IO_ACC)) ||
723 (yenta_search_res(socket, res, BRIDGE_IO_MIN)))
724 return 1;
725 } else {
726 if (type & IORESOURCE_PREFETCH) {
727 if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
728 (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
729 (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
730 return 1;
731
732 res->flags = IORESOURCE_MEM;
733 }
734 if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
735 (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
736 (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
737 return 1;
738 }
739
740 dev_info(&dev->dev,
741 "no resource of type %x available, trying to continue...\n",
742 type);
743 res->start = res->end = res->flags = 0;
744 return 0;
745}
746
747static void yenta_free_res(struct yenta_socket *socket, int nr)
748{
749 struct pci_dev *dev = socket->dev;
750 struct resource *res;
751
752 res = &dev->resource[nr];
753 if (res->start != 0 && res->end != 0)
754 release_resource(res);
755
756 res->start = res->end = res->flags = 0;
757}
758
759
760
761
762static void yenta_allocate_resources(struct yenta_socket *socket)
763{
764 int program = 0;
765 program += yenta_allocate_res(socket, PCI_CB_BRIDGE_IO_0_WINDOW,
766 IORESOURCE_IO,
767 PCI_CB_IO_BASE_0, PCI_CB_IO_LIMIT_0);
768 program += yenta_allocate_res(socket, PCI_CB_BRIDGE_IO_1_WINDOW,
769 IORESOURCE_IO,
770 PCI_CB_IO_BASE_1, PCI_CB_IO_LIMIT_1);
771 program += yenta_allocate_res(socket, PCI_CB_BRIDGE_MEM_0_WINDOW,
772 IORESOURCE_MEM | IORESOURCE_PREFETCH,
773 PCI_CB_MEMORY_BASE_0, PCI_CB_MEMORY_LIMIT_0);
774 program += yenta_allocate_res(socket, PCI_CB_BRIDGE_MEM_1_WINDOW,
775 IORESOURCE_MEM,
776 PCI_CB_MEMORY_BASE_1, PCI_CB_MEMORY_LIMIT_1);
777 if (program)
778 pci_setup_cardbus(socket->dev->subordinate);
779}
780
781
782
783
784
785static void yenta_free_resources(struct yenta_socket *socket)
786{
787 yenta_free_res(socket, PCI_CB_BRIDGE_IO_0_WINDOW);
788 yenta_free_res(socket, PCI_CB_BRIDGE_IO_1_WINDOW);
789 yenta_free_res(socket, PCI_CB_BRIDGE_MEM_0_WINDOW);
790 yenta_free_res(socket, PCI_CB_BRIDGE_MEM_1_WINDOW);
791}
792
793
794
795
796
797static void yenta_close(struct pci_dev *dev)
798{
799 struct yenta_socket *sock = pci_get_drvdata(dev);
800
801
802 device_remove_file(&dev->dev, &dev_attr_yenta_registers);
803
804
805 pcmcia_unregister_socket(&sock->socket);
806
807
808 cb_writel(sock, CB_SOCKET_MASK, 0x0);
809 exca_writeb(sock, I365_CSCINT, 0);
810
811 if (sock->cb_irq)
812 free_irq(sock->cb_irq, sock);
813 else
814 del_timer_sync(&sock->poll_timer);
815
816 iounmap(sock->base);
817 yenta_free_resources(sock);
818
819 pci_release_regions(dev);
820 pci_disable_device(dev);
821 pci_set_drvdata(dev, NULL);
822 kfree(sock);
823}
824
825
826static struct pccard_operations yenta_socket_operations = {
827 .init = yenta_sock_init,
828 .suspend = yenta_sock_suspend,
829 .get_status = yenta_get_status,
830 .set_socket = yenta_set_socket,
831 .set_io_map = yenta_set_io_map,
832 .set_mem_map = yenta_set_mem_map,
833};
834
835
836#ifdef CONFIG_YENTA_TI
837#include "ti113x.h"
838#endif
839#ifdef CONFIG_YENTA_RICOH
840#include "ricoh.h"
841#endif
842#ifdef CONFIG_YENTA_TOSHIBA
843#include "topic.h"
844#endif
845#ifdef CONFIG_YENTA_O2
846#include "o2micro.h"
847#endif
848
849enum {
850 CARDBUS_TYPE_DEFAULT = -1,
851 CARDBUS_TYPE_TI,
852 CARDBUS_TYPE_TI113X,
853 CARDBUS_TYPE_TI12XX,
854 CARDBUS_TYPE_TI1250,
855 CARDBUS_TYPE_RICOH,
856 CARDBUS_TYPE_TOPIC95,
857 CARDBUS_TYPE_TOPIC97,
858 CARDBUS_TYPE_O2MICRO,
859 CARDBUS_TYPE_ENE,
860};
861
862
863
864
865
866static struct cardbus_type cardbus_type[] = {
867#ifdef CONFIG_YENTA_TI
868 [CARDBUS_TYPE_TI] = {
869 .override = ti_override,
870 .save_state = ti_save_state,
871 .restore_state = ti_restore_state,
872 .sock_init = ti_init,
873 },
874 [CARDBUS_TYPE_TI113X] = {
875 .override = ti113x_override,
876 .save_state = ti_save_state,
877 .restore_state = ti_restore_state,
878 .sock_init = ti_init,
879 },
880 [CARDBUS_TYPE_TI12XX] = {
881 .override = ti12xx_override,
882 .save_state = ti_save_state,
883 .restore_state = ti_restore_state,
884 .sock_init = ti_init,
885 },
886 [CARDBUS_TYPE_TI1250] = {
887 .override = ti1250_override,
888 .save_state = ti_save_state,
889 .restore_state = ti_restore_state,
890 .sock_init = ti_init,
891 },
892 [CARDBUS_TYPE_ENE] = {
893 .override = ene_override,
894 .save_state = ti_save_state,
895 .restore_state = ti_restore_state,
896 .sock_init = ti_init,
897 },
898#endif
899#ifdef CONFIG_YENTA_RICOH
900 [CARDBUS_TYPE_RICOH] = {
901 .override = ricoh_override,
902 .save_state = ricoh_save_state,
903 .restore_state = ricoh_restore_state,
904 },
905#endif
906#ifdef CONFIG_YENTA_TOSHIBA
907 [CARDBUS_TYPE_TOPIC95] = {
908 .override = topic95_override,
909 },
910 [CARDBUS_TYPE_TOPIC97] = {
911 .override = topic97_override,
912 },
913#endif
914#ifdef CONFIG_YENTA_O2
915 [CARDBUS_TYPE_O2MICRO] = {
916 .override = o2micro_override,
917 .restore_state = o2micro_restore_state,
918 },
919#endif
920};
921
922
923static unsigned int yenta_probe_irq(struct yenta_socket *socket, u32 isa_irq_mask)
924{
925 int i;
926 unsigned long val;
927 u32 mask;
928 u8 reg;
929
930
931
932
933
934 cb_writel(socket, CB_SOCKET_EVENT, -1);
935 cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
936 reg = exca_readb(socket, I365_CSCINT);
937 exca_writeb(socket, I365_CSCINT, 0);
938 val = probe_irq_on() & isa_irq_mask;
939 for (i = 1; i < 16; i++) {
940 if (!((val >> i) & 1))
941 continue;
942 exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG | (i << 4));
943 cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
944 udelay(100);
945 cb_writel(socket, CB_SOCKET_EVENT, -1);
946 }
947 cb_writel(socket, CB_SOCKET_MASK, 0);
948 exca_writeb(socket, I365_CSCINT, reg);
949
950 mask = probe_irq_mask(val) & 0xffff;
951
952 return mask;
953}
954
955
956
957
958
959
960#ifdef CONFIG_YENTA_TI
961
962
963static irqreturn_t yenta_probe_handler(int irq, void *dev_id)
964{
965 struct yenta_socket *socket = (struct yenta_socket *) dev_id;
966 u8 csc;
967 u32 cb_event;
968
969
970 cb_event = cb_readl(socket, CB_SOCKET_EVENT);
971 cb_writel(socket, CB_SOCKET_EVENT, -1);
972 csc = exca_readb(socket, I365_CSC);
973
974 if (cb_event || csc) {
975 socket->probe_status = 1;
976 return IRQ_HANDLED;
977 }
978
979 return IRQ_NONE;
980}
981
982
983static int yenta_probe_cb_irq(struct yenta_socket *socket)
984{
985 u8 reg = 0;
986
987 if (!socket->cb_irq)
988 return -1;
989
990 socket->probe_status = 0;
991
992 if (request_irq(socket->cb_irq, yenta_probe_handler, IRQF_SHARED, "yenta", socket)) {
993 dev_warn(&socket->dev->dev,
994 "request_irq() in yenta_probe_cb_irq() failed!\n");
995 return -1;
996 }
997
998
999 if (!socket->dev->irq)
1000 reg = exca_readb(socket, I365_CSCINT);
1001 exca_writeb(socket, I365_CSCINT, reg | I365_CSC_STSCHG);
1002 cb_writel(socket, CB_SOCKET_EVENT, -1);
1003 cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
1004 cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
1005
1006 msleep(100);
1007
1008
1009 cb_writel(socket, CB_SOCKET_MASK, 0);
1010 exca_writeb(socket, I365_CSCINT, reg);
1011 cb_writel(socket, CB_SOCKET_EVENT, -1);
1012 exca_readb(socket, I365_CSC);
1013
1014 free_irq(socket->cb_irq, socket);
1015
1016 return (int) socket->probe_status;
1017}
1018
1019#endif
1020
1021
1022
1023
1024
1025static void yenta_get_socket_capabilities(struct yenta_socket *socket, u32 isa_irq_mask)
1026{
1027 socket->socket.pci_irq = socket->cb_irq;
1028 if (isa_probe)
1029 socket->socket.irq_mask = yenta_probe_irq(socket, isa_irq_mask);
1030 else
1031 socket->socket.irq_mask = 0;
1032
1033 dev_info(&socket->dev->dev, "ISA IRQ mask 0x%04x, PCI irq %d\n",
1034 socket->socket.irq_mask, socket->cb_irq);
1035}
1036
1037
1038
1039
1040static void yenta_config_init(struct yenta_socket *socket)
1041{
1042 u16 bridge;
1043 struct pci_dev *dev = socket->dev;
1044 struct pci_bus_region region;
1045
1046 pcibios_resource_to_bus(socket->dev->bus, ®ion, &dev->resource[0]);
1047
1048 config_writel(socket, CB_LEGACY_MODE_BASE, 0);
1049 config_writel(socket, PCI_BASE_ADDRESS_0, region.start);
1050 config_writew(socket, PCI_COMMAND,
1051 PCI_COMMAND_IO |
1052 PCI_COMMAND_MEMORY |
1053 PCI_COMMAND_MASTER |
1054 PCI_COMMAND_WAIT);
1055
1056
1057 config_writeb(socket, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES / 4);
1058 config_writeb(socket, PCI_LATENCY_TIMER, 168);
1059 config_writel(socket, PCI_PRIMARY_BUS,
1060 (176 << 24) |
1061 ((unsigned int)dev->subordinate->busn_res.end << 16) |
1062 ((unsigned int)dev->subordinate->busn_res.start << 8) |
1063 dev->subordinate->primary);
1064
1065
1066
1067
1068
1069
1070
1071 bridge = config_readw(socket, CB_BRIDGE_CONTROL);
1072 bridge &= ~(CB_BRIDGE_CRST | CB_BRIDGE_PREFETCH1 | CB_BRIDGE_ISAEN | CB_BRIDGE_VGAEN);
1073 bridge |= CB_BRIDGE_PREFETCH0 | CB_BRIDGE_POSTEN;
1074 config_writew(socket, CB_BRIDGE_CONTROL, bridge);
1075}
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087static void yenta_fixup_parent_bridge(struct pci_bus *cardbus_bridge)
1088{
1089 struct pci_bus *sibling;
1090 unsigned char upper_limit;
1091
1092
1093
1094
1095
1096 struct pci_bus *bridge_to_fix = cardbus_bridge->parent;
1097
1098
1099 if (bridge_to_fix->busn_res.end >= cardbus_bridge->busn_res.end)
1100 return;
1101
1102 if (!bridge_to_fix->parent)
1103 return;
1104
1105
1106 upper_limit = bridge_to_fix->parent->busn_res.end;
1107
1108
1109 list_for_each_entry(sibling, &bridge_to_fix->parent->children,
1110 node) {
1111
1112
1113
1114
1115
1116
1117 if (sibling->busn_res.start > bridge_to_fix->busn_res.end
1118 && sibling->busn_res.start <= upper_limit)
1119 upper_limit = sibling->busn_res.start - 1;
1120 }
1121
1122
1123 if (cardbus_bridge->busn_res.end > upper_limit)
1124 dev_warn(&cardbus_bridge->dev,
1125 "Upper limit for fixing this bridge's parent bridge: #%02x\n",
1126 upper_limit);
1127
1128
1129 if (bridge_to_fix->busn_res.end < upper_limit) {
1130
1131
1132 unsigned char subordinate_to_assign =
1133 min_t(int, cardbus_bridge->busn_res.end, upper_limit);
1134
1135 dev_info(&bridge_to_fix->dev,
1136 "Raising subordinate bus# of parent bus (#%02x) from #%02x to #%02x\n",
1137 bridge_to_fix->number,
1138 (int)bridge_to_fix->busn_res.end,
1139 subordinate_to_assign);
1140
1141
1142 bridge_to_fix->busn_res.end = subordinate_to_assign;
1143
1144
1145 pci_write_config_byte(bridge_to_fix->self,
1146 PCI_SUBORDINATE_BUS, bridge_to_fix->busn_res.end);
1147 }
1148}
1149
1150
1151
1152
1153
1154
1155static int yenta_probe(struct pci_dev *dev, const struct pci_device_id *id)
1156{
1157 struct yenta_socket *socket;
1158 int ret;
1159
1160
1161
1162
1163
1164
1165 if (!dev->subordinate) {
1166 dev_err(&dev->dev, "no bus associated! (try 'pci=assign-busses')\n");
1167 return -ENODEV;
1168 }
1169
1170 socket = kzalloc(sizeof(struct yenta_socket), GFP_KERNEL);
1171 if (!socket)
1172 return -ENOMEM;
1173
1174
1175 socket->socket.ops = ¥ta_socket_operations;
1176 socket->socket.resource_ops = &pccard_nonstatic_ops;
1177 socket->socket.dev.parent = &dev->dev;
1178 socket->socket.driver_data = socket;
1179 socket->socket.owner = THIS_MODULE;
1180 socket->socket.features = SS_CAP_PAGE_REGS | SS_CAP_PCCARD;
1181 socket->socket.map_size = 0x1000;
1182 socket->socket.cb_dev = dev;
1183
1184
1185 socket->dev = dev;
1186 pci_set_drvdata(dev, socket);
1187
1188
1189
1190
1191 if (pci_enable_device(dev)) {
1192 ret = -EBUSY;
1193 goto free;
1194 }
1195
1196 ret = pci_request_regions(dev, "yenta_socket");
1197 if (ret)
1198 goto disable;
1199
1200 if (!pci_resource_start(dev, 0)) {
1201 dev_err(&dev->dev, "No cardbus resource!\n");
1202 ret = -ENODEV;
1203 goto release;
1204 }
1205
1206
1207
1208
1209
1210 socket->base = ioremap(pci_resource_start(dev, 0), 0x1000);
1211 if (!socket->base) {
1212 ret = -ENOMEM;
1213 goto release;
1214 }
1215
1216
1217
1218
1219
1220 dev_info(&dev->dev, "CardBus bridge found [%04x:%04x]\n",
1221 dev->subsystem_vendor, dev->subsystem_device);
1222
1223 yenta_config_init(socket);
1224
1225
1226 cb_writel(socket, CB_SOCKET_MASK, 0x0);
1227
1228
1229 yenta_allocate_resources(socket);
1230
1231 socket->cb_irq = dev->irq;
1232
1233
1234 if (id->driver_data != CARDBUS_TYPE_DEFAULT &&
1235 id->driver_data < ARRAY_SIZE(cardbus_type)) {
1236 socket->type = &cardbus_type[id->driver_data];
1237
1238 ret = socket->type->override(socket);
1239 if (ret < 0)
1240 goto unmap;
1241 }
1242
1243
1244
1245 if (!socket->cb_irq || request_irq(socket->cb_irq, yenta_interrupt, IRQF_SHARED, "yenta", socket)) {
1246
1247 socket->cb_irq = 0;
1248 timer_setup(&socket->poll_timer, yenta_interrupt_wrapper, 0);
1249 mod_timer(&socket->poll_timer, jiffies + HZ);
1250 dev_info(&dev->dev,
1251 "no PCI IRQ, CardBus support disabled for this socket.\n");
1252 dev_info(&dev->dev,
1253 "check your BIOS CardBus, BIOS IRQ or ACPI settings.\n");
1254 } else {
1255 socket->socket.features |= SS_CAP_CARDBUS;
1256 }
1257
1258
1259 yenta_interrogate(socket);
1260 yenta_get_socket_capabilities(socket, isa_interrupts);
1261 dev_info(&dev->dev, "Socket status: %08x\n",
1262 cb_readl(socket, CB_SOCKET_STATE));
1263
1264 yenta_fixup_parent_bridge(dev->subordinate);
1265
1266
1267 ret = pcmcia_register_socket(&socket->socket);
1268 if (ret)
1269 goto free_irq;
1270
1271
1272 ret = device_create_file(&dev->dev, &dev_attr_yenta_registers);
1273 if (ret)
1274 goto unregister_socket;
1275
1276 return ret;
1277
1278
1279 unregister_socket:
1280 pcmcia_unregister_socket(&socket->socket);
1281 free_irq:
1282 if (socket->cb_irq)
1283 free_irq(socket->cb_irq, socket);
1284 else
1285 del_timer_sync(&socket->poll_timer);
1286 unmap:
1287 iounmap(socket->base);
1288 yenta_free_resources(socket);
1289 release:
1290 pci_release_regions(dev);
1291 disable:
1292 pci_disable_device(dev);
1293 free:
1294 pci_set_drvdata(dev, NULL);
1295 kfree(socket);
1296 return ret;
1297}
1298
1299#ifdef CONFIG_PM
1300static int yenta_dev_suspend_noirq(struct device *dev)
1301{
1302 struct pci_dev *pdev = to_pci_dev(dev);
1303 struct yenta_socket *socket = pci_get_drvdata(pdev);
1304
1305 if (!socket)
1306 return 0;
1307
1308 if (socket->type && socket->type->save_state)
1309 socket->type->save_state(socket);
1310
1311 pci_save_state(pdev);
1312 pci_read_config_dword(pdev, 16*4, &socket->saved_state[0]);
1313 pci_read_config_dword(pdev, 17*4, &socket->saved_state[1]);
1314 pci_disable_device(pdev);
1315
1316 return 0;
1317}
1318
1319static int yenta_dev_resume_noirq(struct device *dev)
1320{
1321 struct pci_dev *pdev = to_pci_dev(dev);
1322 struct yenta_socket *socket = pci_get_drvdata(pdev);
1323 int ret;
1324
1325 if (!socket)
1326 return 0;
1327
1328 pci_write_config_dword(pdev, 16*4, socket->saved_state[0]);
1329 pci_write_config_dword(pdev, 17*4, socket->saved_state[1]);
1330
1331 ret = pci_enable_device(pdev);
1332 if (ret)
1333 return ret;
1334
1335 pci_set_master(pdev);
1336
1337 if (socket->type && socket->type->restore_state)
1338 socket->type->restore_state(socket);
1339
1340 return 0;
1341}
1342
1343static const struct dev_pm_ops yenta_pm_ops = {
1344 .suspend_noirq = yenta_dev_suspend_noirq,
1345 .resume_noirq = yenta_dev_resume_noirq,
1346 .freeze_noirq = yenta_dev_suspend_noirq,
1347 .thaw_noirq = yenta_dev_resume_noirq,
1348 .poweroff_noirq = yenta_dev_suspend_noirq,
1349 .restore_noirq = yenta_dev_resume_noirq,
1350};
1351
1352#define YENTA_PM_OPS (¥ta_pm_ops)
1353#else
1354#define YENTA_PM_OPS NULL
1355#endif
1356
1357#define CB_ID(vend, dev, type) \
1358 { \
1359 .vendor = vend, \
1360 .device = dev, \
1361 .subvendor = PCI_ANY_ID, \
1362 .subdevice = PCI_ANY_ID, \
1363 .class = PCI_CLASS_BRIDGE_CARDBUS << 8, \
1364 .class_mask = ~0, \
1365 .driver_data = CARDBUS_TYPE_##type, \
1366 }
1367
1368static const struct pci_device_id yenta_table[] = {
1369 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1031, TI),
1370
1371
1372
1373
1374
1375
1376#ifdef CONFIG_YENTA_TI
1377 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1210, TI),
1378
1379 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1130, TI113X),
1380 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1131, TI113X),
1381
1382 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1211, TI12XX),
1383 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1220, TI12XX),
1384 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1221, TI12XX),
1385 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1225, TI12XX),
1386 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251A, TI12XX),
1387 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251B, TI12XX),
1388 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, TI12XX),
1389 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1450, TI12XX),
1390 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1451A, TI12XX),
1391 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510, TI12XX),
1392 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, TI12XX),
1393 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1620, TI12XX),
1394 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4410, TI12XX),
1395 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4450, TI12XX),
1396 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4451, TI12XX),
1397 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4510, TI12XX),
1398 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4520, TI12XX),
1399
1400 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1250, TI1250),
1401 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1410, TI1250),
1402
1403 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX21_XX11, TI12XX),
1404 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X515, TI12XX),
1405 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX12, TI12XX),
1406 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X420, TI12XX),
1407 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X620, TI12XX),
1408 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7410, TI12XX),
1409 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7510, TI12XX),
1410 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7610, TI12XX),
1411
1412 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_710, ENE),
1413 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_712, ENE),
1414 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_720, ENE),
1415 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_722, ENE),
1416 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1211, ENE),
1417 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1225, ENE),
1418 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1410, ENE),
1419 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1420, ENE),
1420#endif
1421
1422#ifdef CONFIG_YENTA_RICOH
1423 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C465, RICOH),
1424 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C466, RICOH),
1425 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C475, RICOH),
1426 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, RICOH),
1427 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C478, RICOH),
1428#endif
1429
1430#ifdef CONFIG_YENTA_TOSHIBA
1431 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC95, TOPIC95),
1432 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC97, TOPIC97),
1433 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC100, TOPIC97),
1434#endif
1435
1436#ifdef CONFIG_YENTA_O2
1437 CB_ID(PCI_VENDOR_ID_O2, PCI_ANY_ID, O2MICRO),
1438#endif
1439
1440
1441 CB_ID(PCI_ANY_ID, PCI_ANY_ID, DEFAULT),
1442 { }
1443};
1444MODULE_DEVICE_TABLE(pci, yenta_table);
1445
1446
1447static struct pci_driver yenta_cardbus_driver = {
1448 .name = "yenta_cardbus",
1449 .id_table = yenta_table,
1450 .probe = yenta_probe,
1451 .remove = yenta_close,
1452 .driver.pm = YENTA_PM_OPS,
1453};
1454
1455module_pci_driver(yenta_cardbus_driver);
1456
1457MODULE_LICENSE("GPL");
1458